Tcwg-commits November 2021

tcwg-commits@lists.linaro.org

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16233 discussions

[gcc] branch master updated (06be28f64a0 -> e888bea2384)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 06be28f64a0 Daily bump. new e888bea2384 Re: [PATCH] PR tree-optimization/96779 Adding a missing pat [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/match.pd | 8 +++ gcc/testsuite/gcc.dg/tree-ssa/pr96779-disabled.c | 84 ++++++++++++++++++++++++ gcc/testsuite/gcc.dg/tree-ssa/pr96779.c | 79 ++++++++++++++++++++++ 3 files changed, 171 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr96779-disabled.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr96779.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_debug updated (da17c304e22 -> 1df539fd197)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_debug in repository toolchain/ci/gcc. from da17c304e22 fortran, debug: Fix up DW_AT_rank [PR103315] adds ae957bef065 Daily bump. adds 2b5b8610e98 xtensa: Fix non-robust split condition in define_insn_and_split adds b5844cb0bc8 Don't allow mask/sse/mmx mov in TLS code sequences. adds 4b1e14346a0 openmp: Handle OMP_MASKED in potential_constant_expression_ [...] adds f456eaf2e0f tree-optimization/103351 - avoid compare-debug issue wrt CD [...] adds 90986c5f0aa libgcc: Remove tbase member from struct unw_eh_callback_data adds f58bf16f672 libgcc: Remove dbase member from struct unw_eh_callback_dat [...] adds d7376862b6d libstdc++: Fix condition for definition of _GLIBCXX14_DEPRECATED adds 1aedb3920a4 openacc: Fix up C++ #pragma acc routine handling [PR101731] adds c38c547a708 docs: remove duplicate param documentation adds a944b5dec3a tree-optimization/103345: Improved load merging. adds a6e0d593707 libcpp: Fix _Pragma stringification [PR103165] adds 5440c88e61f c++: improved return expression location adds 1df539fd197 c++: remember pointer-to-member location No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 67 ++++++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/i386/constraints.md | 5 ++ gcc/config/i386/i386-protos.h | 1 + gcc/config/i386/i386.c | 30 +++++++++ gcc/config/i386/i386.md | 8 +-- gcc/config/xtensa/xtensa.md | 4 +- gcc/cp/constexpr.c | 1 + gcc/cp/parser.c | 26 ++++---- gcc/cp/pt.c | 2 + gcc/cp/typeck.c | 26 ++++++-- gcc/doc/invoke.texi | 12 ---- gcc/fortran/ChangeLog | 17 +++++ gcc/gimple-ssa-store-merging.c | 9 +-- gcc/testsuite/ChangeLog | 28 ++++++++ gcc/testsuite/c-c++-common/goacc/routine-6.c | 4 ++ gcc/testsuite/c-c++-common/gomp/pragma-3.c | 20 ++++++ gcc/testsuite/c-c++-common/gomp/pragma-4.c | 20 ++++++ gcc/testsuite/c-c++-common/gomp/pragma-5.c | 20 ++++++ gcc/testsuite/g++.dg/cpp0x/pr65327.C | 4 +- gcc/testsuite/g++.dg/cpp23/constexpr-nonlit4.C | 8 +-- gcc/testsuite/g++.dg/cpp23/constexpr-nonlit5.C | 8 +-- gcc/testsuite/g++.dg/cpp2a/constexpr-init1.C | 4 +- gcc/testsuite/g++.dg/diagnostic/ptrtomem3.C | 14 ++++ gcc/testsuite/g++.dg/gomp/masked-1.C | 14 ++++ gcc/testsuite/g++.dg/template/crash106.C | 4 +- gcc/testsuite/g++.dg/torture/pr103351.C | 88 ++++++++++++++++++++++++++ gcc/testsuite/gcc.dg/tree-ssa/pr103345.c | 53 ++++++++++++++++ gcc/testsuite/gcc.dg/tree-ssa/pr98953.c | 14 ++++ gcc/testsuite/gcc.target/i386/pr103275.c | 83 ++++++++++++++++++++++++ gcc/tree-ssa-dce.c | 4 ++ libcpp/internal.h | 3 + libcpp/macro.c | 11 +++- libgcc/unwind-dw2-fde-dip.c | 54 ++++++++++++---- libstdc++-v3/include/bits/c++config | 4 +- 35 files changed, 597 insertions(+), 75 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/goacc/routine-6.c create mode 100644 gcc/testsuite/c-c++-common/gomp/pragma-3.c create mode 100644 gcc/testsuite/c-c++-common/gomp/pragma-4.c create mode 100644 gcc/testsuite/c-c++-common/gomp/pragma-5.c create mode 100644 gcc/testsuite/g++.dg/diagnostic/ptrtomem3.C create mode 100644 gcc/testsuite/g++.dg/gomp/masked-1.C create mode 100644 gcc/testsuite/g++.dg/torture/pr103351.C create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr103345.c create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/pr98953.c create mode 100644 gcc/testsuite/gcc.target/i386/pr103275.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_debug updated (b4ab412070 -> 4d3af74a38)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_debug in repository toolchain/ci/binutils-gdb. from b4ab412070 Automatic date update in version.in adds fc6a93854b [gdb/testsuite] Speed up MACRO_AT_* calls adds 41505c0f3d [gdb/testsuite] Add test-case gdb.dwarf2/dw2-lines.exp adds 6cb22d4a8e [gdb/testsuite] Support .debug_line v4 in dwarf assembler adds 8d52378514 [gdb/testsuite] Factor out _line_finalize_header adds 44fda08939 [gdb/testsuite] Support .debug_line v5 in dwarf assembler adds 26bf28e29d [gdb/testsuite] Add target board dwarf64.exp adds bab31d1451 [gdb/symtab] Support .debug_line with DW_FORM_line_strp adds 577bf39f10 RISC-V: PR28610, Fix ASAN heap-buffer-overflow error in risc [...] adds a92d031d7e [gdb/build] Fix x86_64 x32 build adds e7e599a156 RISC-V: Replace .option rvc/norvc with .option arch, +c/-c. adds a58577878b RISC-V: Removed the redundant NULL pointer check in the risc [...] adds 7dca2ea7ff gdb: rename target_waitstatus_to_string to target_waitstatus [...] adds 06de25b7af gdb: introduce target_waitkind_str, use it in target_waitsta [...] adds c272a98cbf gdb: pass more const target_waitstatus by reference adds 4d3af74a38 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/elfxx-riscv.c | 16 +- bfd/version.h | 2 +- gas/config/tc-riscv.c | 4 + gas/testsuite/gas/riscv/align-1.s | 2 +- gas/testsuite/gas/riscv/c-add-addi.s | 2 +- gas/testsuite/gas/riscv/c-nonzero-imm.s | 2 +- gas/testsuite/gas/riscv/c-nonzero-reg.s | 2 +- gas/testsuite/gas/riscv/c-zero-imm-64.s | 2 +- gas/testsuite/gas/riscv/c-zero-imm.s | 2 +- gas/testsuite/gas/riscv/c-zero-reg.s | 2 +- gas/testsuite/gas/riscv/ext.s | 4 +- gas/testsuite/gas/riscv/mapping-01.s | 2 +- gas/testsuite/gas/riscv/mapping-02.s | 2 +- gas/testsuite/gas/riscv/mapping-03.s | 2 +- gas/testsuite/gas/riscv/mapping-04.s | 2 +- gas/testsuite/gas/riscv/no-relax-align-2.s | 2 +- gas/testsuite/gas/riscv/shamt-32.s | 4 +- gas/testsuite/gas/riscv/shamt-64.s | 4 +- gdb/break-catch-sig.c | 6 +- gdb/break-catch-syscall.c | 8 +- gdb/breakpoint.c | 52 +-- gdb/breakpoint.h | 10 +- gdb/dwarf2/line-header.c | 15 +- gdb/dwarf2/read.c | 12 + gdb/dwarf2/read.h | 5 + gdb/gnu-nat.c | 2 +- gdb/infrun.c | 75 ++--- gdb/infrun.h | 2 +- gdb/nat/amd64-linux-siginfo.c | 4 + gdb/record-btrace.c | 4 +- gdb/remote.c | 36 +- gdb/target-debug.h | 4 +- gdb/target/waitstatus.c | 72 ++-- gdb/target/waitstatus.h | 60 +++- .../imported-unit-bp-c.exp => boards/dwarf64.exp} | 9 +- ...-step-out-of-function-no-stmt.c => dw2-lines.c} | 15 +- gdb/testsuite/gdb.dwarf2/dw2-lines.exp | 170 ++++++++++ gdb/testsuite/lib/dwarf.exp | 373 ++++++++++++++++++--- gdb/unittests/common-utils-selftests.c | 7 +- gdbserver/linux-low.cc | 10 +- gdbserver/remote-utils.cc | 45 ++- gdbserver/remote-utils.h | 2 +- gdbserver/server.cc | 37 +- gdbsupport/common-utils.cc | 8 +- gdbsupport/common-utils.h | 4 +- 45 files changed, 808 insertions(+), 297 deletions(-) copy gdb/testsuite/{gdb.dwarf2/imported-unit-bp-c.exp => boards/dwarf64.exp} (76%) copy gdb/testsuite/gdb.dwarf2/{dw2-step-out-of-function-no-stmt.c => dw2-lines.c} (80%) create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-lines.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_debug updated (7aba6e77 -> 34bd82fa)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_debug in repository toolchain/ci/base-artifacts. discards 7aba6e77 0: update: binutils-gcc: 2 new 34bd82fa 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (7aba6e77) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-arm [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1540 -> 1536 bytes 02-prepare_abe/console.log.xz | Bin 2756 -> 2748 bytes 04-build_abe-binutils/console.log.xz | Bin 66052 -> 65840 bytes 05-build_abe-bootstrap_debug/console.log.xz | Bin 465872 -> 466552 bytes 06-check_regression/console.log.xz | Bin 416 -> 424 bytes 07-update_baseline/console.log | 16 ++++++++-------- jenkins/manifest.sh | 12 ++++++------ 7 files changed, 14 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (44a3aa0608 -> d8a6311dab)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/qemu. from 44a3aa0608 Merge tag 'sev-hashes-pull-request' of https://gitlab.com/be [...] adds d05dcd94ae net: vmxnet3: validate configuration values during activate [...] adds fb5eca4a57 net/colo-compare.c: Fix ACK track reverse issue adds 0656fbc7dd net/colo-compare.c: Fix incorrect return when input wrong size adds 3760a04c35 Merge tag 'net-pull-request' of https://github.com/jasowang/ [...] adds 9fc6e86e8b hw/nvme: reattach subsystem namespaces on hotplug adds 916b0f0b52 hw/nvme: change nvme-ns 'shared' default adds e2c57529c9 hw/nvme: fix buffer overrun in nvme_changed_nslist (CVE-2021-3947) adds 9c25e1db18 Merge tag 'nvme-fixes-for-6.2-pull-request' of git://git.inf [...] adds 14554b3dcc pmu: fix pmu vmstate subsection list adds a443d55c3f tests/tcg/ppc64le: Fix compile flags for byte_reverse adds d434a47905 Merge tag 'pull-ppc-20211119' of https://github.com/legoater [...] adds 6a23f8190f meson: fix botched compile check conversions adds 0cc4965049 nvmm: Fix support for stable version adds 3f26c97577 esp: ensure that async_len is reset to 0 during esp_hard_reset() adds 283191640c qtest/am53c974-test: add test for reset before transfer adds 5135fe7110 docs: Spell QEMU all caps adds fbab8cc24d meson.build: Support ncurses on MacOS and OpenBSD adds fdc6e16818 chardev/wctable: don't free the instance in wctablet_chr_finalize adds 8627edfb3f Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu [...] adds c29cd47e82 escc: always set STATUS_TXEMPTY in R_STATUS on device reset adds 319e89cdc3 escc: update the R_SPEC register SPEC_ALLSENT bit when writi [...] adds c5fbdd60cf Merge tag 'qemu-sparc-20211121' of git://github.com/mcayland [...] adds 6b717a8d44 hw/misc/sifive_u_otp: Use IF_PFLASH for the OTP device inste [...] adds 526e744302 hw/misc/sifive_u_otp: Do not reset OTP content on hardware reset adds edf1aa8d44 Merge tag 'pull-riscv-to-apply-20211122' of github.com:alist [...] adds fd08ddb9cb linux-user: Split out do_getdents, do_getdents64 adds 540a736f54 linux-user: Always use flexible arrays for dirent d_name adds 1962cb0029 linux-user: Fix member types of target_dirent64 adds aee14c77f4 linux-user: Rewrite do_getdents, do_getdents64 adds 802ae45e94 linux-user: fix Coverity CID 1464101 adds 49aaac3548 Merge tag 'linux-user-for-6.2-pull-request' of git://github. [...] adds 4323118cad ui: fix incorrect scaling on highdpi with gtk/opengl adds f14aab420c ui: fix incorrect pointer position on highdpi with gtk adds c3abdb2faf ui/gtk: graphic_hw_gl_flushed after closing dmabuf->fence_fd adds 2e572baf65 ui/vnc-clipboard: fix adding notifier twice adds 4067691a2f migration: fix dump-vmstate with modules adds d612405ed2 hw/i386/microvm: Reduce annoying debug message in dt_setup_m [...] adds 1b38ccc9a1 microvm: add missing g_free() call adds b9e5628ca5 microvm: check g_file_set_contents() return value adds 5d1f437fb4 Merge tag 'fixes-20211122-pull-request' of git://git.kraxel. [...] adds 4825eaae4f Revert "arm: tcg: Adhere to SMCCC 1.3 section 5.2" adds 89d2f9e4c6 Merge tag 'pull-target-arm-20211122' of https://git.linaro.o [...] adds 1644cccea5 nbd/server: Don't complain on certain client disconnects adds e35574226a nbd/server: Simplify zero and trim adds d8a6311dab Merge tag 'pull-nbd-2021-11-22' of https://repo.or.cz/qemu/e [...] No new revisions were added by this update. Summary of changes: chardev/wctablet.c | 1 - docs/about/deprecated.rst | 6 + docs/devel/modules.rst | 2 +- docs/devel/multi-thread-tcg.rst | 2 +- docs/devel/style.rst | 2 +- docs/devel/ui.rst | 4 +- docs/interop/nbd.txt | 6 +- docs/interop/qcow2.txt | 8 +- docs/multiseat.txt | 2 +- docs/system/device-url-syntax.rst.inc | 2 +- docs/system/devices/nvme.rst | 24 +-- docs/system/i386/sgx.rst | 26 +-- docs/u2f.txt | 2 +- hw/char/escc.c | 25 +++ hw/core/machine.c | 1 + hw/i386/microvm-dt.c | 11 +- hw/misc/macio/pmu.c | 1 + hw/misc/sifive_u_otp.c | 22 ++- hw/net/vmxnet3.c | 13 ++ hw/nvme/ctrl.c | 5 + hw/nvme/ns.c | 8 +- hw/nvme/subsys.c | 10 +- hw/scsi/esp.c | 1 + linux-user/elfload.c | 10 +- linux-user/syscall.c | 314 +++++++++++++++++----------------- linux-user/syscall_defs.h | 12 +- meson.build | 33 ++-- nbd/server.c | 26 +-- net/colo-compare.c | 8 +- softmmu/vl.c | 1 + target/arm/psci.c | 35 +++- target/i386/nvmm/nvmm-all.c | 10 ++ tests/qtest/am53c974-test.c | 30 ++++ tests/tcg/ppc64le/Makefile.target | 12 +- ui/curses.c | 4 + ui/gtk-gl-area.c | 7 +- ui/gtk.c | 17 +- ui/vnc-clipboard.c | 10 +- 38 files changed, 426 insertions(+), 287 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (3b7b4a804145 -> 7aafe467d2aa)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/llvm-project. from 3b7b4a804145 [MLIR][NFC] Simplex::markRowRedundant: assert that row is [...] adds 7c5ecc8b7e1b [mlir][vector] Insert/extract element can accept index adds cbb8b200a656 Revert "Increase gdbremote timeout." adds 0c4464a5bd35 [lldb] Fix formatted log statement adds 3b463c45288a [libc++][NFC] Assign some Ranges tasks to varconst. adds e3a7f0e2f9ab [AArch64][PAC] Select llvm.ptrauth.sign/sign.generic to PAC*. adds 24cc79b9efff [AMDGPU] Regenerate postra-bundle-memops.mir checks. NFC. adds 40c65655aff9 [PowerPC] Remove the redundant terminator instruction when [...] adds d9f56feda84a Remove unused variable. adds f2b5d81f62c7 [SampleFDO] Add pass name strings for the passes (NFC) adds f8e615462b4f [AMDGPU] Fix SIPostRABundler crash on null register used b [...] adds 734abbad79db [SCEV] Defer all work from ea12c2cb as late as possible adds 2782cb8da0b3 libfuzzer: All building libfuzzer for ARM32 adds b0ea7ef0d6c2 [msan] Clang-format the test adds 0425ea462197 [NFC][OpaquePtr][Evaluator] Remove call to PointerType::ge [...] adds 85914b757015 [clang] fix regression deducing pack expansion arguments i [...] adds 930ccf0191b4 [NFC][sanitizer] Rename persistent_allocator to stack_store adds b6169e231e2c [nfc][dfsan] Remove obsolete comment adds 368a3b522103 [NFC][sanitizer] Rename PersistentAllocator to StackStore adds 6bf71be9f920 [NFC][sanitizer] Move inline implementation of StackStore [...] adds bb50e9710336 [NFC][sanitizer] Change StackStore API to use StackTrace adds 8210948a4637 [NFC][sanitizer] constexpr StackStore::StackStore() adds d591a46d17ae [NFC][sanitizer] Fix naming in StackStore adds 3557f493534b [AARCH64] Teach AArch64FrameLowering::getFrameIndexReferen [...] adds 870dfa6b08d0 [libc++][doc] Mark project for [cmp.concept] done adds 8fb3f8448409 BPF: Workaround InstCombine trunc+icmp => mask+icmp Optimization adds 78d69182b7eb [mlir] Expose region utils functions adds 85e03cb7ebac [clang-tidy] fix debug-only test failure adds ca3795541f49 [flang] Fix printing of constc and parsing of #fir.real adds 625901636134 [clang-tidy] Fix false positive in readability-identifier- [...] adds 8c18719bae6f [ELF] Expand LMA region if output section alignment introd [...] adds f3753ad77450 [ASTImporter][NFC] Dump decl name at assertion violation adds b8207db700e6 [fir] Add fir.no_reassoc conversion adds bf55b9f0d0e9 [analyzer][docs] Ellaborate the docs of cplusplus.StringChecker adds 812e64ef0c93 [DAG] MatchRotate - support rotate-by-constant of illegal types adds 47eb3f155f9e [ELF] Ensure output section is not discarded in addStartEn [...] adds 0f652d8f527f [X86] LowerRotate - recognise hidden ROTR patterns for bet [...] adds 92d279fd6d1f [LangRef][VP] Correct operands' types in vp.select documentation adds a50fdd3fc982 [X86][Costmodel] `getReplicationShuffleCost()`: promote 1 [...] adds a751084bb452 [X86][Costmodel] `trunc v16i8 to v8i1` can appear after le [...] adds 049799c31151 [X86][Costmodel] `getReplicationShuffleCost()`: promote 1 [...] adds 30b27ecfc251 [AMDGPU] Use new opcode for indexed vgpr reads adds c2271926a4fc Make clang-format fuzz through Lexing with asserts enabled. adds 6623c02d70c3 The _Float16 type is supported on x86 systems with SSE2 en [...] adds 4f9a5c2a1438 [asm] Remove explicit branch for modifier 'l' adds bc20bcb39e02 [lld/mac] Crash even less on undefined symbols with --icf=all adds 8b76d33c5939 [asm] Allow block address operands in `asm inteldialect` adds 80256605f8c6 [OpenMP] support depend clause for taskwait directive, by [...] adds d1fdf867b18b [SLP][NFC]Introduce TreeEntry::getVectorFactor member func [...] adds 671f0930fe29 [X86] Selective relocation relaxation for +tagged-globals adds 4c94760f360b [ORC] Fix materialization of weak local symbols adds 3624c4d84500 [libc++] Adds (to|from)_chars_result operator==. adds ed86610c7bcd [libc++][nfc] Move functions to a generic place. adds 6774cc33f75f [NFC][llvm] Inclusive language: remove instance of master [...] adds ffe1741b5cca [DSE] Add additional strncpy tests. adds 86e77cdb081f [PowerPC] Add a flag for conditional trap optimization adds 4b3518d50b30 [RISCV] Pre-commit test for D98932. NFC adds af57a71d1871 [RISCV] Don't call setHasMultipleConditionRegisters(), so [...] adds 28000587e1a4 [SCEV] Revert two speculative compile time optimizations w [...] adds f3b7cc8bb2ea [lldb/test] Add ability to terminate connection from a gdb [...] adds d9bbad277c44 [libc][Obvious][NFC] A bunch of cosmetic cleanup. adds 587a397917b2 Skip tests when compiler with older versions of clang adds f849640a0c6c [MLIR] Make the ROCM integration tests runnable adds 76effb001d33 [LV] Remove obsolete comment about creating a dummy block (NFC) adds d448fcd9b223 [analyzer][NFC] Introduce CallDescriptionSets adds 6c512703a9e6 [analyzer][NFC] Introduce CallDescription::matches() in ad [...] adds f18da190b0db [analyzer][NFC] Switch to using CallDescription::matches() [...] adds 9ad0a90baa8c [analyzer][NFC] Demonstrate the use of CallDescriptionSet adds de9d7e42aca2 [analyzer][NFC] CallDescription should own the qualified n [...] adds 97f1bf15b154 [analyzer][NFC] Consolidate the inner representation of Ca [...] adds e6ef134f3c77 [analyzer][NFC] Use enum for CallDescription flags adds d5de568cc737 [analyzer][NFC] MaybeUInt -> MaybeCount adds 7eec832def57 [DSE] Improve handling of `strncpy` in Dead Store Elimination adds ffdace4892bd [SROA] Add new test cases to cover existing SROA behavior [...] adds 06dbb2856967 [mlir][vector] Remove usage of shapecast to remove unit dim adds 7cde5165131f [mlir][vector] NFC, move some vector patterns in a separate file adds 9cdaf0b01b29 [openmp][amdgpu][nfc] Inline interop_hsa_get_kernel_info i [...] adds 2997441b85c0 [ELF] Support discarding .got.plt adds ff7f2cfa959b [AMDGPU] Add an implicit use of M0 to all V_MOV_B32_indire [...] adds 47555d73f653 [mlir][gpu] Extend shuffle op modes and add nvvm lowering adds bd22554af06e [MLIR][GPU] Run generic LLVM optimizations when serializin [...] adds 1b4c0cb3918a [libc++] Avoid potential truncation warnings in std::abs test adds e1ce3dabf0c7 [libc++] Fix some tests that were broken in the single-thr [...] adds e0f58444e126 [libc++] Fix feature test macro for __cpp_lib_to_chars adds d8e5a0c42bd8 [clang][NFC] Inclusive terms: replace some uses of sanity [...] adds b07b5bd72716 [libc++] Test that our algorithms never copy a user-provid [...] adds 04954824ee15 [openmp][amdgpu][nfc] Simplify implicit args handling adds 3f3680dff3e7 DWARFVerifier: Simplify name lookups adds 3fcdd182e978 NFC: Callout restriction on folding 0-result ops in docume [...] adds 20f79f8caa3a [MLIR][GPU] Make the path to ROCm a runtime option adds 290cddcd139d Allow __attribute__((swift_attr)) in attribute push pragmas adds e059329b835a [libc++][NFC] Add missing include in test adds e9d12c248013 [PowerPC][NFC] Add a series of codegen tests for vector re [...] adds 491efa7f31cb [InstCombine] add/adjust tests for mask of sext i1; NFC adds a075d6722283 [Sema] fix nondeterminism in ASTContext::getDeducedTemplat [...] adds d729f4c38fca [mlir] Bug fix. Stream must outlive the pass manager. adds 3f3bee42d229 [NFC][llvm] Inclusive language: remove instance of master [...] adds a6f53afbcb4d [MLIR][GPU] Link in device libraries during HSA compilatio [...] adds de11de308b64 [InstrProf] Use i32 for GEP index from lowering llvm.instr [...] adds f764a1a5bd7c [clangd] Avoid possible crash: apply configuration after b [...] adds 241df03ce5f0 [NFC] Test commit, add whitespace to end-of-line adds 1bd4dc4f2854 [hmaptool] Port to python3 adds 97b9e8438e26 [GVN][NFC] Remove redundant check adds 43f5f6916f0e [ORC][JITLink] Move JITDylib name into JITLinkDylib base class. adds 18f935122348 [AMDGPU] Do not generate ELF symbols for the local branch [...] adds d1abf481daf2 [llvm] Use range-based for loops (NFC) adds 0dec59305a52 [ORC] Make JITDylib::AsynchronousSymbolQuerySet private. adds 1cb991e75405 [X86] Add test case for pr52567. NFC adds a4373f6753fa [X86] Don't combine (x86cmp (trunc (movmsk (bitcast X))), [...] adds 1f9ca5adbac0 [MLIR] Avoid creation of buggy affine maps while replacing [...] adds 2f364f6f0d3a [NFC][X86][MCA] Add forgotten test coverage for AVX512's V [...] adds da47a63e0394 [NFC][X86][Costmodel] Add AVX512DQ runlines to trunc.ll/extend.ll adds 7dbbb5d3a46e compiler-rt: Use FreeBSD's elf_aux_info to detect AArch64 [...] adds fbfe8fcbc31d [Libomptarget] Remove undefined symbol in old runtime adds ec7b0d4d3458 [MLIR] Simplify Semi-affine expressions by rule based matc [...] adds 401b76fdf2b3 [libc++] [test] Eliminate libcpp-no-noexcept-function-type [...] adds 1d007d0e5a92 [InstCombine] add tests for bitwise logic with bool op; NFC adds 337948ac6e22 [InstCombine] add folds for binop with sexted bool and con [...] adds cf8efbd30e43 [VPlan] Wrap vector loop blocks in region. adds 25a9ee52f139 [CVP] Add tests for implied conditions using urem (NFC) adds cd84cab6b37f [LVI] Support urem in implied conditions adds 0a2bde94a06c [LVI] Drop requirement that modulus is constant adds fefe20b99313 [clang-tidy] performance-unnecessary-copy-initialization: [...] adds aeba28bc6244 [DSE] Drop hasAnalyzableMemoryWrite() (NFCI) adds df70cf5e1409 [NFC][X86][Costmodel] Actually test +prefer-256-bit in rep [...] adds e74114add3b3 [libc++] [doc] Mark some spaceship-related LWG issues as " [...] adds dca681fee93e [libc++][NFC] Fix typo in ranges::iterator_t synopsis adds 6cc820a3e284 [X86][FP16] Relax the pattern condition for VZEXT_MOVL to [...] adds f6bce30cf949 [llvm] Use range-based for loops (NFC) adds 648157b05a1d [ELF] Move getOutputSectionName from Writer.cpp to LinkerS [...] adds 2b9c41189e75 [AArch64] Extra testing for sinking splats to various inst [...] adds 3234f2d9c166 [ARM][ParallelDSP] Regenerate complex_dot_prod.ll test adds ad48ef1e3142 [MLIR][NFC] Simplex::restoreRow: improve documentation adds 73d52ee7859f Add a best practice section on how to configure a fast builder adds 357d6362891e [PowerPC] Regenerate rlwinm2.ll test adds eced44637cfb [Thumb2] Regenerate ext + rot tests adds 4a5e1ffcf9b8 [ARM] Regenerate sxt_rot.ll tests adds fc981cedea07 [llvm] Use range-based for loops (NFC) adds c133fb321f7c [CodeGen] Use llvm::is_contained (NFC) adds 6f9cceb7751a [mlir] Move trait to InferTypeOpInterface adds e5a4d0f1498c [mlir] Fix unused function warning (NFC) adds 1dc62f2653f8 [libc++] Implement P1272R4 (std::byteswap) adds 0a413506a29e [gn build] Port 1dc62f2653f8 adds a60b63940a65 [libc++][NFC] Sort includes in __ranges/concepts.h adds b72b56016a6b NFC: clang-format lib/Transforms/Instrumentation/InstrProf [...] adds ea5421bd0db3 [llvm] Use range-based for loops (NFC) adds 49e3838145df [llvm] Use make_early_inc_range (NFC) adds af0ecfccae82 [RISCV] Generate pseudo instruction li adds a05b694b1e1d [ELF][NFC] Do not pass region name to expandMemoryRegion() adds 6a3958247aee tsan: add another fork test adds 2ac339ef5f0f [C++20] [Coroutines] Warn for deprecated form 'for co_await' adds 83484f8472ad Fix nits in clang-tidy's documentation (NFC) adds 760d4d03d5d3 [AArch64] Sink splat shuffles to lane index intrinsics adds b5f20372a82f [clangd] IncludeCleaner: Mark possible expr resolutions as used adds a82942dd07ea Add missing clang-tidy args in index.rst (NFC) adds 84bf5e328664 Fix various problems found by fuzzing. adds 2f1c037bbdc4 [libc] Remove unused variable adds a7027bb79971 [LV] Pre-commit test for D111846 adds d92aabc33666 [MLIR][NFC] Simplex: remove repeated words in comment adds 4d21b64464ac [BPI] Look-up tables for non-loop branches. NFC. adds a9e236bed835 [mlir][Vector] Add a vblendps-based impl for transpose8x8 [...] adds 0ccc44cec067 [mlir][linalg] Fix tile and fuse for outermost reduction. adds 789c88e80e87 [mlir] Fix unintentional mutation by VectorType/RankedTens [...] adds 4348cd42c385 [LV] Drop integer poison-generating flags from instruction [...] adds e3d386ea2733 [mlir][linalg] Add a tile and fuse on tensors pattern. adds 050cc1cd6e68 [mlir] Add InitializeNativeTargetAsmParser to ExecutionEngine. adds 8d09dd61c381 [X86][TTI] Costmodel for AVX512DQ's VPMOVM2[DQ] / VPMOV[DQ [...] adds 704d92607d26 [X86][TTI] Finish costmodel for AVX512BW's VPMOVM2[BW] / V [...] adds 56db1c072c92 [DA][NFC] Update publication - add remarks adds 955c72c35caf [AArch64][ARM] Add missing SVE/SVE2 features from Cortex-A710 adds f7751a3a4218 [mlir][linalg] Remove tile and fuse test pass (NFC). adds 106f3074996c Rename MlirExecutionEngine lookup to lookupPacked adds 32c43241e716 [mlir][linalg] Always generate an extract/insert slice pai [...] adds 247a1a55eb6a [mlir][linalg] Use getAsOpFoldResult in padding (NFC). adds 7c8ae65f2c3d [lldb/test] Make it possible to run the mock gdb server on [...] adds 7f09ab08de5a [lldb] Fix [some] leaks in python bindings adds d633db8f9dd4 [SCEV] Fix and validate ValueExprMap/ExprValueMap consistency adds 0512bf354063 [MLIR] PresburgerSetTest: fix comment and add a test case adds 1b927b68b66e [libc] add memmove basic building blocks adds 62e9acad0a51 Revert "[SCEV] Fix and validate ValueExprMap/ExprValueMap [...] adds e69d50d9ff3e tsan: disable instrumentation in runtime callbacks in tests adds 1784fe0532a6 tsan: new runtime (v3) adds 137d3474ca39 [RISCV] Reverse the order of loading/storing callee-saved [...] adds dc9b5550b223 [NFC][llvm][Hexagon] Inclusive Terms remove uses of sanity [...] adds 02298c15d5e0 [SLP][NFC]Add a test that reveals the problem in the emiss [...] adds 59a26448a60e [Target] Use range-based for loops (NFC) adds bf20a3b9b94a Use std::string::substr (NFC) adds ffc32efd1cd6 [Analyzer][Core] Simplify IntSym in SValBuilder adds cc9fdedba7c9 [libc++] Improve CMake include directory search. adds 7c2d51474aae [asm] Allow labels as operands in intel asm syntax adds 2fb3c05b34a0 [asm] Merge EmitMSInlineAsmStr() and EmitGCCInlineAsmStr() adds 04a6dc06a07b [libc++] [NFC] Mark P0858R0 as implemented adds e7cee55c9d6b [libc++] Remove uses of printf in some test support headers adds a62b60167ddb [flang] Predefine unit 0 connected to stderr adds 774f7832fb25 [runtimes] Do not force -stdlib=libc++ on Apple platforms adds 9c5982ef8e95 [mlir] support recursive types in type conversion infra adds 93284120f28c [mlir][vector] Fix TransferOpReduceRank for 0-D tensors adds ed8b5b37abb1 [hwasan] fix arguments to symbolizer. adds 996ef895cd3d [flang] Add -fno-automatic, refine IsSaved() adds 5f18ae39880f Revert "tsan: new runtime (v3)" adds 344cef6695e9 [libc++] Granularize the <random> header. NFCI. adds d8380ad977e9 [libc++] [P1614] Implement [cmp.alg]'s std::{strong,weak,p [...] adds 71e1f0caf4b6 [gn build] Port 344cef6695e9 adds 22de6e370641 [gn build] Port d8380ad977e9 adds 2e67276d984d libfuzzer: Disable broken tests for arm adds c0efe8f26635 [libc++][NFC] Reformat comment about D68480 support adds c5bf8d6f764c [libcxx][NFC] adds status entry for ranges algorithms adds b8bba3d80168 [libcxx][NFC] adds var-const@ as the owner for the uniniti [...] adds c407769f5e6c [InstCombine] (~(a | b) & c) | ~(c | (a ^ b)) -> ~((a | b) [...] adds 1a76a3a7e42d [docs] Incorprate first round of feedback on D114325 adds 944071eca2c8 [lld-macho] Don't replace local personality symbol with La [...] adds 5684a614dd1c [HWASan] Remove -Wa,-mrelax-relocations=no flag. adds e0b7bee7cf8e Revert "[mlir][Vector] Add a vblendps-based impl for trans [...] adds a40dcd060e9d [Driver] correct typo in FreeBSD 14 test adds 8bfcf1ab6c6d [InstCombine] move/add tests for binops with sext operand; NFC adds 78dc50e5a1a3 [InstCombine] avoid 'tmp' usage in test files; NFC adds cbb75129b7cf [InstCombine] regenerate test checks; NFC adds 3028bca6a987 [mlir] Move AllocationOpInterface to Bufferize/IR/Allocati [...] adds ad501054f1b5 [NFC][clang] Inclusive language: rename master variable to [...] adds de18b7dee6a8 Revert "[mlir] Move AllocationOpInterface to Bufferize/IR/ [...] adds 44a3916f78b0 [AMDGPU] Allow VOP3 source modifiers in fpow expansion adds 592504aa26eb [NFC][llvm] Inclusive language: replace master with main i [...] adds 8e2fd879e6f9 [PowerPC] [Clang] Enable Intel intrinsics support on FreeBSD adds 42bfd059bf80 [flang] Move IsCoarray() to fix shared library build adds 692131f41aa1 [compiler-rt] Explicitly set dependency on libcxx for MemP [...] adds 65b82b928ee5 [gn build] Port 8e2fd879e6f9 adds 2e6a0a8b81d7 [lldb] Load the fblldb module automatically adds fcd288b52aa7 [formatters] Add a libstdcpp formatter for for unordered_ [...] adds 91f78eb5cf93 Revert "[lldb] Load the fblldb module automatically" adds 615ecd8afc43 [HWASan] Move LTO test to separate file. new 6149e57dc131 [ThreadPool] Support returning futures with results. new 2975f37d8d4f [llvm-diff] Implement diff of PHI nodes new 98daa4e425b0 [MLIR] Fix incorrect removal of source loop in loop fusion new a4b92d61580d [memprof] Remove the "Live on exit:" print for text format. new f6718fc6d302 [mlir] FlatAffineConstraint parsing for unit tests new 2dec2aa3ad08 [Driver] Default to libc++ on FreeBSD new 966b72098363 [mlir][memref] Fix expanded shape ops memref.cast folding [...] new 7aafe467d2aa [ELF] Simplify a condition with config->copyRelocs. NFC The 8 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../performance/UnnecessaryCopyInitialization.cpp | 8 +- .../readability/IdentifierNamingCheck.cpp | 2 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 5 +- clang-tools-extra/clangd/IncludeCleaner.cpp | 8 + .../clangd/unittests/IncludeCleanerTests.cpp | 4 + clang-tools-extra/docs/clang-tidy/index.rst | 40 +- ...opy-initialization-excluded-container-types.cpp | 10 + .../checkers/readability-identifier-naming.cpp | 76 +- .../test/clang-tidy/infrastructure/pr37091.cpp | 2 +- clang/docs/LanguageExtensions.rst | 2 +- clang/docs/OpenMPSupport.rst | 2 +- clang/docs/ReleaseNotes.rst | 1 + clang/docs/analyzer/checkers.rst | 11 +- clang/include/clang/AST/Redeclarable.h | 3 +- clang/include/clang/AST/StmtOpenMP.h | 11 +- clang/include/clang/AST/Type.h | 6 +- clang/include/clang/Analysis/CFG.h | 2 +- clang/include/clang/Basic/Attr.td | 1 + clang/include/clang/Basic/DiagnosticGroups.td | 4 +- clang/include/clang/Basic/DiagnosticParseKinds.td | 3 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 + clang/include/clang/CodeGen/CGFunctionInfo.h | 2 +- clang/include/clang/Driver/Options.td | 5 +- clang/include/clang/Sema/Lookup.h | 7 +- clang/include/clang/Sema/Sema.h | 3 +- .../Core/PathSensitive/CallDescription.h | 69 +- .../StaticAnalyzer/Core/PathSensitive/CallEvent.h | 14 - clang/lib/AST/ASTContext.cpp | 3 + clang/lib/AST/ASTImporterLookupTable.cpp | 14 +- clang/lib/AST/StmtOpenMP.cpp | 14 +- clang/lib/Analysis/BodyFarm.cpp | 5 +- clang/lib/Analysis/RetainSummaryManager.cpp | 2 +- clang/lib/Basic/DiagnosticIDs.cpp | 2 +- clang/lib/Basic/SourceManager.cpp | 11 +- clang/lib/Basic/Targets/X86.cpp | 4 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 53 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 6 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 9 +- clang/lib/Driver/CMakeLists.txt | 1 + clang/lib/Driver/Driver.cpp | 7 +- clang/lib/Driver/ToolChains/Clang.cpp | 1 - clang/lib/Driver/ToolChains/Flang.cpp | 3 +- clang/lib/Driver/ToolChains/FreeBSD.cpp | 3 +- clang/lib/Driver/ToolChains/PPCFreeBSD.cpp | 28 + clang/lib/Driver/ToolChains/PPCFreeBSD.h | 33 + clang/lib/Format/ContinuationIndenter.cpp | 7 +- clang/lib/Format/Format.cpp | 32 +- clang/lib/Format/QualifierAlignmentFixer.cpp | 12 +- clang/lib/Format/SortJavaScriptImports.cpp | 5 +- clang/lib/Format/TokenAnalyzer.cpp | 49 +- clang/lib/Format/TokenAnalyzer.h | 12 +- clang/lib/Format/TokenAnnotator.cpp | 10 +- clang/lib/Format/UnwrappedLineParser.cpp | 19 +- clang/lib/Format/WhitespaceManager.cpp | 12 +- clang/lib/Frontend/FrontendActions.cpp | 2 +- clang/lib/Frontend/Rewrite/RewriteModernObjC.cpp | 2 +- clang/lib/Frontend/Rewrite/RewriteObjC.cpp | 2 +- clang/lib/Headers/ppc_wrappers/emmintrin.h | 5 +- clang/lib/Headers/ppc_wrappers/mm_malloc.h | 2 +- clang/lib/Headers/ppc_wrappers/mmintrin.h | 5 +- clang/lib/Headers/ppc_wrappers/pmmintrin.h | 5 +- clang/lib/Headers/ppc_wrappers/smmintrin.h | 5 +- clang/lib/Headers/ppc_wrappers/tmmintrin.h | 5 +- clang/lib/Headers/ppc_wrappers/xmmintrin.h | 5 +- clang/lib/Parse/ParseStmt.cpp | 3 + clang/lib/Sema/SemaChecking.cpp | 7 +- clang/lib/Sema/SemaDecl.cpp | 8 +- clang/lib/Sema/SemaDeclCXX.cpp | 5 +- clang/lib/Sema/SemaExpr.cpp | 1 - clang/lib/Sema/SemaExprCXX.cpp | 5 +- clang/lib/Sema/SemaLookup.cpp | 4 +- clang/lib/Sema/SemaOpenMP.cpp | 14 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 7 + clang/lib/Serialization/ASTReaderStmt.cpp | 5 +- clang/lib/Serialization/ASTWriterStmt.cpp | 1 + .../Checkers/BasicObjCFoundationChecks.cpp | 13 +- .../Checkers/BlockInCriticalSectionChecker.cpp | 27 +- .../lib/StaticAnalyzer/Checkers/CStringChecker.cpp | 11 +- .../lib/StaticAnalyzer/Checkers/ChrootChecker.cpp | 6 +- .../StaticAnalyzer/Checkers/ContainerModeling.cpp | 47 +- .../Checkers/DebugContainerModeling.cpp | 8 +- .../Checkers/DebugIteratorModeling.cpp | 12 +- .../Checkers/InnerPointerChecker.cpp | 16 +- clang/lib/StaticAnalyzer/Checkers/MIGChecker.cpp | 6 +- .../Checkers/MmapWriteExecChecker.cpp | 2 +- .../Checkers/SimpleStreamChecker.cpp | 4 +- .../StaticAnalyzer/Checkers/SmartPtrModeling.cpp | 5 +- .../Checkers/StdLibraryFunctionsChecker.cpp | 6 +- .../lib/StaticAnalyzer/Checkers/StringChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/UnixAPIChecker.cpp | 5 +- .../lib/StaticAnalyzer/Checkers/ValistChecker.cpp | 8 +- .../Checkers/cert/PutenvWithAutoChecker.cpp | 2 +- .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 7 +- clang/lib/StaticAnalyzer/Core/CallDescription.cpp | 124 +- clang/lib/StaticAnalyzer/Core/CallEvent.cpp | 82 - clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 4 +- .../lib/StaticAnalyzer/Core/SimpleSValBuilder.cpp | 13 + clang/lib/StaticAnalyzer/Core/Store.cpp | 2 +- clang/lib/Tooling/Syntax/Tree.cpp | 2 +- clang/test/AST/attr-swift_attr.m | 10 +- .../test/Analysis/svalbuilder-simplify-intsym.cpp | 20 + .../temp.deduct/temp.deduct.partial/p12.cpp | 13 +- clang/test/CodeGen/X86/Float16-arithmetic.c | 73 + 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.../Transforms/InstCombine/InstCombineInternal.h | 1 + .../InstCombine/InstructionCombining.cpp | 23 + .../Transforms/Instrumentation/InstrProfiling.cpp | 43 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 59 +- llvm/lib/Transforms/Utils/CloneModule.cpp | 72 +- llvm/lib/Transforms/Utils/Evaluator.cpp | 15 +- llvm/lib/Transforms/Utils/LoopSimplify.cpp | 13 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 12 +- llvm/lib/Transforms/Utils/MetaRenamer.cpp | 6 +- llvm/lib/Transforms/Utils/VNCoercion.cpp | 14 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 187 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 48 +- llvm/lib/Transforms/Vectorize/VPlan.h | 12 +- .../BranchProbabilityInfo/pointer_heuristics.ll | 70 + llvm/test/Analysis/CostModel/X86/extend.ll | 1376 +++-- .../CostModel/X86/min-legal-vector-width.ll | 28 +- .../CostModel/X86/shuffle-replication-i1.ll | 562 +- .../CostModel/X86/shuffle-replication-i16.ll | 428 +- .../CostModel/X86/shuffle-replication-i32.ll | 172 +- .../CostModel/X86/shuffle-replication-i64.ll | 151 +- .../CostModel/X86/shuffle-replication-i8.ll | 428 +- llvm/test/Analysis/CostModel/X86/trunc.ll | 2489 ++++++--- .../AArch64/ptrauth-intrinsic-sign-generic.ll | 14 + .../test/CodeGen/AArch64/ptrauth-intrinsic-sign.ll | 77 + llvm/test/CodeGen/AArch64/sinksplat.ll | 375 ++ .../CodeGen/AArch64/statepoint-call-lowering-sp.ll | 23 + .../GlobalISel/atomic_optimizations_mul_one.ll | 24 +- .../CodeGen/AMDGPU/GlobalISel/bool-legalization.ll | 8 +- .../AMDGPU/GlobalISel/divergent-control-flow.ll | 42 +- .../AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll | 16 +- .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll | 4 +- .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll | 4 +- .../AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll | 32 +- .../AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll | 12 +- .../AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll | 12 +- .../AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll | 12 +- .../AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll | 344 +- llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll | 4 +- .../test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll | 16 +- llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll | 4 +- llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll | 24 +- .../CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll | 20 +- llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll | 60 +- llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll | 60 +- llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll | 60 +- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll | 60 +- llvm/test/CodeGen/AMDGPU/amd.endpgm.ll | 8 +- .../CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll | 2598 +++++----- .../AMDGPU/atomic_optimizations_global_pointer.ll | 184 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 416 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 100 +- llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll | 12 +- llvm/test/CodeGen/AMDGPU/basic-branch.ll | 4 +- llvm/test/CodeGen/AMDGPU/branch-condition-and.ll | 4 +- llvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll | 2 +- llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll | 32 +- .../AMDGPU/branch-relaxation-debug-info.mir | 6 +- .../branch-relaxation-gfx10-branch-offset-bug.ll | 16 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 72 +- llvm/test/CodeGen/AMDGPU/bypass-div.ll | 210 +- llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 2 +- llvm/test/CodeGen/AMDGPU/call-skip.ll | 6 +- llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll | 6 +- .../CodeGen/AMDGPU/cgp-addressing-modes-flat.ll | 2 +- .../CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll | 4 +- .../CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll | 4 +- llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll | 14 +- llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll | 18 +- llvm/test/CodeGen/AMDGPU/collapse-endcf.ll | 26 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 14 +- .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 16 +- llvm/test/CodeGen/AMDGPU/ctpop16.ll | 24 +- llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll | 12 +- .../AMDGPU/divergent-branch-uniform-condition.ll | 18 +- llvm/test/CodeGen/AMDGPU/early-if-convert.ll | 12 +- llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll | 2 +- .../AMDGPU/expand-scalar-carry-out-select-user.ll | 12 +- llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll | 44 +- llvm/test/CodeGen/AMDGPU/fpow.ll | 200 +- llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll | 100 +- .../CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll | 8 +- llvm/test/CodeGen/AMDGPU/global-saddr-load.ll | 16 +- llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll | 20 +- .../CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll | 4 +- llvm/test/CodeGen/AMDGPU/idiv-licm.ll | 64 +- llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll | 4 +- .../CodeGen/AMDGPU/indirect-addressing-si-noopt.ll | 4 +- llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll | 6 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 72 +- llvm/test/CodeGen/AMDGPU/infinite-loop.ll | 40 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 24 +- llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll | 56 +- llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll | 8 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll | 2 +- .../test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll | 2 +- .../AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll | 12 +- .../llvm.amdgcn.struct.buffer.load.format.v3f16.ll | 12 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll | 344 +- llvm/test/CodeGen/AMDGPU/llvm.mulo.ll | 65 +- .../AMDGPU/local-stack-alloc-block-sp-reference.ll | 24 +- .../AMDGPU/loop-live-out-copy-undef-subrange.ll | 8 +- llvm/test/CodeGen/AMDGPU/loop-prefetch.ll | 38 +- llvm/test/CodeGen/AMDGPU/loop_break.ll | 48 +- llvm/test/CodeGen/AMDGPU/mfma-loop.ll | 22 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 30 +- llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 12 +- llvm/test/CodeGen/AMDGPU/mul_int24.ll | 12 +- llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll | 5 +- .../CodeGen/AMDGPU/multi-divergent-exit-region.ll | 4 +- llvm/test/CodeGen/AMDGPU/multilevel-break.ll | 46 +- llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll | 42 +- llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll | 40 +- llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll | 12 +- .../CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll | 16 +- llvm/test/CodeGen/AMDGPU/postra-bundle-memops.mir | 249 +- llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll | 2 +- llvm/test/CodeGen/AMDGPU/ret_jump.ll | 8 +- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 4 +- llvm/test/CodeGen/AMDGPU/sdiv64.ll | 380 +- llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir | 212 +- llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll | 36 +- llvm/test/CodeGen/AMDGPU/sgpr-copy.ll | 2 +- llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll | 4 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll | 24 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll | 92 +- .../CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll | 8 +- .../si-lower-control-flow-unreachable-block.ll | 6 +- llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll | 4 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 424 +- llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll | 4 +- llvm/test/CodeGen/AMDGPU/spill-cfg-position.ll | 4 +- llvm/test/CodeGen/AMDGPU/spill-m0.ll | 2 +- llvm/test/CodeGen/AMDGPU/srem64.ll | 541 +- .../stack-pointer-offset-relative-frameindex.ll | 8 +- llvm/test/CodeGen/AMDGPU/subvector-test.mir | 4 +- llvm/test/CodeGen/AMDGPU/trap-abis.ll | 48 +- llvm/test/CodeGen/AMDGPU/udiv.ll | 99 +- llvm/test/CodeGen/AMDGPU/udiv64.ll | 568 +-- .../CodeGen/AMDGPU/undefined-subreg-liverange.ll | 8 +- llvm/test/CodeGen/AMDGPU/uniform-cfg.ll | 50 +- llvm/test/CodeGen/AMDGPU/uniform-crash.ll | 6 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 4 +- .../AMDGPU/unstructured-cfg-def-use-issue.ll | 46 +- llvm/test/CodeGen/AMDGPU/urem64.ll | 470 +- llvm/test/CodeGen/AMDGPU/valu-i1.ll | 24 +- .../vgpr-descriptor-waterfall-loop-idom-update.ll | 8 +- llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll | 46 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 16 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 6 +- llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll | 4 +- .../CodeGen/ARM/2007-04-02-RegScavengerAssert.ll | 4 +- .../CodeGen/ARM/ParallelDSP/complex_dot_prod.ll | 192 +- llvm/test/CodeGen/ARM/rotate.ll | 4 +- llvm/test/CodeGen/ARM/sxt_rot.ll | 82 +- .../CodeGen/AVR/inline-asm/inline-asm-invalid.ll | 10 + llvm/test/CodeGen/BPF/adjust-opt-icmp4.ll | 85 + llvm/test/CodeGen/Hexagon/abi-padding-2.ll | 2 +- .../CodeGen/Hexagon/pipeliner/swp-phi-start.mir | 2 +- .../test/CodeGen/PowerPC/mi-peepholes-trap-opt.mir | 88 +- llvm/test/CodeGen/PowerPC/rlwinm2.ll | 17 +- llvm/test/CodeGen/PowerPC/vector-reduce-add.ll | 1808 +++++++ llvm/test/CodeGen/PowerPC/vector-reduce-and.ll | 390 ++ llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll | 4247 ++++++++++++++++ llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll | 1169 +++++ llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll | 1169 +++++ llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll | 1717 +++++++ llvm/test/CodeGen/PowerPC/vector-reduce-mul.ll | 204 + llvm/test/CodeGen/PowerPC/vector-reduce-or.ll | 392 ++ llvm/test/CodeGen/PowerPC/vector-reduce-smax.ll | 796 +++ llvm/test/CodeGen/PowerPC/vector-reduce-smin.ll | 796 +++ llvm/test/CodeGen/PowerPC/vector-reduce-umax.ll | 796 +++ llvm/test/CodeGen/PowerPC/vector-reduce-umin.ll | 796 +++ llvm/test/CodeGen/PowerPC/vector-reduce-xor.ll | 392 ++ llvm/test/CodeGen/PowerPC/vector-rotates.ll | 25 +- llvm/test/CodeGen/RISCV/addimm-mulimm.ll | 70 +- llvm/test/CodeGen/RISCV/aext-to-sext.ll | 4 +- llvm/test/CodeGen/RISCV/alloca.ll | 30 +- llvm/test/CodeGen/RISCV/alu32.ll | 12 +- llvm/test/CodeGen/RISCV/alu64.ll | 30 +- llvm/test/CodeGen/RISCV/analyze-branch.ll | 4 +- llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll | 400 +- llvm/test/CodeGen/RISCV/atomic-load-store.ll | 144 +- llvm/test/CodeGen/RISCV/atomic-rmw.ll | 2658 +++++----- llvm/test/CodeGen/RISCV/atomic-signext.ll | 542 +- llvm/test/CodeGen/RISCV/branch-relaxation.ll | 4 +- llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 68 +- llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll | 208 +- llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll | 108 +- llvm/test/CodeGen/RISCV/callee-saved-gprs.ll | 192 +- llvm/test/CodeGen/RISCV/calling-conv-half.ll | 132 +- .../RISCV/calling-conv-ilp32-ilp32f-common.ll | 68 +- .../calling-conv-ilp32-ilp32f-ilp32d-common.ll | 230 +- llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll | 52 +- llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll | 54 +- .../RISCV/calling-conv-ilp32f-ilp32d-common.ll | 36 +- .../RISCV/calling-conv-lp64-lp64f-common.ll | 8 +- .../RISCV/calling-conv-lp64-lp64f-lp64d-common.ll | 104 +- llvm/test/CodeGen/RISCV/calling-conv-lp64.ll | 52 +- .../test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll | 32 +- llvm/test/CodeGen/RISCV/calls.ll | 8 +- llvm/test/CodeGen/RISCV/codemodel-lowering.ll | 16 +- llvm/test/CodeGen/RISCV/copysign-casts.ll | 22 +- llvm/test/CodeGen/RISCV/div.ll | 124 +- llvm/test/CodeGen/RISCV/double-arith.ll | 234 +- .../CodeGen/RISCV/double-bitmanip-dagcombines.ll | 12 +- llvm/test/CodeGen/RISCV/double-br-fcmp.ll | 8 +- llvm/test/CodeGen/RISCV/double-calling-conv.ll | 26 +- llvm/test/CodeGen/RISCV/double-convert.ll | 206 +- llvm/test/CodeGen/RISCV/double-fcmp.ll | 56 +- llvm/test/CodeGen/RISCV/double-intrinsics.ll | 30 +- llvm/test/CodeGen/RISCV/double-previous-failure.ll | 4 +- .../CodeGen/RISCV/exception-pointer-register.ll | 8 +- llvm/test/CodeGen/RISCV/fastcc-int.ll | 4 +- llvm/test/CodeGen/RISCV/float-arith.ll | 148 +- .../RISCV/float-bit-preserving-dagcombines.ll | 24 +- llvm/test/CodeGen/RISCV/float-br-fcmp.ll | 18 +- llvm/test/CodeGen/RISCV/float-convert.ll | 174 +- llvm/test/CodeGen/RISCV/float-fcmp.ll | 48 +- llvm/test/CodeGen/RISCV/float-intrinsics.ll | 16 +- llvm/test/CodeGen/RISCV/flt-rounds.ll | 4 +- llvm/test/CodeGen/RISCV/fp-imm.ll | 10 +- llvm/test/CodeGen/RISCV/fp16-promote.ll | 16 +- llvm/test/CodeGen/RISCV/frame-info.ll | 16 +- llvm/test/CodeGen/RISCV/frame.ll | 6 +- llvm/test/CodeGen/RISCV/frameaddr-returnaddr.ll | 16 +- llvm/test/CodeGen/RISCV/half-arith.ll | 380 +- llvm/test/CodeGen/RISCV/half-br-fcmp.ll | 8 +- llvm/test/CodeGen/RISCV/half-convert.ll | 270 +- llvm/test/CodeGen/RISCV/half-fcmp.ll | 16 +- llvm/test/CodeGen/RISCV/half-intrinsics.ll | 56 +- llvm/test/CodeGen/RISCV/half-mem.ll | 4 +- llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll | 16 +- llvm/test/CodeGen/RISCV/i32-icmp.ll | 4 +- llvm/test/CodeGen/RISCV/imm.ll | 180 +- llvm/test/CodeGen/RISCV/indirectbr.ll | 4 +- llvm/test/CodeGen/RISCV/interrupt-attr-callee.ll | 6 +- llvm/test/CodeGen/RISCV/interrupt-attr-nocall.ll | 374 +- llvm/test/CodeGen/RISCV/interrupt-attr.ll | 884 ++-- llvm/test/CodeGen/RISCV/jumptable.ll | 128 +- llvm/test/CodeGen/RISCV/large-stack.ll | 10 +- llvm/test/CodeGen/RISCV/legalize-fneg.ll | 6 +- llvm/test/CodeGen/RISCV/lsr-legaladdimm.ll | 4 +- llvm/test/CodeGen/RISCV/mul.ll | 88 +- .../CodeGen/RISCV/out-of-reach-emergency-slot.mir | 2 +- llvm/test/CodeGen/RISCV/pr51206.ll | 4 +- llvm/test/CodeGen/RISCV/rem.ll | 72 +- llvm/test/CodeGen/RISCV/remat.ll | 34 +- llvm/test/CodeGen/RISCV/rotl-rotr.ll | 4 +- .../test/CodeGen/RISCV/rv32i-rv64i-float-double.ll | 10 +- llvm/test/CodeGen/RISCV/rv32i-rv64i-half.ll | 12 +- llvm/test/CodeGen/RISCV/rv32zba.ll | 62 +- llvm/test/CodeGen/RISCV/rv32zbb.ll | 64 +- llvm/test/CodeGen/RISCV/rv32zbp.ll | 24 +- llvm/test/CodeGen/RISCV/rv32zbs.ll | 40 +- llvm/test/CodeGen/RISCV/rv64i-complex-float.ll | 6 +- .../CodeGen/RISCV/rv64i-w-insts-legalization.ll | 4 +- .../CodeGen/RISCV/rv64m-w-insts-legalization.ll | 4 +- llvm/test/CodeGen/RISCV/rv64zba.ll | 72 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mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | 2 - mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp | 11 - .../Dialect/SPIRV/Transforms/SPIRVConversion.cpp | 5 + .../SparseTensor/Transforms/Sparsification.cpp | 6 +- mlir/lib/Dialect/StandardOps/CMakeLists.txt | 1 + mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 22 - mlir/lib/Dialect/Vector/CMakeLists.txt | 1 + mlir/lib/Dialect/Vector/VectorDropLeadUnitDim.cpp | 259 + .../Vector/VectorMultiDimReductionTransforms.cpp | 5 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 97 +- ...VectorTransferPermutationMapRewritePatterns.cpp | 12 +- mlir/lib/Dialect/Vector/VectorTransforms.cpp | 333 +- mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp | 1 + mlir/lib/ExecutionEngine/CMakeLists.txt | 6 +- mlir/lib/ExecutionEngine/ExecutionEngine.cpp | 16 +- mlir/lib/ExecutionEngine/JitRunner.cpp | 2 +- mlir/lib/IR/AffineExpr.cpp | 31 +- mlir/lib/Parser/AffineParser.cpp | 29 + .../Dialect/NVVM/NVVMToLLVMIRTranslation.cpp | 42 +- mlir/lib/Transforms/Utils/DialectConversion.cpp | 7 +- mlir/lib/Transforms/Utils/RegionUtils.cpp | 8 +- mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 18 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 29 + .../test/Conversion/VectorToSCF/vector-to-scf.mlir | 12 +- mlir/test/Conversion/VectorToSPIRV/simple.mlir | 16 + .../Dialect/Affine/simplify-affine-structures.mlir | 14 + mlir/test/Dialect/GPU/ops.mlir | 6 + mlir/test/Dialect/LLVMIR/invalid.mlir | 6 +- mlir/test/Dialect/LLVMIR/nvvm.mlir | 22 +- .../test/Dialect/Linalg/fusion-tensor-pattern.mlir | 16 +- .../Dialect/Linalg/tile-and-fuse-on-tensors.mlir | 275 +- .../Linalg/tile-and-fuse-sequence-on-tensors.mlir | 75 +- mlir/test/Dialect/MemRef/canonicalize.mlir | 12 + mlir/test/Dialect/SPIRV/IR/bit-ops.mlir | 8 +- mlir/test/Dialect/SPIRV/IR/logical-ops.mlir | 6 +- mlir/test/Dialect/SparseTensor/sparse_vector.mlir | 6 +- .../Dialect/SparseTensor/sparse_vector_chain.mlir | 3 +- mlir/test/Dialect/Vector/canonicalize.mlir | 39 +- .../Dialect/Vector/vector-dim-one-shape-cast.mlir | 23 - .../Vector/vector-multi-reduction-lowering.mlir | 64 +- .../vector-transfer-to-vector-load-store.mlir | 20 +- mlir/test/Dialect/Vector/vector-transforms.mlir | 66 +- mlir/test/IR/invalid-ops.mlir | 6 +- mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir | 12 +- mlir/test/Integration/GPU/ROCM/two-modules.mlir | 12 +- mlir/test/Integration/GPU/ROCM/vecadd.mlir | 30 +- .../Integration/GPU/ROCM/vector-transferops.mlir | 16 +- mlir/test/Target/LLVMIR/nvvmir.mlir | 32 +- mlir/test/Transforms/loop-fusion-4.mlir | 32 + .../Transforms/test-legalize-type-conversion.mlir | 9 + .../Dialect/Linalg/TestLinalgCodegenStrategy.cpp | 27 +- mlir/test/lib/Dialect/Test/TestPatterns.cpp | 41 +- mlir/unittests/Analysis/AffineStructuresParser.cpp | 24 + mlir/unittests/Analysis/AffineStructuresParser.h | 33 + .../Analysis/AffineStructuresParserTest.cpp | 137 + mlir/unittests/Analysis/AffineStructuresTest.cpp | 16 +- mlir/unittests/Analysis/CMakeLists.txt | 7 +- mlir/unittests/Analysis/PresburgerSetTest.cpp | 11 +- openmp/libomptarget/deviceRTLs/target_interface.h | 1 - openmp/libomptarget/plugins/amdgpu/impl/internal.h | 13 +- .../plugins/amdgpu/impl/interop_hsa.cpp | 45 - .../libomptarget/plugins/amdgpu/impl/interop_hsa.h | 5 - openmp/libomptarget/plugins/amdgpu/impl/system.cpp | 64 +- openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 26 +- openmp/runtime/test/ompt/tasks/taskwait-depend.c | 7 +- .../runtime/test/tasking/omp50_taskwait_depend.c | 11 +- runtimes/CMakeLists.txt | 4 - utils/bazel/llvm-project-overlay/mlir/BUILD.bazel | 16 + 1138 files changed, 51430 insertions(+), 25817 deletions(-) create mode 100644 clang/lib/Driver/ToolChains/PPCFreeBSD.cpp create mode 100644 clang/lib/Driver/ToolChains/PPCFreeBSD.h create mode 100644 clang/test/Analysis/svalbuilder-simplify-intsym.cpp create mode 100644 clang/test/CodeGen/X86/Float16-arithmetic.c rename clang/test/CodeGen/X86/{avx512fp16-abi.c => fp16-abi.c} (94%) rename clang/test/CodeGen/X86/{avx512fp16-complex.c => fp16-complex.c} (96%) create mode 100644 clang/test/OpenMP/taskwait_depend_codegen.cpp create mode 100644 clang/test/OpenMP/taskwait_depend_messages.cpp delete mode 100644 compiler-rt/lib/sanitizer_common/sanitizer_persistent_allocator.h create mode 100644 compiler-rt/lib/sanitizer_common/sanitizer_stack_store.cpp create mode 100644 compiler-rt/lib/sanitizer_common/sanitizer_stack_store.h create mode 100644 compiler-rt/test/hwasan/TestCases/lto.c create mode 100644 compiler-rt/test/tsan/Linux/fork_deadlock.cpp create mode 100644 flang/test/Semantics/save02.f90 rename libc/fuzzing/stdlib/{atof_fuzz.cpp => atof_differential_fuzz.cpp} (100%) create mode 100644 libcxx/docs/Status/RangesAlgorithms.csv create mode 100644 libcxx/include/__bit/byteswap.h create mode 100644 libcxx/include/__compare/partial_order.h create mode 100644 libcxx/include/__compare/strong_order.h create mode 100644 libcxx/include/__compare/weak_order.h create mode 100644 libcxx/include/__random/bernoulli_distribution.h create mode 100644 libcxx/include/__random/binomial_distribution.h create mode 100644 libcxx/include/__random/cauchy_distribution.h create mode 100644 libcxx/include/__random/chi_squared_distribution.h copy libcxx/include/{__charconv/to_chars_result.h => __random/default_random_engin [...] create mode 100644 libcxx/include/__random/discard_block_engine.h create mode 100644 libcxx/include/__random/discrete_distribution.h create mode 100644 libcxx/include/__random/exponential_distribution.h create mode 100644 libcxx/include/__random/extreme_value_distribution.h create mode 100644 libcxx/include/__random/fisher_f_distribution.h create mode 100644 libcxx/include/__random/gamma_distribution.h create mode 100644 libcxx/include/__random/generate_canonical.h create mode 100644 libcxx/include/__random/geometric_distribution.h create mode 100644 libcxx/include/__random/independent_bits_engine.h copy libcxx/include/{__charconv/to_chars_result.h => __random/is_seed_sequence.h} (56%) copy libcxx/include/{__charconv/to_chars_result.h => __random/knuth_b.h} (63%) create mode 100644 libcxx/include/__random/linear_congruential_engine.h create mode 100644 libcxx/include/__random/log2.h create mode 100644 libcxx/include/__random/lognormal_distribution.h create mode 100644 libcxx/include/__random/mersenne_twister_engine.h create mode 100644 libcxx/include/__random/negative_binomial_distribution.h create mode 100644 libcxx/include/__random/normal_distribution.h create mode 100644 libcxx/include/__random/piecewise_constant_distribution.h create mode 100644 libcxx/include/__random/piecewise_linear_distribution.h create mode 100644 libcxx/include/__random/poisson_distribution.h create mode 100644 libcxx/include/__random/random_device.h copy libcxx/include/{__charconv/to_chars_result.h => __random/ranlux.h} (51%) create mode 100644 libcxx/include/__random/seed_seq.h create mode 100644 libcxx/include/__random/shuffle_order_engine.h create mode 100644 libcxx/include/__random/student_t_distribution.h create mode 100644 libcxx/include/__random/subtract_with_carry_engine.h create mode 100644 libcxx/include/__random/uniform_random_bit_generator.h create mode 100644 libcxx/include/__random/uniform_real_distribution.h create mode 100644 libcxx/include/__random/weibull_distribution.h copy libcxx/include/{__charconv/to_chars_result.h => __utility/priority_tag.h} (63%) create mode 100644 libcxx/test/libcxx/algorithms/robust_against_copying_comparator [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/assign. [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/assign. [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/assign. [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/assign. [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/assign. [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/assign. [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/assign. [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] copy libcxx/test/{std/thread/thread.mutex/thread.once/thread.once.onceflag/copy.co [...] create mode 100644 libcxx/test/std/language.support/cmp/cmp.alg/partial_order.pass.cpp create mode 100644 libcxx/test/std/language.support/cmp/cmp.alg/strong_order.pass.cpp create mode 100644 libcxx/test/std/language.support/cmp/cmp.alg/strong_order_long_ [...] create mode 100644 libcxx/test/std/language.support/cmp/cmp.alg/weak_order.pass.cpp delete mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] delete mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 libcxx/test/std/numerics/bit/byteswap.pass.cpp rename libcxx/test/std/numerics/c.math/{abs.fail.cpp => abs.verify.cpp} (50%) create mode 100644 libcxx/test/std/utilities/charconv/charconv.syn/from_chars_resu [...] create mode 100644 libcxx/test/std/utilities/charconv/charconv.syn/to_chars_result [...] create mode 100644 lld/test/ELF/linkerscript/discard-plt.s create mode 100644 lld/test/ELF/linkerscript/lma-align2.test create mode 100644 lld/test/ELF/linkerscript/preinit-array-empty.test create mode 100644 lld/test/MachO/objc-uses-custom-personality.s copy lldb/test/API/{api/check_public_api_headers => functionalities/data-formatter [...] rename lldb/test/API/functionalities/data-formatter/data-formatter-stl/{libcxx/uno [...] create mode 100644 lldb/test/API/functionalities/data-formatter/data-formatter-stl [...] delete mode 100644 lldb/test/API/functionalities/data-formatter/data-formatter-stl [...] delete mode 100644 lldb/test/API/functionalities/data-formatter/data-formatter-stl [...] create mode 100644 llvm/test/Analysis/BranchProbabilityInfo/pointer_heuristics.ll create mode 100644 llvm/test/CodeGen/AArch64/ptrauth-intrinsic-sign-generic.ll create mode 100644 llvm/test/CodeGen/AArch64/ptrauth-intrinsic-sign.ll create mode 100644 llvm/test/CodeGen/AArch64/sinksplat.ll create mode 100644 llvm/test/CodeGen/AArch64/statepoint-call-lowering-sp.ll create mode 100644 llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll create mode 100644 llvm/test/CodeGen/BPF/adjust-opt-icmp4.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-add.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-and.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-mul.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-or.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-smax.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-smin.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-umax.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-umin.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-xor.ll create mode 100644 llvm/test/CodeGen/RISCV/sink-icmp.ll create mode 100644 llvm/test/CodeGen/X86/pr52567.ll create mode 100644 llvm/test/ExecutionEngine/JITLink/X86/MachO_weak_local.s create mode 100644 llvm/test/MC/X86/gotpcrel_norelax.s create mode 100644 llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/arith-div-undef.ll create mode 100644 llvm/test/Transforms/SROA/alloca-struct.ll create mode 100644 llvm/test/tools/llvm-diff/phinode.ll create mode 100644 mlir/lib/Dialect/Vector/VectorDropLeadUnitDim.cpp delete mode 100644 mlir/test/Dialect/Vector/vector-dim-one-shape-cast.mlir create mode 100644 mlir/unittests/Analysis/AffineStructuresParser.cpp create mode 100644 mlir/unittests/Analysis/AffineStructuresParser.h create mode 100644 mlir/unittests/Analysis/AffineStructuresParserTest.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (140eb481d1 -> c272a98cbf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/binutils-gdb. from 140eb481d1 gdb: fix array-view-selftests.c build with g++ 4.8 adds 76183fd1bf dprintf-execution-x-script.exp: Adjust test for native-exten [...] adds a6e8dea686 Automatic date update in version.in adds fb2c495f94 sim: avoid installing headers when there is no sim adds fccf4ba5ad sim: use program_transform_name for libsim adds 8155b8539b RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. adds ed939535e2 sim: install various doc files adds fd0ff19bf4 Re: Add multibyte character warning option to the assembler. adds d3ffd7f776 RISC-V: Support new .option arch directive. adds 999a4952a2 gdb: Print cv qualifiers if class attributes are substituted adds 5ee59b4bf2 gdb/testsuite: Extend tests for print of cv qualifiers adds 2e5843d87c [gdb/testsuite] Fix gdb.threads/thread-specific-bp.exp adds a5ac8e7fa3 [gdb/testsuite] Fix 64-bit dwarf test-cases with -m32 adds f2f38377e5 [gdb/testsuite] Handle runto fail in gdb.mi/mi-var-cp.exp adds b6e7fb9573 elfedit: Align --[in|out]put-abiversion usage adds 2538d4f18b Automatic date update in version.in adds 6e3e76d17b sim: bfin: fix short --env usage in testsuite adds d966a54ba9 bfd: remove wrong comment in xcofflink.c adds 0f8f2de183 [gdb/build] Check if libsource-highlight is usable adds 911438f9f4 gdbsupport: fix array-view compilation with c++11 && _GLIBCXX_DEBUG adds dbf98db6f0 Fix intermittent failures on the H8, particularly H8/SX tests. adds c2851b66eb Automatic date update in version.in adds bbda248c50 sim: v850: fix cpu_option testsuite handling adds b4d069fbea gdb/testsuite: Remove duplicates in gdb.base/catch-signal.exp adds b4ab412070 Automatic date update in version.in adds fc6a93854b [gdb/testsuite] Speed up MACRO_AT_* calls adds 41505c0f3d [gdb/testsuite] Add test-case gdb.dwarf2/dw2-lines.exp adds 6cb22d4a8e [gdb/testsuite] Support .debug_line v4 in dwarf assembler adds 8d52378514 [gdb/testsuite] Factor out _line_finalize_header adds 44fda08939 [gdb/testsuite] Support .debug_line v5 in dwarf assembler adds 26bf28e29d [gdb/testsuite] Add target board dwarf64.exp adds bab31d1451 [gdb/symtab] Support .debug_line with DW_FORM_line_strp adds 577bf39f10 RISC-V: PR28610, Fix ASAN heap-buffer-overflow error in risc [...] adds a92d031d7e [gdb/build] Fix x86_64 x32 build adds e7e599a156 RISC-V: Replace .option rvc/norvc with .option arch, +c/-c. adds a58577878b RISC-V: Removed the redundant NULL pointer check in the risc [...] adds 7dca2ea7ff gdb: rename target_waitstatus_to_string to target_waitstatus [...] adds 06de25b7af gdb: introduce target_waitkind_str, use it in target_waitsta [...] adds c272a98cbf gdb: pass more const target_waitstatus by reference No new revisions were added by this update. Summary of changes: bfd/elfnn-riscv.c | 44 ++- bfd/elfxx-riscv.c | 160 ++++++-- bfd/elfxx-riscv.h | 5 +- bfd/version.h | 2 +- bfd/xcofflink.c | 2 - binutils/elfedit.c | 6 +- binutils/readelf.c | 39 ++ gas/config/tc-riscv.c | 116 +++++- gas/config/tc-riscv.h | 4 + gas/doc/c-riscv.texi | 15 +- gas/testsuite/gas/all/multibyte1.l | 20 +- gas/testsuite/gas/riscv/align-1.s | 2 +- gas/testsuite/gas/riscv/c-add-addi.s | 2 +- gas/testsuite/gas/riscv/c-nonzero-imm.s | 2 +- gas/testsuite/gas/riscv/c-nonzero-reg.s | 2 +- gas/testsuite/gas/riscv/c-zero-imm-64.s | 2 +- gas/testsuite/gas/riscv/c-zero-imm.s | 2 +- gas/testsuite/gas/riscv/c-zero-reg.s | 2 +- gas/testsuite/gas/riscv/ext.s | 4 +- gas/testsuite/gas/riscv/mapping-01.s | 2 +- gas/testsuite/gas/riscv/mapping-02.s | 2 +- gas/testsuite/gas/riscv/mapping-03.s | 2 +- gas/testsuite/gas/riscv/mapping-04.s | 2 +- gas/testsuite/gas/riscv/no-relax-align-2.s | 2 +- gas/testsuite/gas/riscv/option-arch-01.s | 10 + gas/testsuite/gas/riscv/option-arch-01a.d | 14 + gas/testsuite/gas/riscv/option-arch-01b.d | 8 + gas/testsuite/gas/riscv/option-arch-02.d | 8 + gas/testsuite/gas/riscv/option-arch-02.s | 8 + gas/testsuite/gas/riscv/option-arch-03.d | 8 + gas/testsuite/gas/riscv/option-arch-03.s | 3 + gas/testsuite/gas/riscv/option-arch-fail.d | 3 + gas/testsuite/gas/riscv/option-arch-fail.l | 8 + gas/testsuite/gas/riscv/option-arch-fail.s | 10 + gas/testsuite/gas/riscv/shamt-32.s | 4 +- gas/testsuite/gas/riscv/shamt-64.s | 4 +- gas/testsuite/gas/riscv/variant_cc-set.d | 13 + gas/testsuite/gas/riscv/variant_cc-set.s | 15 + gas/testsuite/gas/riscv/variant_cc.d | 9 + gas/testsuite/gas/riscv/variant_cc.s | 5 + gdb/break-catch-sig.c | 6 +- gdb/break-catch-syscall.c | 8 +- gdb/breakpoint.c | 52 +-- gdb/breakpoint.h | 10 +- gdb/c-typeprint.c | 1 + gdb/configure | 158 +++++--- gdb/configure.ac | 47 ++- gdb/dwarf2/line-header.c | 15 +- gdb/dwarf2/read.c | 12 + gdb/dwarf2/read.h | 5 + gdb/gnu-nat.c | 2 +- gdb/infrun.c | 75 ++-- gdb/infrun.h | 2 +- gdb/nat/amd64-linux-siginfo.c | 4 + gdb/record-btrace.c | 4 +- gdb/remote.c | 36 +- gdb/target-debug.h | 4 +- gdb/target/waitstatus.c | 72 ++-- gdb/target/waitstatus.h | 60 ++- gdb/testsuite/boards/dwarf64.exp | 23 ++ gdb/testsuite/gdb.base/catch-signal.exp | 5 +- .../gdb.base/dprintf-execution-x-script.exp | 23 +- gdb/testsuite/gdb.cp/ptype-cv-cp.cc | 4 + gdb/testsuite/gdb.cp/ptype-cv-cp.exp | 12 + gdb/testsuite/gdb.cp/templates.cc | 14 + gdb/testsuite/gdb.cp/templates.exp | 36 ++ .../ptype-cv-cp.cc => gdb.dwarf2/dw2-lines.c} | 41 +- gdb/testsuite/gdb.dwarf2/dw2-lines.exp | 170 +++++++++ gdb/testsuite/gdb.mi/mi-var-child.exp | 4 +- gdb/testsuite/gdb.mi/mi-var-cmd.exp | 18 +- gdb/testsuite/gdb.mi/mi-var-cp.exp | 18 +- gdb/testsuite/gdb.mi/mi-var-rtti.exp | 22 +- gdb/testsuite/gdb.threads/thread-specific-bp.exp | 21 +- gdb/testsuite/lib/dwarf.exp | 417 ++++++++++++++++++--- gdb/testsuite/lib/gdb.exp | 23 ++ gdb/testsuite/lib/mi-support.exp | 6 +- gdb/unittests/common-utils-selftests.c | 7 +- gdbserver/linux-low.cc | 10 +- gdbserver/remote-utils.cc | 45 ++- gdbserver/remote-utils.h | 2 +- gdbserver/server.cc | 37 +- gdbsupport/array-view.h | 6 +- gdbsupport/common-utils.cc | 8 +- gdbsupport/common-utils.h | 4 +- include/elf/riscv.h | 6 + ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 3 + ld/testsuite/ld-riscv-elf/variant_cc-1.s | 61 +++ ld/testsuite/ld-riscv-elf/variant_cc-2.s | 61 +++ ld/testsuite/ld-riscv-elf/variant_cc-now.d | 73 ++++ ld/testsuite/ld-riscv-elf/variant_cc-r.d | 76 ++++ ld/testsuite/ld-riscv-elf/variant_cc-shared.d | 73 ++++ sim/Makefile.am | 17 +- sim/Makefile.in | 342 ++++++++++++++--- sim/arm/local.mk | 19 + sim/common/Make-common.in | 2 +- sim/configure | 18 +- sim/configure.ac | 1 + sim/erc32/local.mk | 19 + sim/frv/local.mk | 3 + sim/h8300/compile.c | 3 +- sim/or1k/local.mk | 3 + sim/ppc/local.mk | 19 + sim/rx/local.mk | 19 + sim/testsuite/bfin/mdma-32bit-1d-neg-count.c | 2 +- sim/testsuite/bfin/mdma-32bit-1d.c | 2 +- sim/testsuite/bfin/mdma-8bit-1d-neg-count.c | 2 +- sim/testsuite/bfin/mdma-8bit-1d.c | 2 +- sim/testsuite/lib/sim-defs.exp | 8 +- sim/testsuite/v850/allinsns.exp | 27 +- 109 files changed, 2448 insertions(+), 533 deletions(-) create mode 100644 gas/testsuite/gas/riscv/option-arch-01.s create mode 100644 gas/testsuite/gas/riscv/option-arch-01a.d create mode 100644 gas/testsuite/gas/riscv/option-arch-01b.d create mode 100644 gas/testsuite/gas/riscv/option-arch-02.d create mode 100644 gas/testsuite/gas/riscv/option-arch-02.s create mode 100644 gas/testsuite/gas/riscv/option-arch-03.d create mode 100644 gas/testsuite/gas/riscv/option-arch-03.s create mode 100644 gas/testsuite/gas/riscv/option-arch-fail.d create mode 100644 gas/testsuite/gas/riscv/option-arch-fail.l create mode 100644 gas/testsuite/gas/riscv/option-arch-fail.s create mode 100644 gas/testsuite/gas/riscv/variant_cc-set.d create mode 100644 gas/testsuite/gas/riscv/variant_cc-set.s create mode 100644 gas/testsuite/gas/riscv/variant_cc.d create mode 100644 gas/testsuite/gas/riscv/variant_cc.s create mode 100644 gdb/testsuite/boards/dwarf64.exp copy gdb/testsuite/{gdb.cp/ptype-cv-cp.cc => gdb.dwarf2/dw2-lines.c} (55%) create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-lines.exp create mode 100644 ld/testsuite/ld-riscv-elf/variant_cc-1.s create mode 100644 ld/testsuite/ld-riscv-elf/variant_cc-2.s create mode 100644 ld/testsuite/ld-riscv-elf/variant_cc-now.d create mode 100644 ld/testsuite/ld-riscv-elf/variant_cc-r.d create mode 100644 ld/testsuite/ld-riscv-elf/variant_cc-shared.d create mode 100644 sim/arm/local.mk create mode 100644 sim/erc32/local.mk create mode 100644 sim/ppc/local.mk create mode 100644 sim/rx/local.mk -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig updated (da0c8dba -> 263522cd)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards da0c8dba 0: update: binutils-llvm-linux-qemu: all new 263522cd 0: update: binutils-llvm-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (da0c8dba) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1552 -> 1552 bytes 02-prepare_abe/console.log.xz | Bin 2768 -> 2764 bytes 03-build_abe-binutils/console.log.xz | Bin 44456 -> 44476 bytes 04-build_llvm/console.log.xz | Bin 59736 -> 58292 bytes 05-build_abe-qemu/console.log.xz | Bin 30016 -> 30308 bytes 06-build_linux/console.log.xz | Bin 4412 -> 6076 bytes 07-boot_linux/console.log.xz | Bin 496 -> 496 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 4 ++-- jenkins/manifest.sh | 19 +++++++++---------- 10 files changed, 11 insertions(+), 12 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig updated (bcbeb60d -> dc87663b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig in repository toolchain/ci/base-artifacts. from bcbeb60d 0: update: binutils-llvm-qemu: boot new dc87663b 1: reset: linux-342f43af70dbc74f8629381998f92c060e1763a2: 21577 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1564 -> 1568 bytes 02-prepare_abe/console.log.xz | Bin 2768 -> 2768 bytes 03-build_abe-binutils/console.log.xz | Bin 45656 -> 44944 bytes 04-build_llvm/console.log.xz | Bin 58756 -> 60076 bytes 05-build_abe-qemu/console.log.xz | Bin 30256 -> 31280 bytes 06-build_linux/console.log.xz | Bin 5772 -> 4216 bytes 07-boot_linux/console.log.xz | Bin 508 -> 0 bytes 08-check_regression/console.log.xz | Bin 412 -> 1328 bytes 08-check_regression/jira-body.txt | 2 ++ 08-check_regression/mail-body.txt | 35 ++++++++++++++++++++ 08-check_regression/mail-subject.txt | 1 + 08-check_regression/results.regressions | 5 +++ 08-check_regression/trigger-bisect | 2 ++ 09-update_baseline/console.log | 57 ++++++++++++++++++++++++-------- 09-update_baseline/results.regressions | 2 ++ jenkins/manifest.sh | 14 ++++---- mail/jira-body.txt | 5 +++ mail/mail-body.txt | 38 +++++++++++++++++++++ mail/mail-subject.txt | 1 + reset-baseline | 0 results | 11 +++--- 21 files changed, 146 insertions(+), 27 deletions(-) delete mode 100644 07-boot_linux/console.log.xz create mode 100644 08-check_regression/jira-body.txt create mode 100644 08-check_regression/mail-body.txt create mode 100644 08-check_regression/mail-subject.txt create mode 100644 08-check_regression/results.regressions create mode 100644 08-check_regression/trigger-bisect create mode 100644 09-update_baseline/results.regressions create mode 100644 mail/jira-body.txt create mode 100644 mail/mail-body.txt create mode 100644 mail/mail-subject.txt create mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[gcc] branch releases/gcc-9 updated (25cb228160d -> a2a411feedb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch releases/gcc-9 in repository gcc. from 25cb228160d IBM Z: Fix load-and-test peephole2 condition new a2a411feedb Daily bump. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 9 +++++++++ gcc/DATESTAMP | 2 +- gcc/testsuite/ChangeLog | 7 +++++++ 3 files changed, 17 insertions(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

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Tcwg-commits November 2021