Tcwg-commits November 2021

tcwg-commits@lists.linaro.org

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16233 discussions

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (577bf39f10 -> a58577878b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/binutils-gdb. from 577bf39f10 RISC-V: PR28610, Fix ASAN heap-buffer-overflow error in risc [...] adds a92d031d7e [gdb/build] Fix x86_64 x32 build adds e7e599a156 RISC-V: Replace .option rvc/norvc with .option arch, +c/-c. adds a58577878b RISC-V: Removed the redundant NULL pointer check in the risc [...] No new revisions were added by this update. Summary of changes: bfd/elfxx-riscv.c | 3 --- gas/config/tc-riscv.c | 4 ++++ gas/testsuite/gas/riscv/align-1.s | 2 +- gas/testsuite/gas/riscv/c-add-addi.s | 2 +- gas/testsuite/gas/riscv/c-nonzero-imm.s | 2 +- gas/testsuite/gas/riscv/c-nonzero-reg.s | 2 +- gas/testsuite/gas/riscv/c-zero-imm-64.s | 2 +- gas/testsuite/gas/riscv/c-zero-imm.s | 2 +- gas/testsuite/gas/riscv/c-zero-reg.s | 2 +- gas/testsuite/gas/riscv/ext.s | 4 ++-- gas/testsuite/gas/riscv/mapping-01.s | 2 +- gas/testsuite/gas/riscv/mapping-02.s | 2 +- gas/testsuite/gas/riscv/mapping-03.s | 2 +- gas/testsuite/gas/riscv/mapping-04.s | 2 +- gas/testsuite/gas/riscv/no-relax-align-2.s | 2 +- gas/testsuite/gas/riscv/shamt-32.s | 4 ++-- gas/testsuite/gas/riscv/shamt-64.s | 4 ++-- gdb/nat/amd64-linux-siginfo.c | 4 ++++ 18 files changed, 26 insertions(+), 21 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check/master-arm updated (7d066675 -> 9e4b04cc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-arm in repository toolchain/ci/base-artifacts. discards 7d066675 0: update: binutils-gcc: 1 new 9e4b04cc 0: update: binutils-gcc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (7d066675) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check/master-arm (9e4b04cc) You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1524 -> 1516 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2736 bytes 03-build_abe-binutils/console.log.xz | Bin 66256 -> 66460 bytes 04-build_abe-gcc/console.log.xz | Bin 226160 -> 226092 bytes 05-build_abe-dejagnu/console.log.xz | Bin 3812 -> 3852 bytes 06-build_abe-check_gcc/console.log.xz | Bin 2580 -> 2472 bytes 07-check_regression/console.log.xz | Bin 2520 -> 2656 bytes 07-check_regression/results.compare | 16 +- 07-check_regression/results.compare2 | 49 +- 08-update_baseline/console.log | 369 +-- 08-update_baseline/results.compare | 16 +- 08-update_baseline/results.compare2 | 49 +- jenkins/manifest.sh | 12 +- sumfiles/g++.log.xz | Bin 2699880 -> 2699968 bytes sumfiles/g++.sum | 136 +- sumfiles/gcc.log.xz | Bin 2309092 -> 2264544 bytes sumfiles/gcc.sum | 4205 +++++++++++++++++---------------- sumfiles/gfortran.log.xz | Bin 879960 -> 881568 bytes sumfiles/gfortran.sum | 42 +- sumfiles/libatomic.log.xz | Bin 2156 -> 2148 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 169920 -> 169908 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2512 -> 2528 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 452120 -> 453176 bytes sumfiles/libstdc++.sum | 10 +- 27 files changed, 2487 insertions(+), 2443 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_native_build/master-arm updated (b4d069fbea -> a58577878b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-arm in repository toolchain/ci/gdb. from b4d069fbea gdb/testsuite: Remove duplicates in gdb.base/catch-signal.exp adds b4ab412070 Automatic date update in version.in adds fc6a93854b [gdb/testsuite] Speed up MACRO_AT_* calls adds 41505c0f3d [gdb/testsuite] Add test-case gdb.dwarf2/dw2-lines.exp adds 6cb22d4a8e [gdb/testsuite] Support .debug_line v4 in dwarf assembler adds 8d52378514 [gdb/testsuite] Factor out _line_finalize_header adds 44fda08939 [gdb/testsuite] Support .debug_line v5 in dwarf assembler adds 26bf28e29d [gdb/testsuite] Add target board dwarf64.exp adds bab31d1451 [gdb/symtab] Support .debug_line with DW_FORM_line_strp adds 577bf39f10 RISC-V: PR28610, Fix ASAN heap-buffer-overflow error in risc [...] adds a92d031d7e [gdb/build] Fix x86_64 x32 build adds e7e599a156 RISC-V: Replace .option rvc/norvc with .option arch, +c/-c. adds a58577878b RISC-V: Removed the redundant NULL pointer check in the risc [...] No new revisions were added by this update. Summary of changes: bfd/elfxx-riscv.c | 16 +- bfd/version.h | 2 +- gas/config/tc-riscv.c | 4 + gas/testsuite/gas/riscv/align-1.s | 2 +- gas/testsuite/gas/riscv/c-add-addi.s | 2 +- gas/testsuite/gas/riscv/c-nonzero-imm.s | 2 +- gas/testsuite/gas/riscv/c-nonzero-reg.s | 2 +- gas/testsuite/gas/riscv/c-zero-imm-64.s | 2 +- gas/testsuite/gas/riscv/c-zero-imm.s | 2 +- gas/testsuite/gas/riscv/c-zero-reg.s | 2 +- gas/testsuite/gas/riscv/ext.s | 4 +- gas/testsuite/gas/riscv/mapping-01.s | 2 +- gas/testsuite/gas/riscv/mapping-02.s | 2 +- gas/testsuite/gas/riscv/mapping-03.s | 2 +- gas/testsuite/gas/riscv/mapping-04.s | 2 +- gas/testsuite/gas/riscv/no-relax-align-2.s | 2 +- gas/testsuite/gas/riscv/shamt-32.s | 4 +- gas/testsuite/gas/riscv/shamt-64.s | 4 +- gdb/dwarf2/line-header.c | 15 +- gdb/dwarf2/read.c | 12 + gdb/dwarf2/read.h | 5 + gdb/nat/amd64-linux-siginfo.c | 4 + .../imported-unit-bp-c.exp => boards/dwarf64.exp} | 9 +- ...-step-out-of-function-no-stmt.c => dw2-lines.c} | 15 +- gdb/testsuite/gdb.dwarf2/dw2-lines.exp | 170 ++++++++++ gdb/testsuite/lib/dwarf.exp | 373 ++++++++++++++++++--- 26 files changed, 575 insertions(+), 86 deletions(-) copy gdb/testsuite/{gdb.dwarf2/imported-unit-bp-c.exp => boards/dwarf64.exp} (76%) copy gdb/testsuite/gdb.dwarf2/{dw2-step-out-of-function-no-stmt.c => dw2-lines.c} (80%) create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-lines.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_gnu_native_build/master-arm updated (ed3ce71f5c -> bc801b3a40)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-arm in repository toolchain/ci/glibc. from ed3ce71f5c elf: Move la_activity (LA_ACT_ADD) after _dl_add_to_namespac [...] adds 3d981795cd socket: Do not use AF_NETLINK in __opensock adds 5c3ece451d Update kernel version to 5.15 in tst-mman-consts.py new bc801b3a40 setjmp: Replace jmp_buf-macros.h with jmp_buf-macros.sym The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: include/setjmp.h | 33 ------------- setjmp/Makefile | 3 ++ setjmp/jmp_buf-macros.sym | 11 +++++ setjmp/tst-setjmp-check.c | 57 ++++++++++++++++++++++ socket/opensock.c | 9 +--- sysdeps/mach/hurd/i386/jmp_buf-macros.h | 6 --- sysdeps/unix/sysv/linux/aarch64/jmp_buf-macros.h | 6 --- sysdeps/unix/sysv/linux/alpha/jmp_buf-macros.h | 6 --- sysdeps/unix/sysv/linux/arc/jmp_buf-macros.h | 6 --- sysdeps/unix/sysv/linux/arm/jmp_buf-macros.h | 6 --- sysdeps/unix/sysv/linux/csky/jmp_buf-macros.h | 6 --- sysdeps/unix/sysv/linux/hppa/jmp_buf-macros.h | 6 --- sysdeps/unix/sysv/linux/i386/jmp_buf-macros.h | 6 --- sysdeps/unix/sysv/linux/ia64/jmp_buf-macros.h | 6 --- .../sysv/linux/m68k/coldfire/fpu/jmp_buf-macros.h | 6 --- .../linux/m68k/coldfire/nofpu/jmp_buf-macros.h | 6 --- .../unix/sysv/linux/m68k/m680x0/jmp_buf-macros.h | 6 --- .../unix/sysv/linux/microblaze/jmp_buf-macros.h | 6 --- .../unix/sysv/linux/mips/mips32/jmp_buf-macros.h | 6 --- .../sysv/linux/mips/mips64/n32/jmp_buf-macros.h | 6 --- .../sysv/linux/mips/mips64/n64/jmp_buf-macros.h | 6 --- sysdeps/unix/sysv/linux/nios2/jmp_buf-macros.h | 6 --- .../sysv/linux/powerpc/powerpc32/jmp_buf-macros.h | 6 --- .../sysv/linux/powerpc/powerpc64/jmp_buf-macros.h | 6 --- sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h | 55 --------------------- .../unix/sysv/linux/riscv/rv64/jmp_buf-macros.h | 53 -------------------- .../unix/sysv/linux/s390/s390-32/jmp_buf-macros.h | 6 --- .../unix/sysv/linux/s390/s390-64/jmp_buf-macros.h | 6 --- sysdeps/unix/sysv/linux/sh/jmp_buf-macros.h | 6 --- .../unix/sysv/linux/sparc/sparc32/jmp_buf-macros.h | 6 --- .../unix/sysv/linux/sparc/sparc64/jmp_buf-macros.h | 6 --- sysdeps/unix/sysv/linux/tst-mman-consts.py | 2 +- sysdeps/unix/sysv/linux/x86/jmp_buf-ssp.sym | 1 + sysdeps/unix/sysv/linux/x86_64/64/jmp_buf-macros.h | 6 --- .../unix/sysv/linux/x86_64/x32/jmp_buf-macros.h | 6 --- 35 files changed, 74 insertions(+), 306 deletions(-) create mode 100644 setjmp/jmp_buf-macros.sym create mode 100644 setjmp/tst-setjmp-check.c delete mode 100644 sysdeps/mach/hurd/i386/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/aarch64/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/alpha/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/arc/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/arm/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/csky/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/hppa/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/i386/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/ia64/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/m68k/coldfire/fpu/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/m68k/coldfire/nofpu/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/m68k/m680x0/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/microblaze/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/mips/mips32/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/mips/mips64/n32/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/mips/mips64/n64/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/nios2/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/powerpc/powerpc32/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/powerpc/powerpc64/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/riscv/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/riscv/rv64/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/s390/s390-32/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/s390/s390-64/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/sh/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/sparc/sparc32/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/sparc/sparc64/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/x86_64/64/jmp_buf-macros.h delete mode 100644 sysdeps/unix/sysv/linux/x86_64/x32/jmp_buf-macros.h -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_gnu_native_build/master-arm updated (923dcc5eb0c1 -> 136057256686)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-arm in repository toolchain/ci/linux. from 923dcc5eb0c1 Merge branch 'akpm' (patches from Andrew) adds 61eb495c83bf pstore/blk: Use "%lu" to format unsigned long adds dae581864609 KVM: PPC: Book3S HV: Use GLOBAL_TOC for kvmppc_h_set_dabr/xdabr() adds 2da516d7ed08 powerpc/83xx/mpc8349emitx: Drop unused variable adds 964c33cd0be6 powerpc: clean vdso32 and vdso64 directories adds 0bd81274e3f1 powerpc/pseries: rename numa_dist_table to form2_distances adds 302039466f6a powerpc/pseries: Fix numa FORM2 parsing fallback code adds 2d33f5504490 powerpc/pseries/ddw: Revert "Extend upper limit for huge D [...] adds fb4ee2b30cd0 powerpc/pseries/ddw: simplify enable_ddw() adds ad3976025b31 powerpc/pseries/ddw: Do not try direct mapping with persis [...] adds 5b54860943dc powerpc/book3e: Fix TLBCAM preset at boot adds 5499802b2284 powerpc/signal32: Fix sigset_t copy adds 1e35eba40551 powerpc/8xx: Fix pinned TLBs with CONFIG_STRICT_KERNEL_RWX adds 8e80a73fa9a7 powerpc/xive: Change IRQ domain to a tree domain adds 75603b14ed14 Merge tag 'powerpc-5.16-2' of git://git.kernel.org/pub/scm [...] adds e324234e0aa8 perf/x86/intel/uncore: Fix filter_tid mask for CHA events [...] adds 3866ae319c84 perf/x86/intel/uncore: Fix IIO event constraints for Skyla [...] adds bdc0feee0517 perf/x86/intel/uncore: Fix IIO event constraints for Snowridge adds f3fd84a3b775 x86/perf: Fix snapshot_branch_stack warning in VM adds af16bdeae8e0 Merge tag 'perf-urgent-2021-11-21' of git://git.kernel.org [...] adds 8d48bf8206f7 x86/boot: Pull up cmdline preparation and early param parsing adds ac5d272a0ad0 x86/sgx: Fix free page accounting adds 40c93d7fff6f Merge tag 'x86-urgent-2021-11-21' of git://git.kernel.org/ [...] adds 136057256686 Linux 5.16-rc2 No new revisions were added by this update. Summary of changes: Makefile | 2 +- arch/powerpc/kernel/Makefile | 3 ++ arch/powerpc/kernel/head_8xx.S | 13 ++--- arch/powerpc/kernel/signal.h | 10 +++- arch/powerpc/kvm/book3s_hv_rmhandlers.S | 4 +- arch/powerpc/mm/nohash/kaslr_booke.c | 2 +- arch/powerpc/mm/nohash/tlb.c | 4 +- arch/powerpc/mm/numa.c | 44 ++++++++--------- arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c | 1 - arch/powerpc/platforms/pseries/iommu.c | 26 ++++------ arch/powerpc/sysdev/xive/Kconfig | 1 - arch/powerpc/sysdev/xive/common.c | 3 +- arch/x86/events/intel/core.c | 2 - arch/x86/events/intel/uncore_snbep.c | 12 +++++ arch/x86/kernel/cpu/sgx/main.c | 12 ++--- arch/x86/kernel/setup.c | 66 +++++++++++++++----------- fs/pstore/blk.c | 2 +- 17 files changed, 111 insertions(+), 96 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_native_build/master-arm updated (0f5afb62638 -> c38c547a708)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-arm in repository toolchain/ci/gcc. from 0f5afb62638 Improve base tracking in ipa-modref adds 8fef6f720a5 Fortran: fix lookup for gfortran builtin math intrinsics us [...] adds 364539710f8 i386: Fix up handling of target attribute [PR101180] adds da17c304e22 fortran, debug: Fix up DW_AT_rank [PR103315] adds ae957bef065 Daily bump. adds 2b5b8610e98 xtensa: Fix non-robust split condition in define_insn_and_split adds b5844cb0bc8 Don't allow mask/sse/mmx mov in TLS code sequences. adds 4b1e14346a0 openmp: Handle OMP_MASKED in potential_constant_expression_ [...] adds f456eaf2e0f tree-optimization/103351 - avoid compare-debug issue wrt CD [...] adds 90986c5f0aa libgcc: Remove tbase member from struct unw_eh_callback_data adds f58bf16f672 libgcc: Remove dbase member from struct unw_eh_callback_dat [...] adds d7376862b6d libstdc++: Fix condition for definition of _GLIBCXX14_DEPRECATED adds 1aedb3920a4 openacc: Fix up C++ #pragma acc routine handling [PR101731] new c38c547a708 docs: remove duplicate param documentation The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 67 +++++++++++++++++ gcc/DATESTAMP | 2 +- gcc/config/i386/constraints.md | 5 ++ gcc/config/i386/i386-options.c | 5 +- gcc/config/i386/i386-protos.h | 1 + gcc/config/i386/i386.c | 30 ++++++++ gcc/config/i386/i386.md | 8 +-- gcc/config/xtensa/xtensa.md | 4 +- gcc/cp/constexpr.c | 1 + gcc/cp/parser.c | 26 +++---- gcc/doc/invoke.texi | 12 ---- gcc/fortran/ChangeLog | 17 +++++ gcc/fortran/trans-intrinsic.c | 66 +++++++++-------- gcc/fortran/trans-types.c | 4 +- gcc/testsuite/ChangeLog | 28 ++++++++ gcc/testsuite/c-c++-common/goacc/routine-6.c | 4 ++ gcc/testsuite/g++.dg/gomp/masked-1.C | 14 ++++ gcc/testsuite/g++.dg/torture/pr103351.C | 88 +++++++++++++++++++++++ gcc/testsuite/gcc.target/i386/pr101180.c | 12 ++++ gcc/testsuite/gcc.target/i386/pr103275.c | 83 +++++++++++++++++++++ gcc/testsuite/gfortran.dg/dec_math_5.f90 | 104 +++++++++++++++++++++++++++ gcc/tree-ssa-dce.c | 4 ++ libgcc/unwind-dw2-fde-dip.c | 54 ++++++++++---- libstdc++-v3/include/bits/c++config | 4 +- 24 files changed, 561 insertions(+), 82 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/goacc/routine-6.c create mode 100644 gcc/testsuite/g++.dg/gomp/masked-1.C create mode 100644 gcc/testsuite/g++.dg/torture/pr103351.C create mode 100644 gcc/testsuite/gcc.target/i386/pr101180.c create mode 100644 gcc/testsuite/gcc.target/i386/pr103275.c create mode 100644 gcc/testsuite/gfortran.dg/dec_math_5.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_native_build/master-arm updated (b4d069fbea -> a58577878b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-arm in repository toolchain/ci/binutils-gdb. from b4d069fbea gdb/testsuite: Remove duplicates in gdb.base/catch-signal.exp adds b4ab412070 Automatic date update in version.in adds fc6a93854b [gdb/testsuite] Speed up MACRO_AT_* calls adds 41505c0f3d [gdb/testsuite] Add test-case gdb.dwarf2/dw2-lines.exp adds 6cb22d4a8e [gdb/testsuite] Support .debug_line v4 in dwarf assembler adds 8d52378514 [gdb/testsuite] Factor out _line_finalize_header adds 44fda08939 [gdb/testsuite] Support .debug_line v5 in dwarf assembler adds 26bf28e29d [gdb/testsuite] Add target board dwarf64.exp adds bab31d1451 [gdb/symtab] Support .debug_line with DW_FORM_line_strp adds 577bf39f10 RISC-V: PR28610, Fix ASAN heap-buffer-overflow error in risc [...] adds a92d031d7e [gdb/build] Fix x86_64 x32 build adds e7e599a156 RISC-V: Replace .option rvc/norvc with .option arch, +c/-c. adds a58577878b RISC-V: Removed the redundant NULL pointer check in the risc [...] No new revisions were added by this update. Summary of changes: bfd/elfxx-riscv.c | 16 +- bfd/version.h | 2 +- gas/config/tc-riscv.c | 4 + gas/testsuite/gas/riscv/align-1.s | 2 +- gas/testsuite/gas/riscv/c-add-addi.s | 2 +- gas/testsuite/gas/riscv/c-nonzero-imm.s | 2 +- gas/testsuite/gas/riscv/c-nonzero-reg.s | 2 +- gas/testsuite/gas/riscv/c-zero-imm-64.s | 2 +- gas/testsuite/gas/riscv/c-zero-imm.s | 2 +- gas/testsuite/gas/riscv/c-zero-reg.s | 2 +- gas/testsuite/gas/riscv/ext.s | 4 +- gas/testsuite/gas/riscv/mapping-01.s | 2 +- gas/testsuite/gas/riscv/mapping-02.s | 2 +- gas/testsuite/gas/riscv/mapping-03.s | 2 +- gas/testsuite/gas/riscv/mapping-04.s | 2 +- gas/testsuite/gas/riscv/no-relax-align-2.s | 2 +- gas/testsuite/gas/riscv/shamt-32.s | 4 +- gas/testsuite/gas/riscv/shamt-64.s | 4 +- gdb/dwarf2/line-header.c | 15 +- gdb/dwarf2/read.c | 12 + gdb/dwarf2/read.h | 5 + gdb/nat/amd64-linux-siginfo.c | 4 + .../imported-unit-bp-c.exp => boards/dwarf64.exp} | 9 +- ...-step-out-of-function-no-stmt.c => dw2-lines.c} | 15 +- gdb/testsuite/gdb.dwarf2/dw2-lines.exp | 170 ++++++++++ gdb/testsuite/lib/dwarf.exp | 373 ++++++++++++++++++--- 26 files changed, 575 insertions(+), 86 deletions(-) copy gdb/testsuite/{gdb.dwarf2/imported-unit-bp-c.exp => boards/dwarf64.exp} (76%) copy gdb/testsuite/gdb.dwarf2/{dw2-step-out-of-function-no-stmt.c => dw2-lines.c} (80%) create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-lines.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_build/master-arm updated (bdd8c841 -> 46e15804)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-arm in repository toolchain/ci/base-artifacts. discards bdd8c841 0: update: binutils-gcc-linux-glibc-gdb: 6 new 46e15804 0: update: binutils-gcc-linux-glibc-gdb: 6 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (bdd8c841) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_native_build/master- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1564 -> 1504 bytes 02-prepare_abe/console.log.xz | Bin 2768 -> 2756 bytes 04-build_abe-binutils/console.log.xz | Bin 67532 -> 67532 bytes 05-build_abe-gcc/console.log.xz | Bin 227256 -> 225052 bytes 06-clean_sysroot/console.log.xz | Bin 316 -> 316 bytes 07-build_abe-linux/console.log.xz | Bin 9180 -> 8604 bytes 08-build_abe-glibc/console.log.xz | Bin 229104 -> 229368 bytes 09-build_abe-gdb/console.log.xz | Bin 53784 -> 53960 bytes 10-check_regression/console.log.xz | Bin 416 -> 416 bytes 11-update_baseline/console.log | 16 ++++++++-------- jenkins/manifest.sh | 24 ++++++++++++------------ 11 files changed, 20 insertions(+), 20 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[glibc] branch master updated (bc801b3a40 -> aac54dcd37)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository glibc. from bc801b3a40 setjmp: Replace jmp_buf-macros.h with jmp_buf-macros.sym new aac54dcd37 powerpc: Define USE_PPC64_NOTOC iff compiler supports it The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: sysdeps/powerpc/powerpc64/configure | 42 +++++++++++++++++++++------------- sysdeps/powerpc/powerpc64/configure.ac | 25 +++++++++++++------- 2 files changed, 43 insertions(+), 24 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz updated (3624c4d84500 -> dc9b5550b223)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-arm-spec2k6-Oz in repository toolchain/ci/llvm-project. from 3624c4d84500 [libc++] Adds (to|from)_chars_result operator==. adds ed86610c7bcd [libc++][nfc] Move functions to a generic place. adds 6774cc33f75f [NFC][llvm] Inclusive language: remove instance of master [...] adds ffe1741b5cca [DSE] Add additional strncpy tests. adds 86e77cdb081f [PowerPC] Add a flag for conditional trap optimization adds 4b3518d50b30 [RISCV] Pre-commit test for D98932. NFC adds af57a71d1871 [RISCV] Don't call setHasMultipleConditionRegisters(), so [...] adds 28000587e1a4 [SCEV] Revert two speculative compile time optimizations w [...] adds f3b7cc8bb2ea [lldb/test] Add ability to terminate connection from a gdb [...] adds d9bbad277c44 [libc][Obvious][NFC] A bunch of cosmetic cleanup. adds 587a397917b2 Skip tests when compiler with older versions of clang adds f849640a0c6c [MLIR] Make the ROCM integration tests runnable adds 76effb001d33 [LV] Remove obsolete comment about creating a dummy block (NFC) adds d448fcd9b223 [analyzer][NFC] Introduce CallDescriptionSets adds 6c512703a9e6 [analyzer][NFC] Introduce CallDescription::matches() in ad [...] adds f18da190b0db [analyzer][NFC] Switch to using CallDescription::matches() [...] adds 9ad0a90baa8c [analyzer][NFC] Demonstrate the use of CallDescriptionSet adds de9d7e42aca2 [analyzer][NFC] CallDescription should own the qualified n [...] adds 97f1bf15b154 [analyzer][NFC] Consolidate the inner representation of Ca [...] adds e6ef134f3c77 [analyzer][NFC] Use enum for CallDescription flags adds d5de568cc737 [analyzer][NFC] MaybeUInt -> MaybeCount adds 7eec832def57 [DSE] Improve handling of `strncpy` in Dead Store Elimination adds ffdace4892bd [SROA] Add new test cases to cover existing SROA behavior [...] adds 06dbb2856967 [mlir][vector] Remove usage of shapecast to remove unit dim adds 7cde5165131f [mlir][vector] NFC, move some vector patterns in a separate file adds 9cdaf0b01b29 [openmp][amdgpu][nfc] Inline interop_hsa_get_kernel_info i [...] adds 2997441b85c0 [ELF] Support discarding .got.plt adds ff7f2cfa959b [AMDGPU] Add an implicit use of M0 to all V_MOV_B32_indire [...] adds 47555d73f653 [mlir][gpu] Extend shuffle op modes and add nvvm lowering adds bd22554af06e [MLIR][GPU] Run generic LLVM optimizations when serializin [...] adds 1b4c0cb3918a [libc++] Avoid potential truncation warnings in std::abs test adds e1ce3dabf0c7 [libc++] Fix some tests that were broken in the single-thr [...] adds e0f58444e126 [libc++] Fix feature test macro for __cpp_lib_to_chars adds d8e5a0c42bd8 [clang][NFC] Inclusive terms: replace some uses of sanity [...] adds b07b5bd72716 [libc++] Test that our algorithms never copy a user-provid [...] adds 04954824ee15 [openmp][amdgpu][nfc] Simplify implicit args handling adds 3f3680dff3e7 DWARFVerifier: Simplify name lookups adds 3fcdd182e978 NFC: Callout restriction on folding 0-result ops in docume [...] adds 20f79f8caa3a [MLIR][GPU] Make the path to ROCm a runtime option adds 290cddcd139d Allow __attribute__((swift_attr)) in attribute push pragmas adds e059329b835a [libc++][NFC] Add missing include in test adds e9d12c248013 [PowerPC][NFC] Add a series of codegen tests for vector re [...] adds 491efa7f31cb [InstCombine] add/adjust tests for mask of sext i1; NFC adds a075d6722283 [Sema] fix nondeterminism in ASTContext::getDeducedTemplat [...] adds d729f4c38fca [mlir] Bug fix. Stream must outlive the pass manager. adds 3f3bee42d229 [NFC][llvm] Inclusive language: remove instance of master [...] adds a6f53afbcb4d [MLIR][GPU] Link in device libraries during HSA compilatio [...] adds de11de308b64 [InstrProf] Use i32 for GEP index from lowering llvm.instr [...] adds f764a1a5bd7c [clangd] Avoid possible crash: apply configuration after b [...] adds 241df03ce5f0 [NFC] Test commit, add whitespace to end-of-line adds 1bd4dc4f2854 [hmaptool] Port to python3 adds 97b9e8438e26 [GVN][NFC] Remove redundant check adds 43f5f6916f0e [ORC][JITLink] Move JITDylib name into JITLinkDylib base class. adds 18f935122348 [AMDGPU] Do not generate ELF symbols for the local branch [...] adds d1abf481daf2 [llvm] Use range-based for loops (NFC) adds 0dec59305a52 [ORC] Make JITDylib::AsynchronousSymbolQuerySet private. adds 1cb991e75405 [X86] Add test case for pr52567. NFC adds a4373f6753fa [X86] Don't combine (x86cmp (trunc (movmsk (bitcast X))), [...] adds 1f9ca5adbac0 [MLIR] Avoid creation of buggy affine maps while replacing [...] adds 2f364f6f0d3a [NFC][X86][MCA] Add forgotten test coverage for AVX512's V [...] adds da47a63e0394 [NFC][X86][Costmodel] Add AVX512DQ runlines to trunc.ll/extend.ll adds 7dbbb5d3a46e compiler-rt: Use FreeBSD's elf_aux_info to detect AArch64 [...] adds fbfe8fcbc31d [Libomptarget] Remove undefined symbol in old runtime adds ec7b0d4d3458 [MLIR] Simplify Semi-affine expressions by rule based matc [...] adds 401b76fdf2b3 [libc++] [test] Eliminate libcpp-no-noexcept-function-type [...] adds 1d007d0e5a92 [InstCombine] add tests for bitwise logic with bool op; NFC adds 337948ac6e22 [InstCombine] add folds for binop with sexted bool and con [...] adds cf8efbd30e43 [VPlan] Wrap vector loop blocks in region. adds 25a9ee52f139 [CVP] Add tests for implied conditions using urem (NFC) adds cd84cab6b37f [LVI] Support urem in implied conditions adds 0a2bde94a06c [LVI] Drop requirement that modulus is constant adds fefe20b99313 [clang-tidy] performance-unnecessary-copy-initialization: [...] adds aeba28bc6244 [DSE] Drop hasAnalyzableMemoryWrite() (NFCI) adds df70cf5e1409 [NFC][X86][Costmodel] Actually test +prefer-256-bit in rep [...] adds e74114add3b3 [libc++] [doc] Mark some spaceship-related LWG issues as " [...] adds dca681fee93e [libc++][NFC] Fix typo in ranges::iterator_t synopsis adds 6cc820a3e284 [X86][FP16] Relax the pattern condition for VZEXT_MOVL to [...] adds f6bce30cf949 [llvm] Use range-based for loops (NFC) adds 648157b05a1d [ELF] Move getOutputSectionName from Writer.cpp to LinkerS [...] adds 2b9c41189e75 [AArch64] Extra testing for sinking splats to various inst [...] adds 3234f2d9c166 [ARM][ParallelDSP] Regenerate complex_dot_prod.ll test adds ad48ef1e3142 [MLIR][NFC] Simplex::restoreRow: improve documentation adds 73d52ee7859f Add a best practice section on how to configure a fast builder adds 357d6362891e [PowerPC] Regenerate rlwinm2.ll test adds eced44637cfb [Thumb2] Regenerate ext + rot tests adds 4a5e1ffcf9b8 [ARM] Regenerate sxt_rot.ll tests adds fc981cedea07 [llvm] Use range-based for loops (NFC) adds c133fb321f7c [CodeGen] Use llvm::is_contained (NFC) adds 6f9cceb7751a [mlir] Move trait to InferTypeOpInterface adds e5a4d0f1498c [mlir] Fix unused function warning (NFC) adds 1dc62f2653f8 [libc++] Implement P1272R4 (std::byteswap) adds 0a413506a29e [gn build] Port 1dc62f2653f8 adds a60b63940a65 [libc++][NFC] Sort includes in __ranges/concepts.h adds b72b56016a6b NFC: clang-format lib/Transforms/Instrumentation/InstrProf [...] adds ea5421bd0db3 [llvm] Use range-based for loops (NFC) adds 49e3838145df [llvm] Use make_early_inc_range (NFC) adds af0ecfccae82 [RISCV] Generate pseudo instruction li adds a05b694b1e1d [ELF][NFC] Do not pass region name to expandMemoryRegion() adds 6a3958247aee tsan: add another fork test adds 2ac339ef5f0f [C++20] [Coroutines] Warn for deprecated form 'for co_await' adds 83484f8472ad Fix nits in clang-tidy's documentation (NFC) adds 760d4d03d5d3 [AArch64] Sink splat shuffles to lane index intrinsics adds b5f20372a82f [clangd] IncludeCleaner: Mark possible expr resolutions as used adds a82942dd07ea Add missing clang-tidy args in index.rst (NFC) adds 84bf5e328664 Fix various problems found by fuzzing. adds 2f1c037bbdc4 [libc] Remove unused variable adds a7027bb79971 [LV] Pre-commit test for D111846 adds d92aabc33666 [MLIR][NFC] Simplex: remove repeated words in comment adds 4d21b64464ac [BPI] Look-up tables for non-loop branches. NFC. adds a9e236bed835 [mlir][Vector] Add a vblendps-based impl for transpose8x8 [...] adds 0ccc44cec067 [mlir][linalg] Fix tile and fuse for outermost reduction. adds 789c88e80e87 [mlir] Fix unintentional mutation by VectorType/RankedTens [...] adds 4348cd42c385 [LV] Drop integer poison-generating flags from instruction [...] adds e3d386ea2733 [mlir][linalg] Add a tile and fuse on tensors pattern. adds 050cc1cd6e68 [mlir] Add InitializeNativeTargetAsmParser to ExecutionEngine. adds 8d09dd61c381 [X86][TTI] Costmodel for AVX512DQ's VPMOVM2[DQ] / VPMOV[DQ [...] adds 704d92607d26 [X86][TTI] Finish costmodel for AVX512BW's VPMOVM2[BW] / V [...] adds 56db1c072c92 [DA][NFC] Update publication - add remarks adds 955c72c35caf [AArch64][ARM] Add missing SVE/SVE2 features from Cortex-A710 adds f7751a3a4218 [mlir][linalg] Remove tile and fuse test pass (NFC). adds 106f3074996c Rename MlirExecutionEngine lookup to lookupPacked adds 32c43241e716 [mlir][linalg] Always generate an extract/insert slice pai [...] adds 247a1a55eb6a [mlir][linalg] Use getAsOpFoldResult in padding (NFC). adds 7c8ae65f2c3d [lldb/test] Make it possible to run the mock gdb server on [...] adds 7f09ab08de5a [lldb] Fix [some] leaks in python bindings adds d633db8f9dd4 [SCEV] Fix and validate ValueExprMap/ExprValueMap consistency adds 0512bf354063 [MLIR] PresburgerSetTest: fix comment and add a test case adds 1b927b68b66e [libc] add memmove basic building blocks adds 62e9acad0a51 Revert "[SCEV] Fix and validate ValueExprMap/ExprValueMap [...] adds e69d50d9ff3e tsan: disable instrumentation in runtime callbacks in tests adds 1784fe0532a6 tsan: new runtime (v3) adds 137d3474ca39 [RISCV] Reverse the order of loading/storing callee-saved [...] adds dc9b5550b223 [NFC][llvm][Hexagon] Inclusive Terms remove uses of sanity [...] No new revisions were added by this update. Summary of changes: .../performance/UnnecessaryCopyInitialization.cpp | 8 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 5 +- clang-tools-extra/clangd/IncludeCleaner.cpp | 8 + .../clangd/unittests/IncludeCleanerTests.cpp | 4 + clang-tools-extra/docs/clang-tidy/index.rst | 40 +- ...opy-initialization-excluded-container-types.cpp | 10 + clang/include/clang/AST/Redeclarable.h | 3 +- clang/include/clang/AST/Type.h | 6 +- clang/include/clang/Analysis/CFG.h | 2 +- clang/include/clang/Basic/Attr.td | 1 + clang/include/clang/Basic/DiagnosticGroups.td | 4 +- clang/include/clang/Basic/DiagnosticParseKinds.td | 3 + clang/include/clang/CodeGen/CGFunctionInfo.h | 2 +- clang/include/clang/Sema/Lookup.h | 7 +- .../Core/PathSensitive/CallDescription.h | 69 +- .../StaticAnalyzer/Core/PathSensitive/CallEvent.h | 14 - clang/lib/AST/ASTContext.cpp | 3 + clang/lib/Analysis/BodyFarm.cpp | 5 +- clang/lib/Analysis/RetainSummaryManager.cpp | 2 +- clang/lib/Basic/DiagnosticIDs.cpp | 2 +- clang/lib/Basic/SourceManager.cpp | 11 +- clang/lib/Driver/ToolChains/Clang.cpp | 1 - clang/lib/Format/ContinuationIndenter.cpp | 7 +- clang/lib/Format/Format.cpp | 2 +- clang/lib/Format/TokenAnnotator.cpp | 10 +- clang/lib/Format/UnwrappedLineParser.cpp | 19 +- clang/lib/Format/WhitespaceManager.cpp | 12 +- clang/lib/Frontend/FrontendActions.cpp | 2 +- clang/lib/Parse/ParseStmt.cpp | 3 + clang/lib/Sema/SemaChecking.cpp | 7 +- clang/lib/Sema/SemaDecl.cpp | 8 +- clang/lib/Sema/SemaDeclCXX.cpp | 5 +- clang/lib/Sema/SemaExpr.cpp | 1 - clang/lib/Sema/SemaExprCXX.cpp | 5 +- clang/lib/Sema/SemaLookup.cpp | 4 +- .../Checkers/BasicObjCFoundationChecks.cpp | 13 +- .../Checkers/BlockInCriticalSectionChecker.cpp | 27 +- .../lib/StaticAnalyzer/Checkers/CStringChecker.cpp | 11 +- .../lib/StaticAnalyzer/Checkers/ChrootChecker.cpp | 6 +- .../StaticAnalyzer/Checkers/ContainerModeling.cpp | 47 +- .../Checkers/DebugContainerModeling.cpp | 8 +- .../Checkers/DebugIteratorModeling.cpp | 12 +- .../Checkers/InnerPointerChecker.cpp | 16 +- clang/lib/StaticAnalyzer/Checkers/MIGChecker.cpp | 6 +- .../Checkers/MmapWriteExecChecker.cpp | 2 +- .../Checkers/SimpleStreamChecker.cpp | 4 +- .../StaticAnalyzer/Checkers/SmartPtrModeling.cpp | 5 +- .../Checkers/StdLibraryFunctionsChecker.cpp | 6 +- .../lib/StaticAnalyzer/Checkers/StringChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/UnixAPIChecker.cpp | 5 +- .../lib/StaticAnalyzer/Checkers/ValistChecker.cpp | 8 +- .../Checkers/cert/PutenvWithAutoChecker.cpp | 2 +- .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 7 +- clang/lib/StaticAnalyzer/Core/CallDescription.cpp | 124 +- clang/lib/StaticAnalyzer/Core/CallEvent.cpp | 82 - clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 4 +- clang/lib/StaticAnalyzer/Core/Store.cpp | 2 +- clang/lib/Tooling/Syntax/Tree.cpp | 2 +- clang/test/AST/attr-swift_attr.m | 10 +- clang/test/CodeGen/profile-filter.c | 20 +- ...pragma-attribute-supported-attributes-list.test | 1 + clang/test/Profile/branch-logical-mixed.cpp | 68 +- clang/test/Profile/c-captured.c | 32 +- clang/test/Profile/c-general.c | 238 +- clang/test/Profile/c-ternary.c | 10 +- clang/test/Profile/cxx-class.cpp | 24 +- clang/test/Profile/cxx-lambda.cpp | 17 +- clang/test/Profile/cxx-rangefor.cpp | 10 +- clang/test/Profile/cxx-stmt-initializers.cpp | 12 +- clang/test/Profile/cxx-templates.cpp | 8 +- clang/test/Profile/cxx-throws.cpp | 24 +- clang/test/Profile/objc-general.m | 18 +- clang/test/SemaCXX/co_await-range-for.cpp | 14 +- .../StaticAnalyzer/ConflictingEvalCallsTest.cpp | 2 +- .../NoStateChangeFuncVisitorTest.cpp | 6 +- clang/utils/hmaptool/hmaptool | 17 +- compiler-rt/lib/builtins/cpu_model.c | 6 + .../sanitizer_common/sanitizer_thread_registry.h | 2 + compiler-rt/lib/tsan/CMakeLists.txt | 1 - compiler-rt/lib/tsan/check_analyze.sh | 12 +- compiler-rt/lib/tsan/go/build.bat | 1 + compiler-rt/lib/tsan/go/buildgo.sh | 1 + compiler-rt/lib/tsan/go/tsan_go.cpp | 2 +- compiler-rt/lib/tsan/rtl/tsan_defs.h | 23 +- compiler-rt/lib/tsan/rtl/tsan_dense_alloc.h | 9 + compiler-rt/lib/tsan/rtl/tsan_flags.cpp | 6 - compiler-rt/lib/tsan/rtl/tsan_flags.inc | 10 +- .../lib/tsan/rtl/tsan_interceptors_posix.cpp | 3 +- compiler-rt/lib/tsan/rtl/tsan_interface_atomic.cpp | 87 +- compiler-rt/lib/tsan/rtl/tsan_interface_java.cpp | 4 +- compiler-rt/lib/tsan/rtl/tsan_mman.cpp | 24 +- compiler-rt/lib/tsan/rtl/tsan_mutexset.cpp | 54 +- compiler-rt/lib/tsan/rtl/tsan_mutexset.h | 11 +- compiler-rt/lib/tsan/rtl/tsan_platform.h | 173 +- compiler-rt/lib/tsan/rtl/tsan_platform_linux.cpp | 48 +- compiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp | 7 - compiler-rt/lib/tsan/rtl/tsan_platform_posix.cpp | 16 +- compiler-rt/lib/tsan/rtl/tsan_platform_windows.cpp | 3 - compiler-rt/lib/tsan/rtl/tsan_rtl.cpp | 630 ++- compiler-rt/lib/tsan/rtl/tsan_rtl.h | 325 +- compiler-rt/lib/tsan/rtl/tsan_rtl_access.cpp | 860 ++-- compiler-rt/lib/tsan/rtl/tsan_rtl_mutex.cpp | 642 +-- compiler-rt/lib/tsan/rtl/tsan_rtl_proc.cpp | 1 - compiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp | 367 +- compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp | 191 +- compiler-rt/lib/tsan/rtl/tsan_shadow.h | 315 +- compiler-rt/lib/tsan/rtl/tsan_sync.cpp | 82 +- compiler-rt/lib/tsan/rtl/tsan_sync.h | 48 +- compiler-rt/lib/tsan/rtl/tsan_trace.h | 73 +- .../lib/tsan/rtl/tsan_update_shadow_word.inc | 59 - .../lib/tsan/tests/unit/tsan_flags_test.cpp | 2 +- .../lib/tsan/tests/unit/tsan_shadow_test.cpp | 92 +- .../lib/tsan/tests/unit/tsan_stack_test.cpp | 4 +- compiler-rt/lib/tsan/tests/unit/tsan_sync_test.cpp | 17 +- .../lib/tsan/tests/unit/tsan_trace_test.cpp | 175 +- compiler-rt/test/tsan/Darwin/debug_external.cpp | 3 +- .../test/tsan/Darwin/external-swift-debugging.cpp | 4 +- compiler-rt/test/tsan/Linux/fork_deadlock.cpp | 63 + compiler-rt/test/tsan/free_race2.c | 2 +- compiler-rt/test/tsan/memcmp_race.cpp | 2 +- compiler-rt/test/tsan/memcpy_race.cpp | 10 +- compiler-rt/test/tsan/mutexset7.cpp | 6 +- .../include/flang/Optimizer/Dialect/FIRDialect.td | 1 + libc/fuzzing/math/RemQuoDiff.h | 5 + libc/fuzzing/stdlib/CMakeLists.txt | 4 +- .../{atof_fuzz.cpp => atof_differential_fuzz.cpp} | 0 libc/include/sys/mman.h.def | 5 + libc/include/sys/syscall.h.def | 5 + libc/src/__support/architectures.h | 7 +- libc/src/__support/common.h | 2 +- libc/src/__support/endian.h | 2 +- libc/src/__support/sanitizer.h | 2 +- libc/src/__support/str_to_float.h | 2 - libc/src/string/memory_utils/elements.h | 76 +- libc/src/string/memory_utils/elements_x86.h | 4 + .../test/src/string/memory_utils/elements_test.cpp | 38 +- libcxx/docs/FeatureTestMacroTable.rst | 2 + libcxx/docs/Status/Cxx20Issues.csv | 6 +- libcxx/docs/Status/Cxx2bPapers.csv | 2 +- libcxx/docs/Status/SpaceshipPapers.csv | 2 +- libcxx/include/CMakeLists.txt | 1 + libcxx/include/__algorithm/binary_search.h | 2 +- libcxx/include/__algorithm/is_heap.h | 4 +- libcxx/include/__algorithm/is_heap_until.h | 21 +- libcxx/include/__algorithm/is_sorted.h | 4 +- libcxx/include/__algorithm/is_sorted_until.h | 19 +- libcxx/include/__algorithm/max.h | 4 +- libcxx/include/__algorithm/max_element.h | 21 +- libcxx/include/__algorithm/min.h | 4 +- libcxx/include/__algorithm/min_element.h | 21 +- libcxx/include/__bit/byteswap.h | 55 + libcxx/include/__format/formatter.h | 43 + libcxx/include/__format/formatter_integral.h | 39 - libcxx/include/__ranges/concepts.h | 2 +- libcxx/include/bit | 13 +- libcxx/include/module.modulemap | 1 + libcxx/include/ranges | 2 +- libcxx/include/version | 4 +- .../robust_against_copying_comparators.pass.cpp | 190 + .../detail.headers/bit/byteswap.module.verify.cpp} | 18 +- .../libcxx/thread/thread.mutex/version.pass.cpp | 2 + .../algorithms/robust_against_adl.compile.pass.cpp | 7 +- .../robust_re_difference_type.compile.pass.cpp | 7 +- .../equality_comparable.compile.pass.cpp | 5 +- .../equality_comparable_with.compile.pass.cpp | 5 +- .../assignable_from.compile.pass.cpp | 5 +- .../concepts.object/movable.compile.pass.cpp | 5 +- .../support.limits.general/bit.version.pass.cpp | 24 + .../support.limits.general/charconv.pass.cpp | 33 - .../charconv.version.pass.cpp | 84 + .../memory_resource.version.pass.cpp | 35 - .../support.limits.general/mutex.version.pass.cpp | 2 + .../utility.version.pass.cpp | 48 - .../version.version.pass.cpp | 24 + libcxx/test/std/numerics/bit/byteswap.pass.cpp | 100 + .../c.math/{abs.fail.cpp => abs.verify.cpp} | 17 +- .../thread.once.callonce/call_once.pass.cpp | 2 +- .../thread.once/thread.once.callonce/race.pass.cpp | 2 +- .../thread.once.onceflag/assign.compile.fail.cpp | 2 + .../thread.once.onceflag/copy.compile.fail.cpp | 2 + .../thread.once.onceflag/default.pass.cpp | 2 + .../meta/meta.rel/is_nothrow_invocable.pass.cpp | 24 +- .../tuple_size_structured_bindings.pass.cpp | 1 - libcxx/test/support/uses_alloc_types.h | 1 + .../generate_feature_test_macro_components.py | 17 +- libcxx/utils/generate_header_inclusion_tests.py | 9 +- libcxx/utils/libcxx/test/features.py | 2 - libcxxabi/test/catch_function_03.pass.cpp | 3 +- .../test/catch_member_function_pointer_02.pass.cpp | 3 +- lld/ELF/LinkerScript.cpp | 78 +- lld/ELF/SyntheticSections.cpp | 4 +- lld/ELF/Writer.cpp | 61 - lld/ELF/Writer.h | 1 - lld/test/ELF/linkerscript/discard-plt.s | 37 + lldb/bindings/python/python-swigsafecast.swig | 58 +- lldb/bindings/python/python-wrapper.swig | 113 +- .../Python/lldbsuite/test/gdbclientutils.py | 56 +- .../Python/lldbsuite/test/lldbgdbclient.py | 2 +- .../Python/ScriptInterpreterPython.cpp | 15 +- .../unique_ptr/TestUniquePtrFromStdModule.py | 1 + .../functionalities/gdb_remote_client/TestPty.py | 6 +- .../functionalities/mtc/simple/TestMTCSimple.py | 2 + .../TestModulesCompileError.py | 1 + .../API/tools/lldb-server/TestLldbGdbServer.py | 3 + .../ScriptInterpreter/Python/PythonTestSuite.cpp | 8 +- llvm/docs/HowToAddABuilder.rst | 89 + .../llvm/ExecutionEngine/JITLink/JITLinkDylib.h | 13 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 10 +- llvm/include/llvm/IR/IntrinsicsNVVM.td | 2 +- llvm/include/llvm/Support/AArch64TargetParser.def | 3 +- llvm/lib/Analysis/BranchProbabilityInfo.cpp | 201 +- llvm/lib/Analysis/DivergenceAnalysis.cpp | 10 +- llvm/lib/Analysis/IntervalPartition.cpp | 16 +- llvm/lib/Analysis/LazyValueInfo.cpp | 15 +- llvm/lib/Analysis/MemoryDependenceAnalysis.cpp | 6 +- llvm/lib/Analysis/ScalarEvolution.cpp | 40 +- llvm/lib/Analysis/SyncDependenceAnalysis.cpp | 59 +- llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp | 4 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 9 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 28 +- llvm/lib/Bitcode/Writer/ValueEnumerator.cpp | 4 +- llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp | 17 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 11 +- llvm/lib/CodeGen/LiveRangeEdit.cpp | 11 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 9 +- llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp | 8 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 4 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 28 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 1 - llvm/lib/Target/AMDGPU/R600Packetizer.cpp | 19 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 3 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 14 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 18 +- llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 13 +- llvm/lib/Target/ARM/Thumb2SizeReduction.cpp | 2 +- llvm/lib/Target/Hexagon/BitTracker.cpp | 4 +- llvm/lib/Target/Hexagon/HexagonBitTracker.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonConstExtenders.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 24 +- llvm/lib/Target/Hexagon/HexagonGenInsert.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonGenMux.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonGenPredicate.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAGHVX.cpp | 8 +- llvm/lib/Target/Hexagon/HexagonISelLowering.cpp | 6 +- .../lib/Target/Hexagon/HexagonMachineScheduler.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonPeephole.cpp | 18 +- llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp | 1 - llvm/lib/Target/Lanai/LanaiFrameLowering.cpp | 9 +- llvm/lib/Target/MSP430/MSP430FrameLowering.cpp | 4 +- llvm/lib/Target/Mips/Mips16FrameLowering.cpp | 11 +- llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 14 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 36 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 11 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 8 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 3 - llvm/lib/Target/RISCV/RISCVISelLowering.h | 8 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 1 + llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp | 36 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 18 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 6 +- llvm/lib/Target/X86/X86InstrAVX512.td | 4 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 226 +- llvm/lib/Target/XCore/XCoreFrameLowering.cpp | 8 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 14 + .../Transforms/InstCombine/InstCombineInternal.h | 1 + .../InstCombine/InstructionCombining.cpp | 23 + .../Transforms/Instrumentation/InstrProfiling.cpp | 43 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 59 +- llvm/lib/Transforms/Utils/CloneModule.cpp | 72 +- llvm/lib/Transforms/Utils/Evaluator.cpp | 5 +- llvm/lib/Transforms/Utils/LoopSimplify.cpp | 13 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 12 +- llvm/lib/Transforms/Utils/MetaRenamer.cpp | 6 +- llvm/lib/Transforms/Utils/VNCoercion.cpp | 14 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 187 +- llvm/lib/Transforms/Vectorize/VPlan.h | 12 +- .../BranchProbabilityInfo/pointer_heuristics.ll | 70 + llvm/test/Analysis/CostModel/X86/extend.ll | 1376 +++++-- .../CostModel/X86/min-legal-vector-width.ll | 28 +- .../CostModel/X86/shuffle-replication-i1.ll | 705 ++-- .../CostModel/X86/shuffle-replication-i16.ll | 428 +- .../CostModel/X86/shuffle-replication-i32.ll | 172 +- .../CostModel/X86/shuffle-replication-i64.ll | 151 +- .../CostModel/X86/shuffle-replication-i8.ll | 428 +- llvm/test/Analysis/CostModel/X86/trunc.ll | 2489 +++++++++--- llvm/test/CodeGen/AArch64/sinksplat.ll | 375 ++ .../GlobalISel/atomic_optimizations_mul_one.ll | 24 +- .../CodeGen/AMDGPU/GlobalISel/bool-legalization.ll | 8 +- .../AMDGPU/GlobalISel/divergent-control-flow.ll | 42 +- .../AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll | 16 +- .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll | 4 +- .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll | 4 +- .../AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll | 32 +- .../AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll | 12 +- .../AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll | 12 +- .../AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll | 12 +- .../AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll | 344 +- llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll | 4 +- .../test/CodeGen/AMDGPU/GlobalISel/llvm.memmove.ll | 16 +- llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memset.ll | 4 +- llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll | 24 +- .../CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll | 20 +- llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll | 60 +- llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll | 60 +- llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll | 60 +- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll | 60 +- llvm/test/CodeGen/AMDGPU/amd.endpgm.ll | 8 +- .../AMDGPU/atomic_optimizations_global_pointer.ll | 184 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 416 +- .../AMDGPU/atomic_optimizations_pixelshader.ll | 100 +- llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll | 12 +- llvm/test/CodeGen/AMDGPU/basic-branch.ll | 4 +- llvm/test/CodeGen/AMDGPU/branch-condition-and.ll | 4 +- llvm/test/CodeGen/AMDGPU/branch-relax-bundle.ll | 2 +- llvm/test/CodeGen/AMDGPU/branch-relax-spill.ll | 32 +- .../AMDGPU/branch-relaxation-debug-info.mir | 6 +- .../branch-relaxation-gfx10-branch-offset-bug.ll | 16 +- llvm/test/CodeGen/AMDGPU/branch-relaxation.ll | 72 +- llvm/test/CodeGen/AMDGPU/bypass-div.ll | 48 +- llvm/test/CodeGen/AMDGPU/byval-frame-setup.ll | 2 +- llvm/test/CodeGen/AMDGPU/call-skip.ll | 6 +- llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll | 6 +- .../CodeGen/AMDGPU/cgp-addressing-modes-flat.ll | 2 +- .../CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll | 4 +- .../CodeGen/AMDGPU/cgp-addressing-modes-gfx908.ll | 4 +- llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll | 14 +- llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll | 18 +- llvm/test/CodeGen/AMDGPU/collapse-endcf.ll | 26 +- .../CodeGen/AMDGPU/control-flow-fastregalloc.ll | 14 +- .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 16 +- llvm/test/CodeGen/AMDGPU/ctpop16.ll | 24 +- llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll | 12 +- .../AMDGPU/divergent-branch-uniform-condition.ll | 18 +- llvm/test/CodeGen/AMDGPU/early-if-convert.ll | 12 +- llvm/test/CodeGen/AMDGPU/endcf-loop-header.ll | 2 +- .../AMDGPU/expand-scalar-carry-out-select-user.ll | 12 +- llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll | 44 +- llvm/test/CodeGen/AMDGPU/global-atomics-fp.ll | 100 +- .../CodeGen/AMDGPU/global-load-saddr-to-vaddr.ll | 8 +- llvm/test/CodeGen/AMDGPU/global-saddr-load.ll | 16 +- llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll | 20 +- .../CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll | 4 +- llvm/test/CodeGen/AMDGPU/idiv-licm.ll | 64 +- llvm/test/CodeGen/AMDGPU/image-sample-waterfall.ll | 4 +- .../CodeGen/AMDGPU/indirect-addressing-si-noopt.ll | 4 +- llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll | 6 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 72 +- llvm/test/CodeGen/AMDGPU/infinite-loop.ll | 40 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 24 +- llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll | 56 +- llvm/test/CodeGen/AMDGPU/lds-m0-init-in-loop.ll | 8 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.barrier.ll | 2 +- .../test/CodeGen/AMDGPU/llvm.amdgcn.ds.gws.init.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.br.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.p.ll | 2 +- .../AMDGPU/llvm.amdgcn.ds.gws.sema.release.all.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.gws.sema.v.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll | 2 +- .../CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll | 12 +- .../llvm.amdgcn.struct.buffer.load.format.v3f16.ll | 12 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll | 344 +- .../AMDGPU/local-stack-alloc-block-sp-reference.ll | 24 +- .../AMDGPU/loop-live-out-copy-undef-subrange.ll | 8 +- llvm/test/CodeGen/AMDGPU/loop-prefetch.ll | 38 +- llvm/test/CodeGen/AMDGPU/loop_break.ll | 48 +- llvm/test/CodeGen/AMDGPU/mfma-loop.ll | 22 +- .../test/CodeGen/AMDGPU/mubuf-legalize-operands.ll | 30 +- llvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll | 12 +- llvm/test/CodeGen/AMDGPU/mul_int24.ll | 12 +- .../CodeGen/AMDGPU/multi-divergent-exit-region.ll | 4 +- llvm/test/CodeGen/AMDGPU/multilevel-break.ll | 46 +- llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll | 42 +- llvm/test/CodeGen/AMDGPU/non-entry-alloca.ll | 40 +- llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll | 12 +- .../CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll | 16 +- llvm/test/CodeGen/AMDGPU/remat-fp64-constants.ll | 2 +- llvm/test/CodeGen/AMDGPU/ret_jump.ll | 8 +- llvm/test/CodeGen/AMDGPU/salu-to-valu.ll | 4 +- llvm/test/CodeGen/AMDGPU/sdiv64.ll | 96 +- llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir | 212 +- llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll | 36 +- llvm/test/CodeGen/AMDGPU/sgpr-copy.ll | 2 +- llvm/test/CodeGen/AMDGPU/sgpr-spill-no-vgprs.ll | 4 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf-kill.ll | 24 +- llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll | 92 +- .../CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll | 8 +- .../si-lower-control-flow-unreachable-block.ll | 6 +- llvm/test/CodeGen/AMDGPU/skip-branch-trap.ll | 4 +- llvm/test/CodeGen/AMDGPU/skip-if-dead.ll | 424 +- llvm/test/CodeGen/AMDGPU/smrd-vccz-bug.ll | 4 +- llvm/test/CodeGen/AMDGPU/spill-cfg-position.ll | 4 +- llvm/test/CodeGen/AMDGPU/spill-m0.ll | 2 +- llvm/test/CodeGen/AMDGPU/srem64.ll | 112 +- .../stack-pointer-offset-relative-frameindex.ll | 8 +- llvm/test/CodeGen/AMDGPU/subvector-test.mir | 4 +- llvm/test/CodeGen/AMDGPU/trap-abis.ll | 48 +- llvm/test/CodeGen/AMDGPU/udiv64.ll | 112 +- .../CodeGen/AMDGPU/undefined-subreg-liverange.ll | 8 +- llvm/test/CodeGen/AMDGPU/uniform-cfg.ll | 50 +- llvm/test/CodeGen/AMDGPU/uniform-crash.ll | 6 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 4 +- .../AMDGPU/unstructured-cfg-def-use-issue.ll | 46 +- llvm/test/CodeGen/AMDGPU/urem64.ll | 84 +- llvm/test/CodeGen/AMDGPU/valu-i1.ll | 24 +- .../vgpr-descriptor-waterfall-loop-idom-update.ll | 8 +- llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll | 46 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 16 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 6 +- llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll | 4 +- .../CodeGen/ARM/ParallelDSP/complex_dot_prod.ll | 192 +- llvm/test/CodeGen/ARM/sxt_rot.ll | 82 +- llvm/test/CodeGen/Hexagon/abi-padding-2.ll | 2 +- .../CodeGen/Hexagon/pipeliner/swp-phi-start.mir | 2 +- .../test/CodeGen/PowerPC/mi-peepholes-trap-opt.mir | 3 +- llvm/test/CodeGen/PowerPC/rlwinm2.ll | 17 +- llvm/test/CodeGen/PowerPC/vector-reduce-add.ll | 1808 +++++++++ llvm/test/CodeGen/PowerPC/vector-reduce-and.ll | 390 ++ llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll | 4247 ++++++++++++++++++++ llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll | 1169 ++++++ llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll | 1169 ++++++ llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll | 1717 ++++++++ llvm/test/CodeGen/PowerPC/vector-reduce-mul.ll | 204 + llvm/test/CodeGen/PowerPC/vector-reduce-or.ll | 392 ++ llvm/test/CodeGen/PowerPC/vector-reduce-smax.ll | 796 ++++ llvm/test/CodeGen/PowerPC/vector-reduce-smin.ll | 796 ++++ llvm/test/CodeGen/PowerPC/vector-reduce-umax.ll | 796 ++++ llvm/test/CodeGen/PowerPC/vector-reduce-umin.ll | 796 ++++ llvm/test/CodeGen/PowerPC/vector-reduce-xor.ll | 392 ++ llvm/test/CodeGen/RISCV/addimm-mulimm.ll | 70 +- llvm/test/CodeGen/RISCV/aext-to-sext.ll | 4 +- llvm/test/CodeGen/RISCV/alloca.ll | 30 +- llvm/test/CodeGen/RISCV/alu32.ll | 12 +- llvm/test/CodeGen/RISCV/alu64.ll | 30 +- llvm/test/CodeGen/RISCV/analyze-branch.ll | 4 +- llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll | 400 +- llvm/test/CodeGen/RISCV/atomic-load-store.ll | 144 +- llvm/test/CodeGen/RISCV/atomic-rmw.ll | 2658 ++++++------ llvm/test/CodeGen/RISCV/atomic-signext.ll | 542 +-- llvm/test/CodeGen/RISCV/branch-relaxation.ll | 4 +- llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 68 +- llvm/test/CodeGen/RISCV/callee-saved-fpr32s.ll | 208 +- llvm/test/CodeGen/RISCV/callee-saved-fpr64s.ll | 108 +- llvm/test/CodeGen/RISCV/callee-saved-gprs.ll | 192 +- llvm/test/CodeGen/RISCV/calling-conv-half.ll | 132 +- .../RISCV/calling-conv-ilp32-ilp32f-common.ll | 68 +- .../calling-conv-ilp32-ilp32f-ilp32d-common.ll | 230 +- llvm/test/CodeGen/RISCV/calling-conv-ilp32.ll | 52 +- llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll | 54 +- .../RISCV/calling-conv-ilp32f-ilp32d-common.ll | 36 +- .../RISCV/calling-conv-lp64-lp64f-common.ll | 8 +- .../RISCV/calling-conv-lp64-lp64f-lp64d-common.ll | 104 +- llvm/test/CodeGen/RISCV/calling-conv-lp64.ll | 52 +- .../test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll | 32 +- llvm/test/CodeGen/RISCV/calls.ll | 8 +- llvm/test/CodeGen/RISCV/codemodel-lowering.ll | 16 +- llvm/test/CodeGen/RISCV/copysign-casts.ll | 22 +- llvm/test/CodeGen/RISCV/div.ll | 124 +- llvm/test/CodeGen/RISCV/double-arith.ll | 234 +- .../CodeGen/RISCV/double-bitmanip-dagcombines.ll | 12 +- llvm/test/CodeGen/RISCV/double-br-fcmp.ll | 8 +- llvm/test/CodeGen/RISCV/double-calling-conv.ll | 26 +- llvm/test/CodeGen/RISCV/double-convert.ll | 206 +- llvm/test/CodeGen/RISCV/double-fcmp.ll | 56 +- llvm/test/CodeGen/RISCV/double-intrinsics.ll | 30 +- llvm/test/CodeGen/RISCV/double-previous-failure.ll | 4 +- .../CodeGen/RISCV/exception-pointer-register.ll | 8 +- llvm/test/CodeGen/RISCV/fastcc-int.ll | 4 +- llvm/test/CodeGen/RISCV/float-arith.ll | 148 +- .../RISCV/float-bit-preserving-dagcombines.ll | 24 +- llvm/test/CodeGen/RISCV/float-br-fcmp.ll | 18 +- llvm/test/CodeGen/RISCV/float-convert.ll | 174 +- llvm/test/CodeGen/RISCV/float-fcmp.ll | 48 +- llvm/test/CodeGen/RISCV/float-intrinsics.ll | 16 +- llvm/test/CodeGen/RISCV/flt-rounds.ll | 4 +- llvm/test/CodeGen/RISCV/fp-imm.ll | 10 +- llvm/test/CodeGen/RISCV/fp16-promote.ll | 16 +- llvm/test/CodeGen/RISCV/frame-info.ll | 16 +- llvm/test/CodeGen/RISCV/frame.ll | 6 +- llvm/test/CodeGen/RISCV/frameaddr-returnaddr.ll | 16 +- llvm/test/CodeGen/RISCV/half-arith.ll | 380 +- llvm/test/CodeGen/RISCV/half-br-fcmp.ll | 8 +- llvm/test/CodeGen/RISCV/half-convert.ll | 270 +- llvm/test/CodeGen/RISCV/half-fcmp.ll | 16 +- llvm/test/CodeGen/RISCV/half-intrinsics.ll | 56 +- llvm/test/CodeGen/RISCV/half-mem.ll | 4 +- llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll | 16 +- llvm/test/CodeGen/RISCV/i32-icmp.ll | 4 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mlir/lib/ExecutionEngine/ExecutionEngine.cpp | 16 +- mlir/lib/ExecutionEngine/JitRunner.cpp | 2 +- mlir/lib/IR/AffineExpr.cpp | 31 +- .../Dialect/NVVM/NVVMToLLVMIRTranslation.cpp | 42 +- mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 18 +- .../Dialect/Affine/simplify-affine-structures.mlir | 14 + mlir/test/Dialect/GPU/ops.mlir | 6 + mlir/test/Dialect/LLVMIR/invalid.mlir | 6 +- mlir/test/Dialect/LLVMIR/nvvm.mlir | 22 +- .../test/Dialect/Linalg/fusion-tensor-pattern.mlir | 16 +- .../Dialect/Linalg/tile-and-fuse-on-tensors.mlir | 275 +- .../Linalg/tile-and-fuse-sequence-on-tensors.mlir | 75 +- mlir/test/Dialect/SPIRV/IR/bit-ops.mlir | 8 +- mlir/test/Dialect/SPIRV/IR/logical-ops.mlir | 6 +- mlir/test/Dialect/Vector/canonicalize.mlir | 39 +- .../Dialect/Vector/vector-dim-one-shape-cast.mlir | 23 - mlir/test/Dialect/Vector/vector-transforms.mlir | 66 +- .../Dialect/Vector/vector-transpose-lowering.mlir | 27 +- mlir/test/IR/invalid-ops.mlir | 6 +- .../LLVMIR/CPU/X86/test-inline-asm-vector.mlir | 56 + mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir | 12 +- mlir/test/Integration/GPU/ROCM/two-modules.mlir | 12 +- mlir/test/Integration/GPU/ROCM/vecadd.mlir | 30 +- .../Integration/GPU/ROCM/vector-transferops.mlir | 16 +- mlir/test/Target/LLVMIR/nvvmir.mlir | 32 +- .../Dialect/Linalg/TestLinalgCodegenStrategy.cpp | 27 +- mlir/test/lib/Dialect/Vector/CMakeLists.txt | 2 + .../lib/Dialect/Vector/TestVectorTransforms.cpp | 5 + mlir/unittests/Analysis/PresburgerSetTest.cpp | 11 +- openmp/libomptarget/deviceRTLs/target_interface.h | 1 - openmp/libomptarget/plugins/amdgpu/impl/internal.h | 13 +- .../plugins/amdgpu/impl/interop_hsa.cpp | 45 - .../libomptarget/plugins/amdgpu/impl/interop_hsa.h | 5 - openmp/libomptarget/plugins/amdgpu/impl/system.cpp | 64 +- openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 26 +- utils/bazel/llvm-project-overlay/mlir/BUILD.bazel | 16 + .../llvm-project-overlay/mlir/test/BUILD.bazel | 2 + 828 files changed, 39172 insertions(+), 17885 deletions(-) delete mode 100644 compiler-rt/lib/tsan/rtl/tsan_update_shadow_word.inc create mode 100644 compiler-rt/test/tsan/Linux/fork_deadlock.cpp rename libc/fuzzing/stdlib/{atof_fuzz.cpp => atof_differential_fuzz.cpp} (100%) create mode 100644 libcxx/include/__bit/byteswap.h create mode 100644 libcxx/test/libcxx/algorithms/robust_against_copying_comparator [...] copy libcxx/test/libcxx/{thread/thread.mutex/version.pass.cpp => diagnostics/detai [...] delete mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] delete mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 libcxx/test/std/numerics/bit/byteswap.pass.cpp rename libcxx/test/std/numerics/c.math/{abs.fail.cpp => abs.verify.cpp} (50%) create mode 100644 lld/test/ELF/linkerscript/discard-plt.s create mode 100644 llvm/test/Analysis/BranchProbabilityInfo/pointer_heuristics.ll create mode 100644 llvm/test/CodeGen/AArch64/sinksplat.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-add.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-and.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-mul.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-or.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-smax.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-smin.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-umax.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-umin.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-xor.ll create mode 100644 llvm/test/CodeGen/RISCV/sink-icmp.ll create mode 100644 llvm/test/CodeGen/X86/pr52567.ll create mode 100644 llvm/test/Transforms/LoopVectorize/X86/drop-poison-generating-flags.ll create mode 100644 llvm/test/Transforms/SROA/alloca-struct.ll create mode 100644 mlir/lib/Dialect/Vector/VectorDropLeadUnitDim.cpp delete mode 100644 mlir/test/Dialect/Vector/vector-dim-one-shape-cast.mlir create mode 100644 mlir/test/Integration/Dialect/LLVMIR/CPU/X86/test-inline-asm-ve [...] -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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