Tcwg-commits November 2021

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_O1 updated (e616ed36 -> 00a4948f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_O1 in repository toolchain/ci/base-artifacts. discards e616ed36 0: update: binutils-gcc: 2 new 00a4948f 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e616ed36) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-arm [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1656 -> 1536 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2752 bytes 04-build_abe-binutils/console.log.xz | Bin 67212 -> 66112 bytes 05-build_abe-bootstrap_O1/console.log.xz | Bin 467224 -> 467096 bytes 06-check_regression/console.log.xz | Bin 420 -> 420 bytes 07-update_baseline/console.log | 18 +++++++++--------- jenkins/manifest.sh | 12 ++++++------ 7 files changed, 15 insertions(+), 15 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig updated (08522810 -> 7ed00da1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allyesconfig in repository toolchain/ci/base-artifacts. from 08522810 1: reset: linux-fad7cd3310db3099f95dd34312c77740fbc455e5: 19715 new 7ed00da1 2: update: linux-d293389b3f0da4e2f14a3278bd0279099d602db2: 19897 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1572 -> 1720 bytes 02-prepare_abe/console.log.xz | Bin 2788 -> 2772 bytes 03-build_abe-binutils/console.log.xz | Bin 41028 -> 40688 bytes 04-build_llvm/console.log.xz | Bin 59716 -> 58064 bytes 05-build_abe-qemu/console.log.xz | Bin 30940 -> 30912 bytes 06-build_linux/console.log.xz | Bin 4572 -> 4852 bytes 08-check_regression/console.log.xz | Bin 1320 -> 484 bytes 08-check_regression/jira-body.txt | 2 - 08-check_regression/mail-body.txt | 31 ------------ 08-check_regression/mail-subject.txt | 1 - 08-check_regression/results.regressions | 3 -- 08-check_regression/trigger-bisect | 2 - 09-update_baseline/console.log | 86 +++++++++++++++++++++++++------- jenkins/manifest.sh | 10 ++-- mail/jira-body.txt | 5 -- mail/mail-body.txt | 34 ------------- mail/mail-subject.txt | 1 - reset-baseline | 0 results | 5 +- 19 files changed, 73 insertions(+), 107 deletions(-) delete mode 100644 08-check_regression/jira-body.txt delete mode 100644 08-check_regression/mail-body.txt delete mode 100644 08-check_regression/mail-subject.txt delete mode 100644 08-check_regression/results.regressions delete mode 100644 08-check_regression/trigger-bisect delete mode 100644 mail/jira-body.txt delete mode 100644 mail/mail-body.txt delete mode 100644 mail/mail-subject.txt delete mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (3bb87484e7 -> c5fbdd60cf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig in repository toolchain/ci/qemu. from 3bb87484e7 Merge tag 'pull-request-2021-11-17' of https://gitlab.com/th [...] adds f3bc3a73c9 vfio: Fix memory leak of hostwin adds 0055ecca84 Merge tag 'vfio-fixes-20211117.0' of git://github.com/awilli [...] adds 55cdf56641 qapi/qom,target/i386: sev-guest: Introduce kernel-hashes=on| [...] adds 9dbe0c93f0 target/i386/sev: Add kernel hashes only if sev-guest.kernel- [...] adds 5a0294a21c target/i386/sev: Rephrase error message when no hashes table [...] adds a0190bf150 target/i386/sev: Fail when invalid hashes table area detected adds ddcc0d898e target/i386/sev: Perform padding calculations at compile-time adds 58603ba268 target/i386/sev: Replace qemu_map_ram_ptr with address_space_map adds 44a3aa0608 Merge tag 'sev-hashes-pull-request' of https://gitlab.com/be [...] adds d05dcd94ae net: vmxnet3: validate configuration values during activate [...] adds fb5eca4a57 net/colo-compare.c: Fix ACK track reverse issue adds 0656fbc7dd net/colo-compare.c: Fix incorrect return when input wrong size adds 3760a04c35 Merge tag 'net-pull-request' of https://github.com/jasowang/ [...] adds 9fc6e86e8b hw/nvme: reattach subsystem namespaces on hotplug adds 916b0f0b52 hw/nvme: change nvme-ns 'shared' default adds e2c57529c9 hw/nvme: fix buffer overrun in nvme_changed_nslist (CVE-2021-3947) adds 9c25e1db18 Merge tag 'nvme-fixes-for-6.2-pull-request' of git://git.inf [...] adds 14554b3dcc pmu: fix pmu vmstate subsection list adds a443d55c3f tests/tcg/ppc64le: Fix compile flags for byte_reverse adds d434a47905 Merge tag 'pull-ppc-20211119' of https://github.com/legoater [...] adds 6a23f8190f meson: fix botched compile check conversions adds 0cc4965049 nvmm: Fix support for stable version adds 3f26c97577 esp: ensure that async_len is reset to 0 during esp_hard_reset() adds 283191640c qtest/am53c974-test: add test for reset before transfer adds 5135fe7110 docs: Spell QEMU all caps adds fbab8cc24d meson.build: Support ncurses on MacOS and OpenBSD adds fdc6e16818 chardev/wctable: don't free the instance in wctablet_chr_finalize adds 8627edfb3f Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu [...] adds c29cd47e82 escc: always set STATUS_TXEMPTY in R_STATUS on device reset adds 319e89cdc3 escc: update the R_SPEC register SPEC_ALLSENT bit when writi [...] adds c5fbdd60cf Merge tag 'qemu-sparc-20211121' of git://github.com/mcayland [...] No new revisions were added by this update. Summary of changes: chardev/wctablet.c | 1 - docs/devel/modules.rst | 2 +- docs/devel/multi-thread-tcg.rst | 2 +- docs/devel/style.rst | 2 +- docs/devel/ui.rst | 4 +- docs/interop/nbd.txt | 6 +-- docs/interop/qcow2.txt | 8 ++-- docs/multiseat.txt | 2 +- docs/system/device-url-syntax.rst.inc | 2 +- docs/system/devices/nvme.rst | 24 ++++++----- docs/system/i386/sgx.rst | 26 ++++++------ docs/u2f.txt | 2 +- hw/char/escc.c | 25 +++++++++++ hw/core/machine.c | 1 + hw/misc/macio/pmu.c | 1 + hw/net/vmxnet3.c | 13 ++++++ hw/nvme/ctrl.c | 5 +++ hw/nvme/ns.c | 8 +--- hw/nvme/subsys.c | 10 ++++- hw/scsi/esp.c | 1 + hw/vfio/common.c | 8 ++++ meson.build | 33 +++++++++------ net/colo-compare.c | 8 ++-- qapi/qom.json | 7 +++- qemu-options.hx | 6 ++- target/i386/nvmm/nvmm-all.c | 10 +++++ target/i386/sev.c | 79 +++++++++++++++++++++++++++++------ tests/qtest/am53c974-test.c | 30 +++++++++++++ tests/tcg/ppc64le/Makefile.target | 12 ++---- ui/curses.c | 4 ++ 30 files changed, 255 insertions(+), 87 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (972219195eff -> 49e3838145df)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig in repository toolchain/ci/llvm-project. from 972219195eff [gn build] Port 24d1673c8b9b adds 74115602e82d [clang] Use range-based for loops with llvm::reverse (NFC) adds 49682f14bf3f [SPIR-V] Add translator tool adds 111d8f785b3a tsan: remove quadratic behavior in pthread_join adds d61840c168a3 [gn build] Port 49682f14bf3f adds 92832e4889ae [libc++] Enable <atomic> when threads are disabled adds c72356951245 [gn build] Port 92832e4889ae adds a9fba2be35db [X86][ABI] Do not return float/double from x87 registers w [...] adds 6113ea8124d7 [X86][Driver] Add X86 target option to avoid fail to other [...] adds 4a8734deb7d5 [libc++] [test] Add "robust_re_difference_type.compile.pas [...] adds 0c7890c844fd [mlir] Convert NamedAttribute to be a class adds 26e90423f4b8 [mlir][linalg][bufferize][NFC] Decouple ComprehensiveBuffe [...] adds ebf8d74e929d [mlir][linalg][bufferize] Fix bufferize bug where non-tens [...] adds b10562612f2e Fix Windows build after commit 49682f1. adds 54c998420799 [mlir][Python] Fix generation of accessors for Optional adds e81d73ed9233 [fir] Add fir.constc conversion adds 9bda9a39800f [PowerPC] fix typos in comments, NFC adds 7aa2ce0fab3c [NFC][clangd] fix clang-tidy finding on isa_and_nonnull adds dd6281c4c172 [SCEV] Add additional guard tests with swapped condition ops. adds da9f2ba3b1a6 [SCEV] Reorder operands checks in collectConditions. adds 9cef7c1ca9c2 [CodeGen][SVE] Add missing isel patterns for vector_reverse adds af6ee58092a3 [fir] Add fir.embox conversion adds 8a4fcfc242a0 Remove non-affecting module maps from PCM files. adds 9fe6b9e80254 [TargetLowering][RISCV] Fixed a scalable vector issue when [...] adds 09f39862dc08 [docs] Remove mention of retired smooshlab IRC bot. adds 1235ca37bd3f [docs] Update outdated mentions of lab.llvm.org:8011. adds c772a9b6eb14 [clang][modules] NFC: Fix typo in test name adds 8e47b83ec93d [AArch64][ARM] Enablement of Cortex-A710 Support adds 17ec9d1f6bc1 [clang][deps] Don't emit `-fmodule-map-file=` adds 7b6790850968 [clang][lex] NFC: Remove unused HeaderFileInfo member adds 197576c40986 [clang][lex] Refactor check for the first file include adds e1acbda158b3 [AArch64][RISCV] Fix expected smulo/umulo test output adds 00200dbda316 [LV] Add test case for PR52024. adds cc505c0bb733 [Flang] Notify conversion failure for Proc ops, types adds 3a56f5622f39 [lldb] Convert internal platform usages GetSupportedArchitectures adds 0800109d2633 [fir] Add tests for mlir::ComplexType conversion adds 3950e1be8d6e [clang] Remove CLANG_ROUND_TRIP_CC1_ARGS and always roundt [...] adds 4c56f734b35d [lldb] (Partially) enable formatting of utf strings before [...] adds dead1c11ff1c [LV] Add basic check lines to test added in 00200dbda31674e59. adds 22d332a0a20f [flang][codegen] Add `fir.end` conversion placeholder adds b2ad420a786a [flang][nfc] Remove trailing whitespaces from tests adds 55a79318c60d [clang][clangd] Improve signature help for variadic functions. adds 11982eed2bc8 [libunwind][AIX] Mark signal_frame.pass.cpp UNSUPPORTED on AIX adds 7d11c5dac210 Coro: Remove coro_end and coro_suspend_retcon in private [...] adds 26f56438e3da [Clang][SVE] Properly enable/disable dependant SVE target [...] adds 1ce516d43f10 [libc++] Minor fixups in the new introsort code. adds 18ba57a53a81 [AMDGPU] Regenerate test checks in splitkit-getsubrangeformask.ll adds bab39816085d [libunwind] Add an interface for dynamic .eh_frame registration adds a3f2be18b8fe [mlir][doc] Rename doc to match previous name adds fb1a06aa1381 [MLIR][GPU] Add target arguments to SerializeToHsaco adds e6c66ef55e63 [flang][CodeGen] Transform `fir.field_index` to a sequence [...] adds ff64b2933a7d [LoopVectorize] Check the number of uses of an FAdd before [...] adds 08c0a45ab89c Unbreak test after D111899 adds 45e102a17368 [Clang][SVE] Fix windows test breakage in 26f56438e3dab44c [...] adds a1f9bd32c576 [Flang] Add a factory class for creating Complex Ops adds 100df68496d1 [SCEV] Add test coverage for invertible functions of IVs adds 3821d2ab3bec [X86] LowerRotate - pull out repeated is ISD::ROTL check. NFC. adds 1dc1c944d8f9 [mlir][doc] Avoid name overlap that confuses copy_docs.sh (NFC) adds 1e954a1c6678 [flang] Fix off-by-one results from folding MAXEXPONENT an [...] adds 180625fcb478 Add a breadcrumb comment to make debugging a user error wh [...] adds 7796d81ae820 [flang] Skip `Fortran STOP:` before message when NO_STOP_M [...] adds 7ca14f6044bf [llvm] Use range-based for loops (NFC) adds 526dfe3f4d33 [mlir][Linalg] Do not return failure when all tile sizes a [...] adds 7a14244cc645 [NFC][clang] Inclusive language: replace masterPort with mainPort adds ea12c2cb9c42 [SCEV] Move mustprogress based no-self-wrap logic so it ap [...] adds f1127914d3dc [lldb] Deobfuscate python-swigsafecast.swig adds 95af9d888b08 [NFC][lldb] Inclusive language: remove instances of master [...] adds 5cf23ecc23af fix syntax error adds a1504281b607 [NFC][mlir] Inclusive language: Replace an instance of mas [...] adds 0a8a5902a694 [mlir] Fully qualify default generated type/attribute prin [...] adds f1295563f13e [DSE] Move removePartiallyOverlappedStores() into DSEState (NFC) adds 46c26991ae63 [DSE] Remove getLocForWrite() (NFCI) adds 049f6c29a6f0 [libc++] Resolve missing table_size symbol adds 27ea67136ea0 [SystemZ][z/OS] Fix filesystem testing adds d26beb0be22d [mlir][Linalg] Add method to check if LinalgTransformation [...] adds 1a5666acb281 [SCEV] Defer loop property checks from ea12c2cb as late as [...] adds f27ff7ff0edd [docs] Add Loop Optimization WG to the online sync-up page adds 721bb7367647 make testcase more robust adds dc1c27149f21 [libc++] Cast to the right `difference_type` in various al [...] adds 3cbc4c487aa2 llvm-dwarfdump: Rebuild type names in dwo type units adds 3b7b4a804145 [MLIR][NFC] Simplex::markRowRedundant: assert that row is [...] adds 7c5ecc8b7e1b [mlir][vector] Insert/extract element can accept index adds cbb8b200a656 Revert "Increase gdbremote timeout." adds 0c4464a5bd35 [lldb] Fix formatted log statement adds 3b463c45288a [libc++][NFC] Assign some Ranges tasks to varconst. adds e3a7f0e2f9ab [AArch64][PAC] Select llvm.ptrauth.sign/sign.generic to PAC*. adds 24cc79b9efff [AMDGPU] Regenerate postra-bundle-memops.mir checks. NFC. adds 40c65655aff9 [PowerPC] Remove the redundant terminator instruction when [...] adds d9f56feda84a Remove unused variable. adds f2b5d81f62c7 [SampleFDO] Add pass name strings for the passes (NFC) adds f8e615462b4f [AMDGPU] Fix SIPostRABundler crash on null register used b [...] adds 734abbad79db [SCEV] Defer all work from ea12c2cb as late as possible adds 2782cb8da0b3 libfuzzer: All building libfuzzer for ARM32 adds b0ea7ef0d6c2 [msan] Clang-format the test adds 0425ea462197 [NFC][OpaquePtr][Evaluator] Remove call to PointerType::ge [...] adds 85914b757015 [clang] fix regression deducing pack expansion arguments i [...] adds 930ccf0191b4 [NFC][sanitizer] Rename persistent_allocator to stack_store adds b6169e231e2c [nfc][dfsan] Remove obsolete comment adds 368a3b522103 [NFC][sanitizer] Rename PersistentAllocator to StackStore adds 6bf71be9f920 [NFC][sanitizer] Move inline implementation of StackStore [...] adds bb50e9710336 [NFC][sanitizer] Change StackStore API to use StackTrace adds 8210948a4637 [NFC][sanitizer] constexpr StackStore::StackStore() adds d591a46d17ae [NFC][sanitizer] Fix naming in StackStore adds 3557f493534b [AARCH64] Teach AArch64FrameLowering::getFrameIndexReferen [...] adds 870dfa6b08d0 [libc++][doc] Mark project for [cmp.concept] done adds 8fb3f8448409 BPF: Workaround InstCombine trunc+icmp => mask+icmp Optimization adds 78d69182b7eb [mlir] Expose region utils functions adds 85e03cb7ebac [clang-tidy] fix debug-only test failure adds ca3795541f49 [flang] Fix printing of constc and parsing of #fir.real adds 625901636134 [clang-tidy] Fix false positive in readability-identifier- [...] adds 8c18719bae6f [ELF] Expand LMA region if output section alignment introd [...] adds f3753ad77450 [ASTImporter][NFC] Dump decl name at assertion violation adds b8207db700e6 [fir] Add fir.no_reassoc conversion adds bf55b9f0d0e9 [analyzer][docs] Ellaborate the docs of cplusplus.StringChecker adds 812e64ef0c93 [DAG] MatchRotate - support rotate-by-constant of illegal types adds 47eb3f155f9e [ELF] Ensure output section is not discarded in addStartEn [...] adds 0f652d8f527f [X86] LowerRotate - recognise hidden ROTR patterns for bet [...] adds 92d279fd6d1f [LangRef][VP] Correct operands' types in vp.select documentation adds a50fdd3fc982 [X86][Costmodel] `getReplicationShuffleCost()`: promote 1 [...] adds a751084bb452 [X86][Costmodel] `trunc v16i8 to v8i1` can appear after le [...] adds 049799c31151 [X86][Costmodel] `getReplicationShuffleCost()`: promote 1 [...] adds 30b27ecfc251 [AMDGPU] Use new opcode for indexed vgpr reads adds c2271926a4fc Make clang-format fuzz through Lexing with asserts enabled. adds 6623c02d70c3 The _Float16 type is supported on x86 systems with SSE2 en [...] adds 4f9a5c2a1438 [asm] Remove explicit branch for modifier 'l' adds bc20bcb39e02 [lld/mac] Crash even less on undefined symbols with --icf=all adds 8b76d33c5939 [asm] Allow block address operands in `asm inteldialect` adds 80256605f8c6 [OpenMP] support depend clause for taskwait directive, by [...] adds d1fdf867b18b [SLP][NFC]Introduce TreeEntry::getVectorFactor member func [...] adds 671f0930fe29 [X86] Selective relocation relaxation for +tagged-globals adds 4c94760f360b [ORC] Fix materialization of weak local symbols adds 3624c4d84500 [libc++] Adds (to|from)_chars_result operator==. adds ed86610c7bcd [libc++][nfc] Move functions to a generic place. adds 6774cc33f75f [NFC][llvm] Inclusive language: remove instance of master [...] adds ffe1741b5cca [DSE] Add additional strncpy tests. adds 86e77cdb081f [PowerPC] Add a flag for conditional trap optimization adds 4b3518d50b30 [RISCV] Pre-commit test for D98932. NFC adds af57a71d1871 [RISCV] Don't call setHasMultipleConditionRegisters(), so [...] adds 28000587e1a4 [SCEV] Revert two speculative compile time optimizations w [...] adds f3b7cc8bb2ea [lldb/test] Add ability to terminate connection from a gdb [...] adds d9bbad277c44 [libc][Obvious][NFC] A bunch of cosmetic cleanup. adds 587a397917b2 Skip tests when compiler with older versions of clang adds f849640a0c6c [MLIR] Make the ROCM integration tests runnable adds 76effb001d33 [LV] Remove obsolete comment about creating a dummy block (NFC) adds d448fcd9b223 [analyzer][NFC] Introduce CallDescriptionSets adds 6c512703a9e6 [analyzer][NFC] Introduce CallDescription::matches() in ad [...] adds f18da190b0db [analyzer][NFC] Switch to using CallDescription::matches() [...] adds 9ad0a90baa8c [analyzer][NFC] Demonstrate the use of CallDescriptionSet adds de9d7e42aca2 [analyzer][NFC] CallDescription should own the qualified n [...] adds 97f1bf15b154 [analyzer][NFC] Consolidate the inner representation of Ca [...] adds e6ef134f3c77 [analyzer][NFC] Use enum for CallDescription flags adds d5de568cc737 [analyzer][NFC] MaybeUInt -> MaybeCount adds 7eec832def57 [DSE] Improve handling of `strncpy` in Dead Store Elimination adds ffdace4892bd [SROA] Add new test cases to cover existing SROA behavior [...] adds 06dbb2856967 [mlir][vector] Remove usage of shapecast to remove unit dim adds 7cde5165131f [mlir][vector] NFC, move some vector patterns in a separate file adds 9cdaf0b01b29 [openmp][amdgpu][nfc] Inline interop_hsa_get_kernel_info i [...] adds 2997441b85c0 [ELF] Support discarding .got.plt adds ff7f2cfa959b [AMDGPU] Add an implicit use of M0 to all V_MOV_B32_indire [...] adds 47555d73f653 [mlir][gpu] Extend shuffle op modes and add nvvm lowering adds bd22554af06e [MLIR][GPU] Run generic LLVM optimizations when serializin [...] adds 1b4c0cb3918a [libc++] Avoid potential truncation warnings in std::abs test adds e1ce3dabf0c7 [libc++] Fix some tests that were broken in the single-thr [...] adds e0f58444e126 [libc++] Fix feature test macro for __cpp_lib_to_chars adds d8e5a0c42bd8 [clang][NFC] Inclusive terms: replace some uses of sanity [...] adds b07b5bd72716 [libc++] Test that our algorithms never copy a user-provid [...] adds 04954824ee15 [openmp][amdgpu][nfc] Simplify implicit args handling adds 3f3680dff3e7 DWARFVerifier: Simplify name lookups adds 3fcdd182e978 NFC: Callout restriction on folding 0-result ops in docume [...] adds 20f79f8caa3a [MLIR][GPU] Make the path to ROCm a runtime option adds 290cddcd139d Allow __attribute__((swift_attr)) in attribute push pragmas adds e059329b835a [libc++][NFC] Add missing include in test adds e9d12c248013 [PowerPC][NFC] Add a series of codegen tests for vector re [...] adds 491efa7f31cb [InstCombine] add/adjust tests for mask of sext i1; NFC adds a075d6722283 [Sema] fix nondeterminism in ASTContext::getDeducedTemplat [...] adds d729f4c38fca [mlir] Bug fix. Stream must outlive the pass manager. adds 3f3bee42d229 [NFC][llvm] Inclusive language: remove instance of master [...] adds a6f53afbcb4d [MLIR][GPU] Link in device libraries during HSA compilatio [...] adds de11de308b64 [InstrProf] Use i32 for GEP index from lowering llvm.instr [...] adds f764a1a5bd7c [clangd] Avoid possible crash: apply configuration after b [...] adds 241df03ce5f0 [NFC] Test commit, add whitespace to end-of-line adds 1bd4dc4f2854 [hmaptool] Port to python3 adds 97b9e8438e26 [GVN][NFC] Remove redundant check adds 43f5f6916f0e [ORC][JITLink] Move JITDylib name into JITLinkDylib base class. adds 18f935122348 [AMDGPU] Do not generate ELF symbols for the local branch [...] adds d1abf481daf2 [llvm] Use range-based for loops (NFC) adds 0dec59305a52 [ORC] Make JITDylib::AsynchronousSymbolQuerySet private. adds 1cb991e75405 [X86] Add test case for pr52567. NFC adds a4373f6753fa [X86] Don't combine (x86cmp (trunc (movmsk (bitcast X))), [...] adds 1f9ca5adbac0 [MLIR] Avoid creation of buggy affine maps while replacing [...] adds 2f364f6f0d3a [NFC][X86][MCA] Add forgotten test coverage for AVX512's V [...] adds da47a63e0394 [NFC][X86][Costmodel] Add AVX512DQ runlines to trunc.ll/extend.ll adds 7dbbb5d3a46e compiler-rt: Use FreeBSD's elf_aux_info to detect AArch64 [...] adds fbfe8fcbc31d [Libomptarget] Remove undefined symbol in old runtime adds ec7b0d4d3458 [MLIR] Simplify Semi-affine expressions by rule based matc [...] adds 401b76fdf2b3 [libc++] [test] Eliminate libcpp-no-noexcept-function-type [...] adds 1d007d0e5a92 [InstCombine] add tests for bitwise logic with bool op; NFC adds 337948ac6e22 [InstCombine] add folds for binop with sexted bool and con [...] adds cf8efbd30e43 [VPlan] Wrap vector loop blocks in region. adds 25a9ee52f139 [CVP] Add tests for implied conditions using urem (NFC) adds cd84cab6b37f [LVI] Support urem in implied conditions adds 0a2bde94a06c [LVI] Drop requirement that modulus is constant adds fefe20b99313 [clang-tidy] performance-unnecessary-copy-initialization: [...] adds aeba28bc6244 [DSE] Drop hasAnalyzableMemoryWrite() (NFCI) adds df70cf5e1409 [NFC][X86][Costmodel] Actually test +prefer-256-bit in rep [...] adds e74114add3b3 [libc++] [doc] Mark some spaceship-related LWG issues as " [...] adds dca681fee93e [libc++][NFC] Fix typo in ranges::iterator_t synopsis adds 6cc820a3e284 [X86][FP16] Relax the pattern condition for VZEXT_MOVL to [...] adds f6bce30cf949 [llvm] Use range-based for loops (NFC) adds 648157b05a1d [ELF] Move getOutputSectionName from Writer.cpp to LinkerS [...] adds 2b9c41189e75 [AArch64] Extra testing for sinking splats to various inst [...] adds 3234f2d9c166 [ARM][ParallelDSP] Regenerate complex_dot_prod.ll test adds ad48ef1e3142 [MLIR][NFC] Simplex::restoreRow: improve documentation adds 73d52ee7859f Add a best practice section on how to configure a fast builder adds 357d6362891e [PowerPC] Regenerate rlwinm2.ll test adds eced44637cfb [Thumb2] Regenerate ext + rot tests adds 4a5e1ffcf9b8 [ARM] Regenerate sxt_rot.ll tests adds fc981cedea07 [llvm] Use range-based for loops (NFC) adds c133fb321f7c [CodeGen] Use llvm::is_contained (NFC) adds 6f9cceb7751a [mlir] Move trait to InferTypeOpInterface adds e5a4d0f1498c [mlir] Fix unused function warning (NFC) adds 1dc62f2653f8 [libc++] Implement P1272R4 (std::byteswap) adds 0a413506a29e [gn build] Port 1dc62f2653f8 adds a60b63940a65 [libc++][NFC] Sort includes in __ranges/concepts.h adds b72b56016a6b NFC: clang-format lib/Transforms/Instrumentation/InstrProf [...] adds ea5421bd0db3 [llvm] Use range-based for loops (NFC) adds 49e3838145df [llvm] Use make_early_inc_range (NFC) No new revisions were added by this update. Summary of changes: .../performance/UnnecessaryCopyInitialization.cpp | 8 +- .../readability/IdentifierNamingCheck.cpp | 2 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 5 +- clang-tools-extra/clangd/CodeComplete.cpp | 32 + clang-tools-extra/clangd/Selection.cpp | 2 +- .../clangd/unittests/CodeCompleteTests.cpp | 98 + ...opy-initialization-excluded-container-types.cpp | 10 + .../checkers/readability-identifier-naming.cpp | 76 +- .../test/clang-tidy/infrastructure/pr37091.cpp | 2 +- clang/CMakeLists.txt | 7 - clang/docs/LanguageExtensions.rst | 2 +- clang/docs/OpenMPSupport.rst | 2 +- clang/docs/ReleaseNotes.rst | 2 + clang/docs/analyzer/checkers.rst | 11 +- clang/include/clang/AST/Redeclarable.h | 3 +- clang/include/clang/AST/StmtOpenMP.h | 11 +- clang/include/clang/AST/Type.h | 6 +- clang/include/clang/Analysis/CFG.h | 2 +- clang/include/clang/Basic/Attr.td | 1 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 + clang/include/clang/CodeGen/CGFunctionInfo.h | 2 +- clang/include/clang/Driver/Options.td | 1 + clang/include/clang/Lex/HeaderSearch.h | 16 +- clang/include/clang/Lex/Lexer.h | 15 +- clang/include/clang/Lex/Preprocessor.h | 2 +- clang/include/clang/Sema/Lookup.h | 7 +- clang/include/clang/Sema/Overload.h | 14 + clang/include/clang/Sema/Sema.h | 3 +- clang/include/clang/Serialization/ASTWriter.h | 5 +- .../Core/PathSensitive/CallDescription.h | 69 +- .../StaticAnalyzer/Core/PathSensitive/CallEvent.h | 14 - clang/lib/AST/ASTContext.cpp | 3 + clang/lib/AST/ASTImporterLookupTable.cpp | 14 +- clang/lib/AST/StmtOpenMP.cpp | 14 +- clang/lib/Analysis/BodyFarm.cpp | 5 +- clang/lib/Analysis/RetainSummaryManager.cpp | 2 +- clang/lib/Basic/DiagnosticIDs.cpp | 2 +- clang/lib/Basic/SourceManager.cpp | 11 +- clang/lib/Basic/Targets/X86.cpp | 4 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 53 +- clang/lib/CodeGen/CGOpenMPRuntime.h | 6 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 9 +- clang/lib/Driver/CMakeLists.txt | 1 + clang/lib/Driver/SanitizerArgs.cpp | 14 +- clang/lib/Driver/ToolChains/Arch/AArch64.cpp | 43 +- clang/lib/Driver/ToolChains/Clang.cpp | 1 - clang/lib/Driver/ToolChains/SPIRV.cpp | 49 + clang/lib/Driver/ToolChains/SPIRV.h | 46 + clang/lib/Format/Format.cpp | 32 +- clang/lib/Format/QualifierAlignmentFixer.cpp | 12 +- clang/lib/Format/SortJavaScriptImports.cpp | 5 +- clang/lib/Format/TokenAnalyzer.cpp | 49 +- clang/lib/Format/TokenAnalyzer.h | 12 +- clang/lib/Frontend/CompilerInvocation.cpp | 8 +- clang/lib/Frontend/FrontendActions.cpp | 2 +- clang/lib/Lex/HeaderSearch.cpp | 7 +- clang/lib/Lex/Lexer.cpp | 16 +- clang/lib/Lex/PPDirectives.cpp | 11 +- clang/lib/Lex/PPLexerChange.cpp | 8 +- clang/lib/Sema/SemaChecking.cpp | 7 +- clang/lib/Sema/SemaCodeComplete.cpp | 3 +- clang/lib/Sema/SemaDecl.cpp | 8 +- clang/lib/Sema/SemaDeclCXX.cpp | 5 +- clang/lib/Sema/SemaExpr.cpp | 1 - clang/lib/Sema/SemaExprCXX.cpp | 5 +- clang/lib/Sema/SemaLookup.cpp | 4 +- clang/lib/Sema/SemaOpenMP.cpp | 14 +- clang/lib/Sema/SemaOverload.cpp | 24 +- clang/lib/Sema/SemaTemplateDeduction.cpp | 7 + clang/lib/Serialization/ASTReaderStmt.cpp | 5 +- clang/lib/Serialization/ASTWriter.cpp | 91 +- clang/lib/Serialization/ASTWriterStmt.cpp | 1 + clang/lib/Serialization/ModuleManager.cpp | 8 +- .../Checkers/BasicObjCFoundationChecks.cpp | 13 +- .../Checkers/BlockInCriticalSectionChecker.cpp | 27 +- .../lib/StaticAnalyzer/Checkers/CStringChecker.cpp | 11 +- .../lib/StaticAnalyzer/Checkers/ChrootChecker.cpp | 6 +- .../StaticAnalyzer/Checkers/ContainerModeling.cpp | 47 +- .../Checkers/DebugContainerModeling.cpp | 8 +- .../Checkers/DebugIteratorModeling.cpp | 12 +- .../Checkers/InnerPointerChecker.cpp | 16 +- clang/lib/StaticAnalyzer/Checkers/MIGChecker.cpp | 6 +- .../Checkers/MmapWriteExecChecker.cpp | 2 +- .../Checkers/SimpleStreamChecker.cpp | 4 +- .../StaticAnalyzer/Checkers/SmartPtrModeling.cpp | 5 +- .../Checkers/StdLibraryFunctionsChecker.cpp | 6 +- .../lib/StaticAnalyzer/Checkers/StringChecker.cpp | 2 +- .../lib/StaticAnalyzer/Checkers/UnixAPIChecker.cpp | 5 +- .../lib/StaticAnalyzer/Checkers/ValistChecker.cpp | 8 +- .../Checkers/cert/PutenvWithAutoChecker.cpp | 2 +- .../StaticAnalyzer/Core/BugReporterVisitors.cpp | 7 +- clang/lib/StaticAnalyzer/Core/CallDescription.cpp | 124 +- clang/lib/StaticAnalyzer/Core/CallEvent.cpp | 82 - clang/lib/StaticAnalyzer/Core/ExprEngine.cpp | 7 +- clang/lib/StaticAnalyzer/Core/ExprEngineC.cpp | 5 +- clang/lib/StaticAnalyzer/Core/HTMLDiagnostics.cpp | 8 +- clang/lib/StaticAnalyzer/Core/Store.cpp | 2 +- .../DependencyScanning/DependencyScanningTool.cpp | 6 +- .../DependencyScanning/ModuleDepCollector.cpp | 4 +- clang/lib/Tooling/Syntax/Tree.cpp | 2 +- clang/test/ARCMT/objcmt-arc-cf-annotations.m | 30 +- .../test/ARCMT/objcmt-arc-cf-annotations.m.result | 30 +- clang/test/AST/attr-swift_attr.m | 10 +- .../expected-plists/retain-release.m.objc.plist | 26 +- .../expected-plists/retain-release.m.objcpp.plist | 26 +- clang/test/Analysis/retain-release-inline.m | 10 +- clang/test/Analysis/retain-release.m | 30 +- clang/test/Analysis/retain-release.mm | 10 +- .../temp.deduct/temp.deduct.partial/p12.cpp | 13 +- .../modules-fmodule-name-no-module-built.m | 1 - clang/test/ClangScanDeps/modules-full.cpp | 17 - clang/test/ClangScanDeps/modules-inferred.m | 3 +- .../ClangScanDeps/modules-pch-common-submodule.c | 5 +- .../modules-pch-common-via-submodule.c | 4 +- clang/test/ClangScanDeps/modules-pch.c | 14 +- clang/test/CodeCompletion/variadic-template.cpp | 18 + clang/test/CodeGen/X86/Float16-arithmetic.c | 73 + .../CodeGen/X86/{avx512fp16-abi.c => fp16-abi.c} | 2 + .../X86/{avx512fp16-complex.c => fp16-complex.c} | 1 + clang/test/CodeGen/profile-filter.c | 20 +- clang/test/Driver/aarch64-cpus.c | 23 +- clang/test/Driver/aarch64-implied-sve-features.c | 78 + clang/test/Driver/arm-cortex-cpus.c | 11 + clang/test/Driver/x86-target-features.c | 1 + clang/test/Driver/x86_features.c | 4 +- ...pragma-attribute-supported-attributes-list.test | 1 + clang/test/Misc/target-invalid-cpu-note.c | 6 +- .../AddRemoveIrrelevantModuleMap/a.modulemap | 1 + .../AddRemoveIrrelevantModuleMap/b.modulemap | 1 + .../Modules/add-remove-irrelevant-module-map.m | 16 + clang/test/OpenMP/taskwait_ast_print.cpp | 18 +- clang/test/OpenMP/taskwait_depend_codegen.cpp | 38 + clang/test/OpenMP/taskwait_depend_messages.cpp | 62 + clang/test/OpenMP/taskwait_messages.cpp | 5 +- clang/test/Profile/branch-logical-mixed.cpp | 68 +- clang/test/Profile/c-captured.c | 32 +- clang/test/Profile/c-general.c | 238 +- clang/test/Profile/c-ternary.c | 10 +- clang/test/Profile/cxx-class.cpp | 24 +- clang/test/Profile/cxx-lambda.cpp | 17 +- clang/test/Profile/cxx-rangefor.cpp | 10 +- clang/test/Profile/cxx-stmt-initializers.cpp | 12 +- clang/test/Profile/cxx-templates.cpp | 8 +- clang/test/Profile/cxx-throws.cpp | 24 +- clang/test/Profile/objc-general.m | 18 +- clang/test/Sema/Float16.c | 3 +- clang/test/Sema/conversion-target-dep.c | 2 +- clang/test/SemaCXX/Float16.cpp | 3 +- clang/test/SemaCXX/Inputs/compare.modulemap | 6 + clang/test/SemaCXX/compare-modules-cxx2a.cpp | 18 +- .../StaticAnalyzer/ConflictingEvalCallsTest.cpp | 2 +- .../NoStateChangeFuncVisitorTest.cpp | 6 +- clang/utils/hmaptool/hmaptool | 17 +- .../cmake/Modules/AllSupportedArchDefs.cmake | 2 +- compiler-rt/lib/builtins/cpu_model.c | 6 + compiler-rt/lib/msan/tests/msan_test.cpp | 7 +- compiler-rt/lib/sanitizer_common/CMakeLists.txt | 3 +- .../sanitizer_chained_origin_depot.cpp | 1 - .../sanitizer_persistent_allocator.h | 110 - .../lib/sanitizer_common/sanitizer_stack_store.cpp | 91 + .../lib/sanitizer_common/sanitizer_stack_store.h | 50 + .../lib/sanitizer_common/sanitizer_stackdepot.cpp | 32 +- .../sanitizer_common/sanitizer_thread_registry.cpp | 38 +- .../sanitizer_common/sanitizer_thread_registry.h | 3 + compiler-rt/lib/tsan/go/build.bat | 1 + compiler-rt/lib/tsan/go/buildgo.sh | 1 + compiler-rt/lib/tsan/rtl/tsan_rtl_thread.cpp | 23 +- compiler-rt/test/dfsan/release_shadow_space.c | 1 - flang/include/flang/Evaluate/real.h | 4 +- flang/include/flang/Optimizer/Builder/Complex.h | 89 + flang/include/flang/Optimizer/Builder/FIRBuilder.h | 9 + .../include/flang/Optimizer/Dialect/FIRDialect.td | 1 + flang/include/flang/Optimizer/Dialect/FIRTypes.td | 2 + flang/include/flang/Optimizer/Support/TypeCode.h | 90 + flang/lib/Optimizer/Builder/CMakeLists.txt | 1 + flang/lib/Optimizer/Builder/Complex.cpp | 36 + flang/lib/Optimizer/Builder/FIRBuilder.cpp | 28 + flang/lib/Optimizer/CodeGen/CodeGen.cpp | 517 ++- flang/lib/Optimizer/CodeGen/TypeConverter.h | 5 + flang/lib/Optimizer/Dialect/FIRAttr.cpp | 6 +- flang/lib/Optimizer/Dialect/FIROps.cpp | 18 +- flang/lib/Optimizer/Dialect/FIRType.cpp | 6 + flang/runtime/stop.cpp | 14 +- flang/test/Evaluate/folding07.f90 | 24 +- flang/test/Fir/convert-to-llvm-invalid.fir | 38 +- flang/test/Fir/convert-to-llvm.fir | 263 +- flang/test/Fir/fir-ops.fir | 17 + flang/test/Fir/types-to-llvm.fir | 32 +- flang/unittests/Optimizer/Builder/ComplexTest.cpp | 100 + flang/unittests/Optimizer/CMakeLists.txt | 1 + flang/unittests/Runtime/CMakeLists.txt | 1 + flang/unittests/Runtime/RuntimeCrashTest.cpp | 19 - flang/unittests/Runtime/Stop.cpp | 85 + libc/fuzzing/math/RemQuoDiff.h | 5 + libc/fuzzing/stdlib/CMakeLists.txt | 4 +- .../{atof_fuzz.cpp => atof_differential_fuzz.cpp} | 0 libc/include/sys/mman.h.def | 5 + libc/include/sys/syscall.h.def | 5 + libc/src/__support/architectures.h | 7 +- libc/src/__support/common.h | 2 +- libc/src/__support/endian.h | 2 +- libc/src/__support/sanitizer.h | 2 +- libcxx/docs/FeatureTestMacroTable.rst | 2 + libcxx/docs/Status/Cxx20Issues.csv | 6 +- libcxx/docs/Status/Cxx2bPapers.csv | 2 +- libcxx/docs/Status/RangesPaper.csv | 4 +- libcxx/docs/Status/SpaceshipPapers.csv | 2 +- libcxx/docs/Status/SpaceshipProjects.csv | 4 +- libcxx/include/CMakeLists.txt | 2 + libcxx/include/__algorithm/binary_search.h | 2 +- libcxx/include/__algorithm/copy_n.h | 3 +- libcxx/include/__algorithm/find_end.h | 8 +- libcxx/include/__algorithm/is_heap.h | 4 +- libcxx/include/__algorithm/is_heap_until.h | 21 +- libcxx/include/__algorithm/is_sorted.h | 4 +- libcxx/include/__algorithm/is_sorted_until.h | 19 +- libcxx/include/__algorithm/max.h | 4 +- libcxx/include/__algorithm/max_element.h | 21 +- libcxx/include/__algorithm/min.h | 4 +- libcxx/include/__algorithm/min_element.h | 21 +- libcxx/include/__algorithm/search.h | 4 +- libcxx/include/__algorithm/search_n.h | 3 +- libcxx/include/__algorithm/sift_down.h | 4 +- libcxx/include/__algorithm/sort.h | 39 +- libcxx/include/__bit/byteswap.h | 55 + libcxx/include/__charconv/from_chars_result.h | 3 + libcxx/include/__charconv/to_chars_result.h | 3 + libcxx/include/__config | 7 +- libcxx/include/__format/formatter.h | 43 + libcxx/include/__format/formatter_integral.h | 39 - libcxx/include/__memory/shared_ptr.h | 4 +- libcxx/include/__ranges/concepts.h | 2 +- libcxx/include/__thread/poll_with_backoff.h | 68 + libcxx/include/__threading_support | 24 +- libcxx/include/atomic | 26 +- libcxx/include/bit | 13 +- libcxx/include/charconv | 2 + libcxx/include/module.modulemap | 5 + libcxx/include/ranges | 2 +- libcxx/include/thread | 1 + libcxx/include/version | 34 +- libcxx/lib/abi/CHANGELOG.TXT | 15 + ...i.v1.stable.exceptions.no_new_in_libcxx.abilist | 1 + ...i.v1.stable.exceptions.no_new_in_libcxx.abilist | 1 + ...i.v1.stable.exceptions.no_new_in_libcxx.abilist | 1 + libcxx/src/locale.cpp | 2 + libcxx/src/memory.cpp | 14 +- .../robust_against_copying_comparators.pass.cpp | 190 + .../libcxx/atomics/atomics.align/align.pass.cpp | 2 +- .../libcxx/atomics/atomics.flag/init_bool.pass.cpp | 2 - .../memory_order.underlying_type.pass.cpp | 2 - .../atomic_fetch_add.verify.cpp | 2 - .../atomic_fetch_add_explicit.verify.cpp | 2 - .../atomic_fetch_sub.verify.cpp | 2 - .../atomic_fetch_sub_explicit.verify.cpp | 2 - .../diagnose_invalid_memory_order.verify.cpp | 1 - libcxx/test/libcxx/atomics/ext-int.verify.cpp | 1 - libcxx/test/libcxx/atomics/version.pass.cpp | 2 - .../detail.headers/bit/byteswap.module.verify.cpp} | 17 +- .../thread/poll_with_backoff.module.verify.cpp} | 14 +- libcxx/test/libcxx/double_include.sh.cpp | 4 +- .../directory_entry.mods/last_write_time.pass.cpp | 3 + libcxx/test/libcxx/min_max_macros.compile.pass.cpp | 4 +- .../test/libcxx/no_assert_include.compile.pass.cpp | 4 +- .../libcxx/thread/thread.mutex/version.pass.cpp | 2 + .../algorithms/robust_against_adl.compile.pass.cpp | 223 + .../std/algorithms/robust_against_adl.pass.cpp | 183 - .../algorithms/robust_against_adl_on_new.pass.cpp | 12 +- .../robust_re_difference_type.compile.pass.cpp | 259 ++ .../atomics.fences/atomic_signal_fence.pass.cpp | 2 - .../atomics.fences/atomic_thread_fence.pass.cpp | 2 - .../atomics.flag/atomic_flag_clear.pass.cpp | 2 - .../atomic_flag_clear_explicit.pass.cpp | 2 - .../atomics/atomics.flag/atomic_flag_test.pass.cpp | 2 - .../atomics.flag/atomic_flag_test_and_set.pass.cpp | 2 - .../atomic_flag_test_and_set_explicit.pass.cpp | 2 - .../atomic_flag_test_explicit.pass.cpp | 2 - .../test/std/atomics/atomics.flag/clear.pass.cpp | 2 - .../test/std/atomics/atomics.flag/default.pass.cpp | 2 - libcxx/test/std/atomics/atomics.flag/init.pass.cpp | 3 +- .../std/atomics/atomics.flag/test_and_set.pass.cpp | 2 - .../atomics.general/replace_failure_order.pass.cpp | 2 - .../replace_failure_order_codegen.sh.cpp | 1 - .../atomics.lockfree/isalwayslockfree.pass.cpp | 2 +- .../std/atomics/atomics.lockfree/lockfree.pass.cpp | 2 - .../atomics/atomics.order/kill_dependency.pass.cpp | 2 - .../atomics/atomics.order/memory_order.pass.cpp | 2 - .../atomics.order/memory_order_new.pass.cpp | 4 +- .../atomics/atomics.types.generic/address.pass.cpp | 2 - .../atomics/atomics.types.generic/bool.pass.cpp | 2 - .../constexpr_noexcept.compile.pass.cpp | 3 +- .../copy_semantics_traits.pass.cpp | 2 - .../cstdint_typedefs.pass.cpp | 2 - .../atomics.types.generic/integral.pass.cpp | 2 - .../integral_typedefs.pass.cpp | 2 - .../standard_layout.compile.pass.cpp | 3 +- .../atomics/atomics.types.generic/throw.pass.cpp | 1 - .../trivially_copyable.pass.cpp | 11 +- .../trivially_copyable.verify.cpp | 2 - .../atomic_compare_exchange_strong.pass.cpp | 3 +- ...tomic_compare_exchange_strong_explicit.pass.cpp | 3 +- .../atomic_compare_exchange_weak.pass.cpp | 3 +- .../atomic_compare_exchange_weak_explicit.pass.cpp | 3 +- .../atomic_exchange.pass.cpp | 3 +- .../atomic_exchange_explicit.pass.cpp | 3 +- .../atomic_fetch_add.pass.cpp | 2 - .../atomic_fetch_add_explicit.pass.cpp | 2 - .../atomic_fetch_and.pass.cpp | 2 - .../atomic_fetch_and_explicit.pass.cpp | 2 - .../atomic_fetch_or.pass.cpp | 2 - .../atomic_fetch_or_explicit.pass.cpp | 2 - .../atomic_fetch_sub.pass.cpp | 2 - .../atomic_fetch_sub_explicit.pass.cpp | 2 - .../atomic_fetch_xor.pass.cpp | 2 - .../atomic_fetch_xor_explicit.pass.cpp | 2 - .../atomic_init.pass.cpp | 3 +- .../atomic_is_lock_free.pass.cpp | 3 +- .../atomic_load.pass.cpp | 3 +- .../atomic_load_explicit.pass.cpp | 3 +- .../atomic_store.pass.cpp | 3 +- .../atomic_store_explicit.pass.cpp | 3 +- .../atomic_var_init.pass.cpp | 3 +- .../copy.assign.ptr.volatile.verify.cpp | 2 - .../copy.assign.volatile.verify.cpp | 2 - .../atomics.types.operations.req/ctor.pass.cpp | 3 +- .../atomics.types.operations.req/dtor.pass.cpp | 3 +- libcxx/test/std/atomics/types.pass.cpp | 17 +- .../equality_comparable.compile.pass.cpp | 5 +- .../equality_comparable_with.compile.pass.cpp | 5 +- .../assignable_from.compile.pass.cpp | 5 +- .../concepts.object/movable.compile.pass.cpp | 5 +- .../atomic_init.depr_in_cxx20.verify.cpp | 3 +- .../support.limits.general/atomic.version.pass.cpp | 154 +- .../support.limits.general/bit.version.pass.cpp | 24 + .../support.limits.general/charconv.pass.cpp | 33 - .../charconv.version.pass.cpp | 84 + .../support.limits.general/memory.version.pass.cpp | 32 +- .../memory_resource.version.pass.cpp | 35 - .../support.limits.general/mutex.version.pass.cpp | 2 + .../utility.version.pass.cpp | 48 - .../version.version.pass.cpp | 176 +- .../facet.ctype.char.statics/table_size.pass.cpp | 31 + libcxx/test/std/numerics/bit/byteswap.pass.cpp | 100 + .../c.math/{abs.fail.cpp => abs.verify.cpp} | 17 +- .../thread.once.callonce/call_once.pass.cpp | 2 +- .../thread.once/thread.once.callonce/race.pass.cpp | 2 +- .../thread.once.onceflag/assign.compile.fail.cpp | 2 + .../thread.once.onceflag/copy.compile.fail.cpp | 2 + .../thread.once.onceflag/default.pass.cpp | 2 + .../charconv.syn/from_chars_result.pass.cpp | 43 + .../charconv/charconv.syn/to_chars_result.pass.cpp | 43 + .../meta/meta.rel/is_nothrow_invocable.pass.cpp | 24 +- .../tuple_size_structured_bindings.pass.cpp | 1 - libcxx/test/support/filesystem_test_helper.h | 6 +- libcxx/test/support/test_macros.h | 6 + libcxx/test/support/uses_alloc_types.h | 1 + .../generate_feature_test_macro_components.py | 36 +- libcxx/utils/generate_header_inclusion_tests.py | 10 +- libcxx/utils/generate_header_tests.py | 1 - libcxx/utils/libcxx/test/features.py | 2 - libcxxabi/test/catch_function_03.pass.cpp | 3 +- .../test/catch_member_function_pointer_02.pass.cpp | 3 +- libunwind/src/DwarfParser.hpp | 22 +- libunwind/src/libunwind.cpp | 29 + libunwind/src/libunwind_ext.h | 3 + libunwind/test/signal_frame.pass.cpp | 4 + lld/ELF/LinkerScript.cpp | 80 +- lld/ELF/LinkerScript.h | 2 + lld/ELF/SyntheticSections.cpp | 4 +- lld/ELF/Writer.cpp | 63 +- lld/ELF/Writer.h | 1 - lld/MachO/ICF.cpp | 5 +- lld/test/ELF/linkerscript/discard-plt.s | 37 + lld/test/ELF/linkerscript/lma-align2.test | 35 + lld/test/ELF/linkerscript/preinit-array-empty.test | 39 + lld/test/MachO/invalid/undefined-symbol.s | 10 +- lldb/bindings/python/python-swigsafecast.swig | 167 +- lldb/bindings/python/python-wrapper.swig | 70 +- .../include/lldb/Core/ValueObjectConstResultImpl.h | 1 - .../lldb/DataFormatters/FormattersHelpers.h | 2 +- lldb/include/lldb/DataFormatters/StringPrinter.h | 16 +- lldb/include/lldb/Target/Process.h | 30 - lldb/include/lldb/Target/Target.h | 35 + .../Python/lldbsuite/test/gdbclientutils.py | 46 +- .../test/tools/lldb-server/gdbremote_testcase.py | 4 +- lldb/source/Core/Debugger.cpp | 2 +- lldb/source/Core/Module.cpp | 8 +- lldb/source/Core/ValueObjectConstResultImpl.cpp | 2 +- lldb/source/DataFormatters/FormattersHelpers.cpp | 11 +- lldb/source/DataFormatters/StringPrinter.cpp | 18 +- .../Plugins/Language/CPlusPlus/CxxStringTypes.cpp | 20 +- .../Plugins/Language/CPlusPlus/LibStdcpp.cpp | 4 +- lldb/source/Plugins/Language/ObjC/NSString.cpp | 14 +- .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp | 2 +- lldb/source/Target/Platform.cpp | 48 +- lldb/source/Target/Process.cpp | 51 - lldb/source/Target/Target.cpp | 62 + .../unique_ptr/TestUniquePtrFromStdModule.py | 1 + .../functionalities/gdb_remote_client/TestPty.py | 6 +- .../functionalities/mtc/simple/TestMTCSimple.py | 2 + lldb/test/API/lang/cpp/char8_t/TestCxxChar8_t.py | 18 +- .../TestModulesCompileError.py | 1 + .../lang/objc/objc-new-syntax/ObjCNewSyntaxTest.py | 5 +- lldb/test/API/lang/objc/real-definition/Foo.m | 3 +- .../objc/real-definition/TestRealDefinition.py | 50 +- .../API/tools/lldb-server/TestLldbGdbServer.py | 3 + llvm/docs/Extensions.rst | 7 +- llvm/docs/GettingInvolved.rst | 7 +- llvm/docs/HowToAddABuilder.rst | 89 + llvm/docs/LangRef.rst | 2 +- llvm/docs/MyFirstTypoFix.rst | 4 +- llvm/include/llvm/CodeGen/MIRFSDiscriminator.h | 4 + llvm/include/llvm/CodeGen/MIRSampleProfile.h | 2 + llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h | 2 +- .../llvm/ExecutionEngine/JITLink/JITLinkDylib.h | 13 +- llvm/include/llvm/ExecutionEngine/Orc/Core.h | 10 +- llvm/include/llvm/IR/IntrinsicsNVVM.td | 2 +- llvm/include/llvm/MC/MCExpr.h | 1 + llvm/include/llvm/Support/AArch64TargetParser.def | 14 +- llvm/include/llvm/Support/ARMTargetParser.def | 3 + llvm/lib/Analysis/IVDescriptors.cpp | 5 +- llvm/lib/Analysis/IntervalPartition.cpp | 16 +- llvm/lib/Analysis/LazyValueInfo.cpp | 15 +- llvm/lib/Analysis/MemoryDependenceAnalysis.cpp | 6 +- llvm/lib/Analysis/MemorySSAUpdater.cpp | 5 +- llvm/lib/Analysis/ObjCARCInstKind.cpp | 5 +- llvm/lib/Analysis/ScalarEvolution.cpp | 102 +- llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp | 4 +- llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 9 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 33 +- llvm/lib/Bitcode/Writer/ValueEnumerator.cpp | 4 +- llvm/lib/CodeGen/AggressiveAntiDepBreaker.cpp | 17 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 11 +- .../lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp | 12 +- llvm/lib/CodeGen/LiveRangeEdit.cpp | 11 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 9 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 25 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 4 +- llvm/lib/CodeGen/StackProtector.cpp | 6 +- llvm/lib/DebugInfo/DWARF/DWARFContext.cpp | 27 +- llvm/lib/DebugInfo/DWARF/DWARFDie.cpp | 4 +- llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp | 8 +- llvm/lib/ExecutionEngine/Orc/Core.cpp | 4 +- .../lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp | 3 +- llvm/lib/IR/AsmWriter.cpp | 24 +- llvm/lib/IR/TypeFinder.cpp | 8 +- llvm/lib/MC/ELFObjectWriter.cpp | 1 + llvm/lib/MC/MCExpr.cpp | 2 + llvm/lib/Target/AArch64/AArch64.td | 11 + llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 9 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 16 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 26 +- llvm/lib/Target/AArch64/AArch64Subtarget.cpp | 6 +- llvm/lib/Target/AArch64/AArch64Subtarget.h | 1 + .../AArch64/GISel/AArch64InstructionSelector.cpp | 27 + llvm/lib/Target/AArch64/SVEInstrFormats.td | 5 + .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 1 - llvm/lib/Target/AMDGPU/R600Packetizer.cpp | 19 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 16 +- llvm/lib/Target/AMDGPU/SIPostRABundler.cpp | 3 + llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp | 6 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 19 +- llvm/lib/Target/ARM/ARM.td | 10 + llvm/lib/Target/ARM/ARMFrameLowering.cpp | 18 +- llvm/lib/Target/ARM/ARMSubtarget.cpp | 1 + llvm/lib/Target/ARM/ARMSubtarget.h | 1 + llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 13 +- llvm/lib/Target/ARM/Thumb2SizeReduction.cpp | 2 +- llvm/lib/Target/AVR/AVRAsmPrinter.cpp | 5 +- llvm/lib/Target/BPF/BPFAdjustOpt.cpp | 4 +- llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 24 +- .../Target/Hexagon/HexagonLoopIdiomRecognition.cpp | 4 +- .../lib/Target/Hexagon/HexagonMachineScheduler.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonPeephole.cpp | 18 +- .../Hexagon/HexagonVectorLoopCarriedReuse.cpp | 7 +- llvm/lib/Target/Lanai/LanaiFrameLowering.cpp | 9 +- llvm/lib/Target/MSP430/MSP430FrameLowering.cpp | 4 +- llvm/lib/Target/Mips/Mips16FrameLowering.cpp | 11 +- llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 14 +- llvm/lib/Target/NVPTX/NVPTXImageOptimizer.cpp | 5 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 36 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 6 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 15 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 3 - llvm/lib/Target/RISCV/RISCVISelLowering.h | 8 + llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp | 36 +- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 5 + .../Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp | 3 + llvm/lib/Target/X86/X86.td | 3 +- llvm/lib/Target/X86/X86AsmPrinter.cpp | 1 + llvm/lib/Target/X86/X86CallingConv.td | 5 +- llvm/lib/Target/X86/X86FastISel.cpp | 4 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 18 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 70 +- llvm/lib/Target/X86/X86InstrAVX512.td | 4 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 1 + llvm/lib/Target/X86/X86InstrInfo.h | 1 + llvm/lib/Target/X86/X86LowerAMXType.cpp | 6 +- llvm/lib/Target/X86/X86MCInstLower.cpp | 3 + llvm/lib/Target/X86/X86Subtarget.cpp | 7 +- llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 11 + llvm/lib/Target/XCore/XCoreFrameLowering.cpp | 8 +- llvm/lib/Transforms/Coroutines/CoroCleanup.cpp | 10 + .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 14 + .../Transforms/InstCombine/InstCombineInternal.h | 1 + .../InstCombine/InstructionCombining.cpp | 23 + .../Transforms/Instrumentation/InstrProfiling.cpp | 43 +- .../lib/Transforms/Scalar/DeadStoreElimination.cpp | 136 +- llvm/lib/Transforms/Utils/CloneModule.cpp | 72 +- llvm/lib/Transforms/Utils/Evaluator.cpp | 15 +- llvm/lib/Transforms/Utils/LoopSimplify.cpp | 13 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 12 +- llvm/lib/Transforms/Utils/MetaRenamer.cpp | 6 +- llvm/lib/Transforms/Utils/VNCoercion.cpp | 14 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 11 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 48 +- llvm/test/Analysis/CostModel/X86/extend.ll | 1376 +++++-- .../CostModel/X86/shuffle-replication-i1.ll | 562 ++- .../CostModel/X86/shuffle-replication-i16.ll | 428 +- .../CostModel/X86/shuffle-replication-i32.ll | 172 +- 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.../stack-pointer-offset-relative-frameindex.ll | 8 +- llvm/test/CodeGen/AMDGPU/subvector-test.mir | 4 +- llvm/test/CodeGen/AMDGPU/trap-abis.ll | 48 +- llvm/test/CodeGen/AMDGPU/udiv.ll | 99 +- llvm/test/CodeGen/AMDGPU/udiv64.ll | 568 ++- .../CodeGen/AMDGPU/undefined-subreg-liverange.ll | 8 +- llvm/test/CodeGen/AMDGPU/uniform-cfg.ll | 50 +- llvm/test/CodeGen/AMDGPU/uniform-crash.ll | 6 +- .../AMDGPU/uniform-loop-inside-nonuniform.ll | 4 +- .../AMDGPU/unstructured-cfg-def-use-issue.ll | 46 +- llvm/test/CodeGen/AMDGPU/urem64.ll | 470 ++- llvm/test/CodeGen/AMDGPU/valu-i1.ll | 24 +- .../vgpr-descriptor-waterfall-loop-idom-update.ll | 8 +- llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll | 46 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 16 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 6 +- llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll | 4 +- .../CodeGen/ARM/ParallelDSP/complex_dot_prod.ll | 192 +- llvm/test/CodeGen/ARM/rotate.ll | 4 +- llvm/test/CodeGen/ARM/sxt_rot.ll | 82 +- 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llvm/test/CodeGen/X86/vector-fshr-rot-256.ll | 94 +- llvm/test/CodeGen/X86/vector-rotate-128.ll | 128 +- llvm/test/CodeGen/X86/vector-rotate-256.ll | 82 +- llvm/test/CodeGen/X86/vector-rotate-512.ll | 350 +- .../ExecutionEngine/JITLink/X86/MachO_weak_local.s | 16 + .../InstrProfiling/atomic-updates.ll | 2 +- .../InstrProfiling/runtime-counter-relocation.ll | 4 +- llvm/test/MC/X86/gotpcrel_norelax.s | 73 + .../Coroutines/coro-retcon-once-private.ll | 48 + .../Transforms/CorrelatedValuePropagation/urem.ll | 309 +- .../Transforms/DeadStoreElimination/libcalls.ll | 76 + llvm/test/Transforms/InstCombine/and.ll | 58 + llvm/test/Transforms/InstCombine/or.ll | 79 +- .../AMDGPU/different-addrspace-crash.ll | 2 +- .../LoopVectorize/AArch64/strict-fadd.ll | 36 + .../LoopVectorize/AArch64/sve-widen-gep.ll | 1 + ...first-order-recurrence-sink-replicate-region.ll | 15 + .../test/Transforms/LoopVectorize/icmp-uniforms.ll | 1 + .../LoopVectorize/scev-during-mutation.ll | 47 + .../Transforms/LoopVectorize/vplan-dot-printing.ll | 5 +- .../Transforms/LoopVectorize/vplan-printing.ll | 15 + .../vplan-sink-scalars-and-merge-vf1.ll | 3 + .../LoopVectorize/vplan-sink-scalars-and-merge.ll | 12 + .../PGOProfile/counter_promo_exit_catchswitch.ll | 16 +- llvm/test/Transforms/PGOProfile/instr_entry_bb.ll | 6 +- llvm/test/Transforms/SROA/alloca-struct.ll | 139 + .../llvm-dwarfdump/X86/prettyprint_type_units.s | 4 +- .../X86/prettyprint_type_units_split_v4.s | 243 ++ .../X86/prettyprint_type_units_split_v5.s | 243 ++ .../llvm-mca/X86/Generic/resources-avx512bw.s | 16 +- .../llvm-mca/X86/Generic/resources-avx512bwvl.s | 30 +- .../llvm-mca/X86/Generic/resources-avx512dq.s | 16 +- .../llvm-mca/X86/Generic/resources-avx512dqvl.s | 30 +- .../X86/IceLakeServer/resources-avx512bw.s | 16 +- .../X86/IceLakeServer/resources-avx512bwvl.s | 30 +- .../X86/IceLakeServer/resources-avx512dq.s | 16 +- .../X86/IceLakeServer/resources-avx512dqvl.s | 30 +- .../X86/SkylakeServer/resources-avx512bw.s | 16 +- .../X86/SkylakeServer/resources-avx512bwvl.s | 30 +- .../X86/SkylakeServer/resources-avx512dq.s | 16 +- .../X86/SkylakeServer/resources-avx512dqvl.s | 30 +- llvm/unittests/Support/TargetParserTest.cpp | 44 +- llvm/utils/UpdateTestChecks/common.py | 3 + llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn | 1 + .../compiler-rt/lib/sanitizer_common/BUILD.gn | 3 +- llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 2 + mlir/docs/Canonicalization.md | 1 + mlir/docs/Dialects/SPIR-V.md | 2 +- mlir/docs/Dialects/{Shape.md => ShapeDialect.md} | 2 +- .../standalone/include/Standalone/StandaloneOps.td | 1 + mlir/include/mlir/Analysis/Presburger/Simplex.h | 4 +- .../mlir/Dialect/Arithmetic/IR/ArithmeticOps.td | 1 + mlir/include/mlir/Dialect/Complex/IR/ComplexOps.td | 9 +- mlir/include/mlir/Dialect/GPU/GPUDialect.h | 1 + mlir/include/mlir/Dialect/GPU/GPUOps.td | 11 +- mlir/include/mlir/Dialect/GPU/Passes.h | 15 +- mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h | 1 + mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 16 +- mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 36 +- .../BufferizableOpInterface.td | 23 + .../mlir/Dialect/Linalg/Transforms/Transforms.h | 1 + mlir/include/mlir/Dialect/Math/IR/MathOps.td | 1 + mlir/include/mlir/Dialect/Quant/QuantOps.td | 1 + .../mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td | 1 + .../mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td | 3 - .../mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td | 2 - mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.h | 1 + mlir/include/mlir/Dialect/Shape/IR/CMakeLists.txt | 2 +- .../Dialect/SparseTensor/IR/SparseTensorOps.td | 1 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.h | 1 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 22 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 6 +- mlir/include/mlir/Dialect/X86Vector/X86Vector.td | 1 + .../mlir/Dialect/X86Vector/X86VectorDialect.h | 1 + mlir/include/mlir/IR/Attributes.h | 76 +- mlir/include/mlir/IR/FunctionSupport.h | 8 +- mlir/include/mlir/IR/OpBase.td | 12 +- mlir/include/mlir/IR/Operation.h | 4 +- mlir/include/mlir/IR/OperationSupport.h | 4 +- .../mlir/Interfaces/InferTypeOpInterface.td | 4 + .../mlir/Target/LLVMIR/LLVMTranslationInterface.h | 2 +- mlir/include/mlir/Transforms/RegionUtils.h | 10 + mlir/lib/Analysis/Presburger/Simplex.cpp | 5 +- mlir/lib/CAPI/IR/BuiltinAttributes.cpp | 2 +- mlir/lib/CAPI/IR/IR.cpp | 2 +- mlir/lib/Conversion/GPUCommon/GPUOpsLowering.cpp | 6 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 19 +- mlir/lib/Conversion/GPUToSPIRV/GPUToSPIRV.cpp | 6 +- mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp | 6 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 14 +- mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp | 12 +- mlir/lib/Dialect/Affine/IR/AffineOps.cpp | 4 +- .../Affine/Transforms/SimplifyAffineStructures.cpp | 8 +- mlir/lib/Dialect/DLTI/DLTI.cpp | 6 +- mlir/lib/Dialect/GPU/CMakeLists.txt | 31 +- mlir/lib/Dialect/GPU/IR/GPUDialect.cpp | 6 +- .../lib/Dialect/GPU/Transforms/SerializeToBlob.cpp | 42 +- .../Dialect/GPU/Transforms/SerializeToHsaco.cpp | 329 +- mlir/lib/Dialect/LLVMIR/CMakeLists.txt | 1 + mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 30 +- mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 29 +- mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp | 2 +- .../ComprehensiveBufferize.cpp | 247 +- mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp | 8 +- mlir/lib/Dialect/Linalg/IR/LinalgTypes.cpp | 16 +- mlir/lib/Dialect/Linalg/Transforms/Tiling.cpp | 9 +- mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp | 9 + mlir/lib/Dialect/SPIRV/IR/SPIRVDialect.cpp | 8 +- mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp | 11 - .../Linking/ModuleCombiner/ModuleCombiner.cpp | 2 +- .../Transforms/DecorateCompositeTypeLayoutPass.cpp | 3 +- .../Dialect/SPIRV/Transforms/SPIRVConversion.cpp | 11 +- mlir/lib/Dialect/Shape/IR/Shape.cpp | 10 +- .../SparseTensor/IR/SparseTensorDialect.cpp | 18 +- .../SparseTensor/Transforms/Sparsification.cpp | 6 +- mlir/lib/Dialect/StandardOps/CMakeLists.txt | 1 + mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 22 - mlir/lib/Dialect/Vector/CMakeLists.txt | 1 + mlir/lib/Dialect/Vector/VectorDropLeadUnitDim.cpp | 259 ++ .../Vector/VectorMultiDimReductionTransforms.cpp | 5 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 99 +- mlir/lib/Dialect/Vector/VectorTransforms.cpp | 322 -- mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp | 1 + mlir/lib/ExecutionEngine/CMakeLists.txt | 27 +- mlir/lib/IR/AffineExpr.cpp | 31 +- mlir/lib/IR/AsmPrinter.cpp | 18 +- mlir/lib/IR/Attributes.cpp | 26 +- mlir/lib/IR/BuiltinAttributes.cpp | 32 +- mlir/lib/IR/BuiltinDialect.cpp | 30 +- mlir/lib/IR/OperationSupport.cpp | 36 +- mlir/lib/IR/Verifier.cpp | 2 +- mlir/lib/Parser/Parser.cpp | 2 +- mlir/lib/Target/Cpp/TranslateToCpp.cpp | 8 +- .../Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp | 6 +- .../Dialect/NVVM/NVVMToLLVMIRTranslation.cpp | 44 +- .../Dialect/ROCDL/ROCDLToLLVMIRTranslation.cpp | 2 +- .../Target/SPIRV/Deserialization/Deserializer.cpp | 7 +- .../Target/SPIRV/Serialization/SerializeOps.cpp | 10 +- mlir/lib/Target/SPIRV/Serialization/Serializer.cpp | 8 +- mlir/lib/Transforms/Utils/RegionUtils.cpp | 8 +- mlir/lib/Transforms/Utils/Utils.cpp | 6 +- mlir/lib/Transforms/ViewOpGraph.cpp | 4 +- mlir/python/mlir/dialects/_linalg_ops_ext.py | 9 - mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 18 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 29 + .../test/Conversion/VectorToSCF/vector-to-scf.mlir | 12 +- mlir/test/Conversion/VectorToSPIRV/simple.mlir | 16 + .../Dialect/Affine/simplify-affine-structures.mlir | 14 + mlir/test/Dialect/GPU/ops.mlir | 6 + mlir/test/Dialect/LLVMIR/invalid.mlir | 6 +- mlir/test/Dialect/LLVMIR/nvvm.mlir | 22 +- .../comprehensive-module-bufferize-invalid.mlir | 13 - mlir/test/Dialect/Linalg/tile-zero.mlir | 12 + mlir/test/Dialect/SPIRV/IR/bit-ops.mlir | 8 +- mlir/test/Dialect/SPIRV/IR/logical-ops.mlir | 6 +- mlir/test/Dialect/SparseTensor/sparse_vector.mlir | 6 +- .../Dialect/SparseTensor/sparse_vector_chain.mlir | 3 +- mlir/test/Dialect/Vector/canonicalize.mlir | 39 +- .../Dialect/Vector/vector-dim-one-shape-cast.mlir | 23 - .../Vector/vector-multi-reduction-lowering.mlir | 64 +- mlir/test/Dialect/Vector/vector-transforms.mlir | 66 +- mlir/test/IR/invalid-ops.mlir | 6 +- mlir/test/Integration/GPU/ROCM/gpu-to-hsaco.mlir | 14 +- mlir/test/Integration/GPU/ROCM/lit.local.cfg | 4 +- mlir/test/Integration/GPU/ROCM/two-modules.mlir | 14 +- mlir/test/Integration/GPU/ROCM/vecadd.mlir | 32 +- .../Integration/GPU/ROCM/vector-transferops.mlir | 18 +- mlir/test/Target/LLVMIR/nvvmir.mlir | 32 +- mlir/test/lib/Dialect/Test/TestDialect.cpp | 8 +- mlir/test/lib/Dialect/Test/TestPatterns.cpp | 2 +- .../test/lib/IR/TestBuiltinAttributeInterfaces.cpp | 2 +- mlir/test/lib/IR/TestPrintNesting.cpp | 4 +- mlir/test/lit.site.cfg.py.in | 1 + .../mlir-tblgen/default-type-attr-print-parser.td | 76 + mlir/test/mlir-tblgen/op-python-bindings.td | 2 +- mlir/test/mlir-tblgen/op-result.td | 4 +- mlir/test/python/dialects/linalg/ops.py | 5 +- mlir/test/python/dialects/python_test.py | 18 + mlir/test/python/python_test_ops.td | 5 + mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp | 34 +- mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp | 6 +- mlir/tools/mlir-tblgen/OpPythonBindingGen.cpp | 31 +- mlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp | 3 +- mlir/unittests/IR/OperationSupportTest.cpp | 16 +- mlir/unittests/TableGen/OpBuildGen.cpp | 3 +- mlir/unittests/TableGen/StructsGenTest.cpp | 6 +- openmp/libomptarget/deviceRTLs/target_interface.h | 1 - openmp/libomptarget/plugins/amdgpu/impl/internal.h | 13 +- .../plugins/amdgpu/impl/interop_hsa.cpp | 45 - .../libomptarget/plugins/amdgpu/impl/interop_hsa.h | 5 - openmp/libomptarget/plugins/amdgpu/impl/system.cpp | 64 +- openmp/libomptarget/plugins/amdgpu/src/rtl.cpp | 26 +- openmp/runtime/test/ompt/tasks/taskwait-depend.c | 7 +- .../runtime/test/tasking/omp50_taskwait_depend.c | 11 +- utils/bazel/llvm-project-overlay/mlir/BUILD.bazel | 15 + 898 files changed, 37698 insertions(+), 11737 deletions(-) create mode 100644 clang/lib/Driver/ToolChains/SPIRV.cpp create mode 100644 clang/lib/Driver/ToolChains/SPIRV.h create mode 100644 clang/test/CodeCompletion/variadic-template.cpp create mode 100644 clang/test/CodeGen/X86/Float16-arithmetic.c rename clang/test/CodeGen/X86/{avx512fp16-abi.c => fp16-abi.c} (94%) rename clang/test/CodeGen/X86/{avx512fp16-complex.c => fp16-complex.c} (96%) create mode 100644 clang/test/Driver/aarch64-implied-sve-features.c create mode 100644 clang/test/Modules/Inputs/AddRemoveIrrelevantModuleMap/a.modulemap create mode 100644 clang/test/Modules/Inputs/AddRemoveIrrelevantModuleMap/b.modulemap create mode 100644 clang/test/Modules/add-remove-irrelevant-module-map.m create mode 100644 clang/test/OpenMP/taskwait_depend_codegen.cpp create mode 100644 clang/test/OpenMP/taskwait_depend_messages.cpp create mode 100644 clang/test/SemaCXX/Inputs/compare.modulemap delete mode 100644 compiler-rt/lib/sanitizer_common/sanitizer_persistent_allocator.h create mode 100644 compiler-rt/lib/sanitizer_common/sanitizer_stack_store.cpp create mode 100644 compiler-rt/lib/sanitizer_common/sanitizer_stack_store.h create mode 100644 flang/include/flang/Optimizer/Builder/Complex.h create mode 100644 flang/include/flang/Optimizer/Support/TypeCode.h create mode 100644 flang/lib/Optimizer/Builder/Complex.cpp create mode 100644 flang/unittests/Optimizer/Builder/ComplexTest.cpp create mode 100644 flang/unittests/Runtime/Stop.cpp rename libc/fuzzing/stdlib/{atof_fuzz.cpp => atof_differential_fuzz.cpp} (100%) create mode 100644 libcxx/include/__bit/byteswap.h create mode 100644 libcxx/include/__thread/poll_with_backoff.h create mode 100644 libcxx/test/libcxx/algorithms/robust_against_copying_comparator [...] rename libcxx/test/libcxx/{atomics/libcpp-has-no-threads.compile.fail.cpp => diagn [...] rename libcxx/test/libcxx/{atomics/libcpp-has-no-threads.pass.cpp => diagnostics/d [...] create mode 100644 libcxx/test/std/algorithms/robust_against_adl.compile.pass.cpp delete mode 100644 libcxx/test/std/algorithms/robust_against_adl.pass.cpp create mode 100644 libcxx/test/std/algorithms/robust_re_difference_type.compile.pass.cpp delete mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] delete mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 libcxx/test/std/localization/locale.categories/category.ctype/f [...] create mode 100644 libcxx/test/std/numerics/bit/byteswap.pass.cpp rename libcxx/test/std/numerics/c.math/{abs.fail.cpp => abs.verify.cpp} (50%) create mode 100644 libcxx/test/std/utilities/charconv/charconv.syn/from_chars_resu [...] create mode 100644 libcxx/test/std/utilities/charconv/charconv.syn/to_chars_result [...] create mode 100644 lld/test/ELF/linkerscript/discard-plt.s create mode 100644 lld/test/ELF/linkerscript/lma-align2.test create mode 100644 lld/test/ELF/linkerscript/preinit-array-empty.test create mode 100644 llvm/test/CodeGen/AArch64/ptrauth-intrinsic-sign-generic.ll create mode 100644 llvm/test/CodeGen/AArch64/ptrauth-intrinsic-sign.ll create mode 100644 llvm/test/CodeGen/AArch64/sinksplat.ll create mode 100644 llvm/test/CodeGen/AArch64/statepoint-call-lowering-sp.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-smulo-sdnode.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-umulo-sdnode.ll create mode 100644 llvm/test/CodeGen/AVR/inline-asm/inline-asm-invalid.ll create mode 100644 llvm/test/CodeGen/BPF/adjust-opt-icmp4.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-add.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-and.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-mul.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-or.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-smax.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-smin.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-umax.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-umin.ll create mode 100644 llvm/test/CodeGen/PowerPC/vector-reduce-xor.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/smulo-sdnode.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/umulo-sdnode.ll create mode 100644 llvm/test/CodeGen/RISCV/sink-icmp.ll create mode 100644 llvm/test/CodeGen/X86/no-ret-in-x87-reg.ll create mode 100644 llvm/test/CodeGen/X86/pr52567.ll create mode 100644 llvm/test/ExecutionEngine/JITLink/X86/MachO_weak_local.s create mode 100644 llvm/test/MC/X86/gotpcrel_norelax.s create mode 100644 llvm/test/Transforms/Coroutines/coro-retcon-once-private.ll create mode 100644 llvm/test/Transforms/SROA/alloca-struct.ll create mode 100644 llvm/test/tools/llvm-dwarfdump/X86/prettyprint_type_units_split_v4.s create mode 100644 llvm/test/tools/llvm-dwarfdump/X86/prettyprint_type_units_split_v5.s rename mlir/docs/Dialects/{Shape.md => ShapeDialect.md} (99%) create mode 100644 mlir/lib/Dialect/Vector/VectorDropLeadUnitDim.cpp create mode 100644 mlir/test/Dialect/Linalg/tile-zero.mlir delete mode 100644 mlir/test/Dialect/Vector/vector-dim-one-shape-cast.mlir create mode 100644 mlir/test/mlir-tblgen/default-type-attr-print-parser.td -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (bd97e65f87 -> b4ab412070)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig in repository toolchain/ci/binutils-gdb. from bd97e65f87 Automatic date update in version.in adds da05b70e56 RISC-V: Add mininal support for z[fdq]inx adds de83e5142d RISC-V: Add instructions and operand set for z[fdq]inx adds 273a32ac65 RISC-V: Add testcases for z[fdq]inx adds 2cd93e7081 Pass DEBUGINFOD_CFLAGS when compiling dwarf.c adds 7a53275579 Re: Don't compile some opcodes files when bfd is 32-bit only adds a0cfd0ca0e [gdb/testsuite] Add missing wait in gdb.base/signals-state-c [...] adds 7c80aab936 elf/x86: Issue an error on discarded output .plt section adds 2888fe8d19 gdb fix PowerPC test gdb.arch/ppc-longdouble.exp adds 90ad9178f1 gdb: PowerPC fix gdb.base/break-interp.exp adds ab19827912 gdb fix for catch-syscall.exp adds 557b4d7650 gdbsupport: make gdb_assert_not_reached accept a format string adds 76eb8ef1ce gdb: include gdbarch.h in all files extending gdbarch_tdep adds 578c64a45a Add multibyte character warning option to the assembler. adds 8ba97c1904 [gdb/doc] Fix negative repeat count examining memory example adds 80e7a6cb76 gdb: rename rs6000-nat.c to rs6000-aix-nat.c adds 629f88f80a gdb: move AIX_TEXT_SEGMENT_BASE to rs6000-aix-tdep.c, remove [...] adds 89e1cf9cb4 gdb: fix ia64-tdep.c build with g++ 4.8 adds 140eb481d1 gdb: fix array-view-selftests.c build with g++ 4.8 adds 76183fd1bf dprintf-execution-x-script.exp: Adjust test for native-exten [...] adds a6e8dea686 Automatic date update in version.in adds fb2c495f94 sim: avoid installing headers when there is no sim adds fccf4ba5ad sim: use program_transform_name for libsim adds 8155b8539b RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC. adds ed939535e2 sim: install various doc files adds fd0ff19bf4 Re: Add multibyte character warning option to the assembler. adds d3ffd7f776 RISC-V: Support new .option arch directive. adds 999a4952a2 gdb: Print cv qualifiers if class attributes are substituted adds 5ee59b4bf2 gdb/testsuite: Extend tests for print of cv qualifiers adds 2e5843d87c [gdb/testsuite] Fix gdb.threads/thread-specific-bp.exp adds a5ac8e7fa3 [gdb/testsuite] Fix 64-bit dwarf test-cases with -m32 adds f2f38377e5 [gdb/testsuite] Handle runto fail in gdb.mi/mi-var-cp.exp adds b6e7fb9573 elfedit: Align --[in|out]put-abiversion usage adds 2538d4f18b Automatic date update in version.in adds 6e3e76d17b sim: bfin: fix short --env usage in testsuite adds d966a54ba9 bfd: remove wrong comment in xcofflink.c adds 0f8f2de183 [gdb/build] Check if libsource-highlight is usable adds 911438f9f4 gdbsupport: fix array-view compilation with c++11 && _GLIBCXX_DEBUG adds dbf98db6f0 Fix intermittent failures on the H8, particularly H8/SX tests. adds c2851b66eb Automatic date update in version.in adds bbda248c50 sim: v850: fix cpu_option testsuite handling adds b4d069fbea gdb/testsuite: Remove duplicates in gdb.base/catch-signal.exp adds b4ab412070 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/elf32-i386.c | 8 + bfd/elf64-x86-64.c | 8 + bfd/elfnn-riscv.c | 44 ++- bfd/elfxx-riscv.c | 179 +++++++++-- bfd/elfxx-riscv.h | 5 +- bfd/version.h | 2 +- bfd/xcofflink.c | 2 - binutils/Makefile.am | 17 +- binutils/Makefile.in | 7 + binutils/elfedit.c | 6 +- binutils/readelf.c | 39 +++ gas/ChangeLog | 22 ++ gas/NEWS | 8 + gas/app.c | 54 ++++ gas/as.c | 23 +- gas/as.h | 9 + gas/config/tc-riscv.c | 116 +++++-- gas/config/tc-riscv.h | 4 + gas/doc/as.texi | 30 +- gas/doc/c-riscv.texi | 15 +- gas/input-scrub.c | 5 + gas/symbols.c | 34 +- gas/testsuite/gas/all/gas.exp | 2 + gas/testsuite/gas/all/multibyte.s | 8 + gas/testsuite/gas/all/multibyte1.d | 3 + gas/testsuite/gas/all/multibyte1.l | 12 + gas/testsuite/gas/all/multibyte2.d | 3 + gas/testsuite/gas/all/multibyte2.l | 2 + gas/testsuite/gas/riscv/option-arch-01.s | 10 + gas/testsuite/gas/riscv/option-arch-01a.d | 14 + gas/testsuite/gas/riscv/option-arch-01b.d | 8 + gas/testsuite/gas/riscv/option-arch-02.d | 8 + gas/testsuite/gas/riscv/option-arch-02.s | 8 + gas/testsuite/gas/riscv/option-arch-03.d | 8 + gas/testsuite/gas/riscv/option-arch-03.s | 3 + gas/testsuite/gas/riscv/option-arch-fail.d | 3 + gas/testsuite/gas/riscv/option-arch-fail.l | 8 + gas/testsuite/gas/riscv/option-arch-fail.s | 10 + gas/testsuite/gas/riscv/variant_cc-set.d | 13 + gas/testsuite/gas/riscv/variant_cc-set.s | 15 + gas/testsuite/gas/riscv/variant_cc.d | 9 + gas/testsuite/gas/riscv/variant_cc.s | 5 + gas/testsuite/gas/riscv/zdinx.d | 41 +++ gas/testsuite/gas/riscv/zdinx.s | 33 ++ gas/testsuite/gas/riscv/zfinx.d | 39 +++ gas/testsuite/gas/riscv/zfinx.s | 31 ++ gas/testsuite/gas/riscv/zqinx.d | 43 +++ gas/testsuite/gas/riscv/zqinx.s | 35 +++ gdb/Makefile.in | 3 +- gdb/arch/arc.c | 4 +- gdb/avr-tdep.c | 1 + gdb/ax-gdb.c | 2 +- gdb/bfin-tdep.h | 2 + gdb/bpf-tdep.c | 1 + gdb/c-typeprint.c | 1 + gdb/cli/cli-option.c | 4 +- gdb/compile/compile-c-support.c | 6 +- gdb/compile/compile-c-symbols.c | 4 +- gdb/configure | 158 +++++++--- gdb/configure.ac | 47 ++- gdb/configure.nat | 2 +- gdb/cris-tdep.h | 2 + gdb/csky-tdep.h | 2 + gdb/doc/gdb.texinfo | 2 +- gdb/dwarf2/read.c | 2 +- gdb/findvar.c | 4 +- gdb/frv-tdep.c | 1 + gdb/ft32-tdep.h | 2 + gdb/ia64-tdep.h | 9 +- gdb/infrun.c | 4 +- gdb/lm32-tdep.c | 1 + gdb/m32c-tdep.c | 1 + gdb/m68hc11-tdep.c | 1 + gdb/m68k-tdep.h | 2 + gdb/mep-tdep.c | 1 + gdb/microblaze-tdep.h | 1 + gdb/mips-tdep.h | 1 + gdb/moxie-tdep.h | 2 + gdb/msp430-tdep.c | 1 + gdb/nds32-tdep.h | 2 + gdb/or1k-tdep.c | 1 + gdb/ppc-linux-tdep.c | 22 ++ gdb/ppc-tdep.h | 10 + gdb/printcmd.c | 2 +- gdb/remote.c | 4 +- gdb/riscv-tdep.c | 6 +- gdb/rl78-tdep.c | 1 + gdb/{rs6000-nat.c => rs6000-aix-nat.c} | 1 - gdb/rs6000-aix-tdep.c | 4 +- gdb/rs6000-tdep.c | 10 +- gdb/rs6000-tdep.h | 24 -- gdb/rx-tdep.c | 1 + gdb/s12z-tdep.c | 1 + gdb/s390-tdep.h | 1 + gdb/testsuite/gdb.arch/ppc-longdouble.exp | 2 +- gdb/testsuite/gdb.base/catch-signal.exp | 5 +- gdb/testsuite/gdb.base/catch-syscall.exp | 6 +- .../gdb.base/dprintf-execution-x-script.exp | 23 +- gdb/testsuite/gdb.base/signals-state-child.exp | 14 +- gdb/testsuite/gdb.cp/ptype-cv-cp.cc | 4 + gdb/testsuite/gdb.cp/ptype-cv-cp.exp | 12 + gdb/testsuite/gdb.cp/templates.cc | 14 + gdb/testsuite/gdb.cp/templates.exp | 36 +++ gdb/testsuite/gdb.mi/mi-var-child.exp | 4 +- gdb/testsuite/gdb.mi/mi-var-cmd.exp | 18 +- gdb/testsuite/gdb.mi/mi-var-cp.exp | 18 +- gdb/testsuite/gdb.mi/mi-var-rtti.exp | 22 +- gdb/testsuite/gdb.threads/thread-specific-bp.exp | 21 +- gdb/testsuite/lib/dwarf.exp | 44 ++- gdb/testsuite/lib/gdb.exp | 23 ++ gdb/testsuite/lib/mi-support.exp | 6 +- gdb/thread-fsm.h | 2 +- gdb/tid-parse.c | 4 +- gdb/tracepoint.c | 2 +- gdb/tui/tui-layout.c | 2 +- gdb/ui-out.c | 12 +- gdb/unittests/array-view-selftests.c | 2 +- gdb/v850-tdep.c | 1 + gdb/varobj.c | 3 +- gdb/z80-tdep.c | 1 + gdbsupport/array-view.h | 6 +- gdbsupport/filestuff.cc | 6 +- gdbsupport/gdb_assert.h | 5 +- include/elf/riscv.h | 6 + include/opcode/riscv.h | 3 + ld/testsuite/ld-elf/pr28597.d | 3 + ld/testsuite/ld-elf/pr28597.s | 4 + ld/testsuite/ld-elf/pr28597.t | 14 + ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 3 + ld/testsuite/ld-riscv-elf/variant_cc-1.s | 61 ++++ ld/testsuite/ld-riscv-elf/variant_cc-2.s | 61 ++++ ld/testsuite/ld-riscv-elf/variant_cc-now.d | 73 +++++ ld/testsuite/ld-riscv-elf/variant_cc-r.d | 76 +++++ ld/testsuite/ld-riscv-elf/variant_cc-shared.d | 73 +++++ opcodes/Makefile.am | 10 +- opcodes/Makefile.in | 10 +- opcodes/riscv-dis.c | 4 + opcodes/riscv-opc.c | 296 +++++++++--------- sim/Makefile.am | 17 +- sim/Makefile.in | 342 +++++++++++++++++---- sim/arm/local.mk | 19 ++ sim/common/Make-common.in | 2 +- sim/configure | 18 +- sim/configure.ac | 1 + sim/erc32/local.mk | 19 ++ sim/frv/local.mk | 3 + sim/h8300/compile.c | 3 +- sim/or1k/local.mk | 3 + sim/ppc/local.mk | 19 ++ sim/rx/local.mk | 19 ++ sim/testsuite/bfin/mdma-32bit-1d-neg-count.c | 2 +- sim/testsuite/bfin/mdma-32bit-1d.c | 2 +- sim/testsuite/bfin/mdma-8bit-1d-neg-count.c | 2 +- sim/testsuite/bfin/mdma-8bit-1d.c | 2 +- sim/testsuite/lib/sim-defs.exp | 8 +- sim/testsuite/v850/allinsns.exp | 27 +- 156 files changed, 2409 insertions(+), 489 deletions(-) create mode 100644 gas/testsuite/gas/all/multibyte.s create mode 100644 gas/testsuite/gas/all/multibyte1.d create mode 100644 gas/testsuite/gas/all/multibyte1.l create mode 100644 gas/testsuite/gas/all/multibyte2.d create mode 100644 gas/testsuite/gas/all/multibyte2.l create mode 100644 gas/testsuite/gas/riscv/option-arch-01.s create mode 100644 gas/testsuite/gas/riscv/option-arch-01a.d create mode 100644 gas/testsuite/gas/riscv/option-arch-01b.d create mode 100644 gas/testsuite/gas/riscv/option-arch-02.d create mode 100644 gas/testsuite/gas/riscv/option-arch-02.s create mode 100644 gas/testsuite/gas/riscv/option-arch-03.d create mode 100644 gas/testsuite/gas/riscv/option-arch-03.s create mode 100644 gas/testsuite/gas/riscv/option-arch-fail.d create mode 100644 gas/testsuite/gas/riscv/option-arch-fail.l create mode 100644 gas/testsuite/gas/riscv/option-arch-fail.s create mode 100644 gas/testsuite/gas/riscv/variant_cc-set.d create mode 100644 gas/testsuite/gas/riscv/variant_cc-set.s create mode 100644 gas/testsuite/gas/riscv/variant_cc.d create mode 100644 gas/testsuite/gas/riscv/variant_cc.s create mode 100644 gas/testsuite/gas/riscv/zdinx.d create mode 100644 gas/testsuite/gas/riscv/zdinx.s create mode 100644 gas/testsuite/gas/riscv/zfinx.d create mode 100644 gas/testsuite/gas/riscv/zfinx.s create mode 100644 gas/testsuite/gas/riscv/zqinx.d create mode 100644 gas/testsuite/gas/riscv/zqinx.s rename gdb/{rs6000-nat.c => rs6000-aix-nat.c} (99%) delete mode 100644 gdb/rs6000-tdep.h create mode 100644 ld/testsuite/ld-elf/pr28597.d create mode 100644 ld/testsuite/ld-elf/pr28597.s create mode 100644 ld/testsuite/ld-elf/pr28597.t create mode 100644 ld/testsuite/ld-riscv-elf/variant_cc-1.s create mode 100644 ld/testsuite/ld-riscv-elf/variant_cc-2.s create mode 100644 ld/testsuite/ld-riscv-elf/variant_cc-now.d create mode 100644 ld/testsuite/ld-riscv-elf/variant_cc-r.d create mode 100644 ld/testsuite/ld-riscv-elf/variant_cc-shared.d create mode 100644 sim/arm/local.mk create mode 100644 sim/erc32/local.mk create mode 100644 sim/ppc/local.mk create mode 100644 sim/rx/local.mk -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig updated (b627bf3e -> 0804cad6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards b627bf3e 0: update: binutils-llvm-linux-qemu: all new 0804cad6 0: update: binutils-llvm-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b627bf3e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-arm-s [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1552 -> 1596 bytes 02-prepare_abe/console.log.xz | Bin 2780 -> 2776 bytes 03-build_abe-binutils/console.log.xz | Bin 44144 -> 44148 bytes 04-build_llvm/console.log.xz | Bin 59836 -> 59132 bytes 05-build_abe-qemu/console.log.xz | Bin 29864 -> 29924 bytes 06-build_linux/console.log.xz | Bin 4884 -> 6168 bytes 07-boot_linux/console.log.xz | Bin 496 -> 496 bytes 08-check_regression/console.log.xz | Bin 412 -> 412 bytes 09-update_baseline/console.log | 10 +++++----- jenkins/manifest.sh | 19 +++++++++---------- 10 files changed, 14 insertions(+), 15 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-aarch64 updated (bbda248c50 -> b4ab412070)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-aarch64 in repository toolchain/ci/gdb. from bbda248c50 sim: v850: fix cpu_option testsuite handling adds b4d069fbea gdb/testsuite: Remove duplicates in gdb.base/catch-signal.exp adds b4ab412070 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gdb/testsuite/gdb.base/catch-signal.exp | 5 ++--- 2 files changed, 3 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-aarch64 updated (923dcc5eb0c1 -> 136057256686)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-aarch64 in repository toolchain/ci/linux. from 923dcc5eb0c1 Merge branch 'akpm' (patches from Andrew) adds 61eb495c83bf pstore/blk: Use "%lu" to format unsigned long adds dae581864609 KVM: PPC: Book3S HV: Use GLOBAL_TOC for kvmppc_h_set_dabr/xdabr() adds 2da516d7ed08 powerpc/83xx/mpc8349emitx: Drop unused variable adds 964c33cd0be6 powerpc: clean vdso32 and vdso64 directories adds 0bd81274e3f1 powerpc/pseries: rename numa_dist_table to form2_distances adds 302039466f6a powerpc/pseries: Fix numa FORM2 parsing fallback code adds 2d33f5504490 powerpc/pseries/ddw: Revert "Extend upper limit for huge D [...] adds fb4ee2b30cd0 powerpc/pseries/ddw: simplify enable_ddw() adds ad3976025b31 powerpc/pseries/ddw: Do not try direct mapping with persis [...] adds 5b54860943dc powerpc/book3e: Fix TLBCAM preset at boot adds 5499802b2284 powerpc/signal32: Fix sigset_t copy adds 1e35eba40551 powerpc/8xx: Fix pinned TLBs with CONFIG_STRICT_KERNEL_RWX adds 8e80a73fa9a7 powerpc/xive: Change IRQ domain to a tree domain adds 75603b14ed14 Merge tag 'powerpc-5.16-2' of git://git.kernel.org/pub/scm [...] adds e324234e0aa8 perf/x86/intel/uncore: Fix filter_tid mask for CHA events [...] adds 3866ae319c84 perf/x86/intel/uncore: Fix IIO event constraints for Skyla [...] adds bdc0feee0517 perf/x86/intel/uncore: Fix IIO event constraints for Snowridge adds f3fd84a3b775 x86/perf: Fix snapshot_branch_stack warning in VM adds af16bdeae8e0 Merge tag 'perf-urgent-2021-11-21' of git://git.kernel.org [...] adds 8d48bf8206f7 x86/boot: Pull up cmdline preparation and early param parsing adds ac5d272a0ad0 x86/sgx: Fix free page accounting adds 40c93d7fff6f Merge tag 'x86-urgent-2021-11-21' of git://git.kernel.org/ [...] adds 136057256686 Linux 5.16-rc2 No new revisions were added by this update. Summary of changes: Makefile | 2 +- arch/powerpc/kernel/Makefile | 3 ++ arch/powerpc/kernel/head_8xx.S | 13 ++--- arch/powerpc/kernel/signal.h | 10 +++- arch/powerpc/kvm/book3s_hv_rmhandlers.S | 4 +- arch/powerpc/mm/nohash/kaslr_booke.c | 2 +- arch/powerpc/mm/nohash/tlb.c | 4 +- arch/powerpc/mm/numa.c | 44 ++++++++--------- arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c | 1 - arch/powerpc/platforms/pseries/iommu.c | 26 ++++------ arch/powerpc/sysdev/xive/Kconfig | 1 - arch/powerpc/sysdev/xive/common.c | 3 +- arch/x86/events/intel/core.c | 2 - arch/x86/events/intel/uncore_snbep.c | 12 +++++ arch/x86/kernel/cpu/sgx/main.c | 12 ++--- arch/x86/kernel/setup.c | 66 +++++++++++++++----------- fs/pstore/blk.c | 2 +- 17 files changed, 111 insertions(+), 96 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-aarch64 updated (f658f1d7a22 -> b5844cb0bc8)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-aarch64 in repository toolchain/ci/gcc. from f658f1d7a22 Daily bump. adds dc915b361bb Tweak tree-ssa-math-opts.c to solve PR target/102117. adds 09a4ffb72aa Refactor load/store/kill analysis in ipa-modref adds c8260767aa3 Fix failure merge_block.c testcase adds 0f5afb62638 Improve base tracking in ipa-modref adds 8fef6f720a5 Fortran: fix lookup for gfortran builtin math intrinsics us [...] adds 364539710f8 i386: Fix up handling of target attribute [PR101180] adds da17c304e22 fortran, debug: Fix up DW_AT_rank [PR103315] adds ae957bef065 Daily bump. adds 2b5b8610e98 xtensa: Fix non-robust split condition in define_insn_and_split adds b5844cb0bc8 Don't allow mask/sse/mmx mov in TLS code sequences. No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 67 ++ gcc/DATESTAMP | 2 +- gcc/config/i386/constraints.md | 5 + gcc/config/i386/i386-options.c | 5 +- gcc/config/i386/i386-protos.h | 1 + gcc/config/i386/i386.c | 30 + gcc/config/i386/i386.md | 8 +- gcc/config/xtensa/xtensa.md | 4 +- gcc/fortran/ChangeLog | 17 + gcc/fortran/trans-intrinsic.c | 66 +- gcc/fortran/trans-types.c | 4 +- gcc/ipa-modref.c | 995 ++++++++++++++------------- gcc/testsuite/ChangeLog | 28 + gcc/testsuite/gcc.dg/tree-prof/merge_block.c | 2 +- gcc/testsuite/gcc.dg/tree-ssa/modref-15.c | 9 + gcc/testsuite/gcc.target/i386/pr101180.c | 12 + gcc/testsuite/gcc.target/i386/pr103275.c | 83 +++ gcc/testsuite/gcc.target/s390/mul-wide.c | 9 + gcc/testsuite/gcc.target/s390/umul-wide.c | 9 + gcc/testsuite/gfortran.dg/dec_math_5.f90 | 104 +++ gcc/tree-ssa-math-opts.c | 11 +- 21 files changed, 968 insertions(+), 503 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/tree-ssa/modref-15.c create mode 100644 gcc/testsuite/gcc.target/i386/pr101180.c create mode 100644 gcc/testsuite/gcc.target/i386/pr103275.c create mode 100644 gcc/testsuite/gcc.target/s390/mul-wide.c create mode 100644 gcc/testsuite/gcc.target/s390/umul-wide.c create mode 100644 gcc/testsuite/gfortran.dg/dec_math_5.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-aarch64 updated (bbda248c50 -> b4ab412070)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-aarch64 in repository toolchain/ci/binutils-gdb. from bbda248c50 sim: v850: fix cpu_option testsuite handling adds b4d069fbea gdb/testsuite: Remove duplicates in gdb.base/catch-signal.exp adds b4ab412070 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gdb/testsuite/gdb.base/catch-signal.exp | 5 ++--- 2 files changed, 3 insertions(+), 4 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 5 months

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Tcwg-commits November 2021