Tcwg-commits November 2021

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto updated (65e4a99a26 -> 7a53275579)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto in repository toolchain/ci/binutils-gdb. from 65e4a99a26 RISC-V: Support rvv extension with released version 1.0. adds c9dcc18f8d elfedit: Add --output-abiversion option to update ABIVERSION adds 1aed145ad6 Expose the BTI BTYPE more explicitly in the registers adds 0df670bbe0 [gdb/build, s390x] Fix build after gdbarch_tdep changes adds ee9e412f14 Fix the linker script parser so that it will recognise the P [...] adds ef6379e16d Set the default DLL chracteristics to 0 for Cygwin based targets. adds 57f02370a1 aarch64: [SME] Add +sme option to -march adds 971eda7341 aarch64: [SME] Add SME instructions adds 7bb5f07c8a aarch64: [SME] Add MOV and MOVA instructions adds 1cad938de5 aarch64: [SME] Add ZERO instruction adds 01a4d08220 aarch64: [SME] Add LD1x, ST1x, LDR and STR instructions adds 3dd032c5fb aarch64: [SME] Add SME mode selection and state access instructions adds 8f1bfdb448 aarch64: [SME] Add new SME system registers adds d3de086010 aarch64: [SME] SVE2 instructions added to support SME adds bd97e65f87 Automatic date update in version.in adds da05b70e56 RISC-V: Add mininal support for z[fdq]inx adds de83e5142d RISC-V: Add instructions and operand set for z[fdq]inx adds 273a32ac65 RISC-V: Add testcases for z[fdq]inx adds 2cd93e7081 Pass DEBUGINFOD_CFLAGS when compiling dwarf.c adds 7a53275579 Re: Don't compile some opcodes files when bfd is 32-bit only No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 6 + bfd/elf.c | 11 +- bfd/elfxx-riscv.c | 21 + bfd/version.h | 2 +- binutils/Makefile.am | 17 +- binutils/Makefile.in | 7 + binutils/NEWS | 2 + binutils/doc/binutils.texi | 12 + binutils/elfedit.c | 56 +- binutils/testsuite/binutils-all/elfedit-6.d | 15 + binutils/testsuite/binutils-all/elfedit.exp | 1 + gas/NEWS | 2 + gas/config/tc-aarch64.c | 696 ++++- gas/config/tc-riscv.c | 4 +- gas/doc/c-aarch64.texi | 6 + gas/testsuite/gas/aarch64/sme-2-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-2-illegal.l | 27 + gas/testsuite/gas/aarch64/sme-2-illegal.s | 32 + gas/testsuite/gas/aarch64/sme-2.d | 43 + gas/testsuite/gas/aarch64/sme-2.s | 52 + gas/testsuite/gas/aarch64/sme-2a.d | 29 + gas/testsuite/gas/aarch64/sme-2a.s | 26 + gas/testsuite/gas/aarch64/sme-3-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-3-illegal.l | 11 + gas/testsuite/gas/aarch64/sme-3-illegal.s | 14 + gas/testsuite/gas/aarch64/sme-3.d | 31 + gas/testsuite/gas/aarch64/sme-3.s | 31 + gas/testsuite/gas/aarch64/sme-3a.d | 29 + gas/testsuite/gas/aarch64/sme-3a.s | 26 + gas/testsuite/gas/aarch64/sme-4-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-4-illegal.l | 29 + gas/testsuite/gas/aarch64/sme-4-illegal.s | 32 + gas/testsuite/gas/aarch64/sme-4.d | 71 + gas/testsuite/gas/aarch64/sme-4.s | 95 + gas/testsuite/gas/aarch64/sme-5-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-5-illegal.l | 51 + gas/testsuite/gas/aarch64/sme-5-illegal.s | 52 + gas/testsuite/gas/aarch64/sme-5.d | 93 + gas/testsuite/gas/aarch64/sme-5.s | 101 + gas/testsuite/gas/aarch64/sme-6-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-6-illegal.l | 45 + gas/testsuite/gas/aarch64/sme-6-illegal.s | 46 + gas/testsuite/gas/aarch64/sme-6.d | 85 + gas/testsuite/gas/aarch64/sme-6.s | 86 + gas/testsuite/gas/aarch64/sme-7-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-7-illegal.l | 33 + gas/testsuite/gas/aarch64/sme-7-illegal.s | 39 + gas/testsuite/gas/aarch64/sme-7.d | 27 + gas/testsuite/gas/aarch64/sme-7.s | 27 + gas/testsuite/gas/aarch64/sme-8-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-8-illegal.l | 7 + gas/testsuite/gas/aarch64/sme-8-illegal.s | 9 + gas/testsuite/gas/aarch64/sme-8.d | 27 + gas/testsuite/gas/aarch64/sme-8.s | 28 + gas/testsuite/gas/aarch64/sme-9-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-9-illegal.l | 83 + gas/testsuite/gas/aarch64/sme-9-illegal.s | 25 + gas/testsuite/gas/aarch64/sme-9.d | 73 + gas/testsuite/gas/aarch64/sme-9.s | 86 + gas/testsuite/gas/aarch64/sme-f64.d | 31 + gas/testsuite/gas/aarch64/sme-f64.s | 32 + gas/testsuite/gas/aarch64/sme-i64.d | 117 + gas/testsuite/gas/aarch64/sme-i64.s | 135 + gas/testsuite/gas/aarch64/sme-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-illegal.l | 95 + gas/testsuite/gas/aarch64/sme-illegal.s | 117 + gas/testsuite/gas/aarch64/sme-sysreg-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-sysreg-illegal.l | 3 + gas/testsuite/gas/aarch64/sme-sysreg-illegal.s | 3 + gas/testsuite/gas/aarch64/sme-sysreg.d | 29 + gas/testsuite/gas/aarch64/sme-sysreg.s | 23 + gas/testsuite/gas/aarch64/sme.d | 93 + gas/testsuite/gas/aarch64/sme.s | 123 + gas/testsuite/gas/riscv/zdinx.d | 41 + gas/testsuite/gas/riscv/zdinx.s | 33 + gas/testsuite/gas/riscv/zfinx.d | 39 + gas/testsuite/gas/riscv/zfinx.s | 31 + gas/testsuite/gas/riscv/zqinx.d | 43 + gas/testsuite/gas/riscv/zqinx.s | 35 + gdb/features/aarch64-core.c | 1 + gdb/features/aarch64-core.xml | 3 + gdb/s390-linux-nat.c | 2 +- include/opcode/aarch64.h | 38 +- include/opcode/riscv.h | 3 + ld/ChangeLog | 12 + ld/emultempl/pe.em | 13 +- ld/emultempl/pep.em | 7 +- ld/ldgram.y | 4 + opcodes/Makefile.am | 10 +- opcodes/Makefile.in | 10 +- opcodes/aarch64-asm-2.c | 377 +-- opcodes/aarch64-asm.c | 194 ++ opcodes/aarch64-asm.h | 6 + opcodes/aarch64-dis-2.c | 3392 ++++++++++++++---------- opcodes/aarch64-dis.c | 189 +- opcodes/aarch64-dis.h | 6 + opcodes/aarch64-opc-2.c | 30 +- opcodes/aarch64-opc.c | 202 +- opcodes/aarch64-opc.h | 41 +- opcodes/aarch64-tbl.h | 190 ++ opcodes/riscv-dis.c | 4 + opcodes/riscv-opc.c | 296 +-- 102 files changed, 6734 insertions(+), 1808 deletions(-) create mode 100644 binutils/testsuite/binutils-all/elfedit-6.d create mode 100644 gas/testsuite/gas/aarch64/sme-2-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-2-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-2-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-2.d create mode 100644 gas/testsuite/gas/aarch64/sme-2.s create mode 100644 gas/testsuite/gas/aarch64/sme-2a.d create mode 100644 gas/testsuite/gas/aarch64/sme-2a.s create mode 100644 gas/testsuite/gas/aarch64/sme-3-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-3-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-3-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-3.d create mode 100644 gas/testsuite/gas/aarch64/sme-3.s create mode 100644 gas/testsuite/gas/aarch64/sme-3a.d create mode 100644 gas/testsuite/gas/aarch64/sme-3a.s create mode 100644 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gas/testsuite/gas/aarch64/sme-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg.d create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg.s create mode 100644 gas/testsuite/gas/aarch64/sme.d create mode 100644 gas/testsuite/gas/aarch64/sme.s create mode 100644 gas/testsuite/gas/riscv/zdinx.d create mode 100644 gas/testsuite/gas/riscv/zdinx.s create mode 100644 gas/testsuite/gas/riscv/zfinx.d create mode 100644 gas/testsuite/gas/riscv/zfinx.s create mode 100644 gas/testsuite/gas/riscv/zqinx.d create mode 100644 gas/testsuite/gas/riscv/zqinx.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto updated (a78e93639 -> ef8eede57)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto in repository toolchain/ci/base-artifacts. discards a78e93639 0: update: binutils-gcc: 2 new ef8eede57 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (a78e93639) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-arm [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1536 -> 1544 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2752 bytes 04-build_abe-binutils/console.log.xz | Bin 66800 -> 66100 bytes 05-build_abe-bootstrap_lto/console.log.xz | Bin 475552 -> 474032 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 16 ++++++++-------- jenkins/manifest.sh | 12 ++++++------ 7 files changed, 14 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_ubsan updated (bf5f41e4fcc -> 1a0bce98dcf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_ubsan in repository toolchain/ci/gcc. from bf5f41e4fcc i386: Fix non-robust split condition in define_insn_and_split adds 70613000251 Add IFN_COND_FMIN/FMAX functions adds c39cb6bf835 ranger: Fix up fold_using_range::range_of_address [PR103255] adds 077425c8909 lim: Reset flow sensitive info even for pointers [PR103192] adds 4e6bf0b9dd5 Fix ICE when mixing VLAs and statement expressions [PR91038] adds dd159a4167c aarch64: Add new vector mode V8DI adds 049f0efeaa7 libcpp: Fix up handling of block comments in -fdirectives-o [...] adds c7054648238 Fix two mips target tests compromised by recent IPA work adds 054bf99841a libstdc++: Fix std::type_info::before for ARM [PR103240] adds 6afa1083c6e libstdc++: Set active member of union in std::string [PR103295] adds 5a9572e486a libstdc++: Simplify std::string constructors adds 5ea8803e65e libstdc++: Use std::construct_at in net::ip::address adds d3a9082d7ac doc: document -fimplicit-constexpr adds 2c2148d8c14 Handle folded nonconstant array bounds [PR101702] adds ef342b2d99e i386: Introduce LEGACY_SSE_REGNO_P predicate adds 74509b963ef Add very basic IPA part of modref-kill analysis adds 69a5b3ca5c8 i386: Redefine indirect_thunks_used as HARD_REG_SET. adds 425369bf306 Fix modref summary streaming adds 8e410de43ce x86: Remove "%!" before ret adds 53a643f8568 x86: Add -mharden-sls=[none|all|return|indirect-branch] adds ea9e0d6c274 Avoid pathological function redeclarations when checking ac [...] adds 1a7f2c07741 libcpp: escape non-ASCII source bytes in -Wbidi-chars= [PR103026] adds bef32d4a285 libcpp: capture and underline ranges in -Wbidi-chars= [PR103026] adds 0e4a8656e81 libstdc++: Fix author name in ChangeLog adds 32221357007 Fix PR tree-optimization/103228 and 103228: folding of (typ [...] adds 280d2838c11 Daily bump. adds a72b7a455c1 i386: add alias for f*mul_*ch intrinsics adds 7a2aa63fad0 libgomp: Fix up aligned_alloc arguments [PR102838] adds 17da2c7425e libgomp: Ensure that either gomp_team is properly aligned [ [...] adds 15f5e70cbb3 i386: Fix wrong codegen for -mrelax-cmpxchg-loop adds 8f9f5101d52 tree-optimization/103277 - do abnormal cleanup after call DSE adds e28afbb90f8 testsuite/103278 - adjust gcc.dg/tree-ssa/if-to-switch-3.c adds 206b22d021d Remove MAY_HAVE_DEBUG_MARKER_STMTS and MAY_HAVE_DEBUG_BIND_STMTS. adds edd2249b17f libsanitizer: Fix bootstrap on FreeBSD [PR102675] adds efb7c51024c c-family: Add __builtin_assoc_barrier adds 1a0bce98dcf middle-end: Fix FMA detection when inspecting gimple which [...] No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 166 +++++++++++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 17 ++ gcc/c-family/ChangeLog | 13 + gcc/c-family/c-common.c | 15 +- gcc/c-family/c-common.h | 2 +- gcc/c-family/c-gimplify.c | 4 +- gcc/c/ChangeLog | 6 + gcc/c/c-decl.c | 11 +- gcc/c/c-parser.c | 22 +- gcc/cfgexpand.c | 2 +- gcc/config/aarch64/aarch64-modes.def | 5 + gcc/config/aarch64/aarch64-sve.md | 19 +- gcc/config/aarch64/aarch64.c | 4 + gcc/config/aarch64/iterators.md | 2 +- gcc/config/i386/avx512fp16intrin.h | 39 +++ gcc/config/i386/avx512fp16vlintrin.h | 17 ++ gcc/config/i386/i386-expand.c | 7 +- gcc/config/i386/i386-opts.h | 7 + gcc/config/i386/i386.c | 59 +++-- gcc/config/i386/i386.h | 5 +- gcc/config/i386/i386.md | 2 +- gcc/config/i386/i386.opt | 20 ++ gcc/cp/constexpr.c | 8 + gcc/cp/cp-objcp-common.c | 1 + gcc/cp/cp-tree.h | 12 +- gcc/cp/parser.c | 16 +- gcc/cp/pt.c | 10 +- gcc/cp/semantics.c | 23 +- gcc/doc/extend.texi | 18 ++ gcc/doc/invoke.texi | 17 +- gcc/doc/md.texi | 4 + gcc/function.c | 2 +- gcc/gimple-array-bounds.cc | 25 -- gcc/gimple-low.c | 4 +- gcc/gimple-range-fold.cc | 16 +- gcc/gimple-ssa-backprop.c | 2 +- gcc/gimple-ssa-warn-access.cc | 33 ++- gcc/gimplify.c | 79 +++--- gcc/internal-fn.c | 4 + gcc/internal-fn.def | 2 + gcc/ipa-modref-tree.c | 46 ++++ gcc/ipa-modref-tree.h | 4 + gcc/ipa-modref.c | 129 +++++----- gcc/ipa-param-manipulation.c | 2 +- gcc/ipa-split.c | 6 +- gcc/lto-streamer-in.c | 4 +- gcc/match.pd | 8 +- gcc/optabs.def | 2 + gcc/pointer-query.cc | 30 +++ gcc/pointer-query.h | 3 + gcc/sese.c | 2 +- gcc/ssa-iterators.h | 2 +- gcc/testsuite/ChangeLog | 117 +++++++++ gcc/testsuite/c-c++-common/Wbidi-chars-ranges.c | 54 +++++ .../c-c++-common/builtin-assoc-barrier-1.c | 71 ++++++ gcc/testsuite/c-c++-common/cpp/dir-only-9.c | 13 + gcc/testsuite/gcc.c-torture/execute/pr103255.c | 41 ++++ gcc/testsuite/gcc.dg/Warray-parameter-10.c | 20 ++ gcc/testsuite/gcc.dg/Warray-parameter-11.c | 24 ++ gcc/testsuite/gcc.dg/Wstringop-overflow-82.c | 29 +++ gcc/testsuite/gcc.dg/pr103277.c | 14 ++ gcc/testsuite/gcc.dg/tree-ssa/if-to-switch-3.c | 3 +- gcc/testsuite/gcc.dg/tree-ssa/pr103228-1.c | 11 + gcc/testsuite/gcc.dg/tree-ssa/pr55177-1.c | 14 ++ gcc/testsuite/gcc.dg/vect/pr103253.c | 16 ++ gcc/testsuite/gcc.dg/vla-stexp-3.c | 11 + gcc/testsuite/gcc.dg/vla-stexp-4.c | 94 ++++++++ gcc/testsuite/gcc.dg/vla-stexp-5.c | 30 +++ gcc/testsuite/gcc.dg/vla-stexp-6.c | 94 ++++++++ gcc/testsuite/gcc.dg/vla-stexp-7.c | 44 ++++ gcc/testsuite/gcc.dg/vla-stexp-8.c | 47 ++++ gcc/testsuite/gcc.dg/vla-stexp-9.c | 53 ++++ .../gcc.target/aarch64/sve/cond_fmaxnm_5.c | 28 +++ .../gcc.target/aarch64/sve/cond_fmaxnm_5_run.c | 4 + .../gcc.target/aarch64/sve/cond_fmaxnm_6.c | 22 ++ .../gcc.target/aarch64/sve/cond_fmaxnm_6_run.c | 4 + .../gcc.target/aarch64/sve/cond_fmaxnm_7.c | 27 +++ .../gcc.target/aarch64/sve/cond_fmaxnm_7_run.c | 4 + .../gcc.target/aarch64/sve/cond_fmaxnm_8.c | 26 ++ .../gcc.target/aarch64/sve/cond_fmaxnm_8_run.c | 4 + .../gcc.target/aarch64/sve/cond_fminnm_5.c | 29 +++ .../gcc.target/aarch64/sve/cond_fminnm_5_run.c | 4 + .../gcc.target/aarch64/sve/cond_fminnm_6.c | 23 ++ .../gcc.target/aarch64/sve/cond_fminnm_6_run.c | 4 + .../gcc.target/aarch64/sve/cond_fminnm_7.c | 28 +++ .../gcc.target/aarch64/sve/cond_fminnm_7_run.c | 4 + .../gcc.target/aarch64/sve/cond_fminnm_8.c | 27 +++ .../gcc.target/aarch64/sve/cond_fminnm_8_run.c | 4 + .../gcc.target/i386/avx512fp16-vfcmulcph-1a.c | 19 +- .../gcc.target/i386/avx512fp16-vfcmulcsh-1a.c | 19 +- .../gcc.target/i386/avx512fp16-vfmulcph-1a.c | 19 +- .../gcc.target/i386/avx512fp16-vfmulcsh-1a.c | 19 +- .../gcc.target/i386/avx512fp16vl-vfcmulcph-1a.c | 20 +- .../gcc.target/i386/avx512fp16vl-vfmulcph-1a.c | 20 +- gcc/testsuite/gcc.target/i386/harden-sls-1.c | 14 ++ gcc/testsuite/gcc.target/i386/harden-sls-2.c | 14 ++ gcc/testsuite/gcc.target/i386/harden-sls-3.c | 14 ++ gcc/testsuite/gcc.target/i386/harden-sls-4.c | 16 ++ gcc/testsuite/gcc.target/i386/harden-sls-5.c | 17 ++ gcc/testsuite/gcc.target/i386/pr103069-2.c | 11 +- gcc/testsuite/gcc.target/mips/frame-header-1.c | 2 +- gcc/testsuite/gcc.target/mips/frame-header-2.c | 2 +- gcc/tree-cfg.c | 4 +- gcc/tree-inline.c | 2 +- gcc/tree-loop-distribution.c | 2 +- gcc/tree-sra.c | 2 +- gcc/tree-ssa-dce.c | 2 +- gcc/tree-ssa-dse.c | 25 +- gcc/tree-ssa-dse.h | 2 +- gcc/tree-ssa-loop-im.c | 18 +- gcc/tree-ssa-loop-ivopts.c | 2 +- gcc/tree-ssa-math-opts.c | 4 + gcc/tree-ssa-phiopt.c | 2 +- gcc/tree-ssa-reassoc.c | 2 +- gcc/tree-ssa-tail-merge.c | 2 +- gcc/tree-ssa-threadedge.c | 2 +- gcc/tree-ssa.c | 10 +- gcc/tree-ssanames.c | 2 +- gcc/tree-vect-loop-manip.c | 8 +- gcc/tree-vect-loop.c | 4 +- gcc/tree.h | 7 +- libcpp/ChangeLog | 71 ++++++ libcpp/lex.c | 266 +++++++++++++++++---- libgomp/alloc.c | 18 +- libgomp/libgomp.h | 6 +- libgomp/team.c | 5 + libgomp/work.c | 4 +- libsanitizer/sanitizer_common/Makefile.am | 1 + libsanitizer/sanitizer_common/Makefile.in | 1 + libstdc++-v3/ChangeLog | 52 +++- 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gcc/testsuite/gcc.target/aarch64/sve/cond_fmaxnm_8_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_5_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_6_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_7.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_7_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_8_run.c create mode 100644 gcc/testsuite/gcc.target/i386/harden-sls-1.c create mode 100644 gcc/testsuite/gcc.target/i386/harden-sls-2.c create mode 100644 gcc/testsuite/gcc.target/i386/harden-sls-3.c create mode 100644 gcc/testsuite/gcc.target/i386/harden-sls-4.c create mode 100644 gcc/testsuite/gcc.target/i386/harden-sls-5.c create mode 100644 libstdc++-v3/testsuite/18_support/type_info/103240.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_ubsan updated (486f9e20e0 -> 7a53275579)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_ubsan in repository toolchain/ci/binutils-gdb. from 486f9e20e0 gdb/nat/linux-osdata.c: fix build on gcc-12 (string overfow) adds 65e4a99a26 RISC-V: Support rvv extension with released version 1.0. adds c9dcc18f8d elfedit: Add --output-abiversion option to update ABIVERSION adds 1aed145ad6 Expose the BTI BTYPE more explicitly in the registers adds 0df670bbe0 [gdb/build, s390x] Fix build after gdbarch_tdep changes adds ee9e412f14 Fix the linker script parser so that it will recognise the P [...] adds ef6379e16d Set the default DLL chracteristics to 0 for Cygwin based targets. adds 57f02370a1 aarch64: [SME] Add +sme option to -march adds 971eda7341 aarch64: [SME] Add SME instructions adds 7bb5f07c8a aarch64: [SME] Add MOV and MOVA instructions adds 1cad938de5 aarch64: [SME] Add ZERO instruction adds 01a4d08220 aarch64: [SME] Add LD1x, ST1x, LDR and STR instructions adds 3dd032c5fb aarch64: [SME] Add SME mode selection and state access instructions adds 8f1bfdb448 aarch64: [SME] Add new SME system registers adds d3de086010 aarch64: [SME] SVE2 instructions added to support SME adds bd97e65f87 Automatic date update in version.in adds da05b70e56 RISC-V: Add mininal support for z[fdq]inx adds de83e5142d RISC-V: Add instructions and operand set for z[fdq]inx adds 273a32ac65 RISC-V: Add testcases for z[fdq]inx adds 2cd93e7081 Pass DEBUGINFOD_CFLAGS when compiling dwarf.c adds 7a53275579 Re: Don't compile some opcodes files when bfd is 32-bit only No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 6 + bfd/elf.c | 11 +- bfd/elfxx-riscv.c | 97 +- bfd/version.h | 2 +- binutils/Makefile.am | 17 +- binutils/Makefile.in | 7 + binutils/NEWS | 2 + binutils/doc/binutils.texi | 12 + binutils/elfedit.c | 56 +- binutils/testsuite/binutils-all/elfedit-6.d | 15 + binutils/testsuite/binutils-all/elfedit.exp | 1 + gas/NEWS | 2 + gas/config/tc-aarch64.c | 696 +++- gas/config/tc-riscv.c | 424 ++- gas/doc/c-aarch64.texi | 6 + gas/testsuite/gas/aarch64/sme-2-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-2-illegal.l | 27 + gas/testsuite/gas/aarch64/sme-2-illegal.s | 32 + gas/testsuite/gas/aarch64/sme-2.d | 43 + gas/testsuite/gas/aarch64/sme-2.s | 52 + gas/testsuite/gas/aarch64/sme-2a.d | 29 + gas/testsuite/gas/aarch64/sme-2a.s | 26 + gas/testsuite/gas/aarch64/sme-3-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-3-illegal.l | 11 + gas/testsuite/gas/aarch64/sme-3-illegal.s | 14 + gas/testsuite/gas/aarch64/sme-3.d | 31 + gas/testsuite/gas/aarch64/sme-3.s | 31 + gas/testsuite/gas/aarch64/sme-3a.d | 29 + gas/testsuite/gas/aarch64/sme-3a.s | 26 + gas/testsuite/gas/aarch64/sme-4-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-4-illegal.l | 29 + gas/testsuite/gas/aarch64/sme-4-illegal.s | 32 + gas/testsuite/gas/aarch64/sme-4.d | 71 + gas/testsuite/gas/aarch64/sme-4.s | 95 + gas/testsuite/gas/aarch64/sme-5-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-5-illegal.l | 51 + gas/testsuite/gas/aarch64/sme-5-illegal.s | 52 + gas/testsuite/gas/aarch64/sme-5.d | 93 + gas/testsuite/gas/aarch64/sme-5.s | 101 + gas/testsuite/gas/aarch64/sme-6-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-6-illegal.l | 45 + gas/testsuite/gas/aarch64/sme-6-illegal.s | 46 + gas/testsuite/gas/aarch64/sme-6.d | 85 + gas/testsuite/gas/aarch64/sme-6.s | 86 + gas/testsuite/gas/aarch64/sme-7-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-7-illegal.l | 33 + gas/testsuite/gas/aarch64/sme-7-illegal.s | 39 + gas/testsuite/gas/aarch64/sme-7.d | 27 + gas/testsuite/gas/aarch64/sme-7.s | 27 + gas/testsuite/gas/aarch64/sme-8-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-8-illegal.l | 7 + gas/testsuite/gas/aarch64/sme-8-illegal.s | 9 + gas/testsuite/gas/aarch64/sme-8.d | 27 + gas/testsuite/gas/aarch64/sme-8.s | 28 + gas/testsuite/gas/aarch64/sme-9-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-9-illegal.l | 83 + gas/testsuite/gas/aarch64/sme-9-illegal.s | 25 + gas/testsuite/gas/aarch64/sme-9.d | 73 + gas/testsuite/gas/aarch64/sme-9.s | 86 + gas/testsuite/gas/aarch64/sme-f64.d | 31 + gas/testsuite/gas/aarch64/sme-f64.s | 32 + gas/testsuite/gas/aarch64/sme-i64.d | 117 + gas/testsuite/gas/aarch64/sme-i64.s | 135 + gas/testsuite/gas/aarch64/sme-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-illegal.l | 95 + gas/testsuite/gas/aarch64/sme-illegal.s | 117 + gas/testsuite/gas/aarch64/sme-sysreg-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-sysreg-illegal.l | 3 + gas/testsuite/gas/aarch64/sme-sysreg-illegal.s | 3 + gas/testsuite/gas/aarch64/sme-sysreg.d | 29 + gas/testsuite/gas/aarch64/sme-sysreg.s | 23 + gas/testsuite/gas/aarch64/sme.d | 93 + gas/testsuite/gas/aarch64/sme.s | 123 + gas/testsuite/gas/riscv/march-imply-v.d | 6 + .../gas/riscv/priv-reg-fail-version-1p10.d | 2 +- .../gas/riscv/priv-reg-fail-version-1p11.d | 2 +- .../gas/riscv/priv-reg-fail-version-1p9p1.d | 2 +- gas/testsuite/gas/riscv/priv-reg-version-1p10.d | 7 + gas/testsuite/gas/riscv/priv-reg-version-1p11.d | 7 + gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d | 7 + gas/testsuite/gas/riscv/priv-reg.s | 9 + .../gas/riscv/vector-insns-fail-zve32xf.d | 3 + .../gas/riscv/vector-insns-fail-zve32xf.l | 225 ++ gas/testsuite/gas/riscv/vector-insns-fail-zvl.d | 3 + gas/testsuite/gas/riscv/vector-insns-fail-zvl.l | 2 + gas/testsuite/gas/riscv/vector-insns-vmsgtvx.d | 29 + gas/testsuite/gas/riscv/vector-insns-vmsgtvx.s | 9 + gas/testsuite/gas/riscv/vector-insns-zero-imm.d | 17 + gas/testsuite/gas/riscv/vector-insns-zero-imm.s | 8 + gas/testsuite/gas/riscv/vector-insns.d | 1666 ++++++++++ gas/testsuite/gas/riscv/vector-insns.s | 1883 +++++++++++ gas/testsuite/gas/riscv/zdinx.d | 41 + gas/testsuite/gas/riscv/zdinx.s | 33 + gas/testsuite/gas/riscv/zfinx.d | 39 + gas/testsuite/gas/riscv/zfinx.s | 31 + gas/testsuite/gas/riscv/zqinx.d | 43 + gas/testsuite/gas/riscv/zqinx.s | 35 + gdb/features/aarch64-core.c | 1 + gdb/features/aarch64-core.xml | 3 + gdb/s390-linux-nat.c | 2 +- include/opcode/aarch64.h | 38 +- include/opcode/riscv-opc.h | 1296 ++++++++ include/opcode/riscv.h | 61 + ld/ChangeLog | 12 + ld/emultempl/pe.em | 13 +- ld/emultempl/pep.em | 7 +- ld/ldgram.y | 4 + opcodes/Makefile.am | 10 +- opcodes/Makefile.in | 10 +- opcodes/aarch64-asm-2.c | 377 +-- opcodes/aarch64-asm.c | 194 ++ opcodes/aarch64-asm.h | 6 + opcodes/aarch64-dis-2.c | 3392 ++++++++++++-------- opcodes/aarch64-dis.c | 189 +- opcodes/aarch64-dis.h | 6 + opcodes/aarch64-opc-2.c | 30 +- opcodes/aarch64-opc.c | 202 +- opcodes/aarch64-opc.h | 41 +- opcodes/aarch64-tbl.h | 190 ++ opcodes/riscv-dis.c | 71 + opcodes/riscv-opc.c | 1122 ++++++- 121 files changed, 13349 insertions(+), 1823 deletions(-) create mode 100644 binutils/testsuite/binutils-all/elfedit-6.d create mode 100644 gas/testsuite/gas/aarch64/sme-2-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-2-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-2-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-2.d create mode 100644 gas/testsuite/gas/aarch64/sme-2.s create mode 100644 gas/testsuite/gas/aarch64/sme-2a.d create mode 100644 gas/testsuite/gas/aarch64/sme-2a.s create mode 100644 gas/testsuite/gas/aarch64/sme-3-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-3-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-3-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-3.d create mode 100644 gas/testsuite/gas/aarch64/sme-3.s create mode 100644 gas/testsuite/gas/aarch64/sme-3a.d create mode 100644 gas/testsuite/gas/aarch64/sme-3a.s create mode 100644 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gas/testsuite/gas/riscv/vector-insns-vmsgtvx.s create mode 100644 gas/testsuite/gas/riscv/vector-insns-zero-imm.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-zero-imm.s create mode 100644 gas/testsuite/gas/riscv/vector-insns.d create mode 100644 gas/testsuite/gas/riscv/vector-insns.s create mode 100644 gas/testsuite/gas/riscv/zdinx.d create mode 100644 gas/testsuite/gas/riscv/zdinx.s create mode 100644 gas/testsuite/gas/riscv/zfinx.d create mode 100644 gas/testsuite/gas/riscv/zfinx.s create mode 100644 gas/testsuite/gas/riscv/zqinx.d create mode 100644 gas/testsuite/gas/riscv/zqinx.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_ubsan updated (c4fcb82ea -> b563078bf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_ubsan in repository toolchain/ci/base-artifacts. discards c4fcb82ea 0: update: binutils-gcc: 2 new b563078bf 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (c4fcb82ea) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-aar [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1516 -> 1576 bytes 02-prepare_abe/console.log.xz | Bin 2744 -> 2792 bytes 04-build_abe-binutils/console.log.xz | Bin 53320 -> 53296 bytes 05-build_abe-bootstrap_ubsan/console.log.xz | Bin 317792 -> 315688 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 16 ++++++++-------- jenkins/manifest.sh | 12 ++++++------ 7 files changed, 14 insertions(+), 14 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (a72b7a455c1 -> 1a0bce98dcf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/gcc. from a72b7a455c1 i386: add alias for f*mul_*ch intrinsics adds 7a2aa63fad0 libgomp: Fix up aligned_alloc arguments [PR102838] adds 17da2c7425e libgomp: Ensure that either gomp_team is properly aligned [ [...] adds 15f5e70cbb3 i386: Fix wrong codegen for -mrelax-cmpxchg-loop adds 8f9f5101d52 tree-optimization/103277 - do abnormal cleanup after call DSE adds e28afbb90f8 testsuite/103278 - adjust gcc.dg/tree-ssa/if-to-switch-3.c adds 206b22d021d Remove MAY_HAVE_DEBUG_MARKER_STMTS and MAY_HAVE_DEBUG_BIND_STMTS. adds edd2249b17f libsanitizer: Fix bootstrap on FreeBSD [PR102675] adds efb7c51024c c-family: Add __builtin_assoc_barrier adds 1a0bce98dcf middle-end: Fix FMA detection when inspecting gimple which [...] No new revisions were added by this update. Summary of changes: gcc/c-family/c-common.c | 1 + gcc/c-family/c-common.h | 2 +- gcc/c-family/c-gimplify.c | 4 +- gcc/c/c-decl.c | 1 + gcc/c/c-parser.c | 22 ++++++- gcc/cfgexpand.c | 2 +- gcc/config/i386/i386-expand.c | 7 ++- gcc/cp/constexpr.c | 8 +++ gcc/cp/cp-objcp-common.c | 1 + gcc/cp/cp-tree.h | 12 ++-- gcc/cp/parser.c | 16 ++++- gcc/cp/pt.c | 10 ++- gcc/cp/semantics.c | 23 +++---- gcc/doc/extend.texi | 18 ++++++ gcc/function.c | 2 +- gcc/gimple-low.c | 4 +- gcc/gimple-ssa-backprop.c | 2 +- gcc/ipa-param-manipulation.c | 2 +- gcc/ipa-split.c | 6 +- gcc/lto-streamer-in.c | 4 +- gcc/sese.c | 2 +- gcc/ssa-iterators.h | 2 +- .../c-c++-common/builtin-assoc-barrier-1.c | 71 ++++++++++++++++++++++ gcc/testsuite/gcc.dg/pr103277.c | 14 +++++ gcc/testsuite/gcc.dg/tree-ssa/if-to-switch-3.c | 3 +- gcc/testsuite/gcc.dg/vect/pr103253.c | 16 +++++ gcc/testsuite/gcc.target/i386/pr103069-2.c | 11 ++-- gcc/tree-cfg.c | 4 +- gcc/tree-inline.c | 2 +- gcc/tree-loop-distribution.c | 2 +- gcc/tree-sra.c | 2 +- gcc/tree-ssa-dce.c | 2 +- gcc/tree-ssa-dse.c | 25 ++++++-- gcc/tree-ssa-dse.h | 2 +- gcc/tree-ssa-loop-ivopts.c | 2 +- gcc/tree-ssa-math-opts.c | 4 ++ gcc/tree-ssa-phiopt.c | 2 +- gcc/tree-ssa-reassoc.c | 2 +- gcc/tree-ssa-tail-merge.c | 2 +- gcc/tree-ssa-threadedge.c | 2 +- gcc/tree-ssa.c | 10 +-- gcc/tree-ssanames.c | 2 +- gcc/tree-vect-loop-manip.c | 8 +-- gcc/tree-vect-loop.c | 4 +- gcc/tree.h | 7 +-- libgomp/alloc.c | 18 ++++-- libgomp/libgomp.h | 6 +- libgomp/team.c | 5 ++ libgomp/work.c | 4 +- libsanitizer/sanitizer_common/Makefile.am | 1 + libsanitizer/sanitizer_common/Makefile.in | 1 + 51 files changed, 294 insertions(+), 91 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/builtin-assoc-barrier-1.c create mode 100644 gcc/testsuite/gcc.dg/pr103277.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr103253.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (bd97e65f87 -> 7a53275579)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/binutils-gdb. from bd97e65f87 Automatic date update in version.in adds da05b70e56 RISC-V: Add mininal support for z[fdq]inx adds de83e5142d RISC-V: Add instructions and operand set for z[fdq]inx adds 273a32ac65 RISC-V: Add testcases for z[fdq]inx adds 2cd93e7081 Pass DEBUGINFOD_CFLAGS when compiling dwarf.c adds 7a53275579 Re: Don't compile some opcodes files when bfd is 32-bit only No new revisions were added by this update. Summary of changes: bfd/elfxx-riscv.c | 21 +++ binutils/Makefile.am | 17 ++- binutils/Makefile.in | 7 + gas/config/tc-riscv.c | 4 +- gas/testsuite/gas/riscv/zdinx.d | 41 ++++++ gas/testsuite/gas/riscv/zdinx.s | 33 +++++ gas/testsuite/gas/riscv/zfinx.d | 39 ++++++ gas/testsuite/gas/riscv/zfinx.s | 31 +++++ gas/testsuite/gas/riscv/zqinx.d | 43 ++++++ gas/testsuite/gas/riscv/zqinx.s | 35 +++++ include/opcode/riscv.h | 3 + opcodes/Makefile.am | 10 +- opcodes/Makefile.in | 10 +- opcodes/riscv-dis.c | 4 + opcodes/riscv-opc.c | 296 ++++++++++++++++++++-------------------- 15 files changed, 433 insertions(+), 161 deletions(-) create mode 100644 gas/testsuite/gas/riscv/zdinx.d create mode 100644 gas/testsuite/gas/riscv/zdinx.s create mode 100644 gas/testsuite/gas/riscv/zfinx.d create mode 100644 gas/testsuite/gas/riscv/zfinx.s create mode 100644 gas/testsuite/gas/riscv/zqinx.d create mode 100644 gas/testsuite/gas/riscv/zqinx.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (d662c56e4 -> c4ab918fb)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/base-artifacts. discards d662c56e4 0: update: binutils-gcc: 1 new c4ab918fb 0: update: binutils-gcc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (d662c56e4) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check/master-aarch64 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1524 -> 1516 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2732 bytes 03-build_abe-binutils/console.log.xz | Bin 53452 -> 53032 bytes 04-build_abe-gcc/console.log.xz | Bin 203120 -> 202460 bytes 05-build_abe-dejagnu/console.log.xz | Bin 3820 -> 3840 bytes 06-build_abe-check_gcc/console.log.xz | Bin 2668 -> 2748 bytes 07-check_regression/console.log.xz | Bin 2992 -> 3232 bytes 07-check_regression/fails.sum | 6 +- 07-check_regression/results.compare | 31 +- 07-check_regression/results.compare2 | 53 +- 07-check_regression/results.regressions | 31 +- 08-update_baseline/console.log | 586 ++-- 08-update_baseline/fails.sum | 6 +- 08-update_baseline/results.compare | 31 +- 08-update_baseline/results.compare2 | 53 +- 08-update_baseline/results.regressions | 31 +- jenkins/manifest.sh | 12 +- sumfiles/g++.log.xz | Bin 3402028 -> 3412948 bytes sumfiles/g++.sum | 130 +- sumfiles/gcc.log.xz | Bin 2917180 -> 2949732 bytes sumfiles/gcc.sum | 4616 ++++++++++++++++--------------- sumfiles/gfortran.log.xz | Bin 877040 -> 884104 bytes sumfiles/gfortran.sum | 42 +- sumfiles/libatomic.log.xz | Bin 2164 -> 2172 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 171948 -> 171740 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2532 -> 2532 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 425660 -> 429852 bytes sumfiles/libstdc++.sum | 10 +- 31 files changed, 2897 insertions(+), 2767 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_native_build/master-aarch64 updated (65e4a99a26 -> 7a53275579)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-aarch64 in repository toolchain/ci/gdb. from 65e4a99a26 RISC-V: Support rvv extension with released version 1.0. adds c9dcc18f8d elfedit: Add --output-abiversion option to update ABIVERSION adds 1aed145ad6 Expose the BTI BTYPE more explicitly in the registers adds 0df670bbe0 [gdb/build, s390x] Fix build after gdbarch_tdep changes adds ee9e412f14 Fix the linker script parser so that it will recognise the P [...] adds ef6379e16d Set the default DLL chracteristics to 0 for Cygwin based targets. adds 57f02370a1 aarch64: [SME] Add +sme option to -march adds 971eda7341 aarch64: [SME] Add SME instructions adds 7bb5f07c8a aarch64: [SME] Add MOV and MOVA instructions adds 1cad938de5 aarch64: [SME] Add ZERO instruction adds 01a4d08220 aarch64: [SME] Add LD1x, ST1x, LDR and STR instructions adds 3dd032c5fb aarch64: [SME] Add SME mode selection and state access instructions adds 8f1bfdb448 aarch64: [SME] Add new SME system registers adds d3de086010 aarch64: [SME] SVE2 instructions added to support SME adds bd97e65f87 Automatic date update in version.in adds da05b70e56 RISC-V: Add mininal support for z[fdq]inx adds de83e5142d RISC-V: Add instructions and operand set for z[fdq]inx adds 273a32ac65 RISC-V: Add testcases for z[fdq]inx adds 2cd93e7081 Pass DEBUGINFOD_CFLAGS when compiling dwarf.c adds 7a53275579 Re: Don't compile some opcodes files when bfd is 32-bit only No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 6 + bfd/elf.c | 11 +- bfd/elfxx-riscv.c | 21 + bfd/version.h | 2 +- binutils/Makefile.am | 17 +- binutils/Makefile.in | 7 + binutils/NEWS | 2 + binutils/doc/binutils.texi | 12 + binutils/elfedit.c | 56 +- binutils/testsuite/binutils-all/elfedit-6.d | 15 + binutils/testsuite/binutils-all/elfedit.exp | 1 + gas/NEWS | 2 + gas/config/tc-aarch64.c | 696 ++++- gas/config/tc-riscv.c | 4 +- gas/doc/c-aarch64.texi | 6 + gas/testsuite/gas/aarch64/sme-2-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-2-illegal.l | 27 + gas/testsuite/gas/aarch64/sme-2-illegal.s | 32 + gas/testsuite/gas/aarch64/sme-2.d | 43 + gas/testsuite/gas/aarch64/sme-2.s | 52 + gas/testsuite/gas/aarch64/sme-2a.d | 29 + gas/testsuite/gas/aarch64/sme-2a.s | 26 + gas/testsuite/gas/aarch64/sme-3-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-3-illegal.l | 11 + gas/testsuite/gas/aarch64/sme-3-illegal.s | 14 + gas/testsuite/gas/aarch64/sme-3.d | 31 + gas/testsuite/gas/aarch64/sme-3.s | 31 + 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gas/testsuite/gas/aarch64/sme-8-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-8-illegal.l | 7 + gas/testsuite/gas/aarch64/sme-8-illegal.s | 9 + gas/testsuite/gas/aarch64/sme-8.d | 27 + gas/testsuite/gas/aarch64/sme-8.s | 28 + gas/testsuite/gas/aarch64/sme-9-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-9-illegal.l | 83 + gas/testsuite/gas/aarch64/sme-9-illegal.s | 25 + gas/testsuite/gas/aarch64/sme-9.d | 73 + gas/testsuite/gas/aarch64/sme-9.s | 86 + gas/testsuite/gas/aarch64/sme-f64.d | 31 + gas/testsuite/gas/aarch64/sme-f64.s | 32 + gas/testsuite/gas/aarch64/sme-i64.d | 117 + gas/testsuite/gas/aarch64/sme-i64.s | 135 + gas/testsuite/gas/aarch64/sme-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-illegal.l | 95 + gas/testsuite/gas/aarch64/sme-illegal.s | 117 + gas/testsuite/gas/aarch64/sme-sysreg-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-sysreg-illegal.l | 3 + gas/testsuite/gas/aarch64/sme-sysreg-illegal.s | 3 + gas/testsuite/gas/aarch64/sme-sysreg.d | 29 + gas/testsuite/gas/aarch64/sme-sysreg.s | 23 + gas/testsuite/gas/aarch64/sme.d | 93 + gas/testsuite/gas/aarch64/sme.s | 123 + gas/testsuite/gas/riscv/zdinx.d | 41 + gas/testsuite/gas/riscv/zdinx.s | 33 + gas/testsuite/gas/riscv/zfinx.d | 39 + gas/testsuite/gas/riscv/zfinx.s | 31 + gas/testsuite/gas/riscv/zqinx.d | 43 + gas/testsuite/gas/riscv/zqinx.s | 35 + gdb/features/aarch64-core.c | 1 + gdb/features/aarch64-core.xml | 3 + gdb/s390-linux-nat.c | 2 +- include/opcode/aarch64.h | 38 +- include/opcode/riscv.h | 3 + ld/ChangeLog | 12 + ld/emultempl/pe.em | 13 +- ld/emultempl/pep.em | 7 +- ld/ldgram.y | 4 + opcodes/Makefile.am | 10 +- opcodes/Makefile.in | 10 +- opcodes/aarch64-asm-2.c | 377 +-- opcodes/aarch64-asm.c | 194 ++ opcodes/aarch64-asm.h | 6 + opcodes/aarch64-dis-2.c | 3392 ++++++++++++++---------- opcodes/aarch64-dis.c | 189 +- opcodes/aarch64-dis.h | 6 + opcodes/aarch64-opc-2.c | 30 +- opcodes/aarch64-opc.c | 202 +- opcodes/aarch64-opc.h | 41 +- opcodes/aarch64-tbl.h | 190 ++ opcodes/riscv-dis.c | 4 + opcodes/riscv-opc.c | 296 +-- 102 files changed, 6734 insertions(+), 1808 deletions(-) create mode 100644 binutils/testsuite/binutils-all/elfedit-6.d create mode 100644 gas/testsuite/gas/aarch64/sme-2-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-2-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-2-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-2.d create mode 100644 gas/testsuite/gas/aarch64/sme-2.s create mode 100644 gas/testsuite/gas/aarch64/sme-2a.d create mode 100644 gas/testsuite/gas/aarch64/sme-2a.s create mode 100644 gas/testsuite/gas/aarch64/sme-3-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-3-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-3-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-3.d create mode 100644 gas/testsuite/gas/aarch64/sme-3.s create mode 100644 gas/testsuite/gas/aarch64/sme-3a.d create mode 100644 gas/testsuite/gas/aarch64/sme-3a.s create mode 100644 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gas/testsuite/gas/aarch64/sme-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg.d create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg.s create mode 100644 gas/testsuite/gas/aarch64/sme.d create mode 100644 gas/testsuite/gas/aarch64/sme.s create mode 100644 gas/testsuite/gas/riscv/zdinx.d create mode 100644 gas/testsuite/gas/riscv/zdinx.s create mode 100644 gas/testsuite/gas/riscv/zfinx.d create mode 100644 gas/testsuite/gas/riscv/zfinx.s create mode 100644 gas/testsuite/gas/riscv/zqinx.d create mode 100644 gas/testsuite/gas/riscv/zqinx.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_gnu_native_build/master-aarch64 updated (f1d333b5bf -> bdeb7a8fa9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-aarch64 in repository toolchain/ci/glibc. from f1d333b5bf elf: Introduce GLRO (dl_libc_freeres), called from __libc_freeres adds f1bcfde3a7 malloc: Fix malloc debug for 2.35 onwards adds bdeb7a8fa9 Add PF_MCTP, AF_MCTP from Linux 5.15 to bits/socket.h No new revisions were added by this update. Summary of changes: malloc/malloc-debug.c | 2 -- sysdeps/unix/sysv/linux/bits/socket.h | 4 +++- 2 files changed, 3 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

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