Tcwg-commits November 2021

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16233 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_build/master-arm updated (0038f856b -> 3ecf5afcf)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_build/master-arm in repository toolchain/ci/base-artifacts. discards 0038f856b 0: update: binutils-gcc-linux-glibc-gdb: 6 new 3ecf5afcf 0: update: binutils-gcc-linux-glibc-gdb: 6 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (0038f856b) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_native_build/master- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1524 -> 1512 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2768 bytes 04-build_abe-binutils/console.log.xz | Bin 66304 -> 67184 bytes 05-build_abe-gcc/console.log.xz | Bin 225724 -> 226192 bytes 06-clean_sysroot/console.log.xz | Bin 316 -> 316 bytes 07-build_abe-linux/console.log.xz | Bin 8796 -> 8868 bytes 08-build_abe-glibc/console.log.xz | Bin 228224 -> 230868 bytes 09-build_abe-gdb/console.log.xz | Bin 53908 -> 54240 bytes 10-check_regression/console.log.xz | Bin 416 -> 416 bytes 11-update_baseline/console.log | 77 ++++------------------------------- jenkins/manifest.sh | 24 +++++------ 11 files changed, 20 insertions(+), 81 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[newlib] branch topic/pipe updated (efcfc317f -> f5a334d0a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch topic/pipe in repository newlib. from efcfc317f Cygwin: Document that the pipe_byte option is now set by default new f5a334d0a Cygwin: pipe: Restore blocking mode for cygwin process at startup. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: winsup/cygwin/dtable.cc | 3 +++ 1 file changed, 3 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[newlib] branch master updated (5badb8aa0 -> b959a5432)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository newlib. from 5badb8aa0 Cygwin: pipe: Handle STATUS_PENDING even for nonblocking mode. new b959a5432 Cygwin: Correct the release notes 3.3.3. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: winsup/cygwin/release/3.3.3 | 4 ++++ 1 file changed, 4 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[newlib] branch cygwin-3_3-branch updated (6ac73b36c -> d0276bc60)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch cygwin-3_3-branch in repository newlib. from 6ac73b36c Cygwin: pipe: Handle STATUS_PENDING even for nonblocking mode. new d0276bc60 Cygwin: Correct the release notes 3.3.3. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: winsup/cygwin/release/3.3.3 | 4 ++++ 1 file changed, 4 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[gcc] branch master updated (5ea8803e65e -> d3a9082d7ac)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 5ea8803e65e libstdc++: Use std::construct_at in net::ip::address new d3a9082d7ac doc: document -fimplicit-constexpr The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/doc/invoke.texi | 7 +++++++ 1 file changed, 7 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/qemu] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (8d5fcb1990 -> 3bb87484e7)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/qemu. from 8d5fcb1990 Merge tag 'python-pull-request' of https://gitlab.com/jsnow/ [...] adds edcc4e4090 target/riscv: machine: Sort the .subsections adds c94c239496 meson.build: Merge riscv32 and riscv64 cpu family adds 52cebbfc13 Merge tag 'pull-riscv-to-apply-20211117-1' of github.com:ali [...] adds fe644e8ebb target/s390x/cpu.h: Remove unused SIGP_MODE defines adds 0c8c45140c docs: rSTify the "TrivialPatches" wiki adds 0ff0dcf6b5 docs: rSTify the "SubmitAPullRequest" wiki adds 9f73de8df0 docs: rSTify the "SubmitAPatch" wiki adds 418ce0201f Revert "device-crash-test: Ignore errors about a bus not bei [...] adds d06f3bf922 gitlab-ci/cirrus: Increase timeout to 80 minutes adds 3bb87484e7 Merge tag 'pull-request-2021-11-17' of https://gitlab.com/th [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/cirrus.yml | 1 + docs/devel/index.rst | 3 + docs/devel/submitting-a-patch.rst | 456 +++++++++++++++++++++++++++++++ docs/devel/submitting-a-pull-request.rst | 76 ++++++ docs/devel/trivial-patches.rst | 50 ++++ meson.build | 6 + scripts/device-crash-test | 1 - target/riscv/machine.c | 92 +++---- target/s390x/cpu.h | 5 - 9 files changed, 638 insertions(+), 52 deletions(-) create mode 100644 docs/devel/submitting-a-patch.rst create mode 100644 docs/devel/submitting-a-pull-request.rst create mode 100644 docs/devel/trivial-patches.rst -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (486f9e20e0 -> 0df670bbe0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/gdb. from 486f9e20e0 gdb/nat/linux-osdata.c: fix build on gcc-12 (string overfow) adds 65e4a99a26 RISC-V: Support rvv extension with released version 1.0. adds c9dcc18f8d elfedit: Add --output-abiversion option to update ABIVERSION new 1aed145ad6 Expose the BTI BTYPE more explicitly in the registers new 0df670bbe0 [gdb/build, s390x] Fix build after gdbarch_tdep changes The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bfd/elfxx-riscv.c | 76 +- binutils/NEWS | 2 + binutils/doc/binutils.texi | 12 + binutils/elfedit.c | 56 +- binutils/testsuite/binutils-all/elfedit-6.d | 15 + binutils/testsuite/binutils-all/elfedit.exp | 1 + gas/config/tc-riscv.c | 420 ++++- gas/testsuite/gas/riscv/march-imply-v.d | 6 + .../gas/riscv/priv-reg-fail-version-1p10.d | 2 +- .../gas/riscv/priv-reg-fail-version-1p11.d | 2 +- .../gas/riscv/priv-reg-fail-version-1p9p1.d | 2 +- gas/testsuite/gas/riscv/priv-reg-version-1p10.d | 7 + gas/testsuite/gas/riscv/priv-reg-version-1p11.d | 7 + gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d | 7 + gas/testsuite/gas/riscv/priv-reg.s | 9 + .../gas/riscv/vector-insns-fail-zve32xf.d | 3 + .../gas/riscv/vector-insns-fail-zve32xf.l | 225 +++ gas/testsuite/gas/riscv/vector-insns-fail-zvl.d | 3 + gas/testsuite/gas/riscv/vector-insns-fail-zvl.l | 2 + gas/testsuite/gas/riscv/vector-insns-vmsgtvx.d | 29 + gas/testsuite/gas/riscv/vector-insns-vmsgtvx.s | 9 + gas/testsuite/gas/riscv/vector-insns-zero-imm.d | 17 + gas/testsuite/gas/riscv/vector-insns-zero-imm.s | 8 + gas/testsuite/gas/riscv/vector-insns.d | 1666 +++++++++++++++++ gas/testsuite/gas/riscv/vector-insns.s | 1883 ++++++++++++++++++++ gdb/features/aarch64-core.c | 1 + gdb/features/aarch64-core.xml | 3 + gdb/s390-linux-nat.c | 2 +- include/opcode/riscv-opc.h | 1296 ++++++++++++++ include/opcode/riscv.h | 58 + opcodes/riscv-dis.c | 67 + opcodes/riscv-opc.c | 826 +++++++++ 32 files changed, 6703 insertions(+), 19 deletions(-) create mode 100644 binutils/testsuite/binutils-all/elfedit-6.d create mode 100644 gas/testsuite/gas/riscv/march-imply-v.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-fail-zve32xf.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-fail-zve32xf.l create mode 100644 gas/testsuite/gas/riscv/vector-insns-fail-zvl.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-fail-zvl.l create mode 100644 gas/testsuite/gas/riscv/vector-insns-vmsgtvx.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-vmsgtvx.s create mode 100644 gas/testsuite/gas/riscv/vector-insns-zero-imm.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-zero-imm.s create mode 100644 gas/testsuite/gas/riscv/vector-insns.d create mode 100644 gas/testsuite/gas/riscv/vector-insns.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (a43c0b5483 -> bdeb7a8fa9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/glibc. from a43c0b5483 x86-64: Create microbenchmark infrastructure for libmvec adds 8bd336a00a nptl: Extract <bits/atomic_wide_counter.h> from pthread_cond [...] adds f1d333b5bf elf: Introduce GLRO (dl_libc_freeres), called from __libc_freeres adds f1bcfde3a7 malloc: Fix malloc debug for 2.35 onwards new bdeb7a8fa9 Add PF_MCTP, AF_MCTP from Linux 5.15 to bits/socket.h The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../atomic_wide_counter.h | 30 +-- elf/Makefile | 2 +- elf/{dl-diagnostics-cpu.c => dl-libc_freeres.c} | 6 +- elf/rtld.c | 1 + include/atomic_wide_counter.h | 89 +++++++++ include/bits/atomic_wide_counter.h | 1 + malloc/malloc-debug.c | 2 - malloc/set-freeres.c | 5 + misc/Makefile | 3 +- misc/atomic_wide_counter.c | 127 +++++++++++++ nptl/Makefile | 13 +- nptl/pthread_cond_common.c | 204 ++++----------------- nptl/tst-cond22.c | 14 +- sysdeps/generic/ldsodefs.h | 7 + sysdeps/nptl/bits/thread-shared-types.h | 22 +-- sysdeps/unix/sysv/linux/bits/socket.h | 4 +- 16 files changed, 310 insertions(+), 220 deletions(-) copy elf/tst-nodelete-dlclose.c => bits/atomic_wide_counter.h (61%) copy elf/{dl-diagnostics-cpu.c => dl-libc_freeres.c} (87%) create mode 100644 include/atomic_wide_counter.h create mode 100644 include/bits/atomic_wide_counter.h create mode 100644 misc/atomic_wide_counter.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (1a15a91a001 -> dd159a4167c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/gcc. from 1a15a91a001 Fix PR 103288, ICE after PHI-OPT, move an assigment when st [...] adds bf5f41e4fcc i386: Fix non-robust split condition in define_insn_and_split adds 70613000251 Add IFN_COND_FMIN/FMAX functions adds c39cb6bf835 ranger: Fix up fold_using_range::range_of_address [PR103255] adds 077425c8909 lim: Reset flow sensitive info even for pointers [PR103192] adds 4e6bf0b9dd5 Fix ICE when mixing VLAs and statement expressions [PR91038] adds dd159a4167c aarch64: Add new vector mode V8DI No new revisions were added by this update. Summary of changes: gcc/c-family/c-common.c | 14 +++- gcc/config/aarch64/aarch64-modes.def | 5 ++ gcc/config/aarch64/aarch64-sve.md | 19 ++++- gcc/config/aarch64/aarch64.c | 4 + gcc/config/aarch64/iterators.md | 2 +- gcc/config/i386/i386.md | 20 ++--- gcc/doc/md.texi | 4 + gcc/gimple-range-fold.cc | 16 ++-- gcc/gimplify.c | 79 +++++++++--------- gcc/internal-fn.c | 4 + gcc/internal-fn.def | 2 + gcc/match.pd | 2 + gcc/optabs.def | 2 + gcc/testsuite/gcc.c-torture/execute/pr103255.c | 41 ++++++++++ gcc/testsuite/gcc.dg/vla-stexp-3.c | 11 +++ gcc/testsuite/gcc.dg/vla-stexp-4.c | 94 ++++++++++++++++++++++ gcc/testsuite/gcc.dg/vla-stexp-5.c | 30 +++++++ gcc/testsuite/gcc.dg/vla-stexp-6.c | 94 ++++++++++++++++++++++ gcc/testsuite/gcc.dg/vla-stexp-7.c | 44 ++++++++++ gcc/testsuite/gcc.dg/vla-stexp-8.c | 47 +++++++++++ gcc/testsuite/gcc.dg/vla-stexp-9.c | 53 ++++++++++++ .../gcc.target/aarch64/sve/cond_fmaxnm_5.c | 28 +++++++ .../gcc.target/aarch64/sve/cond_fmaxnm_5_run.c | 4 + .../gcc.target/aarch64/sve/cond_fmaxnm_6.c | 22 +++++ .../gcc.target/aarch64/sve/cond_fmaxnm_6_run.c | 4 + .../gcc.target/aarch64/sve/cond_fmaxnm_7.c | 27 +++++++ .../gcc.target/aarch64/sve/cond_fmaxnm_7_run.c | 4 + .../gcc.target/aarch64/sve/cond_fmaxnm_8.c | 26 ++++++ .../gcc.target/aarch64/sve/cond_fmaxnm_8_run.c | 4 + .../gcc.target/aarch64/sve/cond_fminnm_5.c | 29 +++++++ .../gcc.target/aarch64/sve/cond_fminnm_5_run.c | 4 + .../gcc.target/aarch64/sve/cond_fminnm_6.c | 23 ++++++ .../gcc.target/aarch64/sve/cond_fminnm_6_run.c | 4 + .../gcc.target/aarch64/sve/cond_fminnm_7.c | 28 +++++++ .../gcc.target/aarch64/sve/cond_fminnm_7_run.c | 4 + .../gcc.target/aarch64/sve/cond_fminnm_8.c | 27 +++++++ .../gcc.target/aarch64/sve/cond_fminnm_8_run.c | 4 + gcc/tree-ssa-loop-im.c | 18 ++--- 38 files changed, 773 insertions(+), 74 deletions(-) create mode 100644 gcc/testsuite/gcc.c-torture/execute/pr103255.c create mode 100644 gcc/testsuite/gcc.dg/vla-stexp-3.c create mode 100644 gcc/testsuite/gcc.dg/vla-stexp-4.c create mode 100644 gcc/testsuite/gcc.dg/vla-stexp-5.c create mode 100644 gcc/testsuite/gcc.dg/vla-stexp-6.c create mode 100644 gcc/testsuite/gcc.dg/vla-stexp-7.c create mode 100644 gcc/testsuite/gcc.dg/vla-stexp-8.c create mode 100644 gcc/testsuite/gcc.dg/vla-stexp-9.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fmaxnm_5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fmaxnm_5_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fmaxnm_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fmaxnm_6_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fmaxnm_7.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fmaxnm_7_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fmaxnm_8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fmaxnm_8_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_5.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_5_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_6.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_6_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_7.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_7_run.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_8.c create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/cond_fminnm_8_run.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 updated (486f9e20e0 -> 0df670bbe0)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/binutils-gdb. from 486f9e20e0 gdb/nat/linux-osdata.c: fix build on gcc-12 (string overfow) adds 65e4a99a26 RISC-V: Support rvv extension with released version 1.0. adds c9dcc18f8d elfedit: Add --output-abiversion option to update ABIVERSION adds 1aed145ad6 Expose the BTI BTYPE more explicitly in the registers adds 0df670bbe0 [gdb/build, s390x] Fix build after gdbarch_tdep changes No new revisions were added by this update. Summary of changes: bfd/elfxx-riscv.c | 76 +- binutils/NEWS | 2 + binutils/doc/binutils.texi | 12 + binutils/elfedit.c | 56 +- binutils/testsuite/binutils-all/elfedit-6.d | 15 + binutils/testsuite/binutils-all/elfedit.exp | 1 + gas/config/tc-riscv.c | 420 ++++- gas/testsuite/gas/riscv/march-imply-v.d | 6 + .../gas/riscv/priv-reg-fail-version-1p10.d | 2 +- .../gas/riscv/priv-reg-fail-version-1p11.d | 2 +- .../gas/riscv/priv-reg-fail-version-1p9p1.d | 2 +- gas/testsuite/gas/riscv/priv-reg-version-1p10.d | 7 + gas/testsuite/gas/riscv/priv-reg-version-1p11.d | 7 + gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d | 7 + gas/testsuite/gas/riscv/priv-reg.s | 9 + .../gas/riscv/vector-insns-fail-zve32xf.d | 3 + .../gas/riscv/vector-insns-fail-zve32xf.l | 225 +++ gas/testsuite/gas/riscv/vector-insns-fail-zvl.d | 3 + gas/testsuite/gas/riscv/vector-insns-fail-zvl.l | 2 + gas/testsuite/gas/riscv/vector-insns-vmsgtvx.d | 29 + gas/testsuite/gas/riscv/vector-insns-vmsgtvx.s | 9 + gas/testsuite/gas/riscv/vector-insns-zero-imm.d | 17 + gas/testsuite/gas/riscv/vector-insns-zero-imm.s | 8 + gas/testsuite/gas/riscv/vector-insns.d | 1666 +++++++++++++++++ gas/testsuite/gas/riscv/vector-insns.s | 1883 ++++++++++++++++++++ gdb/features/aarch64-core.c | 1 + gdb/features/aarch64-core.xml | 3 + gdb/s390-linux-nat.c | 2 +- include/opcode/riscv-opc.h | 1296 ++++++++++++++ include/opcode/riscv.h | 58 + opcodes/riscv-dis.c | 67 + opcodes/riscv-opc.c | 826 +++++++++ 32 files changed, 6703 insertions(+), 19 deletions(-) create mode 100644 binutils/testsuite/binutils-all/elfedit-6.d create mode 100644 gas/testsuite/gas/riscv/march-imply-v.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-fail-zve32xf.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-fail-zve32xf.l create mode 100644 gas/testsuite/gas/riscv/vector-insns-fail-zvl.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-fail-zvl.l create mode 100644 gas/testsuite/gas/riscv/vector-insns-vmsgtvx.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-vmsgtvx.s create mode 100644 gas/testsuite/gas/riscv/vector-insns-zero-imm.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-zero-imm.s create mode 100644 gas/testsuite/gas/riscv/vector-insns.d create mode 100644 gas/testsuite/gas/riscv/vector-insns.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

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Tcwg-commits November 2021