Tcwg-commits June 2021

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[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (6f398e533f -> fbe7919ece)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/qemu. from 6f398e533f Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-t [...] adds 81c4edc39e tests/tcg: add a multiarch signals test to stress test signa [...] adds 63de93530f meson.build: fix cosmetics of compiler display adds 31fa83bd2b tests/tcg/configure.sh: tweak quoting of target_compiler adds e2ff831462 tests/acceptance: tag various arm tests as TCG only adds b114a0b943 gitlab: work harder to avoid false positives in checkpatch adds e2d3017809 gitlab-ci: Split gprof-gcov job adds 7bb17a9263 tests/vm: expose --source-path to scripts to find extra files adds 72205289a0 scripts/checkpatch.pl: process .c.inc and .h.inc files as C source adds a35947f15c Merge remote-tracking branch 'remotes/stsquad/tags/pull-test [...] adds 0d42cd5c1d target/riscv: Do not include 'pmp.h' in user emulation adds d84451d38e i386/kvm: The value passed to strerror should be positive adds 585190902a misc: Correct relative include path adds 180d4ef3ad linux-user/syscall: Constify bitmask_transtbl fcntl/mmap fla [...] adds d7878875ae docs: fix broken reference adds dd69218949 target/nios2: fix page-fit instruction count adds 69b66e4977 hw/display/macfb: Classify the "nubus-macfb" as display device adds 8daec64be9 target/hppa: Remove unused 'memory.h' header adds 6397856019 target/mips: Fix 'Uncoditional' typo adds eeae5466c4 scripts/oss-fuzz: Fix typo in documentation adds df77d45a51 vhost-vdpa: Remove redundant declaration of address_space_memory adds 33ba8b0adc Merge remote-tracking branch 'remotes/vivier2/tags/trivial-b [...] adds cb53b283b5 hw/riscv: sifive_u: Switch to use qemu_fdt_setprop_string_ar [...] adds 2cc04550ac hw/riscv: virt: Switch to use qemu_fdt_setprop_string_array( [...] adds 7cfbb17f02 hw/riscv: Support the official CLINT DT bindings adds 60bb5407f0 hw/riscv: Support the official PLIC DT bindings adds 3ede8967c8 docs/system/riscv: Correct the indentation level of supporte [...] adds 0147af69ab docs/system/riscv: sifive_u: Document '-dtb' usage adds a0acd0a175 hw/riscv: Use macros for BIOS image names adds 143897b501 hw/riscv: microchip_pfsoc: Support direct kernel boot adds 719f0f603c target/riscv: fix wfi exception behavior adds 6debd840c8 docs/system: Move the RISC-V -bios information to removed adds bbf3d1b48f target/riscv: Do not include 'pmp.h' in user emulation adds 9a575d33fb target/riscv: Remove unnecessary riscv_*_names[] declaration adds a722701dd3 target/riscv: Dump CSR mscratch/sscratch/satp adds 787a4baf91 target/riscv/pmp: Add assert for ePMP operations adds eee2d61e20 target/riscv: Pass the same value to oprsz and maxsz. adds 00718208c1 target/riscv: reformat @sh format encoding for B-extension adds 438240185a target/riscv: rvb: count leading/trailing zeros adds 1e16310ca1 target/riscv: rvb: count bits set adds 0bcdb686e5 target/riscv: rvb: logic-with-negate adds 6ef5843182 target/riscv: rvb: pack two words into one register adds 82655d8115 target/riscv: rvb: min/max instructions adds 2a81973829 target/riscv: rvb: sign-extend instructions adds 981d3568df target/riscv: add gen_shifti() and gen_shiftiw() helper functions adds 23cd17773b target/riscv: rvb: single-bit instructions adds 91d8fc6768 target/riscv: rvb: shift ones adds e58529a8d0 target/riscv: rvb: rotate (left/right) adds 831ec7f3d1 target/riscv: rvb: generalized reverse adds c24f0422fb target/riscv: rvb: generalized or-combine adds 920a1f9955 target/riscv: rvb: address calculation adds 3a4a43e4e2 target/riscv: rvb: add/shift with prefix zero-extend adds d52e94081e target/riscv: rvb: support and turn on B-extension from comm [...] adds d2c1a177b1 target/riscv: rvb: add b-ext version cpu option adds a4716fd8d7 Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] adds 7de2e85653 yank: Unregister function when using TLS migration adds 6b8c2eb5c6 migration/rdma: Fix cm event use after free adds d80f54ce53 channel-socket: Only set CLOEXEC if we have space for fds adds 5b6116d326 io/net-listener: Call the notifier during finalize adds 1df6ddb43b migration: Add cleanup hook for inwards migration adds a59136f3b1 migration/socket: Close the listener at the end adds 8bd1078aeb sockets: Support multipath TCP adds 7afa08cd8f migration/dirtyrate: make sample page count configurable adds a4a571d978 hmp: Add "calc_dirty_rate" and "info dirty_rate" cmds adds 7fe7fae8b4 Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/p [...] adds d60c75d28f vhost-vdpa: skip ram device from the IOTLB mapping adds d0416d487b vhost-vdpa: map virtqueue notification area if possible adds c33f23a419 vhost-vdpa: don't initialize backend_features adds 1b03117211 vhost-vdpa: remove the unused vhost_vdpa_get_acked_features() adds 48f596c5a7 netdev: add more commands to preconfig mode adds f1ff9c4377 Remove some duplicate trace code. adds 229620d52e Fix the qemu crash when guest shutdown during checkpoint adds 7c2eae9a77 Optimize the function of filter_send adds 3ba024457f Remove migrate_set_block_enabled in checkpoint adds 9b492719dd Add a function named packet_new_nocopy for COLO. adds 0c7af1a778 Add the function of colo_compare_cleanup adds 5a2d9929ac Fixed calculation error of pkt->header_size in fill_pkt_tcp_info() adds 894fc4fd67 Merge remote-tracking branch 'remotes/jasowang/tags/net-pull [...] new 104cc2c085 meson: Split out tcg/meson.build new c634754172 meson: Split out fpu/meson.build new b0a0794a0f tcg: Re-order tcg_region_init vs tcg_prologue_init new bd35f2ceac tcg: Remove error return from tcg_region_initial_alloc__locked new 0430ca00f5 tcg: Split out tcg_region_initial_alloc new bf042e8e52 tcg: Split out tcg_region_prologue_set new 5ff7258cc6 tcg: Split out region.c new 324b9d462e accel/tcg: Inline cpu_gen_init new c46184a90a accel/tcg: Move alloc_code_gen_buffer to tcg/region.c new 7109ef15c5 accel/tcg: Rename tcg_init to tcg_init_machine new a76aabd37b tcg: Create tcg_init new fa79cde6ed accel/tcg: Merge tcg_exec_init into tcg_init_machine new efba8ae9f6 accel/tcg: Use MiB in tcg_init_machine new 43b972b7eb accel/tcg: Pass down max_cpus to tcg_init new 0e2d61cf29 tcg: Introduce tcg_max_ctxs new 26a75d12d3 tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h new 77bd7fd125 tcg: Replace region.end with region.total_size new c2471ca0de tcg: Rename region.start to region.after_prologue new 01afda9919 tcg: Tidy tcg_n_regions new a4df1b2d19 tcg: Tidy split_cross_256mb new 47d590df34 tcg: Move in_code_gen_buffer and tests to region.c new 032a4b1ba0 tcg: Allocate code_gen_buffer into struct tcg_region_state new 7be9ebcf92 tcg: Return the map protection from alloc_code_gen_buffer new cd9ea992e9 tcg: Sink qemu_madvise call to common code new d7107fc00a util/osdep: Add qemu_mprotect_rw new ba22783d6e tcg: Round the tb_size default from qemu_get_host_physmem new 22c6a9938f tcg: Merge buffer protection and guard page protection new b7da02dad0 tcg: When allocating for !splitwx, begin with PROT_NONE new 42eb6dfcf1 tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/ new a80cdd3183 tcg: Introduce tcg_remove_ops_after new a14b3ad11a tcg: Fix documentation for tcg_constant_* vs tcg_temp_free_* new c372565d08 tcg/arm: Fix tcg_out_op function signature new f291f45f4e softfloat: Fix tp init in float32_exp2 new a5a8b84772 docs/devel: Explain in more detail the TB chaining mechanisms new fbe7919ece Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-t [...] The 35 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .gitlab-ci.d/buildtest.yml | 17 +- .gitlab-ci.d/static_checks.yml | 6 +- accel/tcg/internal.h | 2 + accel/tcg/tcg-all.c | 32 +- accel/tcg/translate-all.c | 439 +---------- bsd-user/main.c | 3 +- docs/devel/tcg.rst | 103 ++- docs/system/deprecated.rst | 19 - docs/system/removed-features.rst | 5 + docs/system/riscv/microchip-icicle-kit.rst | 50 +- docs/system/riscv/sifive_u.rst | 77 +- docs/system/target-riscv.rst | 13 +- fpu/meson.build | 1 + fpu/softfloat.c | 2 +- hmp-commands-info.hx | 13 + hmp-commands.hx | 16 + hw/display/macfb.c | 1 + hw/gpio/aspeed_gpio.c | 2 +- hw/i386/acpi-common.h | 6 +- hw/i386/kvm/apic.c | 2 +- hw/i386/kvm/clock.c | 4 +- hw/i386/kvm/i8254.c | 10 +- hw/i386/kvm/i8259.c | 4 +- hw/i386/kvm/ioapic.c | 4 +- hw/intc/ppc-uic.c | 2 +- hw/riscv/microchip_pfsoc.c | 81 +- hw/riscv/sifive_u.c | 24 +- hw/riscv/spike.c | 12 +- hw/riscv/virt.c | 25 +- hw/virtio/vhost-vdpa.c | 101 ++- include/exec/memory.h | 2 +- include/hw/riscv/boot.h | 5 + include/hw/virtio/vhost-vdpa.h | 7 +- include/monitor/hmp.h | 2 + include/monitor/monitor.h | 2 +- include/net/vhost-vdpa.h | 1 - include/qemu/osdep.h | 1 + include/sysemu/tcg.h | 2 - include/tcg/tcg.h | 28 +- io/channel-socket.c | 8 +- io/dns-resolver.c | 4 + io/net-listener.c | 3 + linux-user/main.c | 1 - linux-user/syscall.c | 4 +- meson.build | 20 +- migration/channel.c | 26 +- migration/colo.c | 6 - migration/dirtyrate.c | 78 +- migration/dirtyrate.h | 8 +- migration/migration.c | 7 + migration/migration.h | 4 + migration/multifd.c | 8 +- migration/qemu-file-channel.c | 4 +- migration/rdma.c | 11 +- migration/socket.c | 24 +- net/colo-compare.c | 25 +- net/colo-compare.h | 1 + net/colo.c | 25 +- net/colo.h | 1 + net/filter-mirror.c | 8 +- net/filter-rewriter.c | 3 +- net/net.c | 4 + net/vhost-vdpa.c | 9 - qapi/migration.json | 15 +- qapi/net.json | 6 +- qapi/sockets.json | 5 +- scripts/checkpatch.pl | 4 +- scripts/oss-fuzz/reorder_fuzzer_qtest_trace.py | 2 +- softmmu/runstate.c | 1 + target/hppa/cpu.h | 1 - target/mips/tcg/translate.c | 6 +- target/nios2/translate.c | 2 +- target/riscv/bitmanip_helper.c | 90 +++ target/riscv/cpu.c | 38 +- target/riscv/cpu.h | 9 +- target/riscv/cpu_bits.h | 1 + target/riscv/helper.h | 6 + target/riscv/insn32.decode | 87 ++- target/riscv/insn_trans/trans_rvb.c.inc | 438 +++++++++++ target/riscv/insn_trans/trans_rvi.c.inc | 54 +- target/riscv/insn_trans/trans_rvv.c.inc | 89 ++- target/riscv/meson.build | 1 + target/riscv/op_helper.c | 11 +- target/riscv/pmp.c | 4 + target/riscv/translate.c | 306 ++++++++ tcg/aarch64/tcg-target.h | 1 + tcg/arm/tcg-target.c.inc | 3 +- tcg/arm/tcg-target.h | 1 + tcg/i386/tcg-target.h | 2 + tcg/meson.build | 14 + tcg/mips/tcg-target.h | 6 + tcg/ppc/tcg-target.h | 2 + tcg/region.c | 999 +++++++++++++++++++++++++ tcg/riscv/tcg-target.h | 1 + tcg/s390/tcg-target.h | 3 + tcg/sparc/tcg-target.h | 1 + tcg/{tcg-common.c => tcg-internal.h} | 26 +- tcg/tcg.c | 651 ++-------------- tcg/tci/tcg-target.h | 1 + tests/acceptance/boot_linux_console.py | 18 + tests/tcg/configure.sh | 6 +- tests/tcg/multiarch/Makefile.target | 2 + tests/tcg/multiarch/signals.c | 149 ++++ tests/vm/Makefile.include | 1 + tests/vm/basevm.py | 4 + tests/vm/centos.aarch64 | 2 +- util/osdep.c | 9 + util/qemu-sockets.c | 23 + 108 files changed, 3095 insertions(+), 1424 deletions(-) create mode 100644 fpu/meson.build create mode 100644 target/riscv/bitmanip_helper.c create mode 100644 target/riscv/insn_trans/trans_rvb.c.inc create mode 100644 tcg/meson.build create mode 100644 tcg/region.c copy tcg/{tcg-common.c => tcg-internal.h} (69%) create mode 100644 tests/tcg/multiarch/signals.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (72ed20edf921 -> da136c16fa65)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/linux. from 72ed20edf921 Merge v5.12.9 adds a31a19948c94 mt76: mt7921: add rcu section in mt7921_mcu_tx_rate_report adds 6919e8a24e70 mt76: mt7921: fix possible AOOB issue in mt7921_mcu_tx_rat [...] adds 068c4db1eed3 mt76: mt76x0e: fix device hang during suspend/resume adds 9cad2c70e408 hwmon: (dell-smm-hwmon) Fix index values adds 62c52507cddc hwmon: (pmbus/isl68137) remove READ_TEMPERATURE_3 for RAA228228 adds dda954b96c90 netfilter: conntrack: unregister ipv4 sockopts on error unwind adds 8a7e8b4e5631 efi/fdt: fix panic when no valid fdt found adds 68e34413ba72 efi: Allow EFI_MEMORY_XP and EFI_MEMORY_RO both to be cleared adds e786eacbf323 efi/libstub: prevent read overflow in find_file_option() adds 99702e4d6e9b efi: cper: fix snprintf() use in cper_dimm_err_location() adds 2d5e0f9d5b8d vfio/pci: Fix error return code in vfio_ecap_init() adds 1752346dfd97 vfio/pci: zap_vma_ptes() needs MMU adds a5ed75187580 samples: vfio-mdev: fix error handing in mdpy_fb_probe() adds f1a02cde2deb vfio/platform: fix module_put call in error flow adds 25775914cc8b ipvs: ignore IP_VS_SVC_F_HASHED flag when adding service adds 192576732f76 HID: logitech-hidpp: initialize level variable adds 427bc15bbd9d HID: pidff: fix error return code in hid_pidff_init() adds 29beadea66a2 HID: amd_sfh: Fix memory leak in amd_sfh_work adds c30c28987173 HID: i2c-hid: fix format string mismatch adds 47b0e3728f47 kbuild: Quote OBJCOPY var to avoid a pahole call break the build adds 36c19acbbc7e devlink: Correct VIRTUAL port to not have phys_port attributes adds 30822781c899 net/sched: act_ct: Offload connections with commit action adds 41d6cc0cd8e9 net/sched: act_ct: Fix ct template allocation for zone 0 adds b9c78b1a9596 mptcp: fix sk_forward_memory corruption on retransmission adds 9d0d1d10ba54 mptcp: always parse mptcp options for MPC reqsk adds 7d4446bcb406 mptcp: do not reset MP_CAPABLE subflow on mapping errors adds ec6793f17576 nvme-rdma: fix in-casule data send for chained sgls adds b89474465f69 ACPICA: Clean up context mutex during object deletion adds eba7c76a5651 perf probe: Fix NULL pointer dereference in convert_variab [...] adds ee64a27e9edc net: dsa: tag_8021q: fix the VLAN IDs used for encoding sub-VLANs adds 80cebcccc120 net: sock: fix in-kernel mark setting adds aada29744711 net/tls: Replace TLS_RX_SYNC_RUNNING with RCU adds 0f1e6fe66977 net/tls: Fix use-after-free after the TLS device goes down and up adds f8bdc8d7d8e8 net/mlx5e: Fix incompatible casting adds d1ead783fe2e net/mlx5: Check firmware sync reset requested is set befor [...] adds 9606de3ac084 net/mlx5e: Check for needed capability for cvlan matching adds 500563cb6fb0 net/mlx5e: Fix adding encap rules to slow path adds ef94ecfa3e5b net/mlx5: DR, Create multi-destination flow table with lev [...] adds 8a452d62e7ce nvmet: fix freeing unallocated p2pmem adds 2c0e6b35b88a netfilter: nft_ct: skip expectations for confirmed conntrack adds 851fcb15e735 netfilter: nfnetlink_cthelper: hit EBUSY on updates if siz [...] adds f2c444cacbb0 drm/i915/selftests: Fix return value check in live_breadcr [...] adds acc43fc6cf0d bpf, lockdown, audit: Fix buggy SELinux lockdown permissio [...] adds e5a823123782 ieee802154: fix error return code in ieee802154_add_iface() adds 6820c1aaf8e5 ieee802154: fix error return code in ieee802154_llsec_getparams() adds bb5da059defe igb: Fix XDP with PTP enabled adds 5a8e2bf7eebb igb: add correct exception tracing for XDP adds a1c1b1ef41cd ixgbevf: add correct exception tracing for XDP adds 1d34fa4fcf06 ice: track AF_XDP ZC enabled queues in bitmap adds 511ffe92734e cxgb4: fix regression with HASH tc prio value update adds 0a462e25ef0f ipv6: Fix KASAN: slab-out-of-bounds Read in fib6_nh_flush_ [...] adds e2bd0bc13d27 ice: Fix allowing VF to request more/less queues via virtchnl adds 53ba29c32b41 ice: Fix VFR issues for AVF drivers that expect ATQLEN cleared adds 4f000fa8076b ice: handle the VF VSI rebuild failure adds 9ba861c7957a ice: report supported and advertised autoneg using PHY cap [...] adds 5cd9ec7ad51c ice: Allow all LLDP packets from PF to Tx adds bf807cfb9feb i2c: qcom-geni: Add shutdown callback for i2c adds 2411c02d0389 sch_htb: fix refcount leak in htb_parent_to_leaf_offload adds 0ce89496a1f9 cxgb4: avoid link re-train during TC-MQPRIO configuration adds c93d6b804035 i40e: optimize for XDP_REDIRECT in xsk path adds 567d67a3cb9d i40e: add correct exception tracing for XDP adds e2d914baa1c2 ice: optimize for XDP_REDIRECT in xsk path adds 1b002f376a9d ice: add correct exception tracing for XDP adds 85e8a90cd7cb ixgbe: optimize for XDP_REDIRECT in xsk path adds 88728042be15 ixgbe: add correct exception tracing for XDP adds 435d7f1049e0 arm64: dts: ti: j7200-main: Mark Main NAVSS as dma-coherent adds bc6a0dfb0535 optee: use export_uuid() to copy client UUID adds 484634991cdc bus: ti-sysc: Fix am335x resume hang for usb otg module adds c57ad9d41026 arm64: dts: ls1028a: fix memory node adds e86d02dbd177 arm64: dts: zii-ultra: remove second GEN_3V3 regulator instance adds f61ce6a8225c arm64: dts: zii-ultra: fix 12V_MAIN voltage adds f3b70e434a6e arm64: dts: freescale: sl28: var4: fix RGMII clock and voltage adds 8567131103a5 arm64: dts: freescale: sl28: var1: fix RGMII clock and voltage adds 250792f40b6d ARM: dts: imx7d-meerkat96: Fix the 'tuning-step' property adds 1f00cc03b8a1 ARM: dts: imx7d-pico: Fix the 'tuning-step' property adds 0c41a1124d37 ARM: dts: imx: emcon-avari: Fix nxp,pca8574 #gpio-cells adds c8f7f44ca1e9 bus: ti-sysc: Fix flakey idling of uarts and stop using sw [...] adds ca93a7e6d22d arm64: meson: select COMMON_CLK adds 506285aa2f7f tipc: add extack messages for bearer/media failure adds ab5cfe2c05fe tipc: fix unique bearer names sanity check adds f9a2672791d0 serial: stm32: fix threaded interrupt handling adds 904987a65092 riscv: vdso: fix and clean-up Makefile adds 5a5357cd2cd9 amdgpu: fix GEM obj leak in amdgpu_display_user_framebuffe [...] adds 876808dba2ff io_uring: fix link timeout refs adds 0cd6e16742d4 io_uring: use better types for cflags adds 9e44293267a5 io_uring: wrap io_kiocb reference count manipulation in helpers adds 1f64f5e903b9 io_uring: fix ltout double free on completion race adds 4a728699bc2a drm/amdgpu/vcn3: add cancel_delayed_work_sync before power gate adds 805e5a259f99 drm/amdgpu/jpeg2.5: add cancel_delayed_work_sync before po [...] adds af512f09385a drm/amdgpu/jpeg3: add cancel_delayed_work_sync before power gate adds 3556fac71e41 Bluetooth: fix the erroneous flush_work() order adds 7422eadcf201 Bluetooth: use correct lock to prevent UAF of hdev object adds 8af215cc8305 wireguard: do not use -O3 adds 958810e99f6f wireguard: peer: allocate in kmem_cache adds 3709c87e0dbe wireguard: use synchronize_net rather than synchronize_rcu adds 4b8aa955bf47 wireguard: selftests: remove old conntrack kconfig value adds 90b33dbb8395 wireguard: selftests: make sure rp_filter is disabled on vethc adds 8eee870d8290 wireguard: allowedips: initialize list head in selftest adds 6f425fc65c08 wireguard: allowedips: remove nodes in O(1) adds af04157d885e wireguard: allowedips: allocate nodes in kmem_cache adds 5ceb59f40c09 wireguard: allowedips: free empty intermediate nodes when [...] adds 19e089e07e19 net: caif: added cfserl_release function adds 88550e9c900b net: caif: add proper error handling adds 6a0e317f6109 net: caif: fix memory leak in caif_device_notify adds dde8686985ec net: caif: fix memory leak in cfusbl_device_notify adds 4a88d9210c52 HID: i2c-hid: Skip ELAN power-on command after reset adds 9cf27473f219 HID: magicmouse: fix NULL-deref on disconnect adds 92462d2e0a4c HID: multitouch: require Finger field to mark Win8 reports as MT adds 112c92cf82a2 gfs2: fix scheduling while atomic bug in glocks adds 601554201a95 ALSA: timer: Fix master timer notification adds 89b6aacdc483 ALSA: hda: Fix for mute key LED for HP Pavilion 15-CK0xx adds 5c671c9d8363 ALSA: hda: update the power_state during the direct-complete adds d16c0b0658b2 ARM: dts: imx6dl-yapp4: Fix RGMII connection to QCA8334 switch adds ff7fe51dc492 ARM: dts: imx6q-dhcom: Add PU,VDD1P1,VDD2P5 regulators adds 1385b23396d5 ext4: fix memory leak in ext4_fill_super adds 48105dc98c9c ext4: fix bug on in ext4_es_cache_extent as ext4_split_ext [...] adds ba499e0bf9c8 ext4: fix fast commit alignment issues adds 04fb2baa0b14 ext4: fix memory leak in ext4_mb_init_backend on error path. adds c48d71d1367f ext4: fix accessing uninit percpu counter variable with fa [...] adds 62fa43c7ee55 usb: dwc2: Fix build in periphal-only mode adds 08ec01b5318a Revert "MIPS: make userspace mapping young by default" adds 18071d618c1a kfence: maximize allocation wait timeout duration adds 9a01a5cd63cd kfence: use TASK_IDLE when awaiting allocation adds b8ff869f2015 pid: take a reference when initializing `cad_pid` adds 0a31dd6fd2f4 ocfs2: fix data corruption by fallocate adds 3c822fea4bb2 mm/debug_vm_pgtable: fix alignment for pmd/pud_advanced_tests() adds 455170aca45a mm/page_alloc: fix counting of free pages after take off f [...] adds 4c438acbfbdf scsi: lpfc: Fix failure to transmit ABTS on FC link adds 25aaa062fa73 x86/cpufeatures: Force disable X86_FEATURE_ENQCMD and remo [...] adds de8a25bef860 dmaengine: idxd: Use cpu_feature_enabled() adds 01049949f673 x86/sev: Check SME/SEV support in CPUID first adds bf63f3676c5f KVM: PPC: Book3S HV: Save host FSCR in the P7/8 path adds 0c4559736d9a nfc: fix NULL ptr dereference in llcp_sock_getname() after [...] adds 9d1d6c04a603 drm/amdgpu: Don't query CE and UE errors adds a1f10530c732 drm/amdgpu: make sure we unpin the UVD BO adds 25823b4e08f6 x86/apic: Mark _all_ legacy interrupts when IO/APIC is missing adds 3cbf4d6d2b52 x86/thermal: Fix LVT thermal setup for SMI delivery mode adds 50863015b6a7 powerpc/kprobes: Fix validation of prefixed instructions a [...] adds 22beee867bf1 btrfs: mark ordered extent and inode with error if we fail [...] adds 99eee2efe4b7 btrfs: fix error handling in btrfs_del_csums adds 363747ad1f44 btrfs: return errors from btrfs_del_csums in cleanup_ref_head adds b37885cc0135 btrfs: fix fsync failure and transaction abort after write [...] adds a70d4dac28aa btrfs: check error value from btrfs_update_inode in tree log adds 4cd303735bdf btrfs: fixup error handling in fixup_inode_link_counts adds ff8de2cec65a btrfs: abort in rename_exchange if we fail to insert the s [...] adds 7feb7361efe0 btrfs: fix deadlock when cloning inline extents and low on [...] adds 6280e8aca1e0 mm, hugetlb: fix simple resv_huge_pages underflow on UFFDIO_COPY adds 9ddd1b2c8c31 drm/msm/dpu: always use mdp device to scale bandwidth adds 6f2a834f364d KVM: SVM: Truncate GPR value for DR and CR accesses in !64 [...] adds d1629b5b925d x86/kvm: Teardown PV features on boot CPU as well adds 1df2dc09926f x86/kvm: Disable kvmclock on all CPUs on shutdown adds 9b77839fd4b6 x86/kvm: Disable all PV features on crash adds 830e7653e940 KVM: arm64: Commit pending PC adjustemnts before returning [...] adds 5a3d82dc8ace KVM: arm64: Resolve all pending PC updates before immediate exit adds 3762e844c5a0 ARM: OMAP1: isp1301-omap: Add missing gpiod_add_lookup_tab [...] adds 542bbcaa930a i2c: qcom-geni: Suspend and resume the bus during SYSTEM_S [...] adds 551677defbb5 x86/fault: Don't send SIGSEGV twice on SEGV_PKUERR adds 268218460584 netfilter: nf_tables: missing error reporting for not sele [...] adds caec9bcaeb1a xen-netback: take a reference to the RX task thread adds ddf088d7aaaa neighbour: allow NUD_NOARP entries to be forced GCed adds 8a901e19407d Linux 5.12.10 adds da136c16fa65 Merge v5.12.10 No new revisions were added by this update. Summary of changes: Makefile | 2 +- arch/arm/boot/dts/imx6dl-yapp4-common.dtsi | 6 +- arch/arm/boot/dts/imx6q-dhcom-som.dtsi | 12 ++ arch/arm/boot/dts/imx6qdl-emcon-avari.dtsi | 2 +- arch/arm/boot/dts/imx7d-meerkat96.dts | 2 +- arch/arm/boot/dts/imx7d-pico.dtsi | 2 +- arch/arm/mach-omap1/board-h2.c | 4 +- arch/arm64/Kconfig.platforms | 1 + .../freescale/fsl-ls1028a-kontron-sl28-var1.dts | 3 +- .../freescale/fsl-ls1028a-kontron-sl28-var4.dts | 5 +- arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 4 +- .../boot/dts/freescale/imx8mq-zii-ultra-rmb3.dts | 10 +- .../arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi | 23 +-- arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 2 + arch/arm64/include/asm/kvm_asm.h | 1 + arch/arm64/kvm/arm.c | 20 ++- arch/arm64/kvm/hyp/exception.c | 4 +- arch/arm64/kvm/hyp/nvhe/hyp-main.c | 8 + arch/mips/mm/cache.c | 30 ++-- arch/powerpc/kernel/kprobes.c | 4 +- arch/powerpc/kvm/book3s_hv.c | 1 - arch/powerpc/kvm/book3s_hv_rmhandlers.S | 7 + arch/riscv/kernel/vdso/Makefile | 4 +- arch/x86/include/asm/apic.h | 1 + arch/x86/include/asm/disabled-features.h | 7 +- arch/x86/include/asm/fpu/api.h | 6 +- arch/x86/include/asm/fpu/internal.h | 7 - arch/x86/include/asm/kvm_para.h | 10 +- arch/x86/include/asm/thermal.h | 4 +- arch/x86/kernel/apic/apic.c | 1 + arch/x86/kernel/apic/vector.c | 20 +++ arch/x86/kernel/fpu/xstate.c | 57 ------- arch/x86/kernel/kvm.c | 92 +++++++--- arch/x86/kernel/kvmclock.c | 26 +-- arch/x86/kernel/setup.c | 9 + arch/x86/kvm/svm/svm.c | 8 +- arch/x86/mm/fault.c | 4 +- arch/x86/mm/mem_encrypt_identity.c | 11 +- drivers/acpi/acpica/utdelete.c | 8 + drivers/bus/ti-sysc.c | 57 ++++++- drivers/dma/idxd/init.c | 4 +- drivers/firmware/efi/cper.c | 4 +- drivers/firmware/efi/fdtparams.c | 3 + drivers/firmware/efi/libstub/file.c | 2 +- drivers/firmware/efi/memattr.c | 5 - drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | 16 -- drivers/gpu/drm/amd/amdgpu/amdgpu_display.c | 1 + drivers/gpu/drm/amd/amdgpu/jpeg_v2_5.c | 4 +- drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c | 4 +- drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c | 1 + drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 5 +- drivers/gpu/drm/i915/selftests/i915_request.c | 4 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +- drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 51 +----- drivers/hid/amd-sfh-hid/amd_sfh_client.c | 1 + drivers/hid/hid-logitech-hidpp.c | 1 + drivers/hid/hid-magicmouse.c | 2 +- drivers/hid/hid-multitouch.c | 10 +- drivers/hid/i2c-hid/i2c-hid-core.c | 13 +- drivers/hid/usbhid/hid-pidff.c | 1 + drivers/hwmon/dell-smm-hwmon.c | 4 +- drivers/hwmon/pmbus/isl68137.c | 4 +- drivers/i2c/busses/i2c-qcom-geni.c | 21 ++- drivers/net/ethernet/chelsio/cxgb4/cxgb4.h | 2 - drivers/net/ethernet/chelsio/cxgb4/cxgb4_main.c | 4 +- .../net/ethernet/chelsio/cxgb4/cxgb4_tc_flower.c | 14 +- .../net/ethernet/chelsio/cxgb4/cxgb4_tc_mqprio.c | 9 +- drivers/net/ethernet/chelsio/cxgb4/sge.c | 6 + drivers/net/ethernet/intel/i40e/i40e_txrx.c | 7 +- drivers/net/ethernet/intel/i40e/i40e_xsk.c | 15 +- drivers/net/ethernet/intel/ice/ice.h | 8 +- drivers/net/ethernet/intel/ice/ice_ethtool.c | 51 +----- drivers/net/ethernet/intel/ice/ice_hw_autogen.h | 1 + drivers/net/ethernet/intel/ice/ice_lib.c | 12 ++ drivers/net/ethernet/intel/ice/ice_txrx.c | 17 +- drivers/net/ethernet/intel/ice/ice_virtchnl_pf.c | 19 ++- drivers/net/ethernet/intel/ice/ice_xsk.c | 19 ++- drivers/net/ethernet/intel/igb/igb.h | 2 +- drivers/net/ethernet/intel/igb/igb_main.c | 55 +++--- drivers/net/ethernet/intel/igb/igb_ptp.c | 23 ++- drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 16 +- drivers/net/ethernet/intel/ixgbe/ixgbe_xsk.c | 21 ++- drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c | 3 + .../net/ethernet/mellanox/mlx5/core/en_ethtool.c | 5 +- drivers/net/ethernet/mellanox/mlx5/core/en_tc.c | 9 + .../ethernet/mellanox/mlx5/core/eswitch_offloads.c | 3 +- drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c | 3 + .../ethernet/mellanox/mlx5/core/lib/fs_chains.c | 2 +- .../ethernet/mellanox/mlx5/core/lib/fs_chains.h | 5 + .../ethernet/mellanox/mlx5/core/steering/dr_fw.c | 3 +- drivers/net/wireguard/Makefile | 3 +- drivers/net/wireguard/allowedips.c | 189 +++++++++++---------- drivers/net/wireguard/allowedips.h | 14 +- drivers/net/wireguard/main.c | 17 +- drivers/net/wireguard/peer.c | 27 ++- drivers/net/wireguard/peer.h | 3 + drivers/net/wireguard/selftest/allowedips.c | 165 +++++++++--------- drivers/net/wireguard/socket.c | 2 +- drivers/net/wireless/mediatek/mt76/mt76x0/pci.c | 81 ++++++++- drivers/net/wireless/mediatek/mt76/mt7921/mcu.c | 24 ++- drivers/net/xen-netback/interface.c | 6 + drivers/nvme/host/rdma.c | 5 +- drivers/nvme/target/core.c | 33 ++-- drivers/scsi/lpfc/lpfc_sli.c | 4 +- drivers/tee/optee/call.c | 6 +- drivers/tee/optee/optee_msg.h | 6 +- drivers/thermal/intel/therm_throt.c | 15 +- drivers/tty/serial/stm32-usart.c | 22 +-- drivers/usb/dwc2/core_intr.c | 4 + drivers/vfio/pci/Kconfig | 1 + drivers/vfio/pci/vfio_pci_config.c | 2 +- drivers/vfio/platform/vfio_platform_common.c | 2 +- fs/btrfs/extent-tree.c | 2 +- fs/btrfs/file-item.c | 108 +++++++++--- fs/btrfs/inode.c | 19 ++- fs/btrfs/reflink.c | 38 +++-- fs/btrfs/tree-log.c | 21 ++- fs/ext4/extents.c | 43 ++--- fs/ext4/fast_commit.c | 170 +++++++++--------- fs/ext4/fast_commit.h | 19 --- fs/ext4/ialloc.c | 6 +- fs/ext4/mballoc.c | 2 +- fs/ext4/super.c | 11 +- fs/gfs2/glock.c | 2 + fs/io_uring.c | 66 ++++--- fs/ocfs2/file.c | 55 +++++- include/linux/mlx5/mlx5_ifc.h | 2 + include/linux/pgtable.h | 8 + include/linux/platform_data/ti-sysc.h | 1 + include/net/caif/caif_dev.h | 2 +- include/net/caif/cfcnfg.h | 2 +- include/net/caif/cfserl.h | 1 + include/net/tls.h | 10 +- init/main.c | 2 +- kernel/bpf/helpers.c | 7 +- kernel/trace/bpf_trace.c | 32 ++-- mm/debug_vm_pgtable.c | 4 +- mm/hugetlb.c | 14 +- mm/kfence/core.c | 12 +- mm/memory.c | 4 + mm/page_alloc.c | 2 + net/bluetooth/hci_core.c | 7 +- net/bluetooth/hci_sock.c | 4 +- net/caif/caif_dev.c | 13 +- net/caif/caif_usb.c | 14 +- net/caif/cfcnfg.c | 16 +- net/caif/cfserl.c | 5 + net/core/devlink.c | 4 +- net/core/neighbour.c | 1 + net/core/sock.c | 16 +- net/dsa/tag_8021q.c | 2 +- net/ieee802154/nl-mac.c | 4 +- net/ieee802154/nl-phy.c | 4 +- net/ipv6/route.c | 8 +- net/mptcp/protocol.c | 16 +- net/mptcp/subflow.c | 76 ++++----- net/netfilter/ipvs/ip_vs_ctl.c | 2 +- net/netfilter/nf_conntrack_proto.c | 2 +- net/netfilter/nf_tables_api.c | 4 +- net/netfilter/nfnetlink_cthelper.c | 8 +- net/netfilter/nft_ct.c | 2 +- net/nfc/llcp_sock.c | 2 + net/sched/act_ct.c | 10 +- net/sched/sch_htb.c | 8 +- net/tipc/bearer.c | 94 +++++++--- net/tls/tls_device.c | 60 +++++-- net/tls/tls_device_fallback.c | 7 + net/tls/tls_main.c | 1 + samples/vfio-mdev/mdpy-fb.c | 13 +- scripts/Makefile.modfinal | 2 +- scripts/link-vmlinux.sh | 2 +- sound/core/timer.c | 3 +- sound/pci/hda/hda_codec.c | 5 + sound/pci/hda/patch_realtek.c | 1 + tools/perf/util/dwarf-aux.c | 8 +- tools/perf/util/probe-finder.c | 3 + tools/testing/selftests/wireguard/netns.sh | 1 + .../testing/selftests/wireguard/qemu/kernel.config | 1 - 178 files changed, 1653 insertions(+), 1055 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (52ffbfdffc24 -> bb8ce25e8821)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/llvm-project. from 52ffbfdffc24 [AMDGPU] Increase alignment of LDS globals if necessary be [...] adds ddda05add527 [clang][NFC] Break out BaseUsingDecl from UsingDecl adds 84ab31557409 [clang][NFC] Break out enum completion from other type con [...] adds d12000ca55d1 [clangd] Bump recommended gRPC version (1.33.2 -> 1.36.3) adds fd3b556958a9 [Constants] Extend support for scalable-vector splats adds 7e176ff2db93 [test] Use host platform specific error message substitution adds 96e1fcb1e005 [AMDGPU] Use s_add_i32 for address additions adds 9e43e7ec111d [clang] Fix using-enum breakage adds ade4662c44f7 [clang] Remove inadvertent commit adds ae3f6de3a856 [InstCombine] Support negation of scalable-vector splats adds e1da3297d253 [flang][driver] Add support for the "-init-only" option adds 54f059c9007b [OpenMP] Check loc for NULL before dereferencing it adds cfcdebaf3235 [mlir][openacc] Conversion of data operands in acc.paralle [...] adds 2b13ff697946 [Clang][CodeGen] Set the size of llvm.lifetime to unknown [...] adds aa4e6a609acd [mlir][openacc] Add canonicalization for standalone data o [...] adds fb5b590b5e18 [mlir][openacc] Add conversion for if operand to scf.if fo [...] adds 89615a5e925e [Demangle][Rust] Parse dyn-bounds adds 1499afa09ba2 [Demangle][Rust] Parse dyn-trait adds 619a65e5e4ed [Demangle][Rust] Parse dyn-trait-assoc-binding adds c908196e100a [CostModel] Return Invalid cost in getArithmeticCost inste [...] adds be663c4337c6 [CostModel][AArch64] NFC: Simplify some cost model tests for SVE. adds f10b9ca9c672 [NFC] Add missing include to LaneBitmask.h to fix modules build adds 2c2feebcd127 [lldb] Fix TypeSystemClang compilation after D101777 adds fb4e4646188c [libc++] Simplify a few macros in __config adds 9d35c1701f26 [docs] Set Phabricator as the tool for pre-commit reviews adds a82747fafe21 [dfsan] Fix internal build errors because of more strict w [...] adds 1465e7770bca [VPlan] Print successors of VPRegionBlocks. adds fd11a26d368c [AArch64] handle -Wa,-march= adds 43929ccc1296 [Demangle][Rust] Parse instantiating crate adds 8c6bd6c22f38 [RISCV] Don't enable loop vectorizer interleaving if the V [...] adds dc173254e754 [InstCombine] add tests for FMF propagation via -(C/X); NFC adds 519e98cd9af0 [InstCombine] refactor match clauses; NFC adds 4675beaa2181 [InstCombine] intersect nsz and ninf fast-math-flags (FMF) [...] adds 8e84311a84b3 [XCOFF][AIX] Enable tooling support for 64 bit symbol tabl [...] adds c880d5e583a3 [RS4GC] Treat inttoptr as base pointer adds f30f8b4f12b7 [RISCV] Lower i8/i16 bswap/bitreverse to grevi/greviw with Zbp. adds 854d0edce6c6 [MLIR] Conditional Branch Argument Propagation adds 422544414b0d [lld/mac] Add a test for -reexport_library + -dead_strip_dylibs adds 85966df3aa64 [libc++] Rename 'and' to '&&' adds 00b6463b269f [MLIR][GPU] Simplify memcpy of cast adds 38540d71c74c [SCEV] Compute exit counts for unsigned IVs using mustprog [...] adds f6555b917b81 GlobalISel: Remove unnecessary .getReg(0)s adds dc98adfb448b GlobalISel: Use MMO helper for getting the size in bits adds ccf28ea800ee AMDGPU: Move codegen test out of MIR test directory adds a1f550e05254 [OpenMP] libomp: implement OpenMP 5.1 inoutset task depend [...] adds d70e1f12765f [OpenMP][runtime] add .clang-tidy file adds 8fdd7c2ff16d [LoopUnroll] Clamp unroll count to MaxTripCount adds 6de45b9e6a2c [clang] Fix reading long doubles with va_arg on x86_64 mingw adds 75521bd9d8d1 [X32] Add Triple::isX32(), use it. adds 8ec73e96b72d [ELF] getRelocatedSection: remove the check for ET_REL obj [...] adds 17c43c404535 [lld/mac] Add reexports after reexporter to inputFiles adds f492c3596503 [mlir-lsp-server] Add support for hover on region operations adds 4c3adea7a4ab [mlir-lsp-server] Add support for hover on symbol references adds 2db4701cafd4 [mlir-lsp-server] Fix bug in symbol use/def tracking adds 9145a3d4ab7e Revert "[AArch64] handle -Wa,-march=" adds e72f16b7e662 [Test] Add a JumpThreading test exposing a bug in BasicAA. adds d32cc150feb7 [BasicAA] Handle PHIs without incoming values gracefully adds 3c6e419198f3 [SCEV] Properly guard reasoning about infinite loops being [...] adds 3af5f3e69247 [IR] Add utility to convert constant expression operands ( [...] adds 713ca2f3604f [AMDGPU] Introduce command line switch to control super al [...] adds 05289dfb6246 [AMDGPU] Handle constant LDS uses from different kernels adds 9b92ae01ee57 [RISCV] Store Log2 of EEW in the vector load/store intrins [...] adds 47211fa88905 Revert "[TargetLowering] Only inspect attributes in the ar [...] adds c705b7b04dba [RISCV] Optimize bitwise and with constant for the Zbs extension adds d9633f229c36 Revert "[libcxx][module-map] creates submodules for privat [...] adds 692d7166f771 Revert "[libcxx][gardening] Move all algorithms into their [...] adds 3b69318eef34 [gn build] Port 692d7166f771 adds 5b4dda550ece [dfsan] Add full fast8 support adds 11539edf52d5 [NFC][LSAN] Limit the number of concurrent threads is the test adds 0aa941654fc0 [RISCV] Use bitfields to shrink the size of the vector loa [...] adds b41b76b303cd [NFC][scudo] Print errno of fork failure adds e6629be31e67 [AIX] Define __STDC_NO_ATOMICS__ and __STDC_NO_THREADS__ p [...] adds f8816c740025 [AMDGPU] Add v5f32/VReg_160 support for MIMG instructions adds f97e01e61af1 Revert "[AIX] Define __STDC_NO_ATOMICS__ and __STDC_NO_THR [...] adds f38eff777e46 [AIX] Define __STDC_NO_ATOMICS__ and __STDC_NO_THREADS__ adds c8bbfb8cf5ea [AMDGPU] Allow oversize vaddr in GFX10 MIMG assembly adds 310d2b4957c8 [yaml2obj] Fix buildbot-issue-4886 adds 04259cde15a9 [lld-macho] Implement cstring deduplication adds 447dfbe005a7 [lld-macho] Implement -force_load_swift_libs adds 8ce45f972834 BPF: fix relocation types in lib/Object/RelocationResolver.cpp adds 7a105b576857 [RISCV] Use AVL Operand instead of GPR for tied mask pseud [...] adds ae3ab4f0ec61 [RISCV] Masked compares should use a tail agnostic policy. adds 7c4e9a68264f [RISCV] Use 0 for Log2SEW for vle1/vse1 intrinsics to enab [...] adds 9625d61eb66c [Driver] Support libc++ in MSVC adds d3a6181e82ca [analyzer] [NFC] Implement a wrapper SValBuilder::getCast [...] adds 392af6a78bb7 [mlir][ArmSVE] Add basic mask generation operations adds 82b7e822d005 [Demangle][Rust] Parse path backreferences adds 44d63c57c129 [Demangle][Rust] Parse type backreferences adds f9a79356f223 [Demangle][Rust] Parse const backreferences adds e05b03cf4f45 [lldb] Set return status to failed when adding a command error adds 4f16ccdab2d3 [JITLink] Clarify LinkGraph::splitBlock contract in comment. adds 57546f5b2224 Revert "[mlir][ArmSVE] Add basic mask generation operations" adds 3c70a82e2891 [mlir] fix integer type mismatch in alloc conversion to LLVM adds ada9aa5a2282 [mlir] Make MemRef element type extensible adds c59ce1f6257c [mlir] support memref of memref in standard-to-llvm conversion adds b34da6ff9c1d [clang] Apply MS ABI details on __builtin_ms_va_list on no [...] adds b889c6ee9911 [DAG] Allow isNullOrNullSplat to see truncated zeroes adds 7116468ca9d0 [mlir] fix shared-libs build adds 14eeccfe9adb [LoopVectorize] Don't use strict reductions when reorderin [...] adds 27f3041c88ac NVPTXTargetLowering::LowerReturn - Pass DataLayout by refe [...] adds 4ad59f9a5a95 ValueTrackingTest.cpp - Pass DataLayout by reference. NFCI. adds 596004a94748 MemCpyOptimizer.cpp - hasUndefContentsMSSA - Pass DataLayo [...] adds 49d3a367c037 [CostModel][X86] Improve AVX1/AVX2 truncation costs adds f96b5e801d67 OptBisect.cpp - remove unused include. NFCI. adds 6fd1604d1433 [InstCombine] Add instcombine fold for extractelement + sp [...] adds ccd1e087f370 [RISCV] Add a test case showing inefficient vector codegen adds d54e7b731e66 [OpenCL] Add memory_scope_all_devices adds 5db52751a594 [CostModel] Return an invalid cost for memory ops with uns [...] adds f61602b0d3fd [OpenMP][OMPD] Implementation of OMPD debugging library - [...] adds 09e92c607cc9 [LoopUnrollAndJam] Change LoopUnrollAndJamPass to LoopNest pass adds 012898b92cad [clang] p1099 using enum part 1 adds 2b626aba448a [VE][NFC] IRBuilder<> -> IRBuilderBase adds 22875b2ce3fd [NFC] Remove some include cycles adds 0f9d299122f1 [VP] getDeclarationForParams adds 41eb2cec4798 [MLIR] Mark additional builtin attr methods const adds 386b66b2fc29 Revert "3rd Reapply "[DebugInfo] Use variadic debug values [...] adds e772216e7089 [llvm] Make Sequence reverse-iterable adds be5e2fc7bf78 [Polly][Isl] Removing nullptr constructor from C++ bindings. NFC. adds 7f6c878a2c03 Fix missing header and namespace qualifier in ADT Sequence adds 054cc3b1b469 [CUDA][HIP] Fix store of vtbl in ctor adds dee1f0cb348b [LoopNest] Fix Wdeprecated-copy warnings adds 61a2d6bfe48c [DAG] foldShuffleOfConcatUndefs - ensure shuffles of upper [...] adds f60ea691a94b Revert "[Polly][Isl] Removing nullptr constructor from C++ [...] adds 491d04595751 [libc++] Remove the old HTML documentation adds c5d56fec502f NFC: .clang-tidy: Inherit configs from parents to improve [...] adds 433c8d950cb3 [IR] make -stack-alignment= into a module attr adds 49454ebc56ec .clang-tidy: Disable misc-no-recursion in general/across t [...] adds 965ad79ea7d0 [MLIR][MemRef] Only allow fold of cast for the pointer ope [...] adds a596b54d471c Revert "[IR] make -stack-alignment= into a module attr" adds 172fcd9600e1 [clang-cl] Parse the /external: flags (PR36003) adds d2eccf9bb7f1 [libc++] NFC: Add regression tests for some <tuple> PRs th [...] adds cd73af92315e [MLIR] Remove LLVM_AnyInteger type constraint adds 928a197d26ff [ELF] Add a GRP_COMDAT test with a local signature symbol adds c57bce9cc5fa [RISCV] Remove ForceTailAgnostic flag from vmv.s.x, vfmv.s [...] adds 71fb98e0c1de Fix a typo in the internals manual adds 8b4c80d380a6 Further improve register allocation for vwadd(u).wv, vwsub [...] adds 08664d005c02 [Verifier] Speed up and parallelize dominance checking. NFC adds 92a79dbe9141 [Core] Add Twine support for StringAttr and Identifier. NFC. adds ea10a86984ea [AMDGPU] Add gfx1013 target adds 114e712c344f InstrEmitter.cpp - don't dereference a dyn_cast<>. adds 01b77159e30b PPCISelLowering.cpp - don't dereference a dyn_cast<>. adds 52396577a2d8 Use llvm_unreachable for unsupported integer types. adds a4e2cf712af3 Revert "[llvm] Make Sequence reverse-iterable" adds 1dba2a026956 [Fuchsia] Update some of the Fuchsia toolchain flags adds 30bb5dcb0a5c Add missing header <atomic> in lib/IR/Verifier.cpp (NFC) adds 2a7e75973498 [GlobalISel] Handle non-multiples of the base type in narr [...] adds 4271e1d2c522 [GlobalISel] Handle non-multiples of the base type in narr [...] adds 4d680b06c92a [libc++] Add a CI configuration for the modular build adds ee2a92c29df6 [libcxx] Remove VLA from libcxx locale header adds 3787ee457173 reland [IR] make -stack-alignment= into a module attr adds de98da2eced7 [CMake] Only include LTO on Apple targets adds b2d0c16e91f3 [clang] p1099 using enum part 2 adds 7e976cd45685 [FuzzMutate] Fix getWeight of InstDeleterIRStrategy adds c09b37553e74 [RISCV] Remove dead code from fixed-vectors-abs.ll test ca [...] adds f673365e1ce1 [CMake][Fuchsia] Include llvm-otool in Fuchsia toolchain adds 9197bac297f7 Add an option to hide "cold" blocks from CFG graph adds c0edcec630eb Add a static assertions for custom Op<> to not defined dat [...] adds f44770c32992 [ARM] A couple of extra VMOVimm tests, useful for showing [...] adds 2927d40f0446 GlobalISel: Hide virtual register creation in MIRBuilder adds 31a9659de550 GlobalISel: Avoid use of G_INSERT in insertParts adds 0e8506debae3 [SystemZ][z/OS] Pass OpenFlags when creating tmp files adds 944b3c53aec5 [NFC][compiler-rt][hwasan] Move allocation functions into [...] adds 9ec6c3bb2ff0 [gn build] (semi-manually) port 944b3c53aec5 adds 2a5afb466553 [CMake][Fuchsia] Use PIC for Fuchsia runtimes adds d69c4372bfbe [CodeGen] remove instcombine from codegen tests; NFC adds 64576a1be887 [lldb][NFC] Refactor name to index maps in Symtab adds a9ea0a6a77b3 Fix for failing test mentioned in https://reviews.llvm.org [...] adds 27332968d85e [amdgpu] Add `-enable-ocl-mangling-mismatch-workaround`. adds dc0c3fe5f35e [ms] [llvm-ml] Disambiguate size directives and variable d [...] adds d7853bae9410 [ARM] Generate VDUP(Const) from constant buildvectors adds a7142f5c91ba Partially revert the Fuchsia changes to avoid the use of PIC adds 297088d1add7 Revert "[DSE] Remove stores in the same loop iteration" adds 211e584fa2a4 Revert "[AMDGPU] Add gfx1013 target" adds d5e4f28c0a45 [SystemZ] Return true from isMaskAndCmp0FoldingBeneficial(). adds 1683dbf0ddb2 [CMake][Fuchsia] Disable vcruntime for first stage as well adds 07ef5805abe5 Revert "[LoopNest] Fix Wdeprecated-copy warnings" adds 12933ba9eab2 [libc++] NFC: Rewrite the documentation for the debug mode adds 0178ae734ca3 [DSE] Add another multiblock loop DSE test. NFC adds 1a216fb15a18 [lldb] Don't print script output twice in HandleCommand adds 2551053e8d8d [scudo] Add Scudo support for Trusty OS adds c52ed5c4f1f2 [InstCombine] add FMF tests for fneg-of-select; NFC adds d2012d965d60 [InstCombine] fix nsz (fast-math) propagation from fneg-of-select adds ae1a699554cf [LLDB][NFC] Remove parameter names from forward declaratio [...] adds 8b32e25bc229 [SystemZ] Return true from convertSetCCLogicToBitwiseLogic [...] adds af8c59e06d28 Update and improve compiler-rt tests for -mllvm -asan_use_ [...] adds 9b41d0958e78 [Polly][Isl] Removing nullptr constructor from C++ bindings. NFC. adds 9b022a679b2b Revert "Revert "[LoopNest] Fix Wdeprecated-copy warnings"" adds 2f9ba6aa8b6d LTO: Export functions referenced by non-canonical CFI jump tables adds 898e38a3c159 [NFC] In the future, all intrinsics defined for compatibil [...] adds 05cadc6f7155 [mlir][tosa] Temporarily support 2D and 3D tensor types in matmul adds f4c8fd12d58e [libc][NFC] Use add_library instead of add_llvm_library fo [...] adds 6344a583ca8d [libc] Add a macro to include/exclude subprocess tests. adds 3d515cb185d8 [libc][NFC][Obvious] Compare against size_t values in Arra [...] adds f9649d123db6 [JITLink][MachO] Split C-string literal sections on null-t [...] adds df965513a9aa [OpenMP] Add an information flag for device data transfers adds 2c8115482312 Add llvm_unreacheable to silence warning "not all control [...] adds a0ac51467697 Revert "Add a static assertions for custom Op<> to not def [...] adds cb09f2b10cbe Rename compiler-rt/lib/orc/endian.h to endianness.h to avo [...] adds 4d9cc7c244e7 Add a couple of missing includes adds 8051a48e65cc ORTRT: Add tests for string_view equality and inequality o [...] adds 294efbbd3e3d Reland "[AMDGPU] Add gfx1013 target" adds c87c294397ea [PowerPC][Dwarf] Assign MMA register's dwarf register numb [...] adds db4ac5a63e11 [NFC][XCOFF] Use yaml2obj in llvm-objdump/XCOFF/section-he [...] adds 242ddd50897c [RISCV][NFC] Add a single space after comma for VType adds e11b5b87bebf Add Twine support for std::string_view. adds e48880078a49 Fix LIT test failure encountered on AIX adds 955bc5950b45 Remove white space in llvm-objdump/XCOFF/section-headers.test adds 674dd9d08ec0 [mlir] Fix body-less async.execute printing adds bf58600badb1 [PowerPC] Make sure the first probe is full size or is the [...] adds b413e44200e7 [CMake] Don't use libc++ by default on Windows yet adds 9c27fa3821dc [mlir][linalg] Prepare fusion on tensors for scalar operands. adds 9751af22c499 [Docs] Fix incorrect return type for example code adds 20f571dbff53 [NFC] Reformat MachineValueType adds 699231ab3c7d Fix the 4203-Buildbot failure in LLVM Buildbot on llvm [...] adds 414482751452 Prevent generation of dependency on _cxa_guard for static [...] adds 41135a4367a7 [MLIR] Make DictionaryAttr::getAs take name as && reference adds 093750dd0be6 [llvm] Sync DebugInfo.h with DebugInfoFlags.def adds e8f1f8910313 [RISCV] Support CONCAT_VECTORS on scalable masks adds 5c5ae6a661ce [ScalarEvolution] Add test for preserving add overflow flags. adds 35b0ddab0ee8 [flang] Define the API for CPU_TIME adds 09ac4eca6650 Revert "[llvm] Sync DebugInfo.h with DebugInfoFlags.def" adds db93e4e70aa4 Revert "[lldb] Set return status to failed when adding a c [...] adds 8eee02020b92 [LoopBoundSplit] Ignore phi node which is not scevable adds 80d556441adc [ValueTypes] Add missing enum names for MVTs adds 11ad9e31eb3b [compiler-rt] Mark symbolize_stack_fp test unsupported on [...] adds 292f4197249b [RISCV] Fix failing RVV MC tests adds f880bd261f4e [mlir][ArmSVE] Add basic mask generation operations adds e978f6bc9706 [LTO] Support new PM in ThinLTOCodeGenerator. adds 82f8aef3deb1 [JITLink][MachO] Handle muliple symbols at same offset whe [...] adds 391f9ef1aa8b [docs] Fix load instructions in chapter 7 of the tutorial adds 905f4eb537c1 [SROA] Avoid splitting loads/stores with irregular type adds d806d11b14e1 Interp.h - AddSubMulHelper - avoid APSInt::toString std::s [...] adds f3fd36e590f4 JSONNodeDumper.cpp - VisitIntegerLiteral - avoid APSInt::t [...] adds aef5d8fdc7d0 [clang] NFC: Rename rvalue to prvalue adds 205cde63c70e Revert "[SROA] Avoid splitting loads/stores with irregular type" adds c25572bf2993 [clang] NFC: rename SK_CastDerivedToBaseRValue to SK_CastD [...] adds c92f505346b8 Correct the behavior of va_arg checking in C++ adds 502edebd9d6e [ValueTypes][RISCV] Cap RVV fixed-length vectors by size adds d96ea4662980 [AArch64LoadStoreOptimizer] Generate more STPs by renaming [...] adds 82e4e505315b [OpenMP][Tools] Fix Archer for MACOS adds 08d8f1a958bd [OpenMP][Tools] Cleanup memory pool used in Archer adds 639b3979310d [OpenMP][Tools] Fix Archer handling of task dependencies adds c0db8d50ca3c [mlir] Expose a function to populate tensor constant buffe [...] adds 0120e6c295e4 [Test] Add more elaborate case of symbolic execution of 1- [...] adds a0086add2e52 [SLP]Improve gathering of scalar elements. adds 64dbd649cf66 [clang-cl] Parse /await:strict, new in MSVC 16.10 adds c1cd743519af [clang] p1099 using-enum feature macro & web page adds 8ffeb5c47d94 [X86][SSE] Regenerate slow-pmulld.ll test checks adds 630820bafc68 [X86][SLM] Adjust XMM non-PMULLD throughput costs to half rate. adds 8866793b4e0a [OpenCL] Add OpenCL builtin test generator adds 2ef81cb29795 [x86] add tests for store merging miscompile (PR50623); NFC adds ef8df920fbbc [TableGen] Fix ProfileFoldOpInit so that parameters are na [...] adds 6c78dbd4ca1f [ARM] Fix Machine Outliner LDRD/STRD handling in Thumb mode. adds 206a66de5902 Sanitizers.h - remove MathExtras.h include dependency adds dd763ac79196 [SDAG] fix miscompile from merging stores of different sizes adds 765ef4bb2af6 [X86] Check destination element type before forming VTRUNC [...] adds cf8467057947 [mlir][openacc][NFC] move index in processDataOperands adds d3faef6eefe5 [SROA] Avoid splitting loads/stores with irregular type adds 9ce2e5e7003d Revert "[OpenMP] libomp: implement OpenMP 5.1 inoutset tas [...] adds 96ca2d92b52b [mlir][ArmSVE] Add basic load/store operations adds 64e9aa33020d Do not generate calls to the 128-bit function __multi3() o [...] adds 9eef6e39816a [InstCombine] add tests for casts-around-ctlz; NFC adds cdb9d242deba [libcxx][ci] enables assertions for runtimes-build adds f6faa71eafbc [mlir] fix a crash if the dialect is missing a data layout [...] adds 1c7f3395b8ec clang/darwin: use response files with ld64 adds acc3ca3b7a08 Fix typo in Toy tutorial Ch1 adds b76f1f120285 [SCEV] Keep common NUW flags when inlining Add operands. adds 9b496c2373dc [mlir][gpu][NFC] Simplify conversion of MMA type to NVVM adds 9494c510af56 [lldb] Use C++11 default member initializers adds b648c611ed60 [libc++] Fix libc++ build with assertions enabled adds 68a1d9a1f573 Revert "Do not generate calls to the 128-bit function __mu [...] adds c8d6e67d53a0 [ms] [llvm-ml] Fix parity errors in error handling for INC [...] adds 20126c9fd4af Reland "[llvm] llvm-tapi-diff" adds 8908903eacb0 Corrects some minor issues with the CXX status page. adds 64b2fb7967a7 [CSSPGO] Emit mangled dwarf names for line tables debug op [...] adds 56f60a1ce765 [mlir][spirv] Use SingleBlock + NoTerminator for spv.module adds 0e083cef7003 [mlir][tosa] Update tosa.matmul lowering to linalg.batch_matmul adds f776108168ab [docs] Collate CMake options adds 62bd7da889c1 [LangRef] Add link to opaque pointers adds e7c621a60788 [libc++][nfc] Test std::unique_ptr self move assignment. adds 222cce3828a5 Revert "[InstSimplify] Treat invariant group insts as bitc [...] adds c43f413b01b0 [ms] [llvm-ml] Add support for INCLUDE environment variable adds 68d0db0b6d56 Revert "[ms] [llvm-ml] Add support for INCLUDE environment [...] adds 5dbe3bf4b8db [clang-tidy] performance-unnecessary-copy-initialization: [...] adds 314c049142ed [compiler-rt][hwasan] Decouple use of the TLS global for g [...] adds 90a26a41e9ce [llvm-tapi-diff] Apply stable sorting to output adds c70c30d6da0a [OpenMP][NFC] Precommit change to hide_mem_transfer_latenc [...] adds 4c9471581fa0 [Attributor] Set floating point loads and stores as nofree [...] adds a56bd7dec8da [Polly][Matmul] Re-pack A in every iteration. adds efa4dbc32ca9 [clang-tidy] performance-unnecessary-copy-initialization: [...] adds ddac31c59342 Cleanup for final comment on https://reviews.llvm.org/D103304 adds 1899cb7d0eae Revert "[llvm-tapi-diff] Apply stable sorting to output" adds e7b755ecb140 Revert "Reland "[llvm] llvm-tapi-diff"" adds b65f30d6fb6f [SCEV] Minor code motion to simplify a later patch [nfc] adds 1b21e9c1fa99 Add a static assertions for custom Op<> to not defined dat [...] adds 4b5317e937ac [ms] [llvm-ml] Add support for INCLUDE environment variable adds 4ac3dae57f27 [tests] Precommit test for D103991 adds 8dfd0810f240 [RISCV] Remove unused method from RISCVInsertVSETVLI. NFC adds b9d7ffd9cf5f Folds linalg.pad_tensor with zero padding adds cf11d9585afd Fix to Windows temp file change. adds 0e399eb5273b [lld/mac] When handling @loader_path, use realpath() of symlinks adds bbe6f51b726f [lld/mac] Make framework symlinks in tests more realistic adds c962491a41c3 Save/restore OuterTemplateParams in AbstractManglingParser [...] adds f8f1c9c38989 Annotate memcpy's of globals with info about the src/dst adds b0eb3919835a [clang][RISCV][test] Add more tests of the -mabi and -marc [...] adds 047f6d99158c Add .mailmap entries for myself, and sort the list adds 91f147792e81 [libomptarget][amdgpu] Remove stray fprintf in rtl.cpp adds e87c095af3e3 [lld/mac] Print dylib search details with --print-dylib-se [...] adds 4a89ed373cda [AIX] Add traceback ssp canary bit support adds f6632f11ed19 [AMDGPU] Fix missing lowering of LDS used in global scope. adds 5fc2673fbce2 [HIP] Add --gpu-bundle-output adds 5b5ab80e3195 Reland "[llvm] llvm-tapi-diff" adds 8a23f74eb79f [llvm-objdump][XCOFF] Enable the -l (--line-numbers) option. adds b6f983dd842e [Utils][vim] Highlight 'ptr' type adds 8ff36aab69ec [ConstantFolding] Enable folding of min/max/copysign for a [...] adds b5d6da358746 [libc] Remove libc-fuzzer as a dependency to check-libc. adds 546449938a39 [libcxx][optional] adds missing constexpr operations adds 6680538dd0bf Update my mailmap adds dec3154c161c [Docs] Fix incorrect return type for example code adds a115c5247f5a [NFC] Pre-commit tests for VectorCombine scalarize adds 0b21371e1201 [mlir] Support pre-existing tokens in 'gpu-async-region' adds c8e980ab4acc [XCOFF][llvm-objdump] Dump the debug type in `--section-he [...] adds c0438a2c0f42 [LangRef] Fix missing code highlighting format adds 99653702fdca Revert "[AArch64LoadStoreOptimizer] Generate more STPs by [...] adds ad6a84f82c45 Revert "[Verifier] Speed up and parallelize dominance chec [...] adds 31859f896cf9 Implementation of global.get/set for reftypes in LLVM IR adds c5ffc6f8bd6a [OpenCL] Add builtin header test adds ac677e69bdfc [OpenCL] Relax test implicit members in C++ for OpenCL adds 7325aaefa52a [mlir] make LLVMPointerType implement the data layout type [...] adds 7fb1f62d12c6 [clang][Arm] Require arm and aarch64 target for bf16 intri [...] adds 4eb47e3cd4c0 [TargetLowering] getABIAlignmentForCallingConv - pass Data [...] adds 0ce61d47c03d Add explicit braces to silence warning about ambiguous 'el [...] adds b01d393fc035 Fix MSVC int64_t -> uint64_t "narrowing conversion" warning. adds 64de8763aa7c Revert "Implementation of global.get/set for reftypes in LLVM IR" adds 58c3f20bbf51 [flang][windows] Run regression tests under Windows. NFCI. adds 055770d5bcee Reland "[gn build] port d1d36f7ad (llvm-tapi-diff)" adds a9e4f91adf59 [llvm][PPC] Add missing case for 'I' asm memory operands adds ec43c1213a16 [NFC][XCOFF] Replace structs FileHeader32/SectionHeader32 [...] adds e0569033e21d [llvm] Make Sequence reverse-iterable adds 3c1f0e9ef89f [InstSimplify] Add constant fold for extractelement + spla [...] adds 00ebbedd1c92 [ms] [llvm-ml] Make variable redefinition match ML.EXE adds 1ad52105eb88 [InstCombine] Add fold for extracting known elements from [...] adds 89c41c335dac [clang-tidy] Allow disabling integer narrowing conversions [...] adds cc86b87a5700 [CodeGen] limit tests to current pass manager to avoid var [...] adds a95937452f23 [clang] Make CXXDefaultArgExpr inherit dependence from the [...] adds 0c32ffceedca [OpenMP] Add type to firstprivate symbol for const firstpr [...] adds 734213d7b51f Fix test hip-device-compile.hip adds 8daac3714083 [clang][FPEnv] Clang floatng point model ffp-model=precise [...] adds db9ba830d4b3 [ARM] MVE VPT block tests with debug info. NFC adds 9872551ca09b [ARM] Skip debug during vpt block creation adds de79919e9ec9 [AArch64] Add cost tests for bitreverse adds 407c11b56337 [TableGen] Eliminate dead code in ParseForeachDeclaration [NFC] adds 7f0244afa828 [libc++abi] NFC: adding a new parameter base to functi [...] adds 63233da7230a [X86][NFC] Fix typo. adds 49eba8bf1780 [clang] Do not crash when ArgTy is null in CheckArgAlignment adds 9833b57981c4 [clang][driver] Add -foperator-names adds 936d6756ccfb [clang][msvc] Define _HAS_STATIC_RTTI to 0, when compiling [...] adds c70b0e808da8 [clang-cl] Add /permissive and /permissive- adds 3dceffd0fdbc [AArch64] Silence fallthrough warning. NFC. adds 3b46283c1539 [docs][llvm-ar] Add rsp-quoting option to the llvm-ar comm [...] adds 428a62f65f16 [mlir][gpu] Add op to create MMA constant matrix adds 026170d17d1e Fix range-loop-analysis warning adds 3a7a77494178 Add a page to track the status of C proposals in Clang. adds 75d4f55d150c [AIX] Build libLTO as MODULE rather than SHARED adds c3cc14f87f78 Revert "[clang][FPEnv] Clang floatng point model ffp-model [...] adds a0ae3b078914 [libc++abi] Remove the LIBCXXABI_ENABLE_PIC option adds cfbf61cd5994 [lldb] Add 9494c510af56 to .git-blame-ignore-revs adds 0112f6ac7151 [Flang][Runtime][tests] Escape regex special character. adds 4d11ba38b47d [gn build] minor TODO.txt update adds a0bd24453b14 [flang] Fixed simple typo in runtime code adds a893b441873d [SLP]Disable scheduling of insertelements. adds 1b894ccdc9ee [AArch64][GlobalISel] Mark some G_BITREVERSE types as lega [...] adds ff81a2c95ddb [mlir-lsp-server] Add support for textDocument/documentSymbols adds bb97959949ff [mlir-lsp-server] Document the features provided by the la [...] adds ca10add5dbe4 [lldb, win] Remove obsolete workaround for MSVC and python libs adds f03a3caac5e5 [ms] [llvm-ml] Warn on command-line redefinition adds c0e6f2f43a4c [mlir-vscode] Fix dependencies to enable packaging the ext [...] adds 4e5f8b4d8d9d [libc] Add implementation of expm1f. adds 4b5c6c5c4b92 [lld-macho][nfc] Fix uninitialized members warning from Coverity adds e0c605f6383c [ARM] Ensure instructions are simplified prior to GatherSc [...] adds a22236120f17 [OpenMP] Implement '#pragma omp unroll'. adds bbb3d03f93b8 [libcxx][ranges][nfc] moves view concepts into `__ranges/c [...] adds 14097fbb0818 [gn build] Port bbb3d03f93b8 adds b6ee5f2b1df6 Move code for checking loop metadata into Analysis [nfc] adds 1d3873d41eca Move variable only used inside an assert into the assert. adds aaaeb4b160fe [SCEV] Use mustprogress flag on loops (in addition to func [...] adds c03b6305d841 [ELF][RISCV] Resolve branch relocations referencing undefi [...] adds 0995bbdb66eb [ELF] Simplify getAArch64UndefinedRelativeWeakVA. NFC adds 859c924c5fd5 [libc++] Remove unnecessary header in enable_view.h (which [...] adds 7629b2a09c16 [LI] Add a cover function for checking if a loop is mustpr [...] adds 5d5b686f6bf6 [ARM] Fix Changed status in MVEGatherScatterLoweringPass. adds 667fbcdd0b2e [clang] NRVO: Improvements and handling of more cases. adds 7b969ef8b4eb [SimplifyCFG] avoid 'tmp' variables in test file; NFC adds 4f01122c3f6c [LV] Parallel annotated loop does not imply all loads can [...] adds 20daedacca80 2d Arm Neon sdot op, and lowering to the intrinsic. adds 4f6ec382c8b7 [MLIR] Document that Dialect Conversion traverses in preorder adds 933df6ca796c [AArch64][GlobalISel] Legalize scalar G_CTTZ + G_CTTZ_ZERO_UNDEF adds 462f8f061136 [libcxx][ranges] removes default_initializable from weakly [...] adds 41555eaf65b1 Preserve more MD_mem_parallel_loop_access and MD_access_gr [...] adds cbd0054b9eb1 [clang] Implement P2266 Simpler implicit move adds 189428c8fc24 [Profile] Handle invalid profile data adds fc018ebb608e [IR] make -warn-frame-size into a module attr adds b73742bc8d2e [Profile] Remove redundant check adds 119965865cc7 LoadStoreVectorizer: support different operand orders in t [...] adds 5a1589fc6d11 [static initializers] Emit global_ctors and global_dtors i [...] adds ffaca140d01b [IR] Value: Fix OpCode checks adds b35a842581f0 [RISCV] Add test cases that show failure to use some W ins [...] adds cfbb92441f17 [SDAG] Fix pow2 assumption when splitting vectors adds 2c2d2922a24b [ValueTypes] Define MVTs for v6i32, v6f32, v7i32, v7f32 adds 670edf3ee004 [AArch64][GlobalISel] Fix incorrectly generating uxtw/sxtw [...] adds f8a1d652da00 [mlir][IR] Move MemRefElementTypeInterface to a new Builti [...] adds c42dd5dbb015 [mlir] Add new SubElementAttr/SubElementType Interfaces adds 8800047707a9 [mlir-ir-printing] Prefix the dump message with the split [...] adds 7836d058c7e1 [Flang] Compile fix after D99459. adds 420bd5ee8ec9 [RISCV] Use ComputeNumSignBits/MaskedValueIsZero in RISCVD [...] adds 2670c7dd5b25 [VectorCombine] Fix alignment in single element store adds db26615aa6a1 Revert "[clang] Implement P2266 Simpler implicit move" adds 85ca7e424fd0 Revert "[clang] NRVO: Improvements and handling of more cases." adds 081ae5fe1aa3 [RISCV] Remove extra assignment of intrinsic ID in ManualC [...] adds 54418c5a355e [lld/mac] Make binaries written by lld strippable adds 643b6407faf4 [RISCV] Avoid scalar outgoing argumetns overwriting vector [...] adds 632cbcac7906 [lldb] Move once_flags in HostInfoLinux so the internal st [...] adds bc104fdcecc0 [PowerPC] Relax register superclasses for paired memops adds f3f904563ec9 [lldb] Fix leak in test adds 0d5af7a4caaf Revert "[CMake] Don't use libc++ by default on Windows yet" adds 22f194909ae2 Revert "[Driver] Support libc++ in MSVC" adds c4a0969b9c14 Function Specialization Pass adds eac994e227dc [gn build] Port c4a0969b9c14 adds f98b7796142d [mlir] Refactor ComplexOps.td [NFC] adds 47d138c93992 [clang-tidy] LIT test fix for Remark diagnostic adds 6455418d3d2a [compiler-rt] [builtins] [AArch64] Add missing AArch64 dat [...] adds ca964b40e6e5 [OpenCL][NFC] Reorganize ClangOpenCLBuiltinEmitter comments adds d789ed11ea01 Fix implicit dependency on <string> header. NFCI. adds 5e6bfb661e8b [Analysis] Pass RecurrenceDescriptor as const reference. NFCI. adds f0a68bbc967a SampleProf.h - fix spelling mistake in assert message. NFC. adds 56d5c46b494d [X86] Support __tile_stream_loadd intrinsic for new AMX interface adds abc0e0125cc5 [NFC][VectorCombine] Extract computeAlignmentAfterScalariz [...] adds 20542b47d637 [VectorCombine] scalarizeLoadExtract(): use computeAlignme [...] adds 0cc3100bf8d1 [analyzer] Introduce a new interface for tracking adds 967c06b3e95b [analyzer] Reimplement trackExpressionValue as ExpressionHandler adds b6bcf953220d [analyzer] Change FindLastStoreBRVisitor to use Tracker adds 87a5c4d3745a [analyzer] Hide and rename FindLastStoreBRVisitor adds f853d2601abd [analyzer] Turn ReturnVisitor into a tracking visitor adds 3fc8d943c360 [analyzer] Refactor trackRValueExpression into ExpressionHandler adds 51d4704d5ec9 [analyzer] Turn TrackControlDependencyCond into a tracking [...] adds 57006d2f6d96 [analyzer] Refactor trackExpressionValue to accept Trackin [...] adds 646e970d44d7 [llvm-stress] Fix dead code preventing us generating per-e [...] adds 63042d46bb0c clang-format: [JS] don't sort named imports if off. adds b102e6880ab0 [OpenCL] Fix overloading resolution of addrspace constructors adds d7c219a506ec [CostModel][AArch64] Improve the cost estimate of CTPOP intrinsic adds 789708617d20 Do not generate calls to the 128-bit function __multi3() o [...] adds 691ba0f8acb5 [clang][NFC] Avoid assignment in condition adds 955d88992a55 [ADT] Consistently use StringExtrasTest for the test suite [...] adds 1a53fb0596ab [clang-tidy] NarrowingConversionsCheck should support inhi [...] adds 8dc2c1a0abdd [Test] Add loop deletion test with switch adds c1bb75febe9d [PowerPC] Allow wa inline asm to also accept floating poin [...] adds ad381e39a526 [mlir] Provide minimal Python bindings for the math dialect adds 9eedde705fab precommit tests for D104042 adds 8840c94a3380 [Test] One more elaborate test with selects for loop deletion adds d30c202d276d [clangd] don't rename if the triggering loc is not actuall [...] adds 71a02ddda105 [VP][NFC] Format comment to 80 columns adds 61cdaf66fe22 [ADT] Remove APInt/APSInt toString() std::string variants adds 6aca6032c5b6 [AST] Include the TranslationUnitDecl when traversing with [...] adds 0fc4016d913d APInt.h - add missing <utility> header. adds cd2e500e555e [lldb] DumpDataExtractor.cpp - replace APInt::toString() w [...] adds 7c7978a122fd [Polly][Isl] Removing explicit operator bool() from isl C+ [...] adds 6b4b98d98c94 [mlir][[linalg] Remove deprecated structured op interface [...] adds 4125b46232ca Revert "[lldb] Add support for evaluating expressions in s [...] adds f6b4e081dc9c [mlir][linalg] Prepare drop unit dims for scalar operands. adds f7bc9db95aba Fix Wdocumentation missing parameter warnings. NFCI. adds 4295c222a8f1 StringExtrasTest.cpp - add missing newline at the end of f [...] adds 602ab248335e [SimplifyCFG] avoid crash on degenerate loop adds 307cfad0d639 Fix extraneous ')' error. adds d2661c6c5175 [mlir][linalg] Prepare pad to static bounding box for scal [...] adds 7b444a66b33c Fix for error "'Run' overrides a member function but is no [...] adds 150f7cedfb2e Referencing a static function defined in an opnemp clause, [...] adds 9907746f5db7 Move Function Specialization to its correct location. NFC. adds c783013b1471 [gn build] Port 9907746f5db7 adds e2d0798bc3e4 [lldb] Unmark TestInlines as XFAIL for gcc adds b1603cb66fc6 [lldb] Fix compilation after removal of APInt::toString adds ab46490dfc5c [lldb] Remove GCC XFAIL for TestTypedefArray adds edd9515bd125 [mlir][VectorToGPU] First step to convert vector ops to GP [...] adds cd2bb16d563e [SLP][NFC]Add a test for unordered stores, NFC. adds 74af4bb1f471 [SLP]Remove unnecessary UndefValue in CreateShuffle. adds f2b1a1e10c5a [lld/mac] Use sectionType() more adds 0867edfc6438 [HWASan] Add basic stack tagging support for LAM. adds e42a347b7440 [Sema] Address-space sensitive check for unbounded arrays (v2) adds 7e9822cc5506 Revert "[Sema] Address-space sensitive check for unbounded [...] adds a010d4230e13 [SLP]Allow reordering of insertelements. adds 773771ba382b [CodeGen][regalloc] Don't align stack slots if the stack c [...] adds 82a3b606b01d Update the C status page somewhat. adds 5ef5177145b4 [lldb-vscode] Synchronize calls to SendTerminatedEvent adds f2cc0427b13e [HIP] Fix --hip-version flag with 0 as component adds e0efebb8eb7c [Matrix] In transpose opts, handle a^t * a^t adds 9106047ee3dd [libcxx][ranges] Add range.subrange. adds 2244a0f5fe62 [gn build] Port 9106047ee3dd adds f84dbd2f2bef [libc++] Enable the synchronization library on Apple platforms adds f35bcea1d474 [X86FixupLEAs] Sub register usage of LEA dest should block [...] adds c54d3050f7b9 [libc++] NFC: Move indirect_concepts.h to __iterator/concepts.h adds ee98f600de9e [gn build] Port c54d3050f7b9 adds 94a07c79cf10 [SLP][NFC] Fix condition that was supposed to save a bit o [...] adds c7dee6aefd5b [lldb] Enable TestRuntimeTypes on Apple Silicon adds fc71a5c6e8e8 [lldb] Support new objective-c hash table layout adds fdc0d4360b4e Introduce alloca_scope op adds ce44fe199bbf [Sema] Address-space sensitive check for unbounded arrays (v2) adds 93f3c7cc3efc CodeGen: Fix missing const adds 9d7299b6f0ab GlobalISel: Reduce indentation and remove dead path adds 6dd54dada3b1 AMDGPU/GlobalISel: Fix indentation adds a845dc1e562c AMDGPU/GlobalISel: Remove leftover hack for argument memory sizes adds 7eba4856c702 [libcxx][ranges] Add class ref_view. adds a67780f7db26 [gn build] Port 7eba4856c702 adds 27ef43d279b2 [compiler-rt] Add platform detection support for x32 adds c0c5a98b2c47 [NFC][OpaquePtr] Explicitly pass GEP source type in optimi [...] adds e0b469ffa142 [clang-cl][sanitizer] Add -fsanitize-address-use-after-ret [...] adds 1b241b9b400b [flang] Handle multiple USE statements for the same module adds f60d23c7381c [mlir][docs] Reorder PassWrapper arguments adds 06c3d52aa2fa [docs][OpaquePtr] Add some specific examples of what needs [...] adds f47d00c54b52 [IRSim] Adding basic implementation of llvm-sim. adds 22dea6923155 [clang][ObjC] allow the use of NSAttributedString * argume [...] adds ac81cb7e6dde Allow ptrtoint/inttoptr of non-integral pointer types in IR adds 8bc0eb401165 Revert "[IRSim] Adding basic implementation of llvm-sim." adds 79ffbc9c9f5f [NFC][CostModel] Fixed comment that comparisons work regar [...] adds 0aef747b8465 [NFC][X86][Codegen] Megacommit: mass-regenerate all check [...] adds 60fde9542aac [lldb] Remove GCC XFAIL for TestCPPAuto and TestClassTempl [...] adds 64720f57bea6 [IRSim] Don't copy the Mapper for createCandidatesFromSuffixTree adds 60084d490059 [sanitizer] Replace -mllvm -asan-use-after-return in compi [...] adds 1d22596b2f6a [sanitizer] Remove numeric values from -asan-use-after-ret [...] adds ad1d60bf5334 [InstCombine] update test checks; NFC adds 1c51bf3b7885 [InstCombine] add tests for bit manipulation intrinsics wi [...] adds 37a2c4517bbf [NFC][OpaquePtr] Make getMemoryParamAllocType() compatible [...] adds b9af157fd18d [ASan/Win] Hide index from compiler to avoid new clang warning adds 0276cc742bfc [llvm-objcopy][MachO] Do not strip symbols with the flag R [...] adds 541ccd1c1bb2 Allow signposts to take advantage of deferred string substitution adds 635b72136e95 Disambiguate usage of struct mach_header and other MachO d [...] adds f6dea2e7328b [IRSim] Strip out the findSimilarity call from the constructor adds b90f9bea9673 Revert "Allow signposts to take advantage of deferred stri [...] adds 5d88f2dd9478 [lld-macho] Deduplicate fixed-width literals adds 7f2ba39b1688 [lld-macho][nfc] Move liveness-tracking fields into Concat [...] adds 681cfeb59119 [lld-macho][nfc] Have InputSection ctors take some parameters adds 464d3dc3d11e [lld-macho] Have dead-stripping work with literal sections adds 4fc93a3a1f95 Allow signposts to take advantage of deferred string substitution adds 6393164cf249 [AIX][compiler-rt] Fix cmake build of libatomic for cmake-3.16+ adds c8b8e8e02223 [MLIR] Execution engine python binding support for shared [...] adds 5de7467e9821 [lld-macho] Fix debug build adds b9095f5e1a7f [lld][MachO] Fix function starts section adds 8fb53dca2f61 Improve materializer error messages to include type names. adds 984e270a9a70 [mlir] make normalizeAffineFor public adds dbc262968f8e [Flang][test] Fix Windows buildbot. adds 0a0800c4d10c A post-processing for BFI inference adds c27e8141b3d1 [AMDGPU][IndirectCalls] Fix register usage propagation for [...] adds e087b4f14986 Revert "[X86FixupLEAs] Sub register usage of LEA dest shou [...] adds 5cd66420ccb1 Revert "[X86FixupLEAs] Transform the sequence LEA/SUB to SUB/SUB" adds 8e6279796387 [lit] Attempt for fix tests failing because of 'warning: n [...] adds b4583a5ad73b Revert "Allow signposts to take advantage of deferred stri [...] adds 466e5aba6495 [MLIR] Simplify affine.if ops with trivial conditions adds 0d9e8f5f4b68 [VPlan] Add more sinking/merging tests with predicated loa [...] adds 1e50c3d785f4 [clang] NRVO: Improvements and handling of more cases. adds 76f1baa7875a Revert "Revert "DirectoryWatcher: add an implementation fo [...] adds c997867dc084 [X86] Add ISD::FREEZE and ISD::AssertAlign to the list of [...] adds fae7debadcea [CHR] Don't run ControlHeightReduction if any BB has addre [...] adds 5899278758b6 [llvm-objcopy] Exclude empty sections in IHexWriter output adds 8bc1ce0f61da Use dyn_cast_or_null instead of dyn_cast in FunctionLike:: [...] adds 2db64e199aa3 [NFC][X86][Codegen] Add shuffle test that would benefit fr [...] adds 152c9871e6ac Simplify getArgAttrDict/getResultAttrDict by removing unne [...] adds 49f4a58d53c7 [ORC-RT] Split Simple-Packed-Serialization code into its o [...] adds 9eb2f723c245 [X86] Check immediate before get it. adds 02c718301b30 llvm-objcopy: fix section size truncation/extension when d [...] adds aa93603ff6a4 [runtimes] Fix umbrella component targets adds 1e72b9d52f9c Revert "[X86] Check immediate before get it." adds 5be314f79ba7 [X86] Check immediate before get it. adds f6b9836b09c7 [ARM][NEON] Combine base address updates for vld1Ndup intrinsics adds bf2063178218 [clang] Implement P2266 Simpler implicit move adds e405db075b30 [ORC-RT] Fix a comment. adds fc3ca2cc083b [JITLink][MachO] Add missing testcase. adds a7c3105adb55 [ORC-RT] Remove unused header in unit test. adds b013c58e82c6 VPlanSLP.cpp - tidy implicit header dependencies. NFCI. adds 2477b498f256 ArgumentPromotion.cpp - remove unused <string> include. NFCI. adds 7d7e913e096a SValExplainer.h - get APSInt values by const reference ins [...] adds afd44bb6f29c [InstCombine] fold ctlz/cttz of bool types adds 7ff3a89a7b94 [clang][NFC] Add IsAnyDestructorNoReturn field to CXXRecor [...] adds bee2f618d599 [ARM] Introduce t2WhileLoopStartTP adds c14fd171fe77 LoopUnrollAndJamPass.cpp - remove unused <vector> include. NFCI. adds 56541d137790 GVN.cpp - remove unused <vector> include. NFCI. adds 5f9bc580d81b fix comment typos to cycle bots adds 35a12023f392 DWARFDebugFrame.cpp - remove unused <string> include. NFCI. adds dbfa3d289bc4 MachOObjectFile.cpp - remove unused <string> include. NFCI. adds 2c4ee1e112a2 RegUsageInfoPropagate.cpp - remove unused <string> and <ma [...] adds 3dc727e81b92 ProfiledCallGraph.h - remove unused <string> include. NFCI. adds a03d09f423a4 DetailedRecordsBackend.cpp - tidy implicit header dependen [...] adds d1b57086d55a DetailedRecordsBackend.cpp - printSectionHeading - avoid s [...] adds 033e594c594b DIPrinter.h - tidy implicit header dependencies. NFCI. adds 9efe89d82ff9 BoundsChecking.cpp - tidy implicit header dependencies. NFCI. adds 4089e0bbfafd RawError.h - remove unused <string> include. NFCI. adds 6ecc99210cdc [LoopUnroll] Test multi-exit runtime unrolling with predic [...] adds 7d4c8a2b8f16 [lld/mac] clarify comment adds 527a1821e6f8 DirectoryWatcher: also wait for the notifier thread adds 5be3a1a06483 [SPARC] Legalize truncation and extension between fp128 and half adds 673c5ba58497 [clang-format] Adds a formatter for aligning arrays of structs adds 60e32a1f34e9 [fuzzer] Fix build on musl adds 899fdf548eee [ELF] Add OVERWRITE_SECTIONS command adds b4baccc2a760 Introduce tensor.insert op to Tensor dialect. adds 562593ff82f8 [DSE] Extra multiblock loop tests, NFC. adds e03be2efe564 unwind: allow building with GCC adds 56edcbc2ad8c Fix misspelled instruction in X86 assembly parser adds d81c059c3ed2 [ms] [llvm-ml] Fix capitalization of the ignored CPU directives adds f09e200b31f4 [ms] [llvm-ml] When parsing MASM, "jmp short" instructions [...] adds b2a073901216 [lld-macho][nfc] Remove InputSection::outSecFileOff adds c5c05ffa4562 [lld-macho][nfc] Represent the image loader cache with a C [...] adds da24e6d43e3f [lld-macho][nfc] Add `final` to classes where possible adds 594febf05b41 [Utils] Add missing freeze and poison keyword highlights adds bf5d3092f855 [mlir][linalg] Add constant padding helper to PadTensorOp adds b1b822714db8 [mlir] Vectorize linalg.pad_tensor consumed by transfer_read adds b1fd8a13cc1a [mlir] Vectorize linalg.pad_tensor consumed by subtensor_insert adds 562f9e995dfa [mlir] Vectorize linalg.pad_tensor consumed by transfer_write adds 4fa867786043 [DominanceInfo] Make the ctor take a defaulted value for t [...] adds fdb21f0c5edd [mlir][linalg] Remove generic PadTensorOp vectorization pattern adds ba9e28064b25 [ORC-RT] Fix an error check. adds dcbbc69cc582 Calculate getTerminator only when necessary adds 167e7afcd52b Implement DW_CFA_LLVM_* for Heterogeneous Debugging adds 9c5d43fb5513 [lld-macho] Try to fix MSAN "uninitialized memory" error new 0dd4c4b5ae49 [Testsuite] Change these tests to only have a single verif [...] new e0bb5020643c [LLParser] Remove outdated deplibs new 092c303955cd AMD k8 family does not support SSE4.x which are required b [...] new 98fff5153a81 [mlir][linalg] Lower PadTensorOp to InitTensorOp + FillOp [...] new 4c2f3d810b4a [mlir][linalg] Vectorize linalg.pad_op source copying (sta [...] new 01e3b344690d [mlir][linalg] Vectorize linalg.pad_op source copying (improved) new 8449af41e5c7 [LoopVectorize] precommit pr50686.ll for D104148 new b5b9489b2415 Only consider built-in compound assignment operators for - [...] new 73cbc91c93dd [mlir] Add ExpOp to Complex dialect. new ddda52ce3cf2 [mlir][linalg] Lower PadTensorOps with non-constant pad value new 046922e10037 [mlir][linalg] Add support for scalar input operands. new 2116eadf0994 [mlir] Remove traits that require vector type support from [...] new 74d45b884cfb [VP] Binary floating-point intrinsics. new 57e85622bbdb [flang] Add initial implementation for CPU_TIME new 1d49e5352f95 [llvm] remove Sequence::asSmallVector() new 669771cfe75b [clang][deps] NFC: Preserve the original frontend action new e63f27a3cf81 [libc] Add a set of elementary operations new 78668c822af9 [clang][modules][pch] Allow loading PCH with different mod [...] new a2363c0cf9b6 Reland "[lldb] Set return status to failed when adding a c [...] new 0f94d68a2e15 [lldb] Add missing changes to a2363c0cf9b6a9a81c76ac652da6 [...] new 9223209be11e [clang][deps] Handle precompiled headers' AST files new ab45c1f21f63 Revert "[libc] Add a set of elementary operations" new f583029da3d6 [lldb] Correct "else if" to "elif" in TestRegisters new 166192eb78cd [flang] Add POSIX implementation for CPU_TIME new a83ef21ff82e Fix -Wswitch warning after 092c303955cd18be6c0b923b1c0a1b9 [...] new 4629554f0b66 [clang][deps] Handle modular dependencies present in PCH new 8ddbb442b6e8 [Analyzer][solver] Simplify existing eq classes and constr [...] new 35fa3e60d161 [clang][deps] Move stripping of diagnostic serialization f [...] new d8bab69ead22 [clang][deps] Move invocation adjustments from `clang-scan [...] new cf7d9704688d [clang][deps] Move injection of `-Wno-error` from `clang-s [...] new 6c6dcfc4ce75 [clang][deps] Move enabling system header deps from `clang [...] new 9e77526d4673 [VPlan] Add additional tests for region merging. new 1d8882b5e44e [clang][deps] Fix failing modules.cpp test new 11e2922bb7ad [lldb][docs] Document SBType new 41115efca642 [clang][deps] NFC: Check the correct context hashes in tests new 80c0c639687e [clang][deps] Prevent unintended modifications of the orig [...] new ac031c8db2ce Revert "[lldb] Set return status to failed when adding a c [...] new 8e93aa304b3f [libc++] Refactor the tests for std::prev, next and advance new 88e4aae57d4d [MLIR][NFC] Rename MemRefDataFlow -> AffineScalarReplacement new f39dcf85f994 [clang][deps] NFC: Fix an XFAIL test on Windows new 9f967eed89e6 [libc++] NFC: More refactoring in the prev/next/advance te [...] new bb8ce25e8821 Intrinsic::getName: require a Module argument The 42 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .clang-tidy | 2 +- .git-blame-ignore-revs | 3 + .mailmap | 8 +- .../clang-tidy/abseil/DurationRewriter.cpp | 2 +- .../NarrowingConversionsCheck.cpp | 124 +- .../cppcoreguidelines/NarrowingConversionsCheck.h | 5 + .../ProBoundsConstantArrayIndexCheck.cpp | 4 +- .../clang-tidy/misc/UniqueptrResetReleaseCheck.cpp | 2 +- .../clang-tidy/modernize/LoopConvertCheck.cpp | 2 +- .../performance/UnnecessaryCopyInitialization.cpp | 89 +- .../performance/UnnecessaryCopyInitialization.h | 7 +- clang-tools-extra/clangd/DumpAST.cpp | 10 +- clang-tools-extra/clangd/FindTarget.cpp | 7 +- clang-tools-extra/clangd/Hover.cpp | 2 +- clang-tools-extra/clangd/index/remote/README.md | 2 +- clang-tools-extra/clangd/refactor/Rename.cpp | 20 + .../clangd/refactor/tweaks/AddUsing.cpp | 3 +- .../clangd/unittests/DiagnosticsTests.cpp | 20 +- clang-tools-extra/clangd/unittests/RenameTests.cpp | 7 + .../clangd/unittests/SelectionTests.cpp | 5 +- clang-tools-extra/clangd/unittests/TestTU.cpp | 14 + .../cppcoreguidelines-narrowing-conversions.rst | 8 +- ...owing-conversions-equivalentbitwidth-option.cpp | 27 +- ...rrowing-conversions-narrowinginteger-option.cpp | 23 + ...necessary-copy-initialization-allowed-types.cpp | 2 + ...performance-unnecessary-copy-initialization.cpp | 81 + .../test/clang-tidy/infrastructure/remarks.cpp | 5 +- clang/.clang-tidy | 23 +- clang/cmake/caches/Fuchsia-stage2.cmake | 17 +- clang/cmake/caches/Fuchsia.cmake | 10 +- clang/docs/ClangFormatStyleOptions.rst | 35 + clang/docs/DataFlowSanitizer.rst | 65 +- clang/docs/DataFlowSanitizerDesign.rst | 99 +- clang/docs/InternalsManual.rst | 2 +- clang/docs/ReleaseNotes.rst | 3 + clang/include/clang-c/Index.h | 6 +- clang/include/clang/AST/ASTContext.h | 50 +- .../clang/AST/CXXRecordDeclDefinitionBits.def | 4 + clang/include/clang/AST/ComputeDependence.h | 2 + clang/include/clang/AST/DeclCXX.h | 361 +- clang/include/clang/AST/Expr.h | 39 +- clang/include/clang/AST/ExprCXX.h | 36 +- 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llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 6 + .../Transforms/Vectorize/LoadStoreVectorizer.cpp | 146 +- .../Vectorize/LoopVectorizationLegality.cpp | 16 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 45 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 302 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 24 +- llvm/lib/Transforms/Vectorize/VPlan.h | 4 + llvm/lib/Transforms/Vectorize/VPlanSLP.cpp | 4 +- llvm/lib/Transforms/Vectorize/VectorCombine.cpp | 32 +- llvm/runtimes/CMakeLists.txt | 10 + llvm/test/Analysis/CostModel/AArch64/bitreverse.ll | 51 +- llvm/test/Analysis/CostModel/AArch64/ctpop.ll | 61 +- .../AArch64/scalable-mem-op-cost-model.ll | 51 - llvm/test/Analysis/CostModel/AArch64/sve-gather.ll | 51 +- .../CostModel/AArch64/sve-illegal-types.ll | 40 + llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll | 23 + .../Analysis/CostModel/AArch64/sve-remainder.ll | 61 + .../test/Analysis/CostModel/AArch64/sve-scatter.ll | 52 +- llvm/test/Analysis/CostModel/X86/arith-fix.ll | 40 +- llvm/test/Analysis/CostModel/X86/arith-overflow.ll | 40 +- llvm/test/Analysis/CostModel/X86/arith.ll | 18 +- llvm/test/Analysis/CostModel/X86/cast.ll | 6 +- .../CostModel/X86/min-legal-vector-width.ll | 34 +- llvm/test/Analysis/CostModel/X86/rem.ll | 36 +- llvm/test/Analysis/CostModel/X86/trunc.ll | 138 +- llvm/test/Analysis/ScalarEvolution/lt-overflow.ll | 187 + llvm/test/Analysis/ScalarEvolution/ne-overflow.ll | 187 + .../Analysis/ScalarEvolution/no-wrap-add-exprs.ll | 10 +- .../ScalarEvolution/no-wrap-symbolic-becount.ll | 28 + .../ScalarEvolution/trip-count-unknown-stride.ll | 55 +- llvm/test/Assembler/auto_upgrade_intrinsics.ll | 64 +- llvm/test/CMakeLists.txt | 1 + .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 24 +- .../CodeGen/AArch64/GlobalISel/legalize-add.mir | 731 +++ .../AArch64/GlobalISel/legalize-bitreverse.mir | 68 + .../GlobalISel/legalize-cttz-zero-undef.mir | 94 + .../CodeGen/AArch64/GlobalISel/legalize-cttz.mir | 92 + .../AArch64/GlobalISel/legalize-inserts.mir | 74 +- .../GlobalISel/legalizer-info-validation.mir | 12 +- .../GlobalISel/select-arith-extended-reg.mir | 141 + .../AArch64/GlobalISel/select-bitreverse.mir | 88 + llvm/test/CodeGen/AArch64/memsize-remarks.ll | 13 + llvm/test/CodeGen/AArch64/neon-sad.ll | 59 + llvm/test/CodeGen/AArch64/vecreduce-bool.ll | 6 +- .../AMDGPU/GlobalISel/dynamic-alloca-uniform.ll | 28 +- .../GlobalISel/extractelement-stack-lower.ll | 18 +- .../test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll | 40 +- llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll | 414 +- .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir | 7 +- .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 38 +- .../AMDGPU/GlobalISel/legalize-constant.mir | 7 +- .../AMDGPU/GlobalISel/legalize-load-constant.mir | 982 ++-- .../AMDGPU/GlobalISel/legalize-load-flat.mir | 443 +- .../AMDGPU/GlobalISel/legalize-load-global.mir | 4042 +++++++------- .../AMDGPU/GlobalISel/legalize-load-local.mir | 2495 ++++----- .../AMDGPU/GlobalISel/legalize-load-private.mir | 839 +-- .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 63 +- .../test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir | 7 +- .../CodeGen/AMDGPU/GlobalISel/legalize-select.mir | 19 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 38 +- .../CodeGen/AMDGPU/GlobalISel/legalize-xor.mir | 7 +- .../CodeGen/AMDGPU/GlobalISel/legalize-zext.mir | 162 +- .../GlobalISel/llvm.amdgcn.image.gather4.dim.ll | 2 +- .../GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll | 8 +- .../GlobalISel/llvm.amdgcn.image.sample.g16.ll | 4 +- .../AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll | 3 + .../CodeGen/AMDGPU/GlobalISel/load-constant.96.ll | 18 +- .../CodeGen/AMDGPU/GlobalISel/load-local.96.ll | 116 +- .../CodeGen/AMDGPU/GlobalISel/load-unaligned.ll | 64 +- .../CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll | 10 +- llvm/test/CodeGen/AMDGPU/addrspacecast.ll | 2 +- llvm/test/CodeGen/AMDGPU/agpr-register-count.ll | 29 +- llvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll | 2 +- llvm/test/CodeGen/AMDGPU/amdpal-callable.ll | 4 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.../AMDGPU/gfx-callable-preserved-registers.ll | 80 +- .../CodeGen/AMDGPU/gfx-callable-return-types.ll | 12 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 40 +- .../AMDGPU/llvm.amdgcn.image.gather4.dim.ll | 4 +- .../AMDGPU/llvm.amdgcn.image.gather4.o.dim.ll | 8 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll | 8 +- .../AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll | 18 +- .../AMDGPU/llvm.amdgcn.image.sample.g16.a16.dim.ll | 16 +- .../AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll | 4 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll | 4 +- .../AMDGPU/llvm.amdgcn.image.sample.o.dim.ll | 18 +- .../CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll | 3 + .../{MIR => }/AMDGPU/load-store-opt-scc.mir | 0 .../AMDGPU/local-stack-alloc-block-sp-reference.ll | 30 +- .../CodeGen/AMDGPU/lower-kernel-lds-constexpr.ll | 37 +- .../CodeGen/AMDGPU/lower-kernel-lds-global-uses.ll | 55 + .../CodeGen/AMDGPU/lower-kernel-lds-super-align.ll | 23 + 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llvm/test/CodeGen/AMDGPU/stack-realign-kernel.ll | 6 +- llvm/test/CodeGen/AMDGPU/stack-realign.ll | 42 +- .../AMDGPU/unstructured-cfg-def-use-issue.ll | 6 +- llvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll | 14 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 8 +- llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll | 16 +- llvm/test/CodeGen/ARM/arm-vlddup-update.ll | 478 +- .../ARM/machine-outliner-stack-fixup-thumb.mir | 20 +- .../CodeGen/ARM/umulo-128-legalisation-lowering.ll | 330 +- llvm/test/CodeGen/ARM/warn-stack.ll | 5 +- llvm/test/CodeGen/Generic/ForceStackAlign.ll | 5 +- llvm/test/CodeGen/MIR/AArch64/cfi.mir | 2 + llvm/test/CodeGen/Mips/stack-alignment.ll | 20 +- .../CodeGen/PowerPC/aix-emit-tracebacktable-ssp.ll | 37 + .../PowerPC/aix-p9-xxinsertw-xxextractuw.ll | 6 +- llvm/test/CodeGen/PowerPC/asm-template-I.ll | 19 + llvm/test/CodeGen/PowerPC/constant-pool.ll | 25 +- llvm/test/CodeGen/PowerPC/mma-acc-spill.ll | 15 +- llvm/test/CodeGen/PowerPC/mma-intrinsics.ll | 90 +- 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llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 250 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 328 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 216 +- .../CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll | 70 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 244 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 101 +- .../RISCV/rvv/fixed-vectors-int-buildvec.ll | 72 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 96 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll | 92 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 144 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 154 +- .../RISCV/rvv/fixed-vectors-int-vrgather.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 1216 +++-- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 130 +- .../RISCV/rvv/fixed-vectors-mask-load-store.ll | 30 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll | 20 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 80 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 610 +-- .../RISCV/rvv/fixed-vectors-masked-load-fp.ll | 54 +- .../RISCV/rvv/fixed-vectors-masked-load-int.ll | 64 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 452 +- .../RISCV/rvv/fixed-vectors-masked-store-fp.ll | 54 +- .../RISCV/rvv/fixed-vectors-masked-store-int.ll | 66 +- .../RISCV/rvv/fixed-vectors-reduction-fp.ll | 432 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 1838 +++---- .../CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll | 354 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-int.ll | 148 +- .../RISCV/rvv/fixed-vectors-stepvector-rv32.ll | 30 +- .../RISCV/rvv/fixed-vectors-stepvector-rv64.ll | 66 +- .../CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll | 228 +- .../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 224 +- .../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 224 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 160 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll | 48 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll | 48 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-vnsra-vnsrl.ll | 24 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 224 +- .../RISCV/rvv/fixed-vectors-vreductions-mask.ll | 54 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll | 36 +- .../CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll | 208 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll | 208 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll | 208 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 160 +- .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 288 +- llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 50 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll | 150 +- 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llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 638 +-- llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 468 +- .../RISCV/rvv/named-vector-shuffle-reverse.ll | 172 +- llvm/test/CodeGen/RISCV/rvv/regalloc-fast-crash.ll | 2 +- .../CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll | 20 +- .../CodeGen/RISCV/rvv/rv32-vsetvli-intrinsics.ll | 12 +- .../CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll | 20 +- .../CodeGen/RISCV/rvv/rv64-vsetvli-intrinsics.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/select-fp.ll | 76 +- llvm/test/CodeGen/RISCV/rvv/select-int.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/select-sra.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 441 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 441 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll | 515 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll | 513 +- llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 76 +- .../CodeGen/RISCV/rvv/unsupported-calling-conv.ll | 1 + llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 272 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll | 264 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv32.ll | 134 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv64.ll | 134 +- llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 296 +- llvm/test/CodeGen/RISCV/rvv/vamoadd-rv32.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamoadd-rv64.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamoand-rv32.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamoand-rv64.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamomax-rv32.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamomax-rv64.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv32.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamomaxu-rv64.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamomin-rv32.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamomin-rv64.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamominu-rv32.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamominu-rv64.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamoor-rv32.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamoor-rv64.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamoswap-rv32.ll | 280 +- llvm/test/CodeGen/RISCV/rvv/vamoswap-rv64.ll | 280 +- llvm/test/CodeGen/RISCV/rvv/vamoxor-rv32.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vamoxor-rv64.ll | 140 +- llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 272 +- llvm/test/CodeGen/RISCV/rvv/vand-rv64.ll | 264 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv32.ll | 220 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv64.ll | 220 +- llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 296 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 76 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 76 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll | 155 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll | 168 +- llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 208 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv32.ll | 134 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv64.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 208 +- llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll | 112 +- llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv64.ll | 112 +- llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv32.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/vfadd-rv64.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll | 66 +- llvm/test/CodeGen/RISCV/rvv/vfclass-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll | 320 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll | 60 +- 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llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll | 66 +- llvm/test/CodeGen/RISCV/rvv/vfmv.f.s.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfmv.v.f-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 60 +- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 60 +- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfnmadd-sdnode.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfnmsub-sdnode.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll | 368 +- llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfrec7-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfrec7-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredmax-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredmin-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredosum-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredsum-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfredsum-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfrsqrt7-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv32.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv32.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfslide1down-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 54 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfsqrt-sdnode.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vfsub-rv32.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll | 66 +- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 263 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 263 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 36 +- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 36 +- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwmacc-rv64.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv32.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwmsac-rv64.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv32.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwnmacc-rv64.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv32.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwnmsac-rv64.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 263 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 263 +- llvm/test/CodeGen/RISCV/rvv/vid-rv32.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vid-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/viota-rv32.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/viota-rv64.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll | 300 +- llvm/test/CodeGen/RISCV/rvv/vle-rv32.ll | 148 +- llvm/test/CodeGen/RISCV/rvv/vle-rv64.ll | 148 +- llvm/test/CodeGen/RISCV/rvv/vle1-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vle1-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll | 160 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll | 160 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll | 536 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll | 536 +- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll | 1544 +++--- llvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll | 2212 ++++---- llvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll | 148 +- llvm/test/CodeGen/RISCV/rvv/vlse-rv64.ll | 148 +- llvm/test/CodeGen/RISCV/rvv/vlseg-rv32.ll | 774 +-- llvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll | 840 +-- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32-dead.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv32.ll | 516 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64-dead.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vlsegff-rv64.ll | 560 +- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv32.ll | 774 +-- llvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll | 840 +-- llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll | 536 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll | 536 +- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll | 1544 +++--- llvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll | 2212 ++++---- llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 156 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll | 144 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv64.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 156 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll | 144 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmand-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmandnot-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmandnot-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll | 80 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv32.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv64.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv32.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv64.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmclr-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmerge-rv64.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv32.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv64.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vminu-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv32.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv64.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmnand-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmnand-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmnor-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmnor-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmor-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmor-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmornot-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmornot-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vmsbc-rv64.ll | 88 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 88 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 363 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll | 360 +- llvm/test/CodeGen/RISCV/rvv/vmset-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmset-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 417 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll | 414 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 417 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll | 414 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 363 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll | 360 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 363 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll | 360 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 363 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll | 360 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 363 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll | 360 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 363 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll | 360 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 363 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll | 360 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 363 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll | 360 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv32.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv64.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 208 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode-rv32.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll | 184 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv32.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.v-rv64.ll | 74 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv64.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv64.ll | 44 +- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vmxor-rv64.ll | 14 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll | 180 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll | 180 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll | 180 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll | 180 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 156 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll | 144 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 156 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll | 144 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll | 180 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll | 180 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll | 180 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll | 180 +- llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 272 +- llvm/test/CodeGen/RISCV/rvv/vor-rv64.ll | 264 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll | 178 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll | 178 +- llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 296 +- llvm/test/CodeGen/RISCV/rvv/vpopc-rv32.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vpopc-rv64.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv32.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredmax-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredmaxu-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv32.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv32.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredminu-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv32.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredor-rv64.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv32.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vredsum-rv64.ll | 84 +- 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3 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (409cac34d9 -> 987610f2d6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/binutils-gdb. from 409cac34d9 [gdb/testsuite] Simplify gdb.base/info-types.exp.tcl adds b0e2f96b56 [gdb/testsuite] Fix gdb.base/run-attach-while-running.exp adds cfa8e270c9 gdb: set only inferior_ptid in sparc_{fetch,store}_inferior_ [...] adds f1854e35d8 gdb/testsuite: use proc_with_prefix in gdb.base/attach.exp adds ecac8d1c14 Add Power 10 PLT instruction patterns adds a12a15e7c5 gdb: handle case where type alignment is unknown adds cfc75767cc gdb/testsuite: gdb.base/continue-all-already-running.exp: ad [...] adds d8ca8e9fac nat/amd64-linux-siginfo.c: Move align attribute from typedef [...] adds c57eb1a269 nat/amd64-linux-siginfo.c: Remove typedefs adds fa6ec8efa4 gdb_rl_find_completion_word: Remove 'found_quote' local adds 1b453aed8b Fix a couple -Wdeprecated-copy issues adds e266dea992 Automatic date update in version.in adds 64c2e4a530 gnulib: import chown adds c469a50252 sim: v850: assume chown is available adds 172a7ff54b gnulib: import netdb adds d20bc12288 gnulib: import select adds a55b92be28 sim: igen: harmonize tool variables adds 25ff4de715 [gdb/testsuite] Fix gdb.base/sect-cmd.exp adds ac6c175edd [gdb/testsuite] Simplify gdb.base/sect-cmd.exp adds 4a11703a04 [gdb/testsuite] Fix gdb.threads/multi-create-ns-info-thr.exp adds 4c5d7c03c4 [gdb/testsuite] Fix gdb.base/batch-preserve-term-settings.ex [...] adds f185acddfa x86: minor improvements to optimize_disp() (part I) adds 77c5978907 x86-64: avoid bogus warnings with 32-bit addressing adds cd613c1fcc x86: minor improvements to optimize_disp() (part II) adds 7e96fb6871 x86: minor improvements to optimize_imm() (part II) adds 7c757f41aa x86: cover a.out in recently added tests adds 58f076c6f8 [gdb/testsuite] Simplify gdb.base/info-types.exp.tcl further adds c3cfd9eb5b [gdb/testsuite] Fix gdb.base/info-macros.exp with check-read1 adds 956ea65cd7 bfd/elf: Don't read non-existing secondary relocs adds fdae5c22ce [gdb/testsuite] Disallow single argument in multi_line adds 5804373d03 bfd/elf: Don't read non-existing secondary relocs adds 122373f7f2 gdb: try to load libthread_db only after reading all shared [...] adds f9e59d060f Use is/is not to check for None in python code. adds 1bc5b62129 Automatic date update in version.in adds f75bcf7e57 Fix the creation of archives for Sparc Solaris2 targets by e [...] adds d0a3c757b9 gdb/testsuite: add some logging in Term::_check_box adds cc96519fdc Remove Daniel Jacobwitz from the maintainers list adds c70fdc45f6 Update read1 example in gdb/testsuite/README adds 906192d785 sim: cgen: inline cgen_init logic adds eee649922f sim: bpf: use CURRENT_TARGET_BYTE_ORDER adds cfc6061bd8 sim: nrun: tweak init of callback endian adds dc3de083d5 sim: mn10300: tweak engine halt hook adds 943f9baa37 sim: cleanup obsolete NULL fallback adds c572c4580e Automatic date update in version.in adds 0cc809fa0f [gdb/testsuite] Fix gdb.cp/cplusfuncs.exp with check-read1 adds 36695cf8ff [gdb/testsuite] Fix gdb.cp/nested-types.exp with check-read1 adds 4bdd1a0620 [gdb/testsuite] Convert multi-line function call into si [...] adds 7772f16880 x86: suppress LEA optimization in a specific 16-bit case adds e925962f4e arm: fix array-out-of-bounds upon register parsing error adds 1db66fb653 arm: avoid "shadowing" of glibc function name adds 6179e5f1d8 [gdb/testsuite] Fix timeout in gdb.mi/user-selected-context- [...] adds 9edb1e0191 gdb/testsuite: capture GDB tty name in default_gdb_spawn adds 860cc54cd4 Automatic date update in version.in adds f64b9b13ce PR27952, Disallow ET_DYN DF_1_PIE linker input adds 4de91c10cd readelf section reading adds 066f8fbede readelf info leaks from one object to the next adds 28b2963ffb RISC-V: Update the riscv_opts.[rvc|rve] in the riscv_set_arch. adds 2748c1b17e x86: Always define TC_PARSE_CONS_EXPRESSION adds 48ec4c05c6 Implement Rust raw identifiers adds db77748be8 gdb, testsuite: Fix mi-var-child-f.exp for Intel compilers. adds 873793ae09 gdb: remove unused struct call_site_stuff forward declaration adds e2b9ea4bbb libthread_db initialization changes related to upcoming glibc-2.34 adds 4cc2e60671 testsuite/glib-2.34: Match/consume optional libthread_db rel [...] adds 72c4daa36a print-symbol-loading.exp: Allow libc symbols to be already loaded adds b8bd29a157 mi-sym-info.exp: Increase timeout for 114-symbol-info-functions adds 46f263ccff Fix ChangeLog entry location adds 6fe7f5c416 Automatic date update in version.in adds e331b18d42 Re: readelf section reading adds 8c60e272c7 readelf: don't clear section_headers in process_file_header adds b15c5d7a51 sim: unify platform function & header tests adds dba333c1e4 sim: unify assert build settings adds 5ea4547402 sim: unify environment build settings adds 5629cf2b98 sim: ppc: unify env settings too adds d424629da8 remote: Fix indentation in remote_new_objfile. adds a48ff3efda sim: ppc: unify header & function & type tests too adds 4b530cfa37 Automatic date update in version.in adds 497a20bd3b sim: split debug/stdio/trace/profile options into dedicated [...] adds 04381273a9 sim: unify debug/stdio/trace/profile build settings adds 6dd65fc048 sim: unify bug & package settings adds ba307cddcf sim: overhaul alignment settings management adds 4218a6dc8b sim: erc32/ppc: fix handling of $EXEEXT adds a80249d0a9 sim: erc32: replace caddr_t with void* adds 2726bbc339 sim: assume sys/select.h always exists adds a687671327 sim: rx: replace cycle-stats with common profile settings adds dd8e16ea7b sim: unify sim-load.o building adds ad9cc20970 sim: start unifying portability shims adds f4d7566aef Automatic date update in version.in adds 0f318b8478 sim: rx: move cycle-accurate settings to CPPFLAGS adds 92a3f61363 sim: ppc: use common version.o too adds 4981807e06 gas: drop TC_ADDRESS_BYTES conditionals adds 987610f2d6 gas: fold three as_warn() in emit_expr_with_reloc() No new revisions were added by this update. Summary of changes: bfd/ChangeLog | 17 + bfd/config.bfd | 5 +- bfd/elf-bfd.h | 3 + bfd/elf.c | 5 + bfd/elflink.c | 2 + bfd/version.h | 2 +- binutils/ChangeLog | 35 + binutils/MAINTAINERS | 2 - binutils/readelf.c | 168 +- gas/ChangeLog | 74 + gas/config/tc-arm.c | 35 +- gas/config/tc-i386.c | 54 +- gas/config/tc-i386.h | 3 - gas/config/tc-riscv.c | 18 +- gas/doc/internals.texi | 3 +- gas/read.c | 18 +- gas/testsuite/gas/i386/i386.exp | 2 + gas/testsuite/gas/i386/lea16-optimize.d | 8 +- .../i386/{lea16-optimize.d => lea16-optimize2.d} | 6 +- gas/testsuite/gas/i386/lea16.d | 50 + gas/testsuite/gas/i386/lea16.s | 3 + gas/testsuite/gas/i386/lea64-optimize.d | 6 + gas/testsuite/gas/i386/lea64.d | 6 + gas/testsuite/gas/i386/lea64.s | 8 + gas/testsuite/gas/i386/quoted.d | 24 +- gas/testsuite/gas/i386/wrap32-data.d | 26 +- gas/testsuite/gas/i386/wrap32-text.d | 32 +- gdb/ChangeLog | 107 + gdb/amd64-tdep.c | 5 +- gdb/completer.c | 22 +- gdb/doc/ChangeLog | 5 + gdb/doc/python.texi | 2 +- gdb/dwarf2/loc.h | 1 - gdb/dwarf2/read.c | 1 + gdb/infcmd.c | 4 + gdb/inferior.h | 4 + gdb/infrun.c | 5 + gdb/linux-thread-db.c | 48 +- gdb/nat/amd64-linux-siginfo.c | 28 +- gdb/ppc-tdep.h | 2 + gdb/ppc64-tdep.c | 194 +- gdb/python/lib/gdb/FrameDecorator.py | 10 +- gdb/python/lib/gdb/command/frame_filters.py | 4 +- gdb/remote.c | 22 +- gdb/rs6000-tdep.c | 8 + gdb/rust-parse.c | 32 +- gdb/solib.c | 9 +- gdb/sparc-nat.c | 10 +- gdb/symtab.h | 1 + gdb/testsuite/ChangeLog | 147 + gdb/testsuite/README | 6 +- gdb/testsuite/gdb.base/attach.exp | 50 +- .../gdb.base/batch-preserve-term-settings.exp | 12 +- .../gdb.base/continue-all-already-running.exp | 1 + .../gdb.base/execl-update-breakpoints.exp | 1 + gdb/testsuite/gdb.base/foll-exec.c | 19 +- .../gdb.base/fork-print-inferior-events.exp | 3 +- gdb/testsuite/gdb.base/gdbinit-history.exp | 6 +- gdb/testsuite/gdb.base/info-macros.exp | 6 +- gdb/testsuite/gdb.base/info-types.exp.tcl | 83 +- gdb/testsuite/gdb.base/jit-reader.exp | 4 +- .../gdb.base/premature-dummy-frame-removal.py | 4 +- gdb/testsuite/gdb.base/print-symbol-loading.exp | 15 +- .../gdb.base/run-attach-while-running.exp | 8 +- gdb/testsuite/gdb.base/sect-cmd.exp | 21 +- gdb/testsuite/gdb.cp/cplusfuncs.exp | 11 +- gdb/testsuite/gdb.cp/nested-types.exp | 11 +- .../testsuite/gdb.dwarf2/dw2-weird-type-len.c | 41 +- gdb/testsuite/gdb.dwarf2/dw2-weird-type-len.exp | 107 + gdb/testsuite/gdb.fortran/dynamic-ptype-whatis.exp | 2 +- gdb/testsuite/gdb.mi/array.f | 20 - gdb/testsuite/gdb.mi/array.f90 | 21 + gdb/testsuite/gdb.mi/mi-sym-info.exp | 56 +- gdb/testsuite/gdb.mi/mi-var-child-f.exp | 4 +- gdb/testsuite/gdb.mi/user-selected-context-sync.c | 16 +- gdb/testsuite/gdb.python/py-frame-args.py | 2 +- .../gdb.python/py-framefilter-invalidarg.py | 2 +- gdb/testsuite/gdb.python/py-framefilter.py | 2 +- gdb/testsuite/gdb.python/py-nested-maps.py | 4 +- gdb/testsuite/gdb.python/py-objfile-script-gdb.py | 2 +- gdb/testsuite/gdb.python/py-prettyprint.py | 4 +- gdb/testsuite/gdb.python/py-section-script.py | 2 +- gdb/testsuite/gdb.python/py-unwind-inline.py | 2 +- gdb/testsuite/gdb.python/python.exp | 2 +- gdb/testsuite/gdb.rust/pp.py | 2 +- gdb/testsuite/gdb.rust/{pp.py => rawids.exp} | 60 +- gdb/testsuite/gdb.rust/rawids.rs | 26 + .../gdb.threads/multi-create-ns-info-thr.exp | 2 +- gdb/testsuite/lib/cp-support.exp | 36 +- gdb/testsuite/lib/gdb.exp | 117 +- gdb/testsuite/lib/rust-support.exp | 17 + gdb/testsuite/lib/tuiterm.exp | 81 +- gnulib/ChangeLog | 26 + gnulib/Makefile.gnulib.inc.in | 2 +- gnulib/Makefile.in | 27 + gnulib/aclocal.m4 | 6 + gnulib/config.in | 31 + gnulib/configure | 4253 ++++++++++++-------- gnulib/import/Makefile.am | 98 + gnulib/import/Makefile.in | 183 +- gnulib/import/chown.c | 151 + gnulib/import/fchown-stub.c | 34 + gnulib/import/m4/chown.m4 | 218 + gnulib/import/m4/gnulib-cache.m4 | 6 + gnulib/import/m4/gnulib-comp.m4 | 38 + gnulib/import/m4/netdb_h.m4 | 44 + gnulib/import/m4/select.m4 | 117 + gnulib/import/m4/socketlib.m4 | 96 + gnulib/import/m4/sockets.m4 | 17 + gnulib/import/m4/sys_select_h.m4 | 95 + gnulib/import/netdb.in.h | 295 ++ gnulib/import/select.c | 597 +++ gnulib/import/sockets.c | 161 + gnulib/import/sockets.h | 66 + gnulib/import/sys_select.in.h | 326 ++ gnulib/import/w32sock.h | 140 + gnulib/update-gnulib.sh | 3 + ld/ChangeLog | 11 + ld/ldelf.c | 4 +- ld/testsuite/ld-sparc/sparc.exp | 19 +- sim/ChangeLog | 68 + sim/Makefile.in | 121 +- sim/aarch64/ChangeLog | 13 + sim/aarch64/aclocal.m4 | 4 - sim/aarch64/config.in | 126 - sim/aarch64/configure | 772 +--- sim/aarch64/configure.ac | 5 - sim/aarch64/interp.c | 5 + sim/aclocal.m4 | 9 + sim/arm/ChangeLog | 13 + sim/arm/aclocal.m4 | 4 - sim/arm/config.in | 126 - sim/arm/configure | 768 +--- sim/arm/configure.ac | 1 - sim/arm/wrapper.c | 3 + sim/avr/ChangeLog | 13 + sim/avr/aclocal.m4 | 4 - sim/avr/config.in | 126 - sim/avr/configure | 768 +--- sim/avr/configure.ac | 1 - sim/avr/interp.c | 3 + sim/bfin/ChangeLog | 20 + sim/bfin/aclocal.m4 | 4 - sim/bfin/config.in | 165 - sim/bfin/configure | 810 +--- sim/bfin/configure.ac | 11 - sim/bfin/interp.c | 23 +- sim/bpf/ChangeLog | 23 + sim/bpf/aclocal.m4 | 4 - sim/bpf/bpf.c | 4 +- sim/bpf/config.in | 126 - sim/bpf/configure | 768 +--- sim/bpf/configure.ac | 1 - sim/bpf/mloop.in | 2 +- sim/bpf/sim-if.c | 4 - sim/common/ChangeLog | 54 + sim/common/Make-common.in | 12 +- sim/common/cgen-defs.h | 14 - sim/common/cgen-run.c | 23 +- sim/common/cgen-utils.c | 35 - sim/common/defs.h | 18 +- sim/common/dv-sockser.c | 1 + sim/common/local.mk | 7 + sim/common/nrun.c | 11 +- sim/common/portability.c | 67 + sim/common/portability.h | 47 + sim/common/sim-base.h | 10 - sim/common/sim-basics.h | 5 - sim/common/sim-config.c | 8 +- sim/common/sim-config.h | 11 +- sim/{ppc/config.in => config.h.in} | 205 +- sim/configure | 1847 ++++++++- sim/configure.ac | 20 + sim/cr16/ChangeLog | 12 + sim/cr16/aclocal.m4 | 4 - sim/cr16/config.in | 126 - sim/cr16/configure | 768 +--- sim/cr16/configure.ac | 1 - sim/cris/ChangeLog | 26 + sim/cris/aclocal.m4 | 4 - sim/cris/config.in | 135 - sim/cris/configure | 780 +--- sim/cris/configure.ac | 8 - sim/cris/dv-rv.c | 2 - sim/cris/rvdummy.c | 5 +- sim/cris/sim-if.c | 4 - sim/cris/traps.c | 1 + sim/d10v/ChangeLog | 13 + sim/d10v/aclocal.m4 | 4 - sim/d10v/config.in | 126 - sim/d10v/configure | 768 +--- sim/d10v/configure.ac | 1 - sim/d10v/interp.c | 3 + sim/erc32/ChangeLog | 20 + sim/erc32/Makefile.in | 6 +- sim/erc32/aclocal.m4 | 3 - sim/erc32/config.in | 126 - sim/erc32/configure | 714 +--- sim/erc32/erc32.c | 20 +- sim/example-synacor/ChangeLog | 13 + sim/example-synacor/aclocal.m4 | 4 - sim/example-synacor/config.in | 126 - sim/example-synacor/configure | 768 +--- sim/example-synacor/configure.ac | 1 - sim/example-synacor/interp.c | 3 + sim/frv/ChangeLog | 17 + sim/frv/aclocal.m4 | 4 - sim/frv/config.in | 126 - sim/frv/configure | 768 +--- sim/frv/configure.ac | 1 - sim/frv/sim-if.c | 7 +- sim/ft32/ChangeLog | 13 + sim/ft32/aclocal.m4 | 4 - sim/ft32/config.in | 126 - sim/ft32/configure | 768 +--- sim/ft32/configure.ac | 1 - sim/ft32/interp.c | 3 + sim/h8300/ChangeLog | 13 + sim/h8300/aclocal.m4 | 4 - sim/h8300/config.in | 129 - sim/h8300/configure | 773 +--- sim/h8300/configure.ac | 3 - sim/igen/ChangeLog | 7 + sim/igen/gen-itable.c | 5 - sim/igen/gen-model.c | 4 - sim/igen/ld-cache.c | 4 - sim/igen/ld-decode.c | 4 - sim/iq2000/ChangeLog | 17 + sim/iq2000/aclocal.m4 | 4 - sim/iq2000/config.in | 126 - sim/iq2000/configure | 768 +--- sim/iq2000/configure.ac | 1 - sim/iq2000/sim-if.c | 7 +- sim/lm32/ChangeLog | 21 + sim/lm32/aclocal.m4 | 4 - sim/lm32/config.in | 126 - sim/lm32/configure | 768 +--- sim/lm32/configure.ac | 1 - sim/lm32/dv-lm32uart.c | 1 + sim/lm32/sim-if.c | 7 +- sim/m32c/ChangeLog | 13 + sim/m32c/aclocal.m4 | 3 - sim/m32c/config.in | 141 - sim/m32c/configure | 731 +--- sim/m32c/configure.ac | 8 - sim/m32c/mem.c | 2 - sim/m32r/ChangeLog | 21 + sim/m32r/aclocal.m4 | 4 - sim/m32r/config.in | 126 - sim/m32r/configure | 768 +--- sim/m32r/configure.ac | 1 - sim/m32r/sim-if.c | 7 +- sim/m32r/traps-linux.c | 1 + sim/m4/sim_ac_common.m4 | 163 - sim/m4/sim_ac_option_alignment.m4 | 53 +- sim/m4/sim_ac_option_debug.m4 | 35 + sim/m4/sim_ac_option_profile.m4 | 48 + sim/m4/sim_ac_option_stdio.m4 | 32 + sim/m4/sim_ac_option_trace.m4 | 46 + sim/m4/sim_ac_platform.m4 | 144 + sim/m68hc11/ChangeLog | 12 + sim/m68hc11/aclocal.m4 | 4 - sim/m68hc11/config.in | 126 - sim/m68hc11/configure | 768 +--- sim/m68hc11/configure.ac | 1 - sim/mcore/ChangeLog | 12 + sim/mcore/aclocal.m4 | 4 - sim/mcore/config.in | 126 - sim/mcore/configure | 768 +--- sim/mcore/configure.ac | 1 - sim/microblaze/ChangeLog | 12 + sim/microblaze/aclocal.m4 | 4 - sim/microblaze/config.in | 126 - sim/microblaze/configure | 768 +--- sim/microblaze/configure.ac | 1 - sim/mips/ChangeLog | 18 + sim/mips/Makefile.in | 30 +- sim/mips/aclocal.m4 | 4 - sim/mips/config.in | 135 - sim/mips/configure | 780 +--- sim/mips/configure.ac | 2 - sim/mn10300/ChangeLog | 21 + sim/mn10300/Makefile.in | 4 +- sim/mn10300/aclocal.m4 | 4 - sim/mn10300/config.in | 126 - sim/mn10300/configure | 768 +--- sim/mn10300/configure.ac | 1 - sim/mn10300/sim-main.h | 2 +- sim/moxie/ChangeLog | 12 + sim/moxie/aclocal.m4 | 4 - sim/moxie/config.in | 126 - sim/moxie/configure | 768 +--- sim/moxie/configure.ac | 1 - sim/msp430/ChangeLog | 12 + sim/msp430/aclocal.m4 | 4 - sim/msp430/config.in | 126 - sim/msp430/configure | 768 +--- sim/msp430/configure.ac | 1 - sim/or1k/ChangeLog | 18 + sim/or1k/aclocal.m4 | 4 - sim/or1k/config.in | 126 - sim/or1k/configure | 768 +--- sim/or1k/configure.ac | 1 - sim/or1k/sim-if.c | 4 - sim/or1k/traps.c | 2 +- sim/ppc/ChangeLog | 48 + sim/ppc/Makefile.in | 19 +- sim/ppc/aclocal.m4 | 1 - sim/ppc/basics.h | 4 - sim/ppc/config.in | 274 -- sim/ppc/configure | 1006 +---- sim/ppc/configure.ac | 79 +- sim/ppc/debug.h | 19 + sim/ppc/defs.h | 14 +- sim/ppc/gen-itable.c | 5 - sim/ppc/gen-model.c | 4 - sim/ppc/ld-cache.c | 4 - sim/ppc/ld-decode.c | 3 - sim/ppc/std-config.h | 1 + sim/pru/ChangeLog | 13 + sim/pru/aclocal.m4 | 4 - sim/pru/config.in | 126 - sim/pru/configure | 768 +--- sim/pru/configure.ac | 1 - sim/pru/interp.c | 3 + sim/riscv/ChangeLog | 12 + sim/riscv/aclocal.m4 | 4 - sim/riscv/config.in | 126 - sim/riscv/configure | 768 +--- sim/riscv/configure.ac | 1 - sim/rl78/ChangeLog | 8 + sim/rl78/aclocal.m4 | 3 - sim/rl78/config.in | 126 - sim/rl78/configure | 714 +--- sim/rx/ChangeLog | 23 + sim/rx/Makefile.in | 2 +- sim/rx/README.txt | 4 +- sim/rx/aclocal.m4 | 3 - sim/rx/config.in | 132 - sim/rx/configure | 742 +--- sim/rx/configure.ac | 20 +- sim/rx/mem.c | 2 +- sim/rx/rx.c | 32 +- sim/sh/ChangeLog | 13 + sim/sh/aclocal.m4 | 4 - sim/sh/config.in | 126 - sim/sh/configure | 768 +--- sim/sh/configure.ac | 1 - sim/sh/interp.c | 3 + sim/v850/ChangeLog | 25 + sim/v850/Makefile.in | 4 +- sim/v850/aclocal.m4 | 4 - sim/v850/config.in | 147 - sim/v850/configure | 792 +--- sim/v850/configure.ac | 4 - sim/v850/simops.c | 2 - 356 files changed, 10503 insertions(+), 32012 deletions(-) copy gas/testsuite/gas/i386/{lea16-optimize.d => lea16-optimize2.d} (92%) create mode 100644 gas/testsuite/gas/i386/lea16.d copy sim/ppc/defs.h => gdb/testsuite/gdb.dwarf2/dw2-weird-type-len.c (61%) create mode 100644 gdb/testsuite/gdb.dwarf2/dw2-weird-type-len.exp delete mode 100644 gdb/testsuite/gdb.mi/array.f create mode 100644 gdb/testsuite/gdb.mi/array.f90 copy gdb/testsuite/gdb.rust/{pp.py => rawids.exp} (52%) create mode 100644 gdb/testsuite/gdb.rust/rawids.rs create mode 100644 gnulib/import/chown.c create mode 100644 gnulib/import/fchown-stub.c create mode 100644 gnulib/import/m4/chown.m4 create mode 100644 gnulib/import/m4/netdb_h.m4 create mode 100644 gnulib/import/m4/select.m4 create mode 100644 gnulib/import/m4/socketlib.m4 create mode 100644 gnulib/import/m4/sockets.m4 create mode 100644 gnulib/import/m4/sys_select_h.m4 create mode 100644 gnulib/import/netdb.in.h create mode 100644 gnulib/import/select.c create mode 100644 gnulib/import/sockets.c create mode 100644 gnulib/import/sockets.h create mode 100644 gnulib/import/sys_select.in.h create mode 100644 gnulib/import/w32sock.h create mode 100644 sim/common/portability.c create mode 100644 sim/common/portability.h copy sim/{ppc/config.in => config.h.in} (65%) create mode 100644 sim/m4/sim_ac_option_debug.m4 create mode 100644 sim/m4/sim_ac_option_profile.m4 create mode 100644 sim/m4/sim_ac_option_stdio.m4 create mode 100644 sim/m4/sim_ac_option_trace.m4 create mode 100644 sim/m4/sim_ac_platform.m4 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig updated (137701c5 -> 6950597f)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allyesconfig in repository toolchain/ci/base-artifacts. discards 137701c5 0: update: binutils-llvm-linux-qemu: all new 6950597f 0: update: binutils-llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (137701c5) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 74 +- 02-prepare_abe/console.log | 256 +- 03-build_abe-binutils/console.log | 11685 +++++----- 04-build_llvm/console.log | 13880 ++++++------ 05-build_abe-qemu/console.log | 7055 +++---- 06-build_linux/console.log | 984 +- 07-boot_linux/console.log | 2 +- 08-check_regression/console.log | 2 +- 08-check_regression/results.regressions | 20 +- 09-update_baseline/console.log | 2 +- 09-update_baseline/results.regressions | 20 +- console.log | 33940 +++++++++++++++--------------- jenkins/manifest.sh | 20 +- 13 files changed, 33980 insertions(+), 33960 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[gcc] branch master updated (f389f2a0352 -> 046198673c3)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from f389f2a0352 docs: remove extra '+' character in option listing. new 9b239c9147b docs: add missing newline new 046198673c3 docs: Fix -Wno-cpp note The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/doc/invoke.texi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[gcc] branch devel/sphinx updated (1775bce3a2c -> 743b0808ccf)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch devel/sphinx in repository gcc. from 1775bce3a2c Merge branch 'master' into devel/sphinx new 9b239c9147b docs: add missing newline new ae29e58bf3f Merge branch 'master' into devel/sphinx new 046198673c3 docs: Fix -Wno-cpp note new 743b0808ccf Merge branch 'master' into devel/sphinx The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/doc/invoke.texi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[binutils-gdb] branch master updated (90d3edf0163 -> 0121f438e83)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from 90d3edf0163 GNU gettext introduced this change[0] in version 0.19.8 to [...] new 0121f438e83 Use consistent type in binutils/dwarf.c The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: binutils/ChangeLog | 7 +++++++ binutils/dwarf.c | 20 ++++++++++---------- 2 files changed, 17 insertions(+), 10 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[gcc] branch master updated (45fb3d45a4d -> f389f2a0352)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 45fb3d45a4d libstdc++: Add explicit -std=gnu++17 option to test new f389f2a0352 docs: remove extra '+' character in option listing. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/doc/invoke.texi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[gcc] branch devel/sphinx updated (c0f8bdc00d1 -> 1775bce3a2c)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch devel/sphinx in repository gcc. from c0f8bdc00d1 Remove @ref. adds 917efba2dd4 libstdc++: Use reserved name for attribute [PR101055] adds 831589c227c Do not check if SMS succeeds on powerpc adds c4c47a84a16 arc: Add --with-fpu support for ARCv2 cpus adds a893b26f731 Fortran: resolve.c - remove '*XCNEW' based nullifying adds e2c79b968ff libstdc++: Change [cmp.alg] assertions to constraints adds b76a529c095 libstdc++: Implement LWG 3465 for std::compare_partial_orde [...] adds 45fb3d45a4d libstdc++: Add explicit -std=gnu++17 option to test new f389f2a0352 docs: remove extra '+' character in option listing. new 1775bce3a2c Merge branch 'master' into devel/sphinx The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/config.gcc | 44 ++++++++++++++++--- gcc/config/arc/arc.h | 4 ++ gcc/doc/invoke.texi | 4 +- gcc/fortran/resolve.c | 1 - gcc/testsuite/gcc.dg/sms-1.c | 2 - gcc/testsuite/gcc.dg/sms-10.c | 3 -- gcc/testsuite/gcc.dg/sms-2.c | 2 - gcc/testsuite/gcc.dg/sms-3.c | 3 -- gcc/testsuite/gcc.dg/sms-4.c | 3 -- gcc/testsuite/gcc.dg/sms-6.c | 2 - gcc/testsuite/gcc.dg/sms-8.c | 4 -- libstdc++-v3/include/std/tuple | 2 +- libstdc++-v3/libsupc++/compare | 51 +++++++++++----------- .../17_intro/headers/c++2011/all_attributes.cc | 1 + .../17_intro/headers/c++2014/all_attributes.cc | 1 + .../17_intro/headers/c++2017/all_attributes.cc | 2 + .../18_support/comparisons/algorithms/fallback.cc | 42 ++++++++++++++++++ 17 files changed, 118 insertions(+), 53 deletions(-) create mode 100644 libstdc++-v3/testsuite/18_support/comparisons/algorithms/fallback.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

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Tcwg-commits June 2021