Tcwg-commits August 2021

tcwg-commits@lists.linaro.org

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9583 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled updated (9c38492b -> 65031bd1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled in repository toolchain/ci/base-artifacts. from 9c38492b 0: update: binutils-c316c0b29d9991a231bdcbab0fcdc51114cddd13: 2 new 65031bd1 1: reset: gcc-d1819df86fbe42125cccb2fc2959a0bf51e524d6: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 253 +- 02-prepare_abe/console.log | 232 +- 04-build_abe-binutils/console.log | 12218 +++-- 05-build_abe-bootstrap_profiled/console.log | 60117 ++++----------------- 06-check_regression/console.log | 74 +- 06-check_regression/results.regressions | 9 + 06-check_regression/trigger-bisect | 2 + 07-update_baseline/console.log | 46 +- 07-update_baseline/results.regressions | 9 + console.log | 73246 ++++++-------------------- jenkins/manifest.sh | 10 +- reset-baseline | 0 results | 11 +- 13 files changed, 34137 insertions(+), 112090 deletions(-) create mode 100644 06-check_regression/results.regressions create mode 100644 06-check_regression/trigger-bisect create mode 100644 07-update_baseline/results.regressions create mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Os updated (011e2bb8 -> 04975c02)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/base-artifacts. discards 011e2bb8 0: update: glibc-6e8a0aac2f883a23efb1683b120499138f9e6021: 1 new 04975c02 0: update: linux-211b9970459cdf089266256d811b532c522a9449: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (011e2bb8) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 259 +- 02-prepare_abe/console.log | 490 +- 03-build_abe-binutils/console.log | 10154 +-- 04-build_abe-stage1/console.log | 13431 ++-- 05-clean_sysroot/console.log | 4 +- 06-build_abe-linux/console.log | 2618 +- 07-build_abe-glibc/console.log | 38047 +++++----- 08-build_abe-stage2/console.log | 25578 +++---- 09-build_llvm-true/console.log | 14167 ++-- 11-benchmark/benchmark-start.log | 2 +- 11-benchmark/benchmark.log | 12 +- 11-benchmark/console.log | 120 +- 12-check_regression/console.log | 2519 +- 12-check_regression/results-0.csv | 2645 +- 12-check_regression/results-1.csv | 2749 +- 12-check_regression/results-brief.csv | 38 +- 12-check_regression/results-compare.csv | 3 +- 12-check_regression/results-full.csv | 2808 +- 12-check_regression/results.csv | 163 +- 12-check_regression/results.log | 3282 +- 13-update_baseline/console.log | 2521 +- 13-update_baseline/results-0.csv | 2645 +- 13-update_baseline/results-1.csv | 2749 +- 13-update_baseline/results-brief.csv | 38 +- 13-update_baseline/results-compare.csv | 3 +- 13-update_baseline/results-full.csv | 2808 +- 13-update_baseline/results.csv | 163 +- 13-update_baseline/results.log | 3282 +- console.log | 110250 ++++++++++++++--------------- jenkins/manifest.sh | 8 +- results | 2 +- results_id | 2 +- 32 files changed, 121402 insertions(+), 122158 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_ubsan updated (e7e17be3be3 -> 1b342485274)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_ubsan in repository toolchain/ci/gcc. from e7e17be3be3 Fall back to masked_gather_load/masked_scatter_store adds 743b8dd6fd7 Darwin, X86, config: Adjust 'as' command lines [PR100340]. adds 2d9da1c8977 Darwin: Reset section names table at the end of compile. adds a42467bdb70 Restore 'gcc.dg/pr78213.c' testing adds 0edf2e81bb0 Turn global 'ggc_force_collect' variable into 'force_collec [...] adds b240450b630 Darwin, libcc1: Handle hosts with mdynamic-no-pic support. adds 60b94d8bd22 libstdc++: Avoid illegal argument to verbose in dg-test cal [...] adds 798666392b5 Objective-C: Default flag_objc_sjlj_exceptions off for NeXT [...] adds 32c3a753906 c++: Implement P0466R5 __cpp_lib_is_layout_compatible compi [...] adds b48d4e68186 Move more warning code to gimple-ssa-warn-access etc. adds e68c8280fa2 Abstract tracing routines into a class. adds 0bb74a28e13 Change evrp-mode options. adds 4759e1e0453 Add GORI tracing faciltiies. adds 2d14d64bf2d Daily bump. adds 97d51c17645 Add x86 tune to enable v2df vector reduction by paddpd. adds 1bf976a5de6 openmp: Actually ignore pragma_stmt pragmas for which c_par [...] adds 0684c8d3eff commit-mklog: Add --co argument. adds 5079b7781a2 openmp: Add nothing directive support adds 76bb3c50dd4 Fortran/OpenMP: Add memory routines existing for C/C++ adds 602fca427df Turn 'bool force_collect' parameter to 'ggc_collect' into a [...] adds e4f16e9f357 Add more self-tests for 'hash_map' with Value type with non [...] adds e12946df34c Add EAF_NOREAD check to tree-ssa-uninit adds 88ef1a14bb4 Fix thinko in latest change for GNAT encodings adds a6b3db3e862 c++: ignore explicit dguides during NTTP CTAD [PR101883] adds be4a4fb5166 c++: aggregate CTAD and brace elision [PR101344] adds f74433e70ae Fortran: Add OpenMP's nothing directive support adds c883d1dcdea libstdc++: Fix vector<bool> printer tests to work in debug mode adds 085c2f8f0e1 libstdc++: Fix CTAD for debug sequence containers adds de44eee5d52 libstdc++: Minor optimization for min/max/minmax adds 37620d57511 libstdc++: Simplify n-ary arithmetic promotion traits adds aba938d6c35 libstdc++: Enable doxygen processing for C++20 components adds 828176ba490 libstdc++: Improve doxygen comments in <bits/stl_function.h> adds 4fb471afc4f libstdc++: Improve doxygen documentation for std::unique_ptr adds 640df4ef815 aarch64: Fix float <-> int errors in vld4[q]_lane intrinsics adds bb04a03c6f9 Make 'gcc/hash-map-tests.c:test_map_of_type_with_ctor_and_d [...] new aef703cf982 analyzer: detect and analyze calls via function pointer new 1b342485274 analyzer: detect and analyze virtual function calls The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: contrib/gcc-git-customization.sh | 2 +- contrib/git-commit-mklog.py | 6 + contrib/mklog.py | 9 +- gcc/ChangeLog | 374 ++++++++++ gcc/DATESTAMP | 2 +- gcc/Makefile.in | 1 + gcc/ada/gcc-interface/decl.c | 6 +- gcc/analyzer/analysis-plan.cc | 4 + gcc/analyzer/checker-path.cc | 28 +- gcc/analyzer/checker-path.h | 6 + gcc/analyzer/diagnostic-manager.cc | 23 +- gcc/analyzer/engine.cc | 183 +++++ gcc/analyzer/exploded-graph.h | 39 ++ gcc/analyzer/program-point.cc | 18 + gcc/analyzer/program-point.h | 3 +- gcc/analyzer/program-state.cc | 44 ++ gcc/analyzer/program-state.h | 11 + gcc/analyzer/region-model.cc | 49 +- gcc/analyzer/region-model.h | 6 + gcc/analyzer/state-purge.cc | 35 +- gcc/analyzer/supergraph.cc | 43 +- gcc/analyzer/supergraph.h | 7 +- gcc/builtins.c | 22 +- gcc/c-family/ChangeLog | 17 + gcc/c-family/c-common.c | 1 + gcc/c-family/c-common.h | 3 +- gcc/c-family/c-omp.c | 4 +- gcc/c-family/c-opts.c | 4 +- gcc/c-family/c-pragma.c | 1 + gcc/c-family/c-pragma.h | 1 + gcc/c/ChangeLog | 6 + gcc/c/c-parser.c | 85 ++- gcc/calls.c | 760 --------------------- gcc/calls.h | 15 +- gcc/config.in | 7 + gcc/config/aarch64/arm_neon.h | 8 +- gcc/config/darwin.c | 8 + gcc/config/i386/darwin.h | 10 +- gcc/config/i386/i386.h | 2 + gcc/config/i386/sse.md | 4 +- gcc/config/i386/x86-tune.def | 5 + gcc/configure | 35 + gcc/configure.ac | 9 + gcc/cp/ChangeLog | 41 ++ gcc/cp/class.c | 30 - gcc/cp/constexpr.c | 12 + gcc/cp/constraint.cc | 3 + gcc/cp/cp-gimplify.c | 13 + gcc/cp/cp-objcp-common.c | 1 + gcc/cp/cp-tree.h | 11 + gcc/cp/cxx-pretty-print.c | 4 + gcc/cp/decl.c | 25 +- gcc/cp/parser.c | 81 ++- gcc/cp/pt.c | 10 +- gcc/cp/semantics.c | 268 ++++++++ gcc/cp/tree.c | 1 + gcc/cp/typeck.c | 170 +++++ gcc/doc/gty.texi | 5 +- gcc/flag-types.h | 11 +- gcc/fortran/ChangeLog | 22 + gcc/fortran/match.h | 1 + gcc/fortran/openmp.c | 11 + gcc/fortran/parse.c | 3 + gcc/ggc-common.c | 8 +- gcc/ggc-internal.h | 3 - gcc/ggc-page.c | 5 +- gcc/ggc-tests.c | 29 +- gcc/ggc.h | 6 +- gcc/gimple-range-cache.cc | 3 + gcc/gimple-range-cache.h | 1 - gcc/gimple-range-fold.cc | 4 +- gcc/gimple-range-gori.cc | 172 ++++- gcc/gimple-range-gori.h | 1 + gcc/gimple-range-trace.cc | 206 ++++++ gcc/gimple-range-trace.h | 61 ++ gcc/gimple-range.cc | 393 +++-------- gcc/gimple-range.h | 34 +- gcc/gimple-ssa-warn-access.cc | 683 +++++++++++++++++- gcc/gimple-ssa-warn-access.h | 4 +- gcc/gimple-ssa-warn-restrict.c | 1 + gcc/hash-map-tests.c | 163 +++++ gcc/objc/ChangeLog | 8 + gcc/objc/objc-next-runtime-abi-02.c | 4 +- gcc/params.opt | 11 +- gcc/pointer-query.cc | 195 +++++- gcc/pointer-query.h | 11 + gcc/read-rtl-function.c | 2 +- gcc/selftest-run-tests.c | 2 +- gcc/selftest.h | 5 - gcc/testsuite/ChangeLog | 100 +++ gcc/testsuite/c-c++-common/gomp/nothing-1.c | 37 + gcc/testsuite/c-c++-common/gomp/pr63326.c | 44 +- gcc/testsuite/g++.dg/analyzer/vfunc-2.C | 44 ++ gcc/testsuite/g++.dg/analyzer/vfunc-3.C | 32 + gcc/testsuite/g++.dg/analyzer/vfunc-4.C | 28 + gcc/testsuite/g++.dg/analyzer/vfunc-5.C | 103 +++ .../g++.dg/cpp2a/class-deduction-aggr11.C | 29 + .../g++.dg/cpp2a/class-deduction-aggr12.C | 15 + .../g++.dg/cpp2a/is-corresponding-member1.C | 61 ++ .../g++.dg/cpp2a/is-corresponding-member2.C | 158 +++++ .../g++.dg/cpp2a/is-corresponding-member3.C | 14 + .../g++.dg/cpp2a/is-corresponding-member4.C | 25 + .../g++.dg/cpp2a/is-corresponding-member5.C | 95 +++ .../g++.dg/cpp2a/is-corresponding-member6.C | 34 + .../g++.dg/cpp2a/is-corresponding-member7.C | 71 ++ .../g++.dg/cpp2a/is-corresponding-member8.C | 25 + gcc/testsuite/g++.dg/cpp2a/is-layout-compatible1.C | 80 +++ gcc/testsuite/g++.dg/cpp2a/is-layout-compatible2.C | 36 + gcc/testsuite/g++.dg/cpp2a/is-layout-compatible3.C | 64 ++ gcc/testsuite/g++.dg/cpp2a/nontype-class49.C | 8 + gcc/testsuite/g++.dg/gomp/attrs-1.C | 1 + gcc/testsuite/g++.dg/gomp/attrs-2.C | 1 + gcc/testsuite/g++.dg/gomp/attrs-7.C | 3 +- gcc/testsuite/g++.dg/gomp/attrs-9.C | 1 + gcc/testsuite/g++.dg/gomp/barrier-2.C | 2 +- gcc/testsuite/gcc.dg/Wstringop-overflow-72.c | 13 + gcc/testsuite/gcc.dg/analyzer/function-ptr-4.c | 24 + gcc/testsuite/gcc.dg/analyzer/pr100546.c | 17 + gcc/testsuite/gcc.dg/attr-alloc_size-5.c | 2 +- gcc/testsuite/gcc.dg/attr-alloc_size-7.c | 45 +- gcc/testsuite/gcc.dg/attr-alloc_size-8.c | 2 +- gcc/testsuite/gcc.dg/gomp/barrier-2.c | 3 +- gcc/testsuite/gcc.dg/gomp/declare-simd-5.c | 2 +- gcc/testsuite/gcc.dg/gomp/declare-variant-2.c | 2 +- gcc/testsuite/gcc.dg/pr78213.c | 9 +- gcc/testsuite/gcc.target/i386/pr54400.c | 2 +- gcc/testsuite/gcc.target/i386/pr94147.c | 22 + gcc/testsuite/gfortran.dg/nothing-1.f90 | 28 + gcc/testsuite/gfortran.dg/nothing-2.f90 | 7 + gcc/tree-ssa-uninit.c | 2 +- gcc/tree.c | 54 ++ gcc/tree.h | 6 + libcc1/ChangeLog | 5 + libcc1/Makefile.am | 1 + libcc1/Makefile.in | 1 + libcpp/ChangeLog | 17 + libgomp/ChangeLog | 15 + libgomp/omp_lib.f90.in | 94 +++ libgomp/omp_lib.h.in | 97 +++ libgomp/testsuite/libgomp.c-c++-common/nothing-1.c | 47 ++ libgomp/testsuite/libgomp.fortran/alloc-1.F90 | 16 - libgomp/testsuite/libgomp.fortran/alloc-4.f90 | 16 - libgomp/testsuite/libgomp.fortran/refcount-1.f90 | 61 ++ libgomp/testsuite/libgomp.fortran/target-12.f90 | 147 ++++ libstdc++-v3/ChangeLog | 58 ++ libstdc++-v3/doc/doxygen/user.cfg.in | 20 +- libstdc++-v3/include/bits/stl_algo.h | 86 ++- libstdc++-v3/include/bits/stl_function.h | 134 ++-- libstdc++-v3/include/bits/unique_ptr.h | 84 ++- libstdc++-v3/include/debug/deque | 7 +- libstdc++-v3/include/debug/forward_list | 7 +- libstdc++-v3/include/debug/list | 7 +- libstdc++-v3/include/debug/vector | 7 +- libstdc++-v3/include/ext/type_traits.h | 16 +- libstdc++-v3/include/std/complex | 29 - libstdc++-v3/include/std/type_traits | 55 +- libstdc++-v3/python/libstdcxx/v6/printers.py | 10 +- libstdc++-v3/testsuite/lib/libstdc++.exp | 3 +- .../testsuite/libstdc++-prettyprinters/simple.cc | 14 +- .../testsuite/libstdc++-prettyprinters/simple11.cc | 14 +- 160 files changed, 5376 insertions(+), 1687 deletions(-) create mode 100644 gcc/gimple-range-trace.cc create mode 100644 gcc/gimple-range-trace.h create mode 100644 gcc/testsuite/c-c++-common/gomp/nothing-1.c create mode 100644 gcc/testsuite/g++.dg/analyzer/vfunc-2.C create mode 100644 gcc/testsuite/g++.dg/analyzer/vfunc-3.C create mode 100644 gcc/testsuite/g++.dg/analyzer/vfunc-4.C create mode 100644 gcc/testsuite/g++.dg/analyzer/vfunc-5.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/class-deduction-aggr11.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/class-deduction-aggr12.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/is-corresponding-member1.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/is-corresponding-member2.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/is-corresponding-member3.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/is-corresponding-member4.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/is-corresponding-member5.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/is-corresponding-member6.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/is-corresponding-member7.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/is-corresponding-member8.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/is-layout-compatible1.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/is-layout-compatible2.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/is-layout-compatible3.C create mode 100644 gcc/testsuite/g++.dg/cpp2a/nontype-class49.C create mode 100644 gcc/testsuite/gcc.dg/Wstringop-overflow-72.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/function-ptr-4.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/pr100546.c create mode 100644 gcc/testsuite/gcc.target/i386/pr94147.c create mode 100644 gcc/testsuite/gfortran.dg/nothing-1.f90 create mode 100644 gcc/testsuite/gfortran.dg/nothing-2.f90 create mode 100644 libgomp/testsuite/libgomp.c-c++-common/nothing-1.c create mode 100644 libgomp/testsuite/libgomp.fortran/refcount-1.f90 create mode 100644 libgomp/testsuite/libgomp.fortran/target-12.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_ubsan updated (5d9cff510e -> 533f04079c)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_ubsan in repository toolchain/ci/binutils-gdb. from 5d9cff510e opcodes: Fix the auxiliary register numbers for ARC HS adds c316c0b29d gdb: fix thread_step_over_chain_length adds 8ae5245324 Automatic date update in version.in adds 9335d9f823 sim: rename ChangeLog files to ChangeLog-2021 adds 10d8e25c4d sim: nltvals: localize TARGET_<ERRNO> defines adds 9068c4a488 gdb: fix spacing on CCLD silent rules adds a3e8dd2ad3 Another ld script backtrack adds 89c905a342 [GOLD] PowerPC64 relocation overflow for -Os register save/r [...] adds a86733d63d Re: as: Replace the removed symbol with the versioned symbol adds bc0df0fa47 [gdb] [rs6000] Add ppc64*_gnu_triplet_regexp methods. adds 533f04079c [gdb] [rs6000] Add ppc64_linux_gcc_target_options method. No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gas/testsuite/gas/symver/symver16.d | 4 +- gdb/ppc-linux-tdep.c | 39 + gdb/silent-rules.mk | 2 +- gdb/thread.c | 2 +- gold/powerpc.cc | 2 + include/sim/{ChangeLog => ChangeLog-2021} | 0 ld/ldgram.y | 5 + sim/.gitignore | 2 + sim/{ChangeLog => ChangeLog-2021} | 0 sim/aarch64/{ChangeLog => ChangeLog-2021} | 0 sim/arm/{ChangeLog => ChangeLog-2021} | 0 sim/avr/{ChangeLog => ChangeLog-2021} | 0 sim/bfin/{ChangeLog => ChangeLog-2021} | 0 sim/bfin/interp.c | 22 +- sim/bpf/{ChangeLog => ChangeLog-2021} | 0 sim/common/{ChangeLog => ChangeLog-2021} | 0 sim/common/gentmap.c | 6 +- sim/cr16/{ChangeLog => ChangeLog-2021} | 0 sim/cris/{ChangeLog => ChangeLog-2021} | 0 sim/d10v/{ChangeLog => ChangeLog-2021} | 0 sim/erc32/{ChangeLog => ChangeLog-2021} | 0 sim/example-synacor/{ChangeLog => ChangeLog-2021} | 0 sim/frv/{ChangeLog => ChangeLog-2021} | 0 sim/ft32/{ChangeLog => ChangeLog-2021} | 0 sim/h8300/{ChangeLog => ChangeLog-2021} | 0 sim/igen/{ChangeLog => ChangeLog-2021} | 0 sim/iq2000/{ChangeLog => ChangeLog-2021} | 0 sim/lm32/{ChangeLog => ChangeLog-2021} | 0 sim/m32c/{ChangeLog => ChangeLog-2021} | 0 sim/m32r/{ChangeLog => ChangeLog-2021} | 0 sim/m68hc11/{ChangeLog => ChangeLog-2021} | 0 sim/mcore/{ChangeLog => ChangeLog-2021} | 0 sim/microblaze/{ChangeLog => ChangeLog-2021} | 0 sim/mips/{ChangeLog => ChangeLog-2021} | 0 sim/mn10300/{ChangeLog => ChangeLog-2021} | 0 sim/moxie/{ChangeLog => ChangeLog-2021} | 0 sim/msp430/{ChangeLog => ChangeLog-2021} | 0 sim/or1k/{ChangeLog => ChangeLog-2021} | 0 sim/ppc/{ChangeLog => ChangeLog-2021} | 2168 ++++++++++++++++++++ sim/ppc/ChangeLog.00 | 2168 -------------------- sim/pru/{ChangeLog => ChangeLog-2021} | 0 sim/riscv/{ChangeLog => ChangeLog-2021} | 0 sim/rl78/{ChangeLog => ChangeLog-2021} | 0 sim/rx/{ChangeLog => ChangeLog-2021} | 0 sim/sh/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/{ChangeLog => ChangeLog-2021} | 0 .../aarch64/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/arm/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/avr/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/bfin/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/bpf/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/cr16/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/cris/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/d10v/{ChangeLog => ChangeLog-2021} | 0 .../example-synacor/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/frv/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/ft32/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/h8300/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/iq2000/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/lm32/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/m32c/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/m32r/{ChangeLog => ChangeLog-2021} | 0 .../m68hc11/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/mcore/{ChangeLog => ChangeLog-2021} | 0 .../microblaze/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/mips/{ChangeLog => ChangeLog-2021} | 0 .../mn10300/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/moxie/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/msp430/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/or1k/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/pru/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/riscv/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/sh/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/v850/{ChangeLog => ChangeLog-2021} | 0 sim/v850/{ChangeLog => ChangeLog-2021} | 0 76 files changed, 2232 insertions(+), 2190 deletions(-) rename include/sim/{ChangeLog => ChangeLog-2021} (100%) rename sim/{ChangeLog => ChangeLog-2021} (100%) rename sim/aarch64/{ChangeLog => ChangeLog-2021} (100%) rename sim/arm/{ChangeLog => ChangeLog-2021} (100%) rename sim/avr/{ChangeLog => ChangeLog-2021} (100%) rename sim/bfin/{ChangeLog => ChangeLog-2021} (100%) rename sim/bpf/{ChangeLog => ChangeLog-2021} (100%) rename sim/common/{ChangeLog => ChangeLog-2021} (100%) rename sim/cr16/{ChangeLog => ChangeLog-2021} (100%) rename sim/cris/{ChangeLog => ChangeLog-2021} (100%) rename sim/d10v/{ChangeLog => ChangeLog-2021} (100%) rename sim/erc32/{ChangeLog => ChangeLog-2021} (100%) rename sim/example-synacor/{ChangeLog => ChangeLog-2021} (100%) rename sim/frv/{ChangeLog => ChangeLog-2021} (100%) rename sim/ft32/{ChangeLog => ChangeLog-2021} (100%) rename sim/h8300/{ChangeLog => ChangeLog-2021} (100%) rename sim/igen/{ChangeLog => ChangeLog-2021} (100%) rename sim/iq2000/{ChangeLog => ChangeLog-2021} (100%) rename sim/lm32/{ChangeLog => ChangeLog-2021} (100%) rename sim/m32c/{ChangeLog => ChangeLog-2021} (100%) rename sim/m32r/{ChangeLog => ChangeLog-2021} (100%) rename sim/m68hc11/{ChangeLog => ChangeLog-2021} (100%) rename sim/mcore/{ChangeLog => ChangeLog-2021} (100%) rename sim/microblaze/{ChangeLog => ChangeLog-2021} (100%) rename sim/mips/{ChangeLog => ChangeLog-2021} (100%) rename sim/mn10300/{ChangeLog => ChangeLog-2021} (100%) rename sim/moxie/{ChangeLog => ChangeLog-2021} (100%) rename sim/msp430/{ChangeLog => ChangeLog-2021} (100%) rename sim/or1k/{ChangeLog => ChangeLog-2021} (100%) rename sim/ppc/{ChangeLog => ChangeLog-2021} (67%) delete mode 100644 sim/ppc/ChangeLog.00 rename sim/pru/{ChangeLog => ChangeLog-2021} (100%) rename sim/riscv/{ChangeLog => ChangeLog-2021} (100%) rename sim/rl78/{ChangeLog => ChangeLog-2021} (100%) rename sim/rx/{ChangeLog => ChangeLog-2021} (100%) rename sim/sh/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/aarch64/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/arm/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/avr/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/bfin/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/bpf/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/cr16/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/cris/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/d10v/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/example-synacor/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/frv/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/ft32/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/h8300/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/iq2000/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/lm32/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/m32c/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/m32r/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/m68hc11/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/mcore/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/microblaze/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/mips/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/mn10300/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/moxie/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/msp430/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/or1k/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/pru/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/riscv/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/sh/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/v850/{ChangeLog => ChangeLog-2021} (100%) rename sim/v850/{ChangeLog => ChangeLog-2021} (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_ubsan updated (ab8e4f7a -> db08081b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_ubsan in repository toolchain/ci/base-artifacts. discards ab8e4f7a 0: update: binutils-gcc: 2 new db08081b 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ab8e4f7a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-arm [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 275 +- 02-prepare_abe/console.log | 471 +- 04-build_abe-binutils/console.log | 18215 +++-- 05-build_abe-bootstrap_ubsan/console.log | 97760 +++++++++++------------ 06-check_regression/console.log | 16 +- 07-update_baseline/console.log | 22 +- console.log | 116799 ++++++++++++++-------------- jenkins/manifest.sh | 12 +- 8 files changed, 116798 insertions(+), 116772 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/gcc-compare-results] branch master updated (8232371 -> 1fb4a8a)

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This is an automated email from the git hooks/post-receive script. "tcwg-buildslave pushed a change to branch master in repository toolchain/gcc-compare-results. from 8232371 From https://ci.linaro.org/job/tcwg_gcc_check-bisect-release- [...] new 1fb4a8a From https://ci.linaro.org/job/tcwg_gnu_native_check_gdb-bise [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../tcwg_gnu_native_check_gdb-release-aarch64.xfail | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[gcc] branch master updated (08defd9c4e4 -> f0fca213bc5)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 08defd9c4e4 Darwin, jit: Fix build [PR100613]. new f0fca213bc5 Fortran: Add OpenMP's nothing directive support (con't) The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/gfortran.dg/{ => gomp}/nothing-1.f90 | 0 gcc/testsuite/gfortran.dg/{ => gomp}/nothing-2.f90 | 2 +- 2 files changed, 1 insertion(+), 1 deletion(-) rename gcc/testsuite/gfortran.dg/{ => gomp}/nothing-1.f90 (100%) rename gcc/testsuite/gfortran.dg/{ => gomp}/nothing-2.f90 (75%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-arm updated (5a5358b749 -> dc906e94f7)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-arm in repository toolchain/ci/glibc. from 5a5358b749 hurd mmap: Reduce the requested max vmprot adds dc906e94f7 mtrace: Use a static buffer for printing [BZ #25947] No new revisions were added by this update. Summary of changes: malloc/mtrace-impl.c | 14 +++----------- 1 file changed, 3 insertions(+), 11 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-arm updated (a0ecc0d3 -> 7156d704)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_native_check_gdb/master-arm in repository toolchain/ci/base-artifacts. from a0ecc0d3 11: reset: gcc-7e39d1a15f5276f72ee478a692445569bb646e65: 1 new 7156d704 12: reset: glibc-dc906e94f7033892dadbd91718349f19e1376391: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 74 +- 02-prepare_abe/console.log | 300 +- 03-build_abe-binutils/console.log | 18480 ++--- 04-build_abe-gcc/console.log | 39151 +++++----- 05-clean_sysroot/console.log | 4 +- 06-build_abe-linux/console.log | 2685 +- 07-build_abe-glibc/console.log | 38125 +++++----- 08-build_abe-gdb/console.log | 11837 +-- 09-build_abe-dejagnu/console.log | 348 +- 10-build_abe-check_gdb/console.log | 171 +- 11-check_regression/console.log | 1260 +- 11-check_regression/extra-bisect-params | 2 +- 11-check_regression/fails.sum | 100 +- 11-check_regression/results.compare1 | 391 +- 11-check_regression/results.compare2 | 153 +- 11-check_regression/results.regressions | 136 +- 11-check_regression/trigger-bisect | 6 +- 12-update_baseline/console.log | 1158 +- 12-update_baseline/extra-bisect-params | 2 +- 12-update_baseline/fails.sum | 100 +- 12-update_baseline/results.compare1 | 391 +- 12-update_baseline/results.compare2 | 153 +- 12-update_baseline/results.regressions | 136 +- console.log | 113539 +++++++++++++++-------------- jenkins/manifest.sh | 8 +- results | 136 +- sumfiles/gdb.log.xz | Bin 1714464 -> 1690832 bytes sumfiles/gdb.sum | 4618 +- 28 files changed, 117087 insertions(+), 116377 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto updated (c0154a4a21 -> a86733d63d)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto in repository toolchain/ci/binutils-gdb. from c0154a4a21 gdb: Don't assume r_ldsomap when r_version > 1 on Linux adds 5d9cff510e opcodes: Fix the auxiliary register numbers for ARC HS adds c316c0b29d gdb: fix thread_step_over_chain_length adds 8ae5245324 Automatic date update in version.in adds 9335d9f823 sim: rename ChangeLog files to ChangeLog-2021 adds 10d8e25c4d sim: nltvals: localize TARGET_<ERRNO> defines adds 9068c4a488 gdb: fix spacing on CCLD silent rules adds a3e8dd2ad3 Another ld script backtrack adds 89c905a342 [GOLD] PowerPC64 relocation overflow for -Os register save/r [...] adds a86733d63d Re: as: Replace the removed symbol with the versioned symbol No new revisions were added by this update. Summary of changes: bfd/version.h | 2 +- gas/testsuite/gas/symver/symver16.d | 4 +- gdb/silent-rules.mk | 2 +- gdb/thread.c | 2 +- gold/powerpc.cc | 2 + include/sim/{ChangeLog => ChangeLog-2021} | 0 ld/ldgram.y | 5 + opcodes/ChangeLog | 4 + opcodes/arc-regs.h | 4 +- sim/.gitignore | 2 + sim/{ChangeLog => ChangeLog-2021} | 0 sim/aarch64/{ChangeLog => ChangeLog-2021} | 0 sim/arm/{ChangeLog => ChangeLog-2021} | 0 sim/avr/{ChangeLog => ChangeLog-2021} | 0 sim/bfin/{ChangeLog => ChangeLog-2021} | 0 sim/bfin/interp.c | 22 +- sim/bpf/{ChangeLog => ChangeLog-2021} | 0 sim/common/{ChangeLog => ChangeLog-2021} | 0 sim/common/gentmap.c | 6 +- sim/cr16/{ChangeLog => ChangeLog-2021} | 0 sim/cris/{ChangeLog => ChangeLog-2021} | 0 sim/d10v/{ChangeLog => ChangeLog-2021} | 0 sim/erc32/{ChangeLog => ChangeLog-2021} | 0 sim/example-synacor/{ChangeLog => ChangeLog-2021} | 0 sim/frv/{ChangeLog => ChangeLog-2021} | 0 sim/ft32/{ChangeLog => ChangeLog-2021} | 0 sim/h8300/{ChangeLog => ChangeLog-2021} | 0 sim/igen/{ChangeLog => ChangeLog-2021} | 0 sim/iq2000/{ChangeLog => ChangeLog-2021} | 0 sim/lm32/{ChangeLog => ChangeLog-2021} | 0 sim/m32c/{ChangeLog => ChangeLog-2021} | 0 sim/m32r/{ChangeLog => ChangeLog-2021} | 0 sim/m68hc11/{ChangeLog => ChangeLog-2021} | 0 sim/mcore/{ChangeLog => ChangeLog-2021} | 0 sim/microblaze/{ChangeLog => ChangeLog-2021} | 0 sim/mips/{ChangeLog => ChangeLog-2021} | 0 sim/mn10300/{ChangeLog => ChangeLog-2021} | 0 sim/moxie/{ChangeLog => ChangeLog-2021} | 0 sim/msp430/{ChangeLog => ChangeLog-2021} | 0 sim/or1k/{ChangeLog => ChangeLog-2021} | 0 sim/ppc/{ChangeLog => ChangeLog-2021} | 2168 ++++++++++++++++++++ sim/ppc/ChangeLog.00 | 2168 -------------------- sim/pru/{ChangeLog => ChangeLog-2021} | 0 sim/riscv/{ChangeLog => ChangeLog-2021} | 0 sim/rl78/{ChangeLog => ChangeLog-2021} | 0 sim/rx/{ChangeLog => ChangeLog-2021} | 0 sim/sh/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/{ChangeLog => ChangeLog-2021} | 0 .../aarch64/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/arm/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/avr/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/bfin/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/bpf/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/cr16/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/cris/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/d10v/{ChangeLog => ChangeLog-2021} | 0 .../example-synacor/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/frv/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/ft32/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/h8300/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/iq2000/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/lm32/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/m32c/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/m32r/{ChangeLog => ChangeLog-2021} | 0 .../m68hc11/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/mcore/{ChangeLog => ChangeLog-2021} | 0 .../microblaze/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/mips/{ChangeLog => ChangeLog-2021} | 0 .../mn10300/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/moxie/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/msp430/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/or1k/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/pru/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/riscv/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/sh/{ChangeLog => ChangeLog-2021} | 0 sim/testsuite/v850/{ChangeLog => ChangeLog-2021} | 0 sim/v850/{ChangeLog => ChangeLog-2021} | 0 77 files changed, 2199 insertions(+), 2192 deletions(-) rename include/sim/{ChangeLog => ChangeLog-2021} (100%) rename sim/{ChangeLog => ChangeLog-2021} (100%) rename sim/aarch64/{ChangeLog => ChangeLog-2021} (100%) rename sim/arm/{ChangeLog => ChangeLog-2021} (100%) rename sim/avr/{ChangeLog => ChangeLog-2021} (100%) rename sim/bfin/{ChangeLog => ChangeLog-2021} (100%) rename sim/bpf/{ChangeLog => ChangeLog-2021} (100%) rename sim/common/{ChangeLog => ChangeLog-2021} (100%) rename sim/cr16/{ChangeLog => ChangeLog-2021} (100%) rename sim/cris/{ChangeLog => ChangeLog-2021} (100%) rename sim/d10v/{ChangeLog => ChangeLog-2021} (100%) rename sim/erc32/{ChangeLog => ChangeLog-2021} (100%) rename sim/example-synacor/{ChangeLog => ChangeLog-2021} (100%) rename sim/frv/{ChangeLog => ChangeLog-2021} (100%) rename sim/ft32/{ChangeLog => ChangeLog-2021} (100%) rename sim/h8300/{ChangeLog => ChangeLog-2021} (100%) rename sim/igen/{ChangeLog => ChangeLog-2021} (100%) rename sim/iq2000/{ChangeLog => ChangeLog-2021} (100%) rename sim/lm32/{ChangeLog => ChangeLog-2021} (100%) rename sim/m32c/{ChangeLog => ChangeLog-2021} (100%) rename sim/m32r/{ChangeLog => ChangeLog-2021} (100%) rename sim/m68hc11/{ChangeLog => ChangeLog-2021} (100%) rename sim/mcore/{ChangeLog => ChangeLog-2021} (100%) rename sim/microblaze/{ChangeLog => ChangeLog-2021} (100%) rename sim/mips/{ChangeLog => ChangeLog-2021} (100%) rename sim/mn10300/{ChangeLog => ChangeLog-2021} (100%) rename sim/moxie/{ChangeLog => ChangeLog-2021} (100%) rename sim/msp430/{ChangeLog => ChangeLog-2021} (100%) rename sim/or1k/{ChangeLog => ChangeLog-2021} (100%) rename sim/ppc/{ChangeLog => ChangeLog-2021} (67%) delete mode 100644 sim/ppc/ChangeLog.00 rename sim/pru/{ChangeLog => ChangeLog-2021} (100%) rename sim/riscv/{ChangeLog => ChangeLog-2021} (100%) rename sim/rl78/{ChangeLog => ChangeLog-2021} (100%) rename sim/rx/{ChangeLog => ChangeLog-2021} (100%) rename sim/sh/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/aarch64/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/arm/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/avr/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/bfin/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/bpf/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/cr16/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/cris/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/d10v/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/example-synacor/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/frv/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/ft32/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/h8300/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/iq2000/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/lm32/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/m32c/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/m32r/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/m68hc11/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/mcore/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/microblaze/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/mips/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/mn10300/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/moxie/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/msp430/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/or1k/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/pru/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/riscv/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/sh/{ChangeLog => ChangeLog-2021} (100%) rename sim/testsuite/v850/{ChangeLog => ChangeLog-2021} (100%) rename sim/v850/{ChangeLog => ChangeLog-2021} (100%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 10 months

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