Tcwg-commits August 2021

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_bmk_gnu_tk1/gnu-release-arm-spec2k6-O2_LTO updated (84fd26d820 -> 07270a9e78)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_gnu_tk1/gnu-release-arm-spec2k6-O2_LTO in repository toolchain/ci/binutils-gdb. omits 84fd26d820 Backport patch to fix a quadratic slow down in the BFD library. omits abe2a28aaa Backportpatch to fix parsing of DWARF fuction and variable tags. omits 814d9ecf9b Automatic date update in version.in omits 9db99e42f8 Automatic date update in version.in omits 687dd74c9b arm: don't treat XScale features as part of the FPU [PR 28031] omits bd374cc2dc Automatic date update in version.in omits 2446b02367 Automatic date update in version.in omits 75a4eb82ef Automatic date update in version.in omits ed2f2f45c2 Automatic date update in version.in omits 2cfc66bc46 Automatic date update in version.in omits af42a868ef Automatic date update in version.in omits ad9a2bd65c Automatic date update in version.in omits 0adfd3a88e Automatic date update in version.in omits 6ecf41172c Automatic date update in version.in omits 80d0c46a72 Automatic date update in version.in omits a7eb3ff36c Automatic date update in version.in omits 21dd883860 Automatic date update in version.in omits 37fadb6ef2 Automatic date update in version.in omits bf57d8eb47 Automatic date update in version.in omits a81254fae7 Automatic date update in version.in omits de955b29e6 Automatic date update in version.in omits 4c30ee3286 Automatic date update in version.in omits 88cb287c03 Automatic date update in version.in omits 6bd77506c0 Automatic date update in version.in omits d9b45ba2ee Automatic date update in version.in omits dd1396b5f0 Automatic date update in version.in omits b481ba02ba Automatic date update in version.in omits 8c5062d58d Automatic date update in version.in omits 8b91c37ed9 Automatic date update in version.in omits 953595dada Automatic date update in version.in omits 1dae789b15 Automatic date update in version.in omits ecb46fca67 Automatic date update in version.in omits 0aa46dd891 Automatic date update in version.in omits 215986c7c0 Automatic date update in version.in omits 57bef2f936 Automatic date update in version.in omits 459494d59b Automatic date update in version.in omits 7e989c8aeb Automatic date update in version.in omits c2b48366f9 Automatic date update in version.in omits 5411a4251e Automatic date update in version.in omits 1932900f76 Automatic date update in version.in omits 3bc86347ee Automatic date update in version.in omits c63828ebe8 Automatic date update in version.in omits 995e0b770e Gas: Forgot to commit changelog omits eaf6d3b360 Arm: Fix forward thumb references [PR gas/25235] omits f0b059d08e Automatic date update in version.in omits 0fdbb25414 Automatic date update in version.in omits 683278f1ed Automatic date update in version.in omits 4ec27dd262 Automatic date update in version.in omits cff396521d Automatic date update in version.in omits 9112450f1e Automatic date update in version.in omits b8f4b69aaa arm: Fix bugs with MVE vmov from two GPRs to vector lanes omits 99c9bb313e Automatic date update in version.in omits 3c4029d244 Automatic date update in version.in omits 352cf802a9 Automatic date update in version.in omits 8586ba779a Automatic date update in version.in omits d6f17ee9f1 Automatic date update in version.in omits f2ece6f163 Automatic date update in version.in omits 7df48b0704 Automatic date update in version.in omits 01cab7a6b8 Automatic date update in version.in omits 3b33651e3d Automatic date update in version.in omits 54c343f5b2 Automatic date update in version.in omits fb261566ad Automatic date update in version.in omits 7efc8776ec Automatic date update in version.in omits beaafdf3e2 Automatic date update in version.in omits 5fbe6f4318 Automatic date update in version.in omits 990df44330 Automatic date update in version.in omits 685036654f Automatic date update in version.in omits ec2451f91e PR27755, powerpc-ld infinite loop omits 92cce76749 Automatic date update in version.in omits 8c9ca0fc8b Automatic date update in version.in omits ad563d824d Automatic date update in version.in omits 96f32373c6 Automatic date update in version.in omits 8a473766ae Automatic date update in version.in omits 8ed1a94d7a Automatic date update in version.in omits d480785348 Automatic date update in version.in omits 5c1f3db6a3 Automatic date update in version.in omits 589787a791 Automatic date update in version.in omits 839298c39b Automatic date update in version.in omits 602ed821f5 Fix type of .persistent.bss section omits acfd932381 Automatic date update in version.in omits 3b1317df03 Automatic date update in version.in omits 3f07ddd689 Automatic date update in version.in omits 54254f3896 Automatic date update in version.in omits a03f0af7e3 Automatic date update in version.in omits 3add24e89b Automatic date update in version.in omits f628380ead Automatic date update in version.in omits bd11aedc73 Automatic date update in version.in omits e4454ee189 Make objcopy -p work when an output file is specified omits 9f31bd0dba Automatic date update in version.in omits db10816f36 Automatic date update in version.in omits 51391bd23f Automatic date update in version.in omits 750802b3a8 Automatic date update in version.in omits cdf2fa1e92 Automatic date update in version.in omits 195bae36ab Automatic date update in version.in omits d6af793d41 AArch64: Fix Diagnostic messaging for LD/ST Exclusive. omits c1d97fe545 AArch64: Fix Atomic LD64/ST64 classification. omits 7af075d6e3 Automatic date update in version.in omits 552c9946b1 Automatic date update in version.in omits 385faa8542 Automatic date update in version.in omits b620291dfe Automatic date update in version.in omits 208b5e0c25 Automatic date update in version.in omits 71f321eed4 Automatic date update in version.in omits c456b10bda Automatic date update in version.in omits c794f234cc Automatic date update in version.in omits 0ff9fad8bf PE/Windows x86_64: Fix weak undef symbols after image base change omits b2e0942e79 Automatic date update in version.in omits f865fc5d4b Automatic date update in version.in omits 1ffce760e5 Automatic date update in version.in omits 06aeca0371 Automatic date update in version.in omits a4c3572eb3 Automatic date update in version.in omits d254cb9daf Automatic date update in version.in omits 25f2900334 Automatic date update in version.in omits 5a5381554d Automatic date update in version.in omits 53107f3b1f Automatic date update in version.in omits c03eea8135 Automatic date update in version.in omits 70d985a00d DWARF: Check version >= 3 for DW_FORM_ref_addr omits 15c7fb1043 Automatic date update in version.in omits 3c9849a6a3 Automatic date update in version.in omits b5d2d20b6c Automatic date update in version.in omits 26952c7e3c Add install dependencies for ld -> bfd and libctf -> bfd omits 7c3b5a9edc Automatic date update in version.in omits 2d07be637e Automatic date update in version.in omits d0e8fe5596 Automatic date update in version.in omits 00249e00d7 Automatic date update in version.in omits 8192cf5846 Automatic date update in version.in omits 9ed578ec62 Automatic date update in version.in omits 52e4abd315 Automatic date update in version.in omits af5ab58730 Automatic date update in version.in omits e53decb1ec Automatic date update in version.in omits 139fba8138 Automatic date update in version.in omits fbb9a7e337 Automatic date update in version.in omits 17affd070e Automatic date update in version.in omits 1e98aad26a Automatic date update in version.in omits 13c558caa5 Automatic date update in version.in omits c60a71cb7b Automatic date update in version.in omits 0fc2da7221 Automatic date update in version.in omits b95bb98a8c Automatic date update in version.in omits e748f8e407 PowerPC64 undefined weak visibility vs GOT optimisation omits 339bc7c4a2 Automatic date update in version.in omits e3316baf92 PR27441, inconsistency in weak definitions omits 54a12d44be Automatic date update in version.in omits d9869a51f5 Automatic date update in version.in omits 0c1eff5884 Automatic date update in version.in omits 1aad0a424a Re: Use make_tempname file descriptor in smart_rename omits 08bdb5f4f9 Use make_tempname file descriptor in smart_rename omits 8b69e61d4b PR27456, lstat in rename.c on MinGW omits d3edaa91d4 Reinstate various pieces backed out from smart_rename changes omits d5eb4926df Automatic date update in version.in omits 7b7c7090a2 Automatic date update in version.in omits 81e690eb25 Automatic date update in version.in omits 0e7d2fad24 Automatic date update in version.in omits 8e03235147 binutils: Avoid renaming over existing files omits ab28570771 Automatic date update in version.in omits 18616da8c6 Automatic date update in version.in omits 1fcea283a6 Automatic date update in version.in omits 5ffe9b0dbb IBM Z: Implement instruction set extensions omits 7d94cf9f43 Automatic date update in version.in omits 601b3a7271 Automatic date update in version.in omits d5cb9eec8b Automatic date update in version.in omits 72cb7a704d Automatic date update in version.in omits b8517f8f96 Automatic date update in version.in omits 1ffaa86f28 Automatic date update in version.in omits 17124df60e Automatic date update in version.in omits c668066dad Automatic date update in version.in omits a26fdfa101 Automatic date update in version.in omits 9004a5433b Automatic date update in version.in omits 7651a4871c PR27382, build failure if fileno() is a macro omits 179cd8fe06 Automatic date update in version.in omits ad052fe2c4 Automatic date update in version.in omits 43f6058fb2 ld: Remove x86 ISA level run-time tests omits bc7e7ec113 Automatic date update in version.in omits d4dfaba218 Reset development back to true omits f35674005e This is 2.36.1 release omits 035f70706f Automatic date update in version.in omits 355e5f2ffb Revert "binutils: Make smart_rename safe too" omits a708e76442 Revert "Fix a build problem when using FreeBSD 12." omits 97c8a8cc3f Revert "pr27270 and pr27284, ar segfaults and wrong file mode" omits 86cb5ea563 Revert "PR27345, binutils/arsup.c: lstat() not available on [...] omits c0034ac596 PR27345, binutils/arsup.c: lstat() not available on all targets omits faca03e59f RISC-V: Removed the v0.93 bitmanip ZBA/ZBB/ZBC instructions. omits d49885ad9f Automatic date update in version.in omits 3592ada38d ld: Restore PR ld/15146 tests omits b71c7a5814 PR27311, (symbol from plugin): undefined reference, hidden sym omits 401fafe192 Automatic date update in version.in omits 6184480d7c pr27270 and pr27284, ar segfaults and wrong file mode omits d2ea9f3a70 PR27311, ld.bfd (symbol from plugin): undefined reference omits ee6dd62454 Automatic date update in version.in omits 86de3e9d08 Automatic date update in version.in omits 9f9f839842 Automatic date update in version.in omits 5b814b6e4c Automatic date update in version.in omits 5eae73d750 Automatic date update in version.in omits fe0e833171 PR27259, SHF_LINK_ORDER self-link omits 00e280d52a PR27271, c6x-uclinux-ld segfaults linking ld-uClibc-1.0.37.so omits 6ff2462fbf Automatic date update in version.in omits 69caaa81ae gold: Skip address size and segment selector for DWARF5 omits 5e7a8f40bd Automatic date update in version.in omits e9013bbd33 ld: depend on libctf omits 185390e3ca Update the DWARF sections recognuised by ELF linker scripts. omits 0dd1ac834b Automatic date update in version.in omits 510753f848 Segmentation fault i386-gen omits 8a04178688 pr27228 testcase omits 3fb37e4554 Fix thinko in objcopy's memory freeing code. omits 0db21b8a2b nios2: Don't disable relaxation with --gdwarf-N omits fa15c4160a Automatic date update in version.in omits d1cdec5b03 Automatic date update in version.in omits 5876ea37df DWARF-5: Ignore empty range in DWARF-5 line number tables omits 8b236dfbac gas: Add a testcase for PR gas/27228 omits acda002755 Enable development. Set version to 2.36.0 omits 9288e0fae6 2.36 release omits 1aaad1d55d PR27228, .reloc wrong symbol emitted for undefined local symbol omits 74c1e3df55 DWARF-5: Fix parsing DWARF-5 line number tables omits b98520957b Automatic date update in version.in omits 33e5330bec Automatic date update in version.in omits 68e4a5a7df Automatic date update in version.in omits e6d79648ad PR27221, 058430b4a1 warnings while assembling the Linux kernel omits 1586c504e0 PR27218, memory access violation in dwarf2dbg.c omits 37f3ab9c7c mips XPASS pr26936 omits 760c937dc1 Automatic date update in version.in omits 088572dad9 PowerPC64 synthetic symbols omits b6f526fb86 Automatic date update in version.in omits 296ffb5ad6 libctf, create: fix ctf_type_add of structs with unnamed members omits b7540e2b88 libctf: lookup_by_name: do not return success for nonexisten [...] omits d235291c81 [GOLD] powerpc assertion failure omits 4c899d5386 ld: Just xfail riscv little endian targets for compressed1d.d test. omits 216767c47e Automatic date update in version.in omits 4e02d082a3 as: Automatically enable DWARF5 support omits 31c8a013bc gold: Remove the circular IFUNC dependency in ifuncmain6pie omits 31768fcb32 ld/elf: Ignore section symbols when matching linkonce with comdat omits e9815c344e ld/elf/x86: Don't compare IFUNC address in the shared object omits 4c595b36a7 Automatic date update in version.in omits 59044bc0fa Automatic date update in version.in omits df5ec93dda Automatic date update in version.in omits 33d9daf0a6 Automatic date update in version.in omits 2bbb84d5e1 bfin: Skip non SEC_ALLOC section for R_BFIN_FUNCDESC omits 13de3b4b63 Updated translations for some subdirectories omits 5dda6736c2 Fix an illegal memory access parsing a win32pstatus note wit [...] omits c28c047c41 Automatic date update in version.in omits 5e7caf03b3 Automatic date update in version.in omits c4d095332b elf/x86-64: Adjust R_AMD64_DIR64/R_AMD64_DIR32 for PE/x86-64 inputs omits 1a5cffee2b Updated translations for some subdirectories omits 3993d8b645 Automatic date update in version.in omits 28eced2c7d aarch64: Remove support for CSRE omits dee726de9b Add support for more MIPS variants to the linker command line. omits 254a11a5b9 Updated translations for multiple subdirectories omits 35cc7700d4 Automatic date update in version.in omits f1313ce341 ld/x86-64: Properly Handle -z lam-u48/lam-u57 omits 215849957b Change version number to 2.35.90 and regenerate configure an [...] adds 573fe3fbc1 Change version number to 2.36.50 and regenerate files adds be2c78856d Update release howto with 2.37 numbers adds b5a4a01af4 sim: hw: rework code to avoid gcc warnings adds f41464416a sim: pru: fix include ordering with sim-main.h adds 0a94990bf6 ld/x86-64: Properly Handle -z lam-u48/lam-u57 adds bf470982f9 sim: enable -Werror by default for some arches adds 50df264dae sim: clean up stale AC_PREREQ refs adds f8cab0b995 sim: sh64: delete port adds f074c07d8d sim: common: clean up asprintf includes a bit adds 7eb99e5e27 sim: cr16/d10v: move storage out of header adds a9fd212a24 sim: replace rindex with strrchr adds 50ad1254d5 GCC: Pass --plugin to AR and RANLIB adds a4966cd965 Binutils: Pass --plugin to AR and RANLIB adds af019bfde9 Support the PGO build for binutils+gdb adds 66beed0227 Fix erroneous agent expression test adds bc167b6b3e Remove a use of print_expression adds 54585eee2e Avoid crash in compile_to_object adds 5834526f4b Automatic date update in version.in adds 46b1518d4c Automatic date update in version.in adds a8aa72b913 Updated translations for multiple subdirectories adds 68ed285428 sim: clean up C11 header includes adds 933306703a sim: rl78: move storage out of header adds 90e123dd60 sim: common: fix printf formats adds a0c38f0d70 sim: or1k: fix include ordering with sim-main.h adds 5c1008a41f sim: call SIM_AC_OPTION_WARNINGS(no) in remaining ports adds 9c70334dee sim: always call SIM_AC_OPTION_WARNINGS adds c0f6e439cc Add support for more MIPS variants to the linker command line. adds 82c70b08df aarch64: Remove support for CSRE adds 10dadadc5b [gdb/testsuite] Fix gdb.arch/amd64-stap-three-arg-disp.S adds 062eaacbac gdb: change jit_debug to a bool adds eef401dce1 gdb: convert solib-aix to new-style debug macros adds c6185dce03 gdb: convert aarch64 to new-style debug macros adds 254c3783fe sim: tests: get common tests working again adds eabdd87b2e Automatic date update in version.in adds 03c02f3116 GCC: Check if AR works with --plugin and rc adds 83b33c6cb9 Binutils: Check if AR works with --plugin and rc adds 44124a4683 binuitils: Check if AR is usable for LTO build adds f631b79abe sim: or1k: delete redundant SIM_AC_OPTION_INLINE call adds f220ef633c sim: common: use #error properly adds 68895f7d7e sim: README-HACKING: clean up stale run references adds 5e9e2f41eb sim: or1k: clean up stale build entries adds e998918e98 sim: or1k: fix mixing of code & decl warning adds 7c654b719d gdb/fortran: add symbol base comparison operators adds ce38f5edf1 gdb: fix debug dump of OP_BOOL expressions adds 6d104cac0a Updated translations for some subdirectories adds c2e9a4a3ed elf/x86-64: Adjust R_AMD64_DIR64/R_AMD64_DIR32 for PE/x86-64 inputs adds 18bfb5057f [gdb/testsuite] Require is_amd64_regs_target in gdb.base/dis [...] adds d546b61084 Implement a workaround for GNU mak jobserver adds 5291fe3cd1 aarch64: Add support for bfloat16 in gdb. adds b2f2ae0d6f gdb: remove pre_init_ui_hook from top.c adds 3f94e58859 [gdb/testsuite] Add have_mpx in lib/gdb.exp adds 16e9019ef7 gdb: move baud_rate and serial_parity declarations to serial.h adds fe7a351a8e gdb: move read{now,never}_symbol_files declarations to symfile.h adds 24a7f1b548 gdb: fix indentation in infrun.c adds 3034143dc6 src-release: fix indentation adds 4180301e81 Automatic date update in version.in adds 62fe7512a7 sim: watch: fix pc watchpoints on little endian host systems adds c54f3efdc2 sim: watch: fix range expression processing adds 2ce40d1a51 Add SEH support to code generated by dlltool. adds 8c4645b488 Remove sflag_info param from wild callback functions adds b209b5a6b8 SHF_LINK_ORDER fixup_link_order in ld adds 5347ed60c5 Regen Makefile.in for jobserver.m4 aclocal.m4 dependency adds 844bf810cf x86: Don't generate GOT_symbol for PLT relocations adds b634d11d61 ld: Check for ELF input before accessing ELF section data adds 54ca900277 gdb: convert jit to new-style debug macros adds 5e12f48ffb gdb: bool-ify file_is_auto_load_safe adds db972fce46 gdb: bool-ify ext_lang_auto_load_enabled and friends adds 5bf7e91b2b gdb: bool-ify users of file_is_auto_load_safe adds 506195754c gdb: bool-ify maybe_add_script_{text,file} adds fb0f5031bb gdb: turn arc_debug into a bool adds d8d1feb424 gdb: convert arc to new-style debug macros adds 4120e4885b Re: SHF_LINK_ORDER fixup_link_order in ld adds 3eeabe12c3 Automatic date update in version.in adds c9d220893e gdb: make the remote target track its own thread resume state adds bd497355ea gdb: remove target_ops::commit_resume implementation in reco [...] adds 8f66807b98 gdb: better handling of 'S' packets adds d9b1deff13 sim: watch: add basic default handler that traps adds 54780889e9 sim: h8300: drop separate eightbit memory buffer adds adb0bd8fda gas: bfin: fix build time warnings adds abad28152e gas: bfin: build lexer with -Werror adds 271bea6acd ld: tests: add -msim when testing bfin targets adds 7e0d77ef5f Fix an illegal memory access parsing a win32pstatus note wit [...] adds 116d0cf103 [gdb/testsuite] Fix gdb.base/style.exp with -m32 adds 5fae2a2c66 [gdb/breakpoint] Handle .plt.sec in in_plt_section adds 5a10699ff3 Updated translations for some subdirectories adds 8ca9c7eb67 bfin: Skip non SEC_ALLOC section for R_BFIN_FUNCDESC adds 58eadc4b69 Fix building gdb with gcc-4.x adds c14dee84dd Update my email address (long overdue!) adds 17e8913732 Add myself to gdb/MAINTAINERS adds 5aa06b1b14 Automatic date update in version.in adds 5fda40b28f gas: make [248]byte directives available everywhere adds 3624a6c15c PR26539, memory leak in inflate.c adds 37a9c3a53e sim: testsuite: allow tests to declare expected exit status adds 7cf91a2481 sim: m32r: clean up redundant test coverage adds 89bfc2a429 sim: frv: clean up redundant test coverage adds 137d6efd8a sim: mips: delete empty stub test dir adds 29fd199ed8 sim: d10v: relocate tests & clean up test harness adds bb3eddb5bd sim: testsuite: delete configure script adds dcd709e056 RISC-V: Comments tidy and improvement. adds b800637e76 RISC-V: Error and warning messages tidy. adds 1942a04836 RISC-V: Indent and GNU coding standards tidy, also aligned t [...] adds 4bb5732e27 RISC-V: Fixed the indent that caused by the previous commits [...] adds 10f92414d6 [gdb/testsuite] Fix gdb.fortran/array-slices.exp with -m32 adds 5a11fff005 gdb/tui: compare pointer to nullptr, not 0 adds e403a898b5 Automatic date update in version.in adds 1368b914e9 sim: testsuite: flatten tree adds eb6e6af8c1 PR26002 undefined symbol VER_NDX_GLOBAL vs. VER_NDX_LOCAL adds ad92f33d38 Tidy inflateEnd calls adds 68b007788a ld/x86: Add -z report-relative-reloc adds 75a933f399 ld/elf/x86: Don't compare IFUNC address in the shared object adds 514fca98df Automatic date update in version.in adds edf0f284b1 PR binutils/23460: Increase the max number of open files to 20 adds d46153313b Automatic date update in version.in adds 25294ff049 gold: Remove the circular IFUNC dependency in ifuncmain6pie adds 994b251328 ld/elf: Ignore section symbols when matching linkonce with comdat adds 44365e88c0 PR27198, segv in S_IS_WEAK adds cecb191290 gdb: const-ify unpack_* functions in remote.c adds e3b2741b16 gdb: const-ify remote_target::add_current_inferior_and_threa [...] adds b5c8f22d28 gdb: move remote_target::start_remote variable to narrower scope adds aa2838ccc5 gdb: const-ify hostio methods parameter in remote.c adds d3d7d1ba3b [gdb/tdep] Handle si_addr_bnd in compat_siginfo_from_siginfo adds 326adec374 PR26378, sections initialised only by linker scripts are alw [...] adds 6a9ad81c44 gdb/riscv: use a single regset supply function for riscv fbs [...] adds 705989f19a as: Automatically enable DWARF5 support adds 02baa13385 gdb/testsuite: remove actual addresses from some test names adds 4cfcd3b333 sim: common: modernize gennltvals.sh adds 5e25901fcc sim: common: delete configure & Makefile adds f89f33e57c sim: common: simplify version script adds f0c1efa53d Automatic date update in version.in adds 85e963f185 ld: Just xfail riscv little endian targets for compressed1d.d test. adds 0e7620dcdc sim: bfin: delete accidental ADI copyright adds a75a6a4164 [GOLD] powerpc assertion failure adds 30845f113a PowerPC use_local_plt adds 0c4e2c6c88 [gdb/testsuite] Fix gdb.arch/i386-mpx.exp with -m32 adds 1485212328 [gdb/testsuite] Fix gdb.base/step-over-syscall.exp with -m32 adds c98de297b3 libctf, ld: fix data symbol test with newer GCC adds e05a3e5a49 libctf: lookup_by_name: do not return success for nonexisten [...] adds 26503e2f5e libctf, create: fix ctf_type_add of structs with unnamed members adds ccbe4c82d5 Use gdb::array_view for setting value bytes in trad-frame adds c65ca138c4 sim: ppc: update version script usage adds bdec2917b1 Convert some frame functions to use gdb::array_view. adds a9a87d3525 trad-frame cleanups adds 1c3b85ad28 use DISABLE_COPY_AND_ASSIGN in switch_thru_all_uis adds 11321a0505 Automatic date update in version.in adds 8bd10d6b16 PowerPC64 synthetic symbols adds 4bd7c90276 PowerPC: Don't generate unused section symbols adds 037e8112b9 [gdb/server] Don't overwrite fs/gs_base with -m32 adds 6f52fdf404 Fix a few stap parser issues and add a new test for probe ex [...] adds 1402665c8f [gdb/testsuite] Skip gdb.rust/*.exp for target board unix/-m32 adds 7c794afd54 [gdb/testsuite] Fix gdb.python/py-format-string.exp with -m32 adds 6571ffc620 gdb/testsuite: add links for handled control sequences in li [...] adds c3e96aa78f gdb/testsuite: rename _cur_x/_cur_y to _cur_col/_cur_row in [...] adds 3f0781f389 Automatic date update in version.in adds a6c11cbb14 gdb/remote.c: address conflicting enum and method name adds 6bd434d6ca gdb: make some variables static adds 17e593e966 gdb/dwarf: add some logging in dwarf2/read.c adds de53369b2e gdb/dwarf: add assertion in maybe_queue_comp_unit adds f9e9ba90b3 gdb/testsuite: use multi_line in gdb.base/skip.exp adds d4dd4fca16 gdb: change debug_bfd_cache to bool adds c78eec4424 mips XPASS pr26936 adds 498ff0328f PR27218, memory access violation in dwarf2dbg.c adds be07043ea8 PR27221, 058430b4a1 warnings while assembling the Linux kernel adds 7cb6d92a3f gdb: convert arm to new-style debug macros adds 325d39e4e0 Add Python support for hardware breakpoints adds a72d0f3d69 gdb/doc: reorder and group sections relating to aliases adds 730af66356 gdb/testsuite: improve logging in lib/tuiterm.exp adds 439706e6a9 gdb: use interruptible_select when connecting to a remote adds 1e15fcac94 gdb: convert bfd-cache to new-style debug macros adds d3abc0cee0 gdb: remove unused f77_array_offset_tbl from f-valprint.c adds a59902a7c1 gdb: convert auto-load to new-style debug macros adds d5d24e12f9 Fix build errors for armhf adds cd211c75cb Handle additional connection error adds e534c7e8c4 Automatic date update in version.in adds c651f0a614 MAINTAINERS: Update my e-mail address adds cc4bc93e52 gdb/doc: down case contents of @var adds fe461d2f70 gdb/doc: move @menu to the end of the node adds 5b7d941b90 gdb: add owner-related methods to struct type adds 3062502019 gdb: remove TYPE_OBJFILE_OWNED macro adds 344e9841d9 gdb: remove TYPE_OBJFILE macro adds baf2b57f18 gdb: move set remote commands to remote.c adds cda09ec9f9 gdb: move remote_debug to remote.{h,c} adds 02349803fc gdb: change remote_debug to bool adds 2189c31265 gdb: add remote_debug_printf adds d8c4766d31 gdb/doc: don't rely on @menu item within the docs adds e7b430724d gdb: don't print escape characters when a style is disabled adds 9d2d8a16e1 gdb: add new version style adds 0ac85db529 gdb/testsuite: eliminate gdb_suppress_tests mechanism adds 705646c074 Fix expected output of gdb.base/line65535.exp with dwarf-5 adds e753591581 Automatic date update in version.in adds 1af4c9c420 Disable bracketed paste mode in GDB tests adds ef45cb65a7 Use readline's variant of Windows patch adds d3ee35dbf7 Improve gdb_tilde_expand logic. adds dd5ca05f47 gdb: fix regression in copy_type_recursive adds c99d72de18 Automatic date update in version.in adds 9f7f6cb8d2 Remove call to reset from compile_to_object adds 18454c151f DWARF-5: Fix parsing DWARF-5 line number tables adds 3637a558a5 Use std::vector for "registers_used" in compile feature adds b10bae1875 Avoid crash when "compile" expression uses cooked register adds 68fcee4fa7 PR27228, .reloc wrong symbol emitted for undefined local symbol adds 9b351c9bc9 Minor updates to the 'how to make a release' document adds eea133e655 gas: Add a testcase for PR gas/27228 adds 940d0202fd DWARF-5: Ignore empty range in DWARF-5 line number tables adds 123b18bf62 Automatic date update in version.in adds b8df69003d Update linker scripts with the names of new DWARF-5 debug sections. adds 04de9f3e31 gdb/doc: move @menu blocks to the end of their enclosing @node adds 9e42b97628 Add some more DWARF-5 sections adds acd6125f01 Add test case for symbol menu for local enumerators adds 191849105b Specially handle array contexts in Ada expression resolution adds a625a8c9eb Fix fixed-point regression with recent GCC adds f3bdc2dbb9 gdb/docs: add parentheses in Python examples using print adds 9f6c202e57 [gdb/symtab] Handle DW_AT_ranges with DW_FORM_sec_off in par [...] adds 01a01e0ab3 Automatic date update in version.in adds d0021af39c [gdb/testsuite] Fix gdb.opt/solib-intra-step.exp with -m32 adds 4ca40594f9 [gdb/testsuite] Fix gdb.threads/killed-outside.exp with -m32 adds d56834cbfb arc: Log "pc" value in "arc_skip_prologue" adds e37709f090 Fix thinko in objcopy's memory freeing code. adds ac3571d941 Fix the date for the last entry in gdb/ChangeLog adds d0cc52bdf2 gdb: Add default reggroups for ARC adds 4287950e54 pr27228 testcase adds 9886ff0319 gas byte test adds a45ef9a30b gas testsuite tidy adds 1c9c9b9b55 PR27226, ld.bfd contains huge .rodata section adds c3ffb8f340 Segmentation fault i386-gen adds 4cb1265b3f bfd: add elfcore_write_file_note adds 4ef367bffd Use debug_prefixed_printf_cond in windows-nat.c adds 1f583bc2fc nios2: Don't disable relaxation with --gdwarf-N adds c22788d614 Automatic date update in version.in adds 2eda57ef61 ld: Fix a typo in testsuite/ld-x86-64/bnd-plt-1.d adds 67965ba289 Simplify the code at the end of objcopy's main() function. adds f04ce15e83 ld: depend on libctf adds bb3c2d4d94 Remove extra space after @pxref in gdb.texinfo adds 807f647cac GDB: aarch64: Add ability to displaced step over a BR/BLR in [...] adds 59b59f08f6 Avoid use after free with logging and debug redirect. adds 07b8b9e7c5 Automatic date update in version.in adds 22efa3d307 [gdb/testsuite] Fix ERROR in gdb.dwarf2/dw2-out-of-range-end [...] adds 2f985dd1ac [gdb/testsuite] Fix gdb.ada/out_of_line_in_inlined.exp with [...] adds def97fb945 PR27259, SHF_LINK_ORDER self-link adds 2a7f6487d0 [gdb/breakpoints] Fix longjmp master breakpoint with separat [...] adds 24cf63899b gdb: update comment for execute_command_to_string adds 47918cca26 gdb/testsuite: unset XDG_CONFIG_HOME adds 0318cca493 gold: Skip address size and segment selector for DWARF5 adds a7ad3cb1ff Fix binutils tools so that they can cope with the special /d [...] adds 53e556e5b4 ld: Add a test for PR ld/27259 adds cc3edc5274 Improve windres's handling of pathnames containing special c [...] adds 6ac373717c gdb: rename type::{arch,objfile} -> type::{arch_owner,objfil [...] adds 8ee511afd8 gdb: rename get_type_arch to type::arch adds c47b145e1a [gdb/testsuite] Fix g0 search in gdb.arch/i386-sse-stack-align.exp adds cdeba395cf [gdb/testsuite] Fix gdb.arch/i386-gnu-cfi.exp adds f237f998d1 gdb/tui: remove special handling of locator/status window adds 0f93c3a25b gdb: remove unneeded switch_to_thread from thr_try_catch_cmd adds 986dbd541a Automatic date update in version.in adds c4566785ac PR27271, c6x-uclinux-ld segfaults linking ld-uClibc-1.0.37.so adds 620ec3caae [gdb/testsuite] Fix gdb.opt/solib-intra-step.exp with -m32 a [...] adds ebde6f2ddc [gdb/breakpoint] Fix stepping past non-stmt line-table entries adds 6efcd6f329 Automatic date update in version.in adds 008a02e36d sim: readd myself as a maintainer adds 481fac96bd sim: common: sort nltvals.def adds f4dd74915b sim: hw: replace fgets with getline adds 88f68ee277 sim: m68hc11: stop making hardware conditional adds 18d4b488f4 sim: profile: fix bucketing with 64-bit targets adds d4e3adda12 sim: watchpoints: change sizeof_pc to sizeof(sim_cia) adds ee64caae5b sim: m68hc11: include stdlib.h for prototypes adds fb8d4e59af sim: m68hc11: tweak printf-style funcs adds b9e016f517 sim: m68hc11: localize a few functions adds 683b8d961e sim: m68hc11: fix printf size warnings adds ca51543cf5 Automatic date update in version.in adds 9a7ba4aa0e sim: common: change gennltvals helper to Python adds 3c811346e9 sim: moxie: cleanup build warnings adds 44b30b7f0e sim: v850: fix handling of SYS_times adds 5f05936d9b sim: v850: cleanup build warnings adds 5bc4f5ca15 sim: cgen-accfp: Fix pointer sign warnings adds ba2f0de216 sim: bpf/or1k: fix CGEN_TRACE_EXTRACT name adds bccec180ce sim: bpf: fix mainloop extract call adds 6451541244 sim: cgen-trace: tweak printf call adds 4ebf566ea5 Automatic date update in version.in adds 7bba67ec7c PR27283 gas for alpha fails to build with gcc 11 adds 49daa38f31 Re: ld: Add a test for PR ld/27259 adds a5f92c6756 ldgram.y low_level_library_NAME_list adds 82a1fd3a49 gdb: unify parts of the Linux and FreeBSD core dumping code adds 40726f16a8 ld script expression parsing adds fb6c220ebd ld --defsym adds 72a51a0603 Small updates to the 'how to make a release' document follow [...] adds 34c10233cd Wrong operand for SADDR (rl78) adds c39c86378f [gdb/testsuite] Fix gdb.dwarf2/fission-reread.exp with .gdb_index adds 1f568f9a0d Add Genode target support adds 82e3e87da4 Automatic date update in version.in adds 2bd3e4b8d2 [gdb/symtab] Fix assert in write_one_signatured_type adds 9918bff7cf PR27311, ld.bfd (symbol from plugin): undefined reference adds 5424d7ed94 readelf: Add 'R' and 'D' to "Key to Flags:" adds a0c1eeba9b gdb/dwarf: change read_loclist_index complaints into errors adds 5e4d9bbc4b gdb/dwarf: fix bound check in read_rnglist_index adds 05787bad36 gdb/dwarf: add missing bound check to read_loclist_index adds 0c800c6ebc gdb/dwarf: remove unnecessary check in read_{rng,loc}list_index adds b1829e1bf2 gdb/dwarf: few fixes for handling DW_FORM_{rng,loc}listx adds a1c4010369 gdb/dwarf: read correct rnglist/loclist header in read_{rng, [...] adds 962effa790 gdb/testsuite: add .debug_rnglists tests adds 6b0933da34 gdb/testsuite: DWARF assembler: add context parameters to _location adds ecfda20dcc gdb/testsuite: add .debug_loclists tests adds 2b0c7f41d1 gdb/dwarf: split dwarf2_cu::ranges_base in two adds e57933dc9c gdb/dwarf: make read_{loc,rng}list_index return sect_offset adds 9307efbe9e gdb/testsuite: add test for .debug_{rng,loc}lists section wi [...] adds e0bd9202fb gdb/testsuite: use proc_with_prefix in gdb.base/scope.exp adds 2e3773ff54 Inferior without argument prints detail of current inferior. adds 0e33957abf Automatic date update in version.in adds 2ab76a181f Fix attaching in non-stop mode (PR gdb/27055) adds 621cc31071 Fix "target extended-remote" + "maint set target-non-stop" + [...] adds 92234eb192 Testcase for attaching in non-stop mode adds b0083dd72f Fix a couple vStopped pending ack bugs adds 7e9cf1fe36 gdbserver: spurious SIGTRAP w/ detach while step-over in progress adds d758e62c0e Factor out after-stop event handling code from stop_all_threads adds 9147506842 prepare_for_detach: don't release scoped_restore at the end adds 8ff531399b prepare_for_detach and ongoing displaced stepping adds e87f0fe823 detach and breakpoint removal adds ac7d717c1e detach with in-line step over in progress adds 408f66864a detach in all-stop with threads running adds a71501e25f Testcase for detaching while stepping over breakpoint adds 6955136728 PR27311 again, ld.bfd (symbol from plugin): undefined reference adds 95b91a043a pr27270 and pr27284, ar segfaults and wrong file mode adds f01fb44c06 Re: PR27311, ld.bfd (symbol from plugin): undefined reference adds 61ecbbae8e IBM Z: Add missing vector formats to .insn docs adds 72d383bb08 gdb: infrun: move stop_soon variable to inner scoped in hand [...] adds e3714e037b Automatic date update in version.in adds 7d409ac001 PR27311, (symbol from plugin): undefined reference, hidden sym adds 24075dcc85 RISC-V: Removed the v0.93 bitmanip ZBA/ZBB/ZBC instructions. adds 37707bd822 ld: Restore PR ld/15146 tests adds 1a2f1b54a5 x86-64: Provide more info when failed to convert GOTPCREL adds 35a01a0454 libctf, ld: fix symtypetab and var section population under ld -r adds 78f28b89e8 libctf: rip out dead code handling typedefs with no name adds caa170493e libctf: prohibit nameless ints, floats, typedefs and forwards adds 5dacd11ddc libctf: fix uninitialized variable in symbol serialization e [...] adds ee87f50b8d libctf: always name nameless types "", never NULL adds 6b36ddeb1e gdb: make async event handlers clear themselves adds baa8575b29 gdb: make remote target clear its handler in remote_target::wait adds 85d3ad8e0b gdb: make record-btrace clear event handler in wait adds fdbc5215e7 gdb: make record-full clear async handler in wait adds 3eccb1c8bf gdb: Use correct feature in tdesc-regs for ARC adds 6ff267e186 gdb: make target_is_non_stop_p return bool adds a9ab6e2ea0 Automatic date update in version.in adds b9249c461c sim: riscv: new port adds 04b4939b03 gdb: riscv: enable sim integration adds c180f095f3 PR27345, binutils/arsup.c: lstat() not available on all targets adds cb4ff67af3 RISC-V: PR27348, Remove obsolete Xcustom support. adds 5f40035fb8 RISC-V: PR27348, Remove the obsolete OP_*CUSTOM_IMM. adds 554c30abef ld testsuite on x86_64 with --enable-shared adds 887854bae4 Fix typos in comments added in PR 27252 fix adds fc9a13fbdd [gdb/symtab] Fix indentation in create_cus_from_debug_names_list adds d3b54e63f4 [gdb/symtab] Fix duplicate CUs in create_cus_from_debug_names_list adds ae71049661 [gdb/exp] Fix assert when adding ptr to imaginary unit adds a22ec6e8a4 [gdb/testsuite] Add KFAILs for PR symtab/24549 adds e37d88e5e5 Remove Richard Henderson as the Alpha maintainer adds 1b30f42106 Extract symbol-writing function from parsers adds bdfea17ea9 Return unique_ptr from language_defn::get_compile_context adds 0e857c8288 [gdb/breakpoints] Fix segfault for catch syscall -1 adds e77b0004dd [gdb/symtab] Handle DW_TAG_type_unit in process_psymtab_comp_unit adds 7c6944ab9b [gdb/breakpoints] Handle glibc with debuginfo in create_exce [...] adds 0110ec824e gdb: symmisc.c: remove std_{in,out,err} adds 9c9d63b15a gnulib: update to 776af40e0 adds 51a2525281 PR27349, ar breaks symlinks adds 2c6f2aa664 Automatic date update in version.in adds aa09469fc6 sim: drop use of bfd/configure.host adds 7a36eeea26 sim: common: switch AC_CONFIG_HEADERS adds 8e25beb4af sim: igen: drop libiberty linkage adds cd89c53f6d sim: add ChangeLog entries for last commits adds 4c0d76b9c4 sim: watchpoints: use common sim_pc_get adds 7a9bd3b4e2 sim: erc32/m32c/rl78: add sim_memory_map stub for gdb adds c0e5674584 [gdb/testsuite] Fix gdb.tui/tui-layout-asm.exp with -m32 adds cca043e071 Automatic date update in version.in adds de8d420310 asan: unwind-ia64.c: stack buffer overflow adds 83962f8340 Also compare frame_id_is_next in frapy_richcompare adds 5fc2d6aa06 Refresh regs window in display_registers_from adds 3537bc23d9 Don't fill regs window with a negative number of spaces adds 4cf28e918a Don't draw register sub windows outside the visible area adds 38a143aa8c ld: Remove x86 ISA level run-time tests adds d6f2700b48 Automatic date update in version.in adds 5fb9763991 gdb/testsuite: fix implementation of delete line in tuiterm.exp adds cd074e0415 gdb/tui: fix issue with handling the return character adds 0309f9549d sim/rx: define sim_memory_map adds 93a01471f3 sim/rx: fix an issue where we try to modify a const string adds 1c3e93a41f sim/rx: fill in missing 'void' for empty argument lists adds 73d4725f21 sim/rx: mark some functions as static adds 4b42639636 sim/rx: delete an unused function adds b9fe995797 sim/rx: provide a format string for printf adds 783a7b12d3 sim/rx: move some variable declarations to the start of the block adds ae41b4ce9f sim/rx: use PRIx64 in printf format string adds fab2b376e3 sim/rx: add some missing includes adds da9ecd6085 sim/rx: avoid pointer arithmetic on void * pointers adds 6bf99988c6 sim/rx: enable build with warnings adds 2708dbbd58 gdb/python: reformat an error string adds a53a265752 gdb/tui: restore delete of window objects adds 1cf2399651 gdb/tui: don't add windows to global list from tui_layout:wi [...] adds e0c23e11da gdb/python: don't allow the user to delete window title attributes adds 29db1eb339 gdb: return true in TuiWindow.is_valid only if TUI is enabled adds 9b3e4b5d74 gdb: Do not interrupt atomic sequences for ARC adds 4001d90dde [gdb/testsuite] Use DW_FORM_ref_addr in gdb.dwarf2/enqueued- [...] adds 80b652efa2 Fix an illegal memory access when parsing a corrupt assembler file. adds 3d4aae4860 Build gdb.base/gnu-ifunc.exp with lazy binding adds bfd428bc12 opcodes: tic54x: namespace exported variables adds 32d5141c70 Automatic date update in version.in adds 52563b0f1c Add a test for PR 27355 - where corrupt assembler .file dire [...] adds 4a68fcd7f7 Prevent a bad .Psize expression from triggering a memory acc [...] adds a57d17732e Remove arm-symbianelf adds 9b87f84a35 [binutils] Handle DW_UT_skeleton/split_compile in process_de [...] adds 284beb431f Add a sanity check of files include by .incbin. adds 5f128a25f2 [binutils] Handle DW_FORM_ref_sig8 in get_type_abbrev_from_form adds a4f0544b1b Avoid crash in resolve_dynamic_struct adds f73e424f7b Avoid crash from coerce_unspec_val_to_type adds b61f78118a [testsuite] Don't use 'testfile' before 'standard_testfile'. adds 03642b7189 gdb: revert "gdb: unify parts of the Linux and FreeBSD core [...] adds cf2b207529 [gdb/symtab] Fix element type modification in read_array_type adds 238ebeb127 Automatic date update in version.in adds 9bb305b389 Fix typo in stap_parse_argument_conditionally adds 01e8b831f5 Remove debugging code accidentally included with the fix for [...] adds ee4c3d8801 [gdb/testsuite] Fix tcl ERROR in gdb_load_no_complaints adds 52ff20fe7b [binutils] Handle presence of both .debug_ranges and .debug_ [...] adds ebbc3a7d56 gdb: Delete SYMBOL_OBJ_SECTION and MSYMBOL_OBJ_SECTION adds a52d653e91 gdb: delete SYMBOL_SECTION and MSYMBOL_SECTION macros adds 830c5a1ffb intl: Allow building both with old bison and bison >= 3 [PR92008] adds adda0248ed intl: Unbreak intl build with bison 3 when no regeneration i [...] adds 53d4244ec0 intl: always picify adds aee224d643 intl: turn LIBINTL into -L / -l form adds 9514861402 bfd, opcodes, libctf: support --with-included-gettext adds cbd8f5bbcc libctf: require a Tcl capable of try/catch to run tests adds 758f590744 libctf: add missing header in BFD ELF check adds e92c8eb86d gdb/fortran: add parser support for lbound and ubound adds d9d9d8ef8c [binutils] Handle absolute DW_AT_dwo_name adds 933feaf37e Re: Remove arm-symbianelf adds 18b8df43bd gdb: Remove arm-symbianelf support adds 25ad1e83c8 gdb/testsuite: use "set sysroot" in gdb.multi/multi-target.exp.tcl adds 10ed138aa3 Automatic date update in version.in adds 160fe19337 gdb: adjust comment in gdb.multi/multi-target.exp.tcl adds 6db658c517 PR27291, integer overflow in bfd_get_section_contents adds 1cfcf3004e PR27290, PR27293, PR27295, various avr objdump fixes adds 31c711a2b3 PR27294, avr OOM adds 1db66e348a gdb: add obj_section function to bound_minimal_symbol adds f4be677293 gdb/testsuite: split 'maint info sections' tests to a new file adds 4790db1496 gdb: 'maint info sections' - handle the no executable case adds bf3386f0c1 gdb: change 'maint info section' to use command options adds a1670b7263 gdb/testsuite: remove old comment adds 769c253f45 Revert "ia64: Check UNDEFWEAK_NO_DYNAMIC_RELOC" adds 234b98ced2 Remove ia64 from obsolete list adds b260f8d60c Fix two Fortran regressions adds 05f68f52ef [gdb/symtab] Handle DW_FORM_strx in form_requires_reprocessing adds a5a310d616 Automatic date update in version.in adds d60f79984a [binutils] Print DWO ID adds 95abb3944c [binutils] Fix printing of .debug_str_offsets adds 528a4f87c6 [binutils] Fix typo in comment in dwarf.h adds 3c1d41015b gas testsuite: adjust recently added tests for hppa adds 8f054a7a5a binutils test pr25662: don't use single character labels adds 17e04eff81 binutils testsuite: replace unresolved with unsupported adds 96df3e28b8 gdb/fortran: support ALLOCATED builtin adds c46b706620 Change the readelf and objdump programs so that they will au [...] adds c054dcd552 Minor constification in gdbreplay adds 089436f787 [gdb/threads] Fix lin_thread_get_thread_signals for glibc 2.28 adds 77fba254d9 Add stdio support to gdbreplay adds ceda7cf7f7 Automatic date update in version.in adds adeab0c5b3 config/debuginfod: do not include pkg.m4 directly adds 652f80e07b sim: common: delete unused aclocal.m4 adds 136da8cd9c sim: switch to AC_CONFIG_MACRO_DIRS adds 9ee455572d sim: rx: mitigate fread warning adds b0dcd7d832 sim: testsuite: push $arch out to targets adds f5b2658b0f Automatic date update in version.in adds 5b1f6c9570 ld testsuite: change unresolved to unsupported/fail adds 0d0a0d86c8 Regen for binutils/aclocal.m4 change adds 1944212b42 objdump: don't add an extra entry to syms array adds d7a7af8ff4 Modernise _bfd_elf_mips_get_relocated_section_contents adds a5e6af6d17 Automatic date update in version.in adds 8b78cbec31 alpha_ecoff_get_relocated_section_contents adds 1781a9d0f3 nds32_elf_get_relocated_section_contents adds 208599d928 objdump: don't cache section contents in load_specific_debug [...] adds 8c6740616c bfd: use $(LN_S) in favor of "cp -p" when populating pre-bui [...] adds ba2b480f10 IBM Z: Implement instruction set extensions adds 94ae6062ab Automatic date update in version.in adds 7043388668 demand_copy_C_string NUL check adds 9a12b194b0 PR27426, More bugs in dwarf2dbg.c adds 7b54caddca ubsan: shift exponent is too large adds e6ca18783f Dwarf: fix build with old gcc adds c2f1204d1f x86: make 16-bit ENQCMD test actually test ENQCMD adds b818b220e4 x86: have preprocessor expand macros adds cbe6869656 x86: make common property tests common adds 014d61ea14 x86: record register use for SIMD insns without respective e [...] adds 3d70986f21 x86: honor template rather than actual operands when updatin [...] adds 394ae71f02 x86: CVTPI2PD has special behavior adds ca1289b9f3 gas: Allow SHF_GNU_RETAIN on all sections adds 7d2e5095c6 Correction of gdb.dwarf2/pr13961.S adds 0b5500cdd5 Automatic date update in version.in adds 0d6aab7776 RISC-V: PR27200, allow the first input non-ABI binary to be [...] adds b9b204b311 read_leb128 overflow checking adds 089485ff86 h8300 complains about new section defined without attributes adds 22e6d16f9b [PR cli/17290] gdb/doc: Fix show remote interrupt-*. adds afadac6170 Automatic date update in version.in adds 6a780b6766 Fix completion related libstdc++ assert when using -D_GLIBCXX_DEBUG adds 3d73d29e4e RISC-V: Add bfd/cpu-riscv.h to support all spec versions con [...] adds b0e4d2bd9b gdb: add missing full stops in --help adds a364a116f9 ld: remove stray debug fprintf adds acde209241 gdb/testsuite: only run gdb.arch/i386-biarch-core.exp on sui [...] adds 8568422270 Fix a problem merging empty annobin notes on ppc64le targets. adds 26f53cd385 Introduce expression::evaluate adds 668c18f17f Automatic date update in version.in adds 3685de750e binutils: Avoid renaming over existing files adds 0be51eb4c3 pr26548 test adds 2f973f134d Wrong ELF class plugin vs. gcc ld version adds 5a9f5403c7 RISC-V: PR27158, fixed UJ/SB types and added CSS/CL/CS types [...] adds 8488c357ce amd64-linux-siginfo.c: Adjust include order to avoid gnulib error adds 0257c2ff4f Fix compile time warnings when building riscv assembler. adds ca6afb81ca Automatic date update in version.in adds c3bf9dc5aa Include ld-lib.exp from ctf-lib.exp adds 4d496013a2 Fail run_dump_test when an error is expected but not seen adds 8c3853d9e8 readelf: Replace procesor with processor adds 3e8bb3e934 sim: merge configure.tgt into configure.ac adds f4f60336da libctf, include: find types of symbols by name adds 03c653093d libctf: add a NEWS adds f9eb406771 Automatic date update in version.in adds 93993f6784 libctf AC_CANONICAL_TARGET adds 89753bbf81 Warn when a script redefines a symbol adds 760b3e8bc9 sim: common: split up acinclude.m4 into individual m4 files adds 48ef615826 Automatic date update in version.in adds e9d18e0649 Don't handle BFD_RELOC_16 in XCOFF reloc_type_lookup adds de146e1946 gdb: push target earlier in procfs_target::attach (PR 27435) adds f53fc42716 gdb: add asserts in thread code adds 15908a11ba Change target_bfd_reopen to take a gdb_bfd_ref_ptr adds f16ccf47d8 Automatic date update in version.in adds 897608ed56 gdb: linux-nat: make linux_nat_filter_event return void adds 1a48f0027d gdbserver: linux-low: make linux_process_target::filter_even [...] adds 616c069a3f gdb/dwarf: don't enqueue CU in maybe_queue_comp_unit if alre [...] adds 08ac57714c gdb/dwarf: create and destroy dwarf2_per_bfd's CUs-to-expand queue adds cca8873dd5 PR27456, lstat in rename.c on MinGW adds c42c71a152 Use make_tempname file descriptor in smart_rename adds 55add51eef PR23691, gas .y files vs. automatic make dependencies adds 8139dc77d9 Automatic date update in version.in adds 93af1b046b PR27459, segmentation fault in go32exe_check_format adds c74147bbe0 Remove support for old v1 & v2 style GNU build notes. adds 9d3fcfe068 Fix a potential integer overflow when adding together sectio [...] adds bc3c0632a2 gdb: call value_ind for pointers to dynamic types in UNOP_IN [...] adds 895b7b4e4b gdb/riscv: select rv32 target by default when requested adds 02a7930992 gdb: add a new 'maint info target-sections' command adds 19cf757a87 gdb: spread a little 'const' through the target_section_table code adds b91919ac8b gdb/testsuite: enable gdb.base/sect-cmd.exp test for all targets adds 02f7d26b0b gdb: make the target_sections table private within program_space adds 336aa7b740 gdb: move get_section_table from exec_target to dummy_target adds dd80d75040 gdb: use std::string instead of a fixed size buffer adds 665af52ec2 Fix aarch64-linux-hw-point.c build problem adds 268c77c1b0 Add comment regarding include order of <sys/ptrace.h> and <a [...] adds aa659cfad6 [gdb/symtab] Handle DW_AT_decl_file with form DW_FORM_implic [...] adds 40b02646ec Re: Use make_tempname file descriptor in smart_rename adds 39b0759693 Automatic date update in version.in adds bbaddd4bbe PR27441, inconsistency in weak definitions adds 170f4b23b6 gdb/fortran: add support for legacy .xor. operator adds faeb9f13c1 gdb/fortran: add support for ASSOCIATED builtin adds 68337b8be3 gdb/fortran: don't access non-existent type fields adds 3c27360bc4 ld: correct description of behavior for symbols redefined by script adds 30c80d8833 [gdb/symtab] Fix wrong unit_type Dwarf Error adds 2450ad54ce gdb/mi: Remove extra \n from tsv and and traceframe notifications adds d4ff3cbfdb gdb/testsuite: Add a missing -wrap in gdb_test_multiple adds e38332c286 Add initial support for .debug_sup sections. adds 64d38fdd99 Fix initial thread state of non-threaded remote targets adds dffdd8b51f gdb: relax assertion in target_mourn_inferior adds 0f977b7715 Add comment regarding include order of <sys/ptrace.h> and <a [...] adds 26b43ca6e6 Fix date in ChangeLog adds 06172a2c98 Automatic date update in version.in adds 8255cf421c libctf regen for NEWS adds bfece7562d Add PR27441 testcase adds cb51b708fd testsuite: note on use_gdb_stub usage adds 32e4f96cec Add support for the split DWARF forms. adds f821878623 testsuite: Remove extra \n from expected output of tsv notif [...] adds 0e12f6c802 Add support for decoding DWARF v5 DW_AT_addr_base tags. adds fe0171d248 Correct an error message in the ARM assembler. adds 7fe1b1388f nm: Add --quiet to suppress "no symbols" diagnostic adds 0cf9ea0b16 Automatic date update in version.in adds 573dc0cc43 Minor fix in skip_ctf_tests adds bb3a4efe13 [PR gdb/27393] set directories: handle empty dirs. adds b2287f90e4 Automatic date update in version.in adds f8069d55c1 sim: delete redundant SIM_EXTRA_ALL adds ed30adf750 sim: delete unused SIM_EXTRA_LIBDEPS adds ebe9564b99 sim: require AC_PROG_CPP explicitly adds a3e2cc64a6 sim: use AC_CHECK_TOOL to find ar adds c25ea03dd6 sim: set up build-time compiler settings adds 9ea3e81ca0 sim: igen: delete unused FOR_BUILD vars adds 88d7273afd sim: igen: delete more unused toolchain settings adds 9f34b60a43 sim: igen: drop config.h & header checking adds 1dbde357be Add missing changes to Makefile.tpl adds cf850febf6 Automatic date update in version.in adds 6a1224ec76 PR27128, nm -P portable output format regression adds 7824c1d22f Weak references to __start_/__stop_ symbols adds 8ee10e8609 PR27451, -z start_stop_gc adds ecd65684f5 Warn for missing separate debug files only if needed adds ba6eb62ff0 Add DWARF-5 section names to PE and PEP linker scripts. adds ec11fcffc0 Automatic date update in version.in adds f5b9c288a3 PowerPC64 undefined weak visibility vs GOT optimisation adds b80e421f91 PR27451, -z start_stop_gc for powerpc64 adds eaa2913a7a libctf: ctf_archive_next should set the parent name consistently adds ac36e134d9 libctf: reimplement many _iter iterators in terms of _next adds fd12633780 libctf: fix ChangeLog date adds 8915c559d4 libctf, include: remove the nondeduplicating CTF linker adds 478c04a55e libctf: remove reference to "unconflicted link mode". adds f5060e5633 libctf: add a deduplicator-specific type mapping table adds 4659554b28 libctf: minor error-handling fixes adds cf6a0b989a libctf: fix signed/unsigned comparison confusion adds 8e7e446446 libctf: free ctf_dynsyms properly adds 211bcd0133 bfd, ld, libctf: skip zero-refcount strings in CTF string reporting adds ca8f6bc629 Fix the BFD library's parsing of DIEs where specification at [...] adds 1228719f31 Check objfile->sf in ada-lang.c adds bdcccc5639 Use new for ada_symbol_cache adds 886d459fbe Simplify resolve_subexp by using C++ algorithms adds d1183b064c Return a vector from ada_lookup_symbol_list adds 5f9febe0f6 Use std::string rather than grow_vect adds bbcdf9ab73 Rewrite GNAT-encoded fixed point types in DWARF reader adds b4f26d541a Import GNU Readline 8.1 adds 19a9185537 Fix Readline 8.1 build on mingw adds ca87bad0e9 Automatic date update in version.in adds dc83f2d20e Split relocation defines out of coff/internal.h adds 270f32fc50 ld-gc tests on underscore targets adds 5789f845fb --gc-sections with groups and start/stop syms adds fd5c076a06 PR27493, objcopy --weaken-symbol does not weaken undefined symbols adds b93a3ed0a8 testsuite: extend nopie handling to add -fno-pie to compiler flags adds e71dbd0304 testsuite, gdb.btrace: remove assembly-check in delta.exp adds f0778fc1cf testsuite, gdb.btrace: pass rn-dl-bind.exp with clang adds c7c7253a47 testsuite, gdb.btrace: move -Wl,-x to ldflags adds d2c5f24eed testsuite, gdb.btrace: adjust expected output to pass with clang adds 26ed1478d1 testsuite, gdb.btrace: remove implicit debug option in stepi.exp adds 32c5299909 testsuite, gdb.btrace: adjust expected source line in non-stop.exp adds 8233378104 gdb, testsuite: enforce lazy binding for gdb.btrace/rn-dl-bind.exp adds 75363b6d60 x86: infer operand count of templates adds 1bfa81acbf Minor Ada-related cleanups adds 0b7733b665 binutils fails to compile on AIX due to mismatched declaration adds a2126563ea Automatic date update in version.in adds 168bb18858 GNU strip fails to set sh_link and sh_info on Solaris SPARC64 adds ca0e11aa4b Gate the displaying of non-debug sections in separate debugi [...] adds 1178743e4c Use "bool" in ada-lang.c adds 6fa7408d72 ld: don't generate base relocations in PE output for absolut [...] adds 6b5465b917 bfd: prune COFF/PE section flags setting adds d4e5db4e50 ld: adjust ld-scripts/map-address.* adds d1e93af64a gdb: set current thread in sparc_{fetch,collect}_inferior_re [...] adds 7a39bd53dc Automatic date update in version.in adds b01b5d9a0b Move x86_64 PE changes out of bfd_perform_relocation adds d296b73620 Fix the dislay of .debug_macro.dwo sections. adds 2017f38777 Add support for the DW_FORM_strx* forms to the BFD library. adds f3a5df7bd6 gdb: unify parts of the Linux and FreeBSD core dumping code adds b63a5e38ef bfd/binutils: support for gdb target descriptions in the core file adds 95ce627aeb gdb: write target description into core file adds 0897bb7d6d bfd/riscv: prepare to handle bare metal core dump creation adds fb8f3fc0c3 gdb/riscv: introduce bare metal core dump support adds db6092f3ae bfd/binutils: add support for RISC-V CSRs in core files adds d782d24b32 gdb/riscv: make riscv target description names global adds b2668f28ee gdb/riscv: write CSRs into baremetal core dumps adds 019989fdf1 Automatic date update in version.in adds 844be3f240 CTF: set up debug info for function arguments adds dd99cf0c58 CTF: add all members of an enum type to psymtab adds b0a8c2ff9c Make valgrind tests more robust by adding --wait=1 to vgdb i [...] adds 8c0546e928 elf/x86-64: Subtract __ImageBase for R_AMD64_IMAGEBASE adds 4444f40757 Micro-optimize abbrev reading and storage adds c2a62a3d88 Create new file dwarf2/sect-names.h adds fbedd54644 Change section_is_p to a method on dwarf2_section_names adds a7308ce01e Avoid crash on missing dwz file adds 1803565556 Include scoped_fd.h in debuginfod-support.h adds 9938d15a01 Move dwarf2_get_dwz_file to dwarf2/dwz.h adds 01573d7360 Fix build bug in ada-lang.c adds 7ce45db691 Automatic date update in version.in adds 6bddc3e8b4 sim: switch top level to automake adds 6c57b87fc4 sim: testsuite: merge into toplevel automake adds f4df849f1d Regenerated adds d3dacd0faf Automatic date update in version.in adds 2916e3e18f sim: igen: update options API adds 8c9b6e7689 sim: delete unused BUILD_LIBS setting adds ea2d29f7bc Split out eval_op_scope adds 50b98adc3c Split out eval_op_var_entry_value adds c0df928969 Split out eval_op_var_msym_value adds 9b1d8af683 Split out eval_op_func_static_var adds ffff730bf6 Split out eval_op_register adds 14a1c64a13 Split out eval_op_string adds f871bae1ae Split out eval_op_objc_selector adds 5c2f201e8d Split out eval_op_concat adds f960a6176a Split out eval_op_ternop adds 3e96c4fc0f Split out eval_op_structop_struct adds fb461aa39e Split out eval_op_structop_ptr adds b7a96ed22e Split out eval_op_member adds aedaf9ac06 Split out eval_op_add adds d9790e22f4 Split out eval_op_sub adds 7cdcdd02b3 Split out eval_op_binary adds 288d26bcd8 Split out eval_op_subscript adds 0cc96de858 Split out eval_op_equal adds 1fcb355938 Split out eval_op_notequal adds 6cad134942 Split out eval_op_less adds 1f78d732ec Split out eval_op_gtr adds 96e3efd9b2 Split out eval_op_geq adds 60cdd4871a Split out eval_op_leq adds eed70b1c37 Split out eval_op_repeat adds 39f288bea9 Split out eval_op_plus adds 606d105ff1 Split out eval_op_neg adds 1f09ec811e Split out eval_op_complement adds 24338fb9d9 Split out eval_op_lognot adds 786f70ee4d Split out eval_op_ind adds acee94686b Split out eval_op_alignof adds 3aef2a0768 Split out eval_op_memval adds 00f508843c Split out eval_op_preinc adds 9e1361b760 Split out eval_op_predec adds abffe11606 Split out eval_op_postinc adds a220ead5d4 Split out eval_op_postdec adds aec95807f1 Split out eval_op_type adds cc05c68ee0 Split out eval_op_f_abs adds e08109f24b Split out eval_op_f_mod adds 3dc41f3cdf Split out eval_op_f_ceil adds 9f1a1f3c4f Split out eval_op_f_floor adds 93b2b5fae2 Split out eval_op_f_modulo adds 00f2db6f7d Split out eval_op_f_cmplx adds 216f6fcbef Split out eval_op_f_kind adds 3c18c49c63 Split out fortran_require_array adds 9cbd1c2011 Split out eval_op_f_allocated adds d148f80354 Change parameters to rust_range adds 984af2cb26 Change parameters to rust_subscript adds d123f9e4a3 Split out eval_op_rust_ind adds 6fa9831f89 Split out eval_op_rust_complement adds 051042333d Split out eval_op_rust_array adds 575cae2335 Split out eval_op_rust_struct_anon adds 1fa41fc710 Split out eval_op_rust_structop adds 13ea014aee Split helper functions adds 41bdced5ae Split out eval_op_m2_high adds a49881f73e Split out eval_op_m2_subscript adds fb5ba2ab26 Split out eval_binop_assign_modify adds 5e80600ed0 Split out eval_op_objc_msgcall adds 3634f66996 Split out eval_opencl_assign adds 62d4bd947e Split out eval_ternop_in_range adds 82390ab88c Split out ada_unop_neg adds 7efc87ffcb Split out ada_unop_in_range adds 020dbabe22 Split out ada_atr_tag adds 68c757358f Split out ada_atr_size adds d05e24e61a Split out ada_abs adds faa1dfd751 Split out ada_mult_binop adds 214b13ac3b Split out ada_equal_binop adds 5ce19db80f Split out ada_ternop_slice adds b467efaa91 Split out ada_binop_in_bounds adds b84564fc8c Split out ada_unop_atr adds 38dc70cfee Split out ada_binop_minmax adds 3848abd6e1 Change value_val_atr to ada_val_atr adds dd5fd28346 Split out ada_binop_exp adds c0d7ed8ca8 Split out eval_multi_subscript adds e18c58f290 Split gen_expr_binop_rest adds e2803273a0 Introduce class operation adds de401988ae Implement dumping adds 75f9892d43 Add two agent expression helper functions adds cae26a0cb0 Introduce float_const_operation adds d5ab122c48 Introduce scope_operation adds d336c29e3f Introduce long_const_operation adds 0c8effa32e Introduce var_msym_value_operation adds b5cc3923de Introduce var_entry_value_operation adds 176793957a Introduce func_static_var_operation adds 247d935b83 Introduce last_operation adds 55bdbff857 Introduce register_operation adds e6985c5e45 Introduce bool_operation adds e6e01e16c5 Introduce internalvar_operation adds b50db09ff9 Introduce string_operation adds 1594e0bb3d Introduce ternop_slice_operation adds 9186293fd6 Introduce ternop_cond_operation adds 72d0a71134 Add c-exp.h and c_string_operation adds 06dc61b9df Introduce objc_nsstring_operation adds 09db370026 Introduce objc_selector_operation adds 8cfd3e95b7 Introduce complex_operation adds 808b22cfd7 Introduce structop_operation adds ab0609be83 Introduce structop_ptr_operation adds 07f724a8c6 Introduce structop_member_operation and structop_mptr_operation adds e51e26a090 Introduce concat_operation adds a94323b607 Introduce add_operation adds 5133d78b7b Introduce sub_operation adds 373907ffb2 Introduce binop_operation adds 224d6424ba Introduce subscript_operation adds 46916f2bcb Implement binary comparison operations adds d4eff4c122 Introduce repeat_operation adds ae64ba58b3 Introduce comma_operation adds 9307d17b7a Implement some unary operations adds 6d89e2962a Implement unary increment and decrement operations adds 876469ffa1 Introduce unop_ind_operation adds 5b5f5140e1 Introduce type_operation adds 4efc574cb9 Introduce typeof_operation adds 0af8829eb1 Introduce decltype_operation adds 929f3aa742 Introduce typeid_operation adds 14aff815df Introduce unop_addr_operation adds 85d23bda83 Introduce unop_sizeof_operation adds ae4bb61e19 Introduce unop_alignof_operation adds cbc18219d3 Implement UNOP_MEMVAL and UNOP_MEMVAL_TYPE adds f6b4232691 Introduce op_this_operation adds 44b675c89b Introduce type_instance_operation adds 4078678289 Introduce assign_operation adds e5946e1604 Introduce assign_modify_operation adds 165a813a3a Introduce unop_cast_operation adds 292382f47e Introduce unop_cast_type_operation adds d9ad79d880 Implement C++ cast operations adds e82a5afced Introduce var_value_operation adds 085734dd95 Introduce objc_msgcall_operation adds 821e72d775 Introduce multi_subscript_operation adds 03070ee9c7 Introduce ada_wrapped_operation adds 42fecb6183 Introduce ada_string_operation adds cc6bd32eea Introduce ada_qual_operation adds fc715eb288 Introduce ada_ternop_range_operation adds 9dcd3e2957 Implement several Fortran operations adds 6fab435953 Implement some Rust operations adds 11dd3dce44 Introduce rust_unop_ind_operation adds 6ce1ad679a Introduce rust_subscript_operation adds 9db6b6ddbd Introduce rust_range_operation adds e4407a202d Implement Rust field operations adds 5947d337d6 Introduce rust_aggregate_operation adds 2bc9b40ce1 Add two simple Modula-2 operations adds 5019124b1d Implement the "&&" and "||" operators adds 7c15d377de Implement some Ada unary operations adds 95d49dfbba Introduce ada_unop_range_operation adds e447908052 Introduce class adl_func_operation adds 1c02eb3035 Introduce array_operation adds a00b7254fb Implement function call operations adds 638fd74a61 Implement Rust funcall operation adds 2f98abe174 Introduce fortran_undetermined adds 58a76c7264 Introduce classes for Fortran bound intrinsics adds eb4c927182 Implement Fortran associated operations adds f403a4e4a5 Implement fortran_allocated_operation adds e967770468 Introduce opencl_cast_type_operation adds a88c3c8dd3 Implement OpenCL binary operations adds 2492ba36f6 Introduce opencl_notequal_operation adds 33b7921462 Introduce opencl_structop_operation adds 944fd3b812 Implement OpenCL logical binary operations adds cf12b17fd0 Implement OpenCL ternary conditional operator adds cd9a314824 Split out some Ada type resolution code adds 73796c7326 Introduce ada_binop_addsub_operation adds d9e7db065e Implement Ada multiplicative operators adds 6e8fb7b723 Implement Ada equality operators adds 039e4b76be Introduce ada_bitwise_operation adds 1b1ebfab47 Introduce ada_ternop_slice adds 82c3886e24 Introduce ada_binop_in_bounds adds 60fa02ca6f Implement some Ada OP_ATR_ operations adds 99a3b1e77b Introduce ada_var_value_operation adds 3f4a0053d9 Introduce ada_var_msym_value_operation adds 6ad3b8bf3b Implement Ada min and max operations adds 7992accc6e Refactor value_pos_atr adds 7631cf6cc8 Introduce ada_pos_operation adds 9e99f48f27 Introduce ada_atr_val_operation adds 065ec8268d Introduce ada_binop_exp_operation adds e8c33fa16a Introduce ada_unop_ind_operation adds ebc06ad8f4 Introduce ada_structop_operation adds efe3af2f9a Implement function calls for Ada adds d8a4ed8ad1 Implement Ada resolution adds a88c43542d Implement Ada assignment adds b0f9164cc6 Remove use of op_string adds 413403fc34 Add an expr::operation_up to struct expression adds 4933522da0 Add completion for operations adds 8227d9e2f4 Add operation-related methods to parser_state adds 482ddd69c5 Convert dtrace probes to use operations adds 4c5e7a930a Convert stap probes to create operations adds c1299a2344 Convert rust-exp.y to use operations adds d182f27979 Convert c-exp.y to use operations adds bb4e057488 Convert go-exp.y to use operations adds 9412fdcc2a Convert d-exp.y to use operations adds 3163898ec8 Convert p-exp.y to use operations adds f1b8ceef1b Convert m2-exp.y to use operations adds d308ba78cf Convert f-exp.y to use operations adds 08a057e64b Convert ada-exp.y to use operations adds aa1da9ed50 Remove now-unused Rust evaluator code adds a99be8c199 Remove now-unused Fortran evaluator code adds 5871f0a38d Remove now-unused Modula-2 evaluator code adds d3c54a1ce8 Remove now-unused Ada evaluator code adds f2a98603a8 Remove now-unused C evaluator code adds 1eaebe02cf Remove union exp_element adds 0922dc847e Remove two Ada opcodes adds d357570da8 Remove unused Modula-2 opcodes adds 5d9ba98236 Remove unused Ada opcodes adds 43f542e321 Remove OP_EXTENDED0 adds 48fa6f23ec Remove OP_UNUSED_LAST adds 79ab486e97 Remove BINOP_END adds b9d06571f9 Inline expression constructor adds ce284361a2 Inline expr_builder methods adds 96db551d06 Merge namespace scopes in eval.c adds 0b2b0b8220 Remove EVAL_SKIP adds 40d07d07d0 Change exp_uses_objfile to return bool adds 9c79936b3d Use bound_minimal_symbol in var_msym_value_operation adds 3dd93bf837 Remove some null checks adds 8c379db285 Enable maintainer mode for sim adds 500e7d4cb3 Automatic date update in version.in adds 87fa7d568d bfd: don't silently wrap or truncate PE image section RVAs adds e93a3b27b2 x86-64: make SYSEXIT handling similar to SYSRET's adds 742732c7f0 x86: fold some prefix related attributes into a single one adds e14816a8ba gdb/fortran: add support for RANK keyword adds 7ba155b370 gdb/fortran: add support for 'SIZE' keyword adds eef32f5998 gdb/fotran: add support for the 'shape' keyword adds 611aa09d99 gdb/fortran: Add 'LOC' intrinsic support. adds fbb1aaceba gdb: fix field names of GDB's type main_type structure adds 5dc75cf325 ld: adjust PE base relocations testcase adds ccdc02ed07 Fix function call regression in new evaluator adds 2dfa8341e0 ELF DWARF in PE output adds 3044062c34 Automatic date update in version.in adds 67b0f68480 bfd: strip symbols not representable in COFF/PE symbol table adds 319419837c x86: correct decoding of nop/reserved space (0f18 ... 0x1f) adds 00ec187565 x86: re-arrange order of decode for various legacy opcodes adds 14d10c6ccc x86: re-arrange order of decode for various VEX opcodes adds 13954a3119 x86: re-arrange order of decode for various mask reg opcodes adds fc681dd6a1 x86: re-arrange order of decode for various EVEX opcodes adds 066f82b96a x86: reuse VEX entries for EVEX vperm{q,pd} adds 85ba7507f6 x86: reuse further VEX entries for EVEX adds 32e31ad7da x86: re-arrange enumerator and table entry order adds b763d508db x86/Intel: correct AVX512 S/G disassembly adds 7056f312d0 Use bool for "parse_completion" adds 0b9f3e5463 Automatic date update in version.in adds ebdcad3fdd RISC-V: Improve multiple relax passes problem. adds da944c8a70 x86: remove stray uses of xmmq_mode adds ac7a231133 x86: drop a few redundant EVEX-related checks adds fd1fd06186 x86: re-order logic in OP_XMM() adds 1e1e17e5e2 Automatic date update in version.in adds 68cb21837f PE image base fallout adds 78c84bf926 Re: x86: correct decoding of nop/reserved space (0f18 ... 0x1f) adds 8aa2d0236a bfd: add missing smclass when creating csect for xcoff64 adds 6d4d932867 bfd: use default coff_write_object_contents for XCOFF64 adds 0c929e83c1 bfd: move xcoff64_ppc_relocate_section after the HOWTO table adds 2c1bef53de aix: correct HOWTO table and add missing relocations adds 4a403be0c1 aix: implement R_TOCU and R_TOCL relocations adds 1b2cb8e2ee aix: implement TLS relocation for gas and ld adds e3141a4d89 gdb/testsuite: make test names unique in gdb.python/py-mi.exp adds 5fc5a1b882 gdb/testsuite: make test names unique in gdb.python/py-forma [...] adds 22d3e7f629 gdb/testsuite: make test names unique in gdb.python/py-strfns.exp adds f35d6971cd gdb/testsuite: make test names unique in gdb.python/py-finis [...] adds 93598ea43d gdb/testsuite: make test names unique in gdb.python/py-explore.exp adds 8b12ded4e6 gdb/testsuite: make test names unique in gdb.python/py-pp-maint.exp adds 2cb60e747b gdb/testsuite: make test names unique in gdb.python/py-block.exp adds e3e48d8fdb gdb/testsuite: make test names unique in gdb.python/py-prompt.exp adds 79d041578d gdb/testsuite: make test names unique in gdb.python/py-symtab.exp adds 0125fabc7a gdb/testsuite: remove a duplicate test adds 66bb1dd9cd gdb/testsuite: make test names unique in gdb.python/py-explo [...] adds 8a4efb366f gdb/testsuite: check the correct Python variable in test adds 323b848c51 gdb/testsuite: remove duplicate test from gdb.python/py-valu [...] adds 7f99d636c2 gdb/testsuite: resolve remaining duplicate test names in gdb [...] adds 203a206d14 riscv --enable-targets=all on 32-bit host adds 7fce7ea986 aarch64: Add few missing system registers adds be3b926d8d Add values for NetBSD .note.netbsd.ident notes (PaX). adds fece451c2a Use RAII to set the per-thread SIGSEGV handler adds 8673b5d2e0 Automatic date update in version.in adds 367c5eb750 sim: drop dep on configure-gdb adds c6c7769d9d sim: introduce {COMPILE,LINK}_FOR_BUILD adds e7d9022ba8 sim: rename BUILD_LDFLAGS to LDFLAGS_FOR_BUILD adds 27012aba8a Remove Irix 6 workaround from DWARF abbrev reader adds 7c32eebb87 Constify abbrev_table::lookup_abbrev adds 933721ed0c Automatic date update in version.in adds a9f172c6b7 Set dwarf2_per_cu_data::m_header_read_in adds 0280fdcc08 Minor tweak to use die_reader_specs::abfd adds 7c290a04a2 Use cu_header consistently in read_attribute_value adds e838b3ca21 Automatic date update in version.in adds ba6a0ef349 gdb: use make_scoped_restore to restore gdbpy_current_objfile adds c68b1842bd ld: don't chance overrunning PE .reloc section content adds 8d624a9d80 gdb/fortran: Fix quad floating-point type for Intel compilers. adds 1996d0f12c Add a symbols-only mode to nm. adds 207582c075 Fix bug in Ada aggregate assignment adds 1ac7452264 Fix Ada assignment resolution adds 9863c3b5fc Fix regression in Ada ptype adds c04da66c26 Implement Ada operator overloading adds 3b5c4de0cf Call ada_ensure_varsize_limit in indirection adds 6813ceb03f Fix unary + in Ada adds eb5dd73748 gdb: remove dw2_get_file_names_reader's info_ptr parameter adds 850ed749b4 gdb: add logging to dwarf2_initialize_objfile adds 4800761a71 gdb: remove spurious colon in create_debug_type_hash_table d [...] adds 675da9a57e Fix GDB build with GCC 4.8.2 adds 4ef6d2f424 Automatic date update in version.in adds 80d49d6a1b RISC-V : Support bitmanip-0.93 ZBA/ZBB/ZBC instructions adds f302f9e26e gdb/testsuite: squash duplicate test names in gdb.threads/*.exp adds 7807d76a1c gdb/python: fix FrameDecorator regression on Python 2 adds 012d442686 Fix a potential buffer overrun qwhen writing out PE aux entries. adds ee42883cff Fix potentially undefined behaviour use of strcpcy. adds 383228bc3f Fix cygwin build error adds d6bfbc3981 Re-enable the dislay of debug sections in separate debuginfo [...] adds 44266f362b Retain .debug_addr sections loaded in the main file. adds 95557f1e09 Automatic date update in version.in adds d0c99a23b2 gdb/testsuite: add test for run/attach while program is running adds f058c5210f gdb: remove unneeded argument in check_multi_target_resumption adds a1f463bedd Automatic date update in version.in adds 087945261c libctf: fix some tabdamage and move some code around adds bf4c3185a5 libctf: split serialization and file writeout into its own file adds 01cbfcba4b libctf: fix comment above ctf_dict_t adds b9a964318a libctf: split up ctf_serialize adds eefe721ead libctf: fix GNU style for do {} while adds 7879dd88ef libctf: eliminate dtd_u, part 1: int/float/slice adds 534444b1ee libctf: eliminate dtd_u, part 2: arrays adds 81982d20fa libctf: eliminate dtd_u, part 3: functions adds 755ba58ebe Add install dependencies for ld -> bfd and libctf -> bfd adds 2a05d50e90 libctf: don't lose track of all valid types upon serialization adds 986e9e3aa0 libctf: do not corrupt strings across ctf_serialize adds 77d724a7ec libctf: eliminate dtd_u, part 4: enums adds 08c428aff4 libctf: eliminate dtd_u, part 5: structs / unions adds d7b1416ef2 libctf: types: unify code dealing with small-vs-large struct [...] adds e4c78f303d libctf: a couple of small error-handling fixes adds 69a284867c libctf: support encodings for enums adds 835f2fae11 Fix section dumping so that warnings are not issued for miss [...] adds 538c15fc2a GCC_CET_HOST_FLAGS: Check if host supports multi-byte NOPs adds 763b8efdcc gdb/doc: fix the example for get_set_string in Python API docs adds 15310fd4eb Reimplement dwarf_unit_type_name adds 3273f9a19e 2021-03-18 Christian Groessler <chris(a)groessler.org> adds fb099b8a51 Automatic date update in version.in adds 51f6e7a9f4 DWARF: Check version >= 3 for DW_FORM_ref_addr adds 3818d4ab06 elf: Handle .gnu.debuglto_.debug_* sections adds a088215ae3 Enable macro test for clang compiler adds fba7f7533c pr27590 testcase fixes adds 826b97d42d gas/app.c don't throw away spaces before slash adds 7b9f985957 elf: Rename EM_INTEL205 to EM_INTELGT adds 219f56b484 Fix any_thread_of_inferior adds e0d6d27406 Fix potential hang during gdbserver testing adds 5cde809b7b Add DWARF 5 support in gold. adds 4ee6049505 Fix gold to use mallinfo2 if available instead of deprecated [...] adds 9331846e44 Regenerate config.in, missing from previous commit. adds cc1849716f Fix typo in previous patch: should use struct mallinfo2. adds 07b1c3dbd9 Fix call to system fallocate to handle errno correctly. adds 6536577167 Automatic date update in version.in adds 15407e7e0d DWARF LTO debug sections vs. .stabstr adds 1de96e5de9 x86-64: Add a testcase for PR ld/27590 adds b218a83935 Fix failing test for PR 23870. adds 35891b4775 Use stdout when printing object file names for -t option. adds 18038e6363 Move some DWARF code out of symfile.h adds 701823751b Introduce dwarf2/public.h adds a8ad4f3c17 Change objfile_has_partial_symbols to a method adds fae2120ba0 Change objfile::has_partial_symbols to return bool adds 4d080b4687 Introduce method wrappers for quick_symbol_functions adds 9b99dcc8db Move quick_symbol_functions to a new header adds 5c3f1e5bfc Move sym_fns::qf to objfile adds 39298a5d97 Convert quick_symbol_functions to use methods adds 75336a5a2a Move psymbol_map out of objfile adds 7e9c0476a7 Change how some psymbol readers access the psymtab storage adds 484b109063 Do not pass objfile to psymtab_discarder adds 51962708bd Set per_bfd->partial_symtabs earlier adds efd7398ee2 Change how DWARF indices use addrmap adds 4829711b6b Move psymtab statistics printing to psymtab.c adds 79cc99f69b Change how DWARF index writer finds address map adds 8468590493 Reference psymtabs via per_bfd in DWARF reader adds 17d66340eb Attach partial symtab storage to psymbol_functions adds b29b98cf84 Rearrange psymtab_storage construction adds eb00e4686d Remove sym_fns::sym_read_psymbols adds d1eef86d12 Introduce objfile::require_partial_symbols adds 7b249e470a Add partial_symtabs parameter to psymtab construction functions adds 3aa31ce788 Remove last objfile partial_symtab references from psymtab.c adds caf8c1e507 Change count_psyms to be a method on psymbol_functions adds de909f0b76 Remove objfile::psymtabs adds e11145903f Switch objfile to hold a list of psymbol readers adds eb36a3eb2f Allow multiple partial symbol readers per objfile adds 38e41a8845 Automatic date update in version.in adds e93388417c Provide an inline startswith function in bfd.h adds 1808ba4b9a Automatic date update in version.in adds 2aaf2ce843 bfd: add translation wrappers to PE image section RVA diagnostics adds d171632faa gdbserver: convert the global dll list into a process_info field adds 1e7fcccb8d gdb/testsuite: use the correct .debug_str section name for D [...] adds 08dedd6631 Add startswith function and use it instead of CONST_STRNEQ. adds 46fec6428e gdb/objc: make objc_demangle a member function of objc_language adds 702cf3f5df gdb: handle invalid DWARF when compilation unit is missing adds 12af5ebd82 Automatic date update in version.in adds f596b03f55 bfd: avoid "shadowing" of glibc function name adds a152332d17 x86: unbreak certain MPX insn operand forms adds 70e958370c x86: don't open-code PREFIX_NONE adds fadf6add30 gdb: remove unpush_target free function adds 02980c5645 gdb: remove push_target free functions adds c8fbd44a01 gdb: remove target_is_pushed free function adds 66848ebca8 gdb: remote target_longname adds 441f6aca39 x86: split opcode prefix and opcode space representation adds dac10fb0d1 x86: re-order two fields of struct insn_template adds b933fa4b5d x86: re-number PREFIX_0X<nn> adds 5d82f23764 Automatic date update in version.in adds 311845694b x86: don't use opcode_length to identify pseudo prefixes adds 3564871692 x86: derive mandatory prefix attribute from base opcode adds 9a182d0461 x86: derive opcode length from opcode value adds dbe692af2d New target methods for memory tagging support adds c193949e75 New gdbarch memory tagging hooks adds 2c2e7f87a8 Add GDB-side remote target support for memory tagging adds 754487e200 Unit testing for GDB-side remote memory tagging handling adds 546b77fe78 GDBserver remote packet support for memory tagging adds c2cfa6542c Unit tests for gdbserver memory tagging remote packets adds 0f01515a24 Documentation for memory tagging remote packets adds 0424512519 AArch64: Add MTE CPU feature check support adds c1bd443b4d AArch64: Add target description/feature for MTE registers adds 5e984dbf35 AArch64: Add MTE register set support for GDB and gdbserver adds 3f3bd8b8c1 AArch64: Add MTE ptrace requests adds 4601818e8c AArch64: Implement memory tagging target methods for AArch64 adds 93e447c605 Convert char array to std::string in linux_find_memory_regions_full adds 1e735120b9 Refactor parsing of /proc/<pid>/smaps adds c7782e50b1 AArch64: Implement the memory tagging gdbarch hooks adds b4a7d4fcfe AArch64: Add unit testing for logical tag set/get operations adds cf44c9fa1b AArch64: Report tag violation error information adds 41919a58ce AArch64: Add gdbserver MTE support adds ffcc2a1549 AArch64: Add MTE register set support for core files adds 48136e006e New memory-tag commands adds 362a070019 Documentation for the new mtag commands adds bef382e61a Extend "x" and "print" commands to support memory tagging adds a668276c18 Document new "x" and "print" memory tagging extensions adds ce19233864 Add NEWS entry. adds bf0aecce6e Add memory tagging testcases adds 41c0087ba5 gdb: make gdbarch_data_registry static adds 68f115f8c0 Fix TYPE_DECLARED_CLASS thinko adds b64f703b51 Remove 'kind' parameter from dw2_map_matching_symbols adds d777bf0df2 gdb: move all "current target" wrapper implementations to target.c adds 328d42d87e gdb: remove current_top_target function adds 0fa6376c7a gnulib: import gitlog-to-changelog adds b73ebe34f4 Automatic date update in version.in adds 5a4037661b PR27647 PowerPC extended conditional branch mnemonics adds 829f3fe1f0 x86-64: limit breakage from gcc movdir64b et al workaround adds c0e54661f7 x86: fix AMD Zen3 insns adds 5364285240 x86: flag as bad AVX512 insns with EVEX.z set but EVEX.aaa clear adds 596a02ff55 x86: flag bad S/G insn operand combinations adds 5e74b4959b x86: fix CMPXCHG8B special case when disallowing q suffix ou [...] adds efa30ac3c5 [NIOS2] Fix disassembly of br.n instruction. adds d3cbca38df gdb/riscv: fix creating breakpoints at invalid addresses adds ba3c61fc58 gdb/testsuite: use -wrap with gdb_test_multiple in lib/ada.exp adds 485170cdb1 libctf, dump: do not emit size or alignment if it would error adds 24c877f9b1 include: always do unsigned left-shift in CTF_SET_STID adds 86f64bf43f libctf, serialize: functions with no args have a NULL dtd_vlen adds 5226ef6113 libctf: make ctf_bfdopen_ctfsect a debugger entry point adds 0bd65ce30a libctf: don't dereference out-of-bounds locations in the qua [...] adds 15131809c2 libctf: fix memory leak in a test adds 8f7b22ea2a libctf: fix ELF-in-BFD checks in the presence of ASAN adds 8592be8c7d ld: do not rely on the exact size of the CTF symtypetabs in [...] adds 323fd5b9f9 Fix problem exposed by gdb.server/stop-reply-no-thread-multi.exp adds eff4f69db4 Fix bkpt-other-inferior.exp race adds 574d27ede4 Automatic date update in version.in adds c3344b626d x86-64: don't accept supposedly disabled MOVQ forms adds ac45a6ca51 gdb/testsuite: remove duplicate test names for gdb.cp/nsusing.exp adds 6e89229742 gdb/testsuite: remove duplicate test names from gdb.cp/gdb2384.exp adds baecbb3dc8 gdb/testsuite: remove duplicate test from gdb.cp/maint.exp adds 6b78370dcc gdb/testsuite: resolve duplicate test name in gdb.cp/cplusfuncs.exp adds 3c2dcf90b5 gdb/testsuite: resolve remaining duplicate test names in gdb [...] adds bab287cdcf Avoid some pointer chasing in DWARF reader adds e5b9b39f88 target_is_non_stop_p and sync targets adds 1192f124a3 gdb: generalize commit_resume, avoid commit-resuming when th [...] adds b4b1a226df gdb: defer commit resume until all available events are consumed adds b1f3973b9c gdb/testsuite: more testing of pretty printer 'array' display_hint adds ff5b3e1458 Save/restore file offset while reading notes in core file adds cd43f63e00 Allow expand_symtabs_matching to examine imported psymtabs adds e2cd5ca40c Simplify psymbol_functions::expand_symtabs_matching adds 2315bb2d57 Simplify use of map_matching_symbols in ada-lang.c adds f4655dee77 Use function view in quick_symbol_functions::map_symbol_filenames adds efe1ecd834 gdb-add-index.sh: Remove use of non posix 'local' adds 03f2bc641d Automatic date update in version.in adds 99066782db gdb/testsuite: make some test names unique in gdb.arch/power [...] adds 594b8948eb Don't clear 'qf' in elf_symfile_read adds 6e23d91aa7 Don't declare elf_sym_fns_lazy_psyms adds fff7b4f846 Automatic date update in version.in adds edc02ceb97 Simplify DWARF reader initialization adds b1063d1d96 Automatic date update in version.in adds 0f68420117 elf_backend_relocate_section int vs. bfd_boolean adds 37bb890f81 ELF output symbol hooks int vs. bfd_boolean adds 1201fda61b hash table iterator callback functions int vs. bfd_boolean adds f4f9ede042 Miscellaneous BFD int vs bfd_boolean fixes adds 3d7d6c1b50 opcodes int vs bfd_boolean fixes adds 1be305ffcd binutils int vs bfd_boolean fixes adds 854f1e4be9 gas int vs bfd_boolean fixes adds 63b4cc53dc TRUE/FALSE simplification adds 389d00a5e5 x86: derive opcode encoding space attribute from base opcode adds 9df6f676c2 x86: shrink some struct insn_template fields adds 73e45eb208 x86: undo Prefix_0X<nn> use in opcode table adds 5cdaf10025 x86: fold SSE2AVX and their base MMX/SSE templates adds c8cad9d389 x86: VPSADBW's source operands are also commutative adds bbe1eca622 x86: move some opcode table entries adds 25b48839b3 Restore procfs.c compilation adds aa33ea6833 testsuite, mi: avoid a clang bug in 'user-selected-context-s [...] adds fa167b002f Fix memory tagging section type adds 9b8ffbf410 Don't pass empty options to GCC adds 9f67fc596b Remove parameter from language_info adds 1b82252e8c Automatic date update in version.in adds 0af4fcc25d PR27625, powerpc64 gold __tls_get_addr calls adds d1cbe0076a asan: linker.c:2294:8: runtime error: load of value 253 adds 783c187b8c x86: make swap_2_operands() have unsigned parameters adds 6225c532b4 x86: integrate mask_op into struct _i386_insn adds 5273a3cd48 x86: integrate broadcast_op into struct _i386_insn adds ca5312a241 x86: integrate rc_op into struct _i386_insn adds 6288d05f11 x86: adjust st(<N>) parsing adds 3468486226 x86: drop REGNAM_{AL,AX,EAX} adds 5e0423804a x86: drop seg_entry adds 782c1ab836 Fix inverted logic bug adds b953e70356 [gdb/testsuite] Add missing .debug_abbrev terminator in dw2- [...] adds 8a91fbdf3b gdb/dwarf: disable per-BFD resource sharing for -readnow objfiles adds edf71419e0 Automatic date update in version.in adds 57ae980e32 Include string.h in bfd.h and delete LITMEMCPY, LITSTRCPY adds 3dfb1b6d34 Remove bfd_stdint.h adds ad9e24ad11 Use stdbool.h adds 9193bc4285 Use bool in include adds faa7a26040 Use bool in gprof adds 0a1b45a20e Use bool in bfd adds 78933a4ad9 Use bool in opcodes adds 015dc7e1f8 Use bool in binutils adds f38a2680c2 Use bool in ld adds 5b7c81bd8c Use bool in gas adds 65c5fbd4fd PR27671, Poisoning TRUE / FALSE poisons Win32 system headers adds fdb21288ca Don't include bfd/sysdep.h for gas files adds cfcbd506fb [gdb/testsuite] Ignore DEBUGINFOD_URLS adds 3f49d08059 Add some error checking to DWARF assembler adds 3570682a2c Fix typo in dwarf2/stringify.h adds 1cb108e416 PR27675, PowerPC missing extended mnemonic mfummcr2 adds 24b6dd1ecf Automatic date update in version.in adds af82f89db0 Remove two trivial functions from dwarf2/read.c adds 733f5eea6b Use startswith in gdb subfolder. adds 84838a6166 [gdb/testsuite] Fix unset of DEBUGINFOD_URLS in default_gdb_init adds 24d127aa9f Replace const_strneq with startswith. adds 3f3328b816 Use startswith more for strncmp function calls. adds d34049e8bb Use startswith in gas subfolder. adds e9b095a538 Remove strneq macro and use startswith. adds caaf412e98 Fix microblaze sim build error adds 74edb473c9 PE/Windows x86_64: Fix weak undef symbols after image base change adds bfb9f5dcfe Use importlib instead of imp module on python 3.4+ adds ac628a067a Fix obvious typo in gdb/testsuite/lib/pdtrace.in adds 3451a2d7a3 Automatic date update in version.in adds aa70e35c71 gdb: add type::is_declared_class / type::set_is_declared_class adds 3bc440a2c4 gdb: remove TYPE_DECLARED_CLASS adds 9902b32793 gdb: add type::is_flag_enum / type::set_is_flag_enum adds 0672875f3c gdb: remove TYPE_FLAG_ENUM adds 4a4f97c129 gdb: add intern methods to objfile_per_bfd_storage adds 9984dd9994 gdb: use std::string in partial_symtab::partial_symtab / all [...] adds 0072c87379 gdb: pass objfile_per_bfd_storage instead of objfile to part [...] adds 9161c89ad8 gdb: remove objfile parameter from get_objfile_bfd_data adds ca698bee0a Automatic date update in version.in adds c2783492b6 sim: unify toolchain settings adds b6b1c79084 sim: igen: merge build into top level adds a0e674c1ce sim: add preliminary support for --enable-targets adds a389375f5b sim: testsuite: integrate common tests into build adds 26da232cbd sim: example-synacor: a simple implementation for reference adds 9bcbcdf229 Automatic date update in version.in adds 5c6f091ae0 sim: mips: Add handlers to simulator monitor for unlink, lse [...] adds a2991571f0 Automatic date update in version.in adds 306b445a6d gdb: fix internal error in avr_frame_unwind_cache adds 5d4d26d14c C99 gprof configury adds 83c79df86b C99 bfd configury adds ab2af25e83 C99 opcodes configury adds 87b9f2556d C99 binutils configury adds 23d613801d C99 gas configury adds c774eab1c8 C99 ld configury adds 53e123a578 Adjust location of readline in sim/erc32 adds a32a7fdc94 Automatic date update in version.in adds 043bcbaf81 [gdb/testsuite] Fix xfail handling in gdb.threads/gcore-thread.exp adds d811a7cf74 [gdb/tui] Fix len_without_escapes in tui-disasm.c adds bd3d1480a8 ld: warn about PE base relocations to sections above .reloc adds da0835aebe gas: missing (re-)initialization of local variable in fixup_ [...] adds eac4eb8ecb Fix a problem assembling AArch64 sources when a relocation i [...] adds 340d00fb78 [gdb/breakpoints] Workaround missing line-table entry adds 4db29512ce C99 NEWS and README adds a2e6677373 Return symbol from symbol_at_address_func adds e23446bf96 Automatic date update in version.in adds b12389f219 Fix pr27217 testcase failure adds 79c024436b gdb/py: fix gdb.parameter('data-directory') adds 1fd999d909 gdb: Handle missing .debug_str section adds 61dee7220e gdb/testsuite: fix fission support in the Dwarf assembler adds 56d467f4ee gdb: handle relative paths to DWO files adds efd86e5b0f sim: m32c: opc2c: remove unused vlist variable adds 5e18990f1f gdb: move cheap pointer equality check earlier in types_equal adds 30ab358668 gdb: allow casting to rvalue reference in more cases adds 0a703a4ced gdb/fortran: handle dynamic types within arrays and structures adds dc2b480f3d CTF: handle forward reference type adds e97007b64a gdb: make target_ops::follow_fork return void adds 97bf40d859 PR27676, PowerPC missing extended dcbt, dcbtst mnemonics adds ce7d813a0f PR27684, PowerPC missing mfsprg0 and others adds bf5271659d Automatic date update in version.in adds 0592e80bcf Aarch64 sim fix for gcc-10 miscompilation. adds 23cb7bac66 sim: testsuite: calculate $arch from $subdir adds eec8bf7eab bfd: use https for bugzilla adds 1bcee7fd87 sim: testsuite: skip tests when the port is disabled adds 05385fc777 sim: testsuite: support exit 77 for unsupported tests adds fbb3bcfcd8 gdb: Update producer check for Intel compilers. adds 16e311ab6d gdb: Allow prologue detection via symbols for Intel compilers. adds 2b8d134be4 sim: set ASAN_OPTIONS=detect_leaks=0 when running igen and opc2c adds b7f507caf0 Fix DTB generation mechanism and build failure adds 83a559f7b9 Remove unused variable un darwin_nat_target::resume adds 81e6e8ae40 Do not use old-style definitions in sim adds 32a046ab0d Add system includes in sim adds 06a88b3b39 Avoid sequence point warning in h8300 sim adds 39178037a1 Automatic date update in version.in adds c3f72de4f5 PowerPC disassembly of pcrel references adds 52efda8266 AArch64: Fix Atomic LD64/ST64 classification. adds dd17020328 AArch64: Fix Diagnostic messaging for LD/ST Exclusive. adds ed29efbd17 [sim,rx] Silence warning that turns into a build error adds 1ef6a59696 [AArch64] Fix include order for MTE adds 3a3fa80109 Add missing ChangeLog entry for sim/rx change. adds ac4d7c7bfa Automatic date update in version.in adds b3885679dd Fix handling DLL loads at run time adds 2cbb0a1b2e Automatic date update in version.in adds 114ee2a4ae Improve support for loading DLLs at run time in gdbserver. adds 6803e1cb21 Automatic date update in version.in adds e601909a32 RISC-V: Support to parse the multi-letter prefix in the arch [...] adds fc304b8891 PR27719, lang_mark_undefineds trashes memory adds 32d715691a Power10 bignum operands adds d5a71b1131 sim: cgen: move cgen_cpu_max_extra_bytes logic into the common code adds f0bae2552d RISC-V: Add i-ext as the implicit extension when e-ext is set. adds f5b1097353 RISC-V: The version of i-ext should be RISCV_UNKNOWN_VERSION [...] adds b585e89996 elf_backend_archive_symbol_lookup adds 2cc15b10e5 convert elf_link_hash macros to inline functions adds 9d8f30221b gdb, testsuite, btrace: relax unneeded stepi expected output adds 04977957ec gdbserver: constify the 'pid_to_exec_file' target op adds 43e05cd4f4 ENABLE_CHECKING in bfd, opcodes, binutils, ld adds d471748373 gdb, gdbserver: remove WinCE support code adds 6ba4cb845b RS6000 Add support to print vector register contents as float128 adds 4bb920c68e m68hc11 gas testsuite wart adds b722acca42 Add myself to gdb/MAINTAINERS adds 82d9b28047 [rs6000] Create a powerpc-power10.exp test adds e3d528d7e6 [PATCH, rs6000, v3][PR gdb/27525] displaced stepping across [...] adds c8a379440e [PATCH] gdb-power10-single-step adds 6b142048ad [PATCH,rs6000] Fix vsx-regs.exp testcase failure adds 8d85d1f53f Automatic date update in version.in adds e3839c100f RISC-V: Don't report the mismatched version warning for the [...] adds 0fa29e2dee Remove now unneeded #ifdef check for NT_NETBSD_PAX. adds 1cfc6f00e4 PR27722, error: array subscript has type char adds d2f1139ef0 bfd: avoid infinite loop when static linking XCOFF adds 0256da25c0 Remove process_stratum_target::hostio_last_error abstraction adds 6418520e7f Document the effect of --as-needed on --rpath on Linux based [...] adds d9d2ef05f1 Fix build failure for 32-bit targets with --enable-targets=all adds 329534fda7 [gdb] Fix regoff_t incompatibility adds 1228cb9094 Remove some unused typedefs from gdbserver adds 6cacd44948 Remove WinCE code from gdbreplay adds c159f35225 PR27723, Internal error in select_cie_for_fde adds c48a248e33 Automatic date update in version.in adds d20eb46617 Re: PR27723, Internal error in select_cie_for_fde adds 13acb58d42 PR27716, build failure for msdosdjgpp: PATH_MAX undeclared adds c9f9a78d00 PR27630, ubsan: elf32-arm.c:6587:20 adds 8985b74b7d PR27631, ubsan: elf32-metag.c:1550:10 adds 5f47741bf6 Remove unneeded tests for definitions of NT_BSDNETCORE values. adds ac4d323ea0 testsuite, gdb: recognize DW_OP_fbreg in lib/dwarf.exp adds 6be872a439 Ignore trailing bytes at the end of a Windows Resource Versi [...] adds 9917b5596a elf: Set p_memsz to p_filesz for loadable PT_NOTE segment adds 38ae29156f Remove use of _WIN32_WCE adds b9de3b915c gdb/doc: add missing parentheses around prompt in some examples adds 34dc0f9596 gdb/dwarf2: fix "info locals" for clang-compiled inlined functions adds fcc99c428a testsuite, dwarf2: use @DW_INL_declared_inlined in a test adds d4015fc5aa Automatic date update in version.in adds f6a1f95749 CSKY: Fix special_function in howto table adds ddfe525f28 RISC-V: PR27584, surpress local and empty name symbols for nm. adds d0ecdcddc3 Make objcopy -p work when an output file is specified adds 985e026451 PR27725, better objcopy -p times adds 54b4dcc530 gdb: refactor the initialization file lookup code adds 92e4e97a9f gdb: process early initialization files and command line options adds 5809fbf2e2 gdb: add "set startup-quietly" command adds 4c79248a46 PR27734, get_stat_atime_ns/get_stat_mtime_ns might not use p [...] adds 9e5e03df52 Use block_symbol in var_value_operation adds 644a2e75ac Use common_val_print_checked in print_variable_and_value adds a15a276b46 Avoid crash in Ada value printing with optimized-out array adds 41f14dc862 gdb/testsuite: use foreach_with_prefix in gdb.threads/fork-p [...] adds fd5c30cde5 gdb/testsuite: don't include paths in test names adds c45ecc9d16 gdb fbsd-nat: Use new-style debug macros adds 10737236a0 sim: Add SIM_EXTRA_CFLAGS after CSEARCH. adds f00b50d057 sim frv: Add a missing return value for frvbf_check_acc_range. adds 599a6ff01e sim lm32: Use a known-good shell with genmloop.sh. adds 32b14776a0 sim mn10300: Fix igen generation. adds 2694bce941 sim erc32: Add include path for readline. adds 971cd33fc6 Automatic date update in version.in adds ad7c46164f undefined reference to get_stat_atime adds a8ab209320 RISC-V: compress "addi d,CV,z" to "c.mv d,CV" adds a21b96dd66 Update the ChangeLog, and add the missing entries. adds 768589d180 RISC-V: PR27436, make operand C> work the same as >. adds 6f8f6017a0 PR27567, Linking PE files adds alignment section flags to ex [...] adds 1b6b755e91 Print bfloat16 DWARF types correctly adds 100e914da3 aarch64: Define RME system registers adds 321d0cd7e7 gdb/testsuite: use -gdwarf-4 in simavr board adds 458620aabb Fix syntax error in Rust test adds 3cbc7ac344 Rewrite the Rust expression parser adds 1b348b6b67 Automatic date update in version.in adds e357e9904c Add block_search_flags adds df35e6262d Let expand_symtabs_matching short-circuit adds 03a8ea51c3 Add search_flags to expand_symtabs_matching adds 3bfa51a75f Add 'domain' parameter to expand_symtabs_matching adds 84d865e39c Remove quick_symbol_functions::lookup_symbol adds 536a40f3a8 Remove quick_symbol_functions::map_symtabs_matching_filename adds 7089bd886e Remove quick_symbol_functions::expand_symtabs_for_function adds 90160b5703 Remove quick_symbol_functions::expand_symtabs_with_fullname adds 0b7b2c2adf Simplify quick_symbol_functions::map_matching_symbols adds da314dd397 Avoid crash in write_psymtabs_to_index adds 42c2c69462 Handle unaligned mapping of .gdb_index adds 100cfce897 Automatic date update in version.in adds 9eab4c18bd Automatic date update in version.in adds 3912a8db68 sim: cr16: fix build warnings adds d3b0ab8b36 sim: d10v: fix build warnings adds 7da5cf78fb sim: syscall: add getpid support adds 3e91feb948 sim: mn10300: delete unused func & header tests adds 37e9f18266 sim: switch to AC_CHECK_FUNCS_ONCE & merge a little adds 2390d77943 sim: iq2000: switch syscalls to common nltvals adds f956ecde56 sim: m32c: switch syscalls to common nltvals adds b3d4da0f12 sim: rx: switch syscalls to common nltvals adds b7c5246bbf sim: sh: switch syscalls to common nltvals adds f3d25569f1 sim: moxie: switch syscalls to common nltvals adds 41e166b43b sim: msp430: delete unused getopt.h probe adds 2c2645d7a8 sim: switch to AC_CHECK_HEADERS_ONCE adds 4dee4f3ea1 Fix compile time warning about unused functions. adds 9a8041fd94 gas: drop sprint_value() adds 392e0bcc0e Fix kfail patterns in inline-locals.exp adds fe1640ff8e arm64: add two initializers adds cd6608e49d aarch64: Add new data cache maintenance operations adds 02202574ec aarch64: New instructions for maintenance of GPT entries cac [...] adds 8d6502d2b0 Fix an assembler testuite failure when checking a toolchain [...] adds 229597a129 Fix a problem running the archiver program in MRI mode on ar [...] adds f5dc2ee39d gdb: use compiled_regex instead of std::regex adds 66d6b8522e Automatic date update in version.in adds 525174e886 gdb: Allow address space qualifier parsing in C++. adds 184dcd81c7 gdb: Fix reduce/reduce conflicts for qualifier_seq_noopt in [...] adds aee4e85e27 MAINTAINERS: Remove Martin Schwidefsky as s390 maintainer adds d549b029d6 sim: rl78/rx: drop unnecessary getopt.h probing adds c5df7e442e Rework the R_NEG support on both gas and ld for the PowerPC [...] adds 9c7c5f1e5c Automatic date update in version.in adds 2335639744 Adjust readelf's output so that section symbols without a na [...] adds 33fe00c123 Fix an assertion failure in the BFD library when parsing a c [...] adds fd34472cdc update-netbsd.sh: fix script name, update year range in copyright. adds 047c3dbf55 Add ability to select numeric base when displaying symbol va [...] adds 85c88e2a79 gdb/breakpoint: display "N" on MI for disabled-by-condition [...] adds 98e713abc6 testsuite, gdb.mi: fix duplicate test names in mi-break.exp adds 10a636ccb4 gdb/breakpoint: add a 'force_condition' parameter to 'create [...] adds 18e9a809e8 Extend the description of PE header flags. adds ff50752029 [gdb/build] Hardcode --with-included-regex adds 6d5702a5eb Fix test case gdb.base/valgrind-bt.exp. adds 7e7a35fbca Shrink size of dwarf2_per_cu_data adds 1f195bc327 sim: use -Werror when probing for supported warning flags adds 1202f464b2 Automatic date update in version.in adds 2662c237a9 sim: regen against sim/m4/ adds 05f3c0f09e gdb: allow default_addressable_memory_unit_size to handle mo [...] adds d018cd835c x86-64/PE: adjust PR ld/26659 testcase for Cygwin adds b11b2969a9 Harmonize and improve auxiliary entries support for XCOFF adds 22f80c0f77 Improve code coverage of Rust testing adds bdd2aaf69e fix string table generation for XCOFF64 .debug section adds c39ebbf43f [gdb] Fix assert in remote_async_get_pending_events_handler adds 27d0790a58 gdb/infcmd: remove the unused parameter 'args' in 'attach_po [...] adds 6fee5eee88 gdb/infcmd: update the comment for 'attach_post_wait' adds 35682f0a64 gdb/continuations: remove the 'err' from 'do_all_inferior_co [...] adds 1194676e0b gdb/continuations: do minor cleanup adds c4c493de2b gdb/continuations: use lambdas instead of function pointers adds 4efeb0d3e8 gdb/continuations: turn continuation functions into inferior [...] adds 2f63213381 sim: sprinkle some ATTRIBUTE_PRINTF adds e25d6d93c4 gdb: fix getting range of flexible array member in Python adds a87caa6d52 gdb/testsuite: add Python support check in gdb.python/flexib [...] adds ae6a3f81a1 Automatic date update in version.in adds 432ce4cf68 Fix ptype/o bug with "<no data fields>" adds dbc0e7ce65 Fix sim build failure adds be866656a0 Make mostlyclean an alias for clean adds b396d3a16e Introduce stamp file for hw-config.h adds 06a84ea384 Add stamp files for generated files in sim/ppc adds efd82ac7cb Require GNU make adds e7d8f1da71 Remove and modernize dependencies in sim adds d6581fcd69 Remove INCLUDE variable from some sim Makefiles adds 51de628a22 Remove LIBS from two sim Makefiles adds 19f6a43c6c Do not check for sys/time.h or sys/times.h adds 0406545d06 gdb: use function_view for iterate_over_bp_locations' callback adds 7b025ee8c8 x86: don't truncate values in diagnostics and alike adds 28a167a406 x86: re-order optimize_disp() adds cce08655c6 x86-64: defer 32-bit signed displacement check adds a9aabc23ef x86-64: special case LEA when determining signedness of disp [...] adds c21346c5e2 x86: TLS desc call relocs target zero-size fields adds 9fc2995588 gdb: remove some caching from the dwarf reader adds c1cbb7d8a1 opcodes: xtensa: improve literal output adds b3ea76397a opcodes: xtensa: display loaded literal value adds d039200a7e Allow .seh_pushframe to take an optional [code] parameter adds f5e98b7d67 Fix type of .persistent.bss section adds 4d6840c335 gdbsupport: include preprocessor.h in common-debug.h adds 69cc19455b ld: Properly create a symbolic link to tmpdir/ldscripts adds 98c897e37a gdbsupport, gdb: change observer_debug to bool adds b2d14d3d8f Automatic date update in version.in adds 9d90335212 sim: simplify hardware m4 macro adds 837b53fd08 sim: options: increase max option count adds 3886790f13 sim: dv-cfi: fix printf format adds ec098003e2 gdbsupport: introduce struct observer adds c90e7d6352 gdbsupport, gdb: give names to observers adds 0df0cce7c6 gdbsupport: allow passing format string to scoped_debug_start_end adds a8536c466a gdbsupport: add observer_debug_printf, OBSERVER_SCOPED_DEBUG [...] adds 219df3d924 Automatic date update in version.in adds 77393c9b18 Document the GDB 10.2 release in gdb/ChangeLog adds 4478c33127 Use htab_t in sim-options.c adds b22138f32f Add engv32.h to SIM_EXTRA_DEPS in sim/cris adds 18bbba46a9 gdb/typeprint.h: reorder struct declaration adds fbb46296d7 [PR gdb/22640] ptype: add option to use hexadecimal notation adds 6476ec743f Automatic date update in version.in adds c290cb01fa gdb: fix sparc build failure of linux-nat adds b818855549 x86-64: have value properly checked when resolving fixup adds fe134c6569 x86: optimize LEA adds d965814fb6 x86: limit 32-bit @size overflow checks to 64-bit objects adds 8fb8824599 x86: add IS_ELF to check whether to resolve @size reloc adds a7664973b2 x86: correct overflow checking for 16-bit PC-relative relocs adds 21f9178575 Fix gdb.arch/aarch64-dbreg-contents.exp FAIL adds bea3329b76 gdb: check result of gdb_fopen_cloexec in dump_binary_file adds e8b6c1da56 Add test case for gdb 10 crash adds f6b9562fd9 Fix a bug in the ARM emulator which would not allow 4 byte a [...] adds 674c58574b Automatic date update in version.in adds 3955e34670 bfd: add stdlib.h when using abort adds 66d055c754 sim: enable hardware support by default adds bd0918c910 sim: nltvals: unify common syscall tables adds 2045d9d17f sim: riscv: switch MIN/MAX to common min/max adds 3d64c987c7 Reject debuglink sections with no associated filename. adds 60cfa10c36 x86: Add () to silence GCC 5 adds 9a6e099f43 gdbsupport: allow to specify dependencies between observers adds 2c473def12 gdb: do autoload before notifying Python side in new_objfile event adds 4b62a30d5b Fix timeout for gdb.xml/tdesc-reload.exp adds b9f90c72ee Fix timeout with maint print objfiles adds 6c356992b4 Automatic date update in version.in adds eb19308f2d x86: honor signedness of PC-relative relocations adds a3b5ef3e45 gdb: remove unused argument from gdb_init adds 913832e99c gdb: ensure SIGINT is set to SIG_DFL during initialisation adds 8e3685bf25 gdb: delay python initialisation until gdbpy_finish_initialization adds 880ae75a2b gdb delay guile initialization until gdbscm_finish_initialization adds 1178f01adf gdb: initialise extension languages after processing early s [...] adds 041ca48e97 gdb: extension languages finish_initialization to initialize adds edeaceda7b gdb: startup commands to control Python extension language adds 24aebc79b1 Stop the BFD library from treating annobin symbols as potent [...] adds e43c3e2a74 gdb/doc: use @env to reference environment variables adds db2534b704 Fix Ada overloading with 'null' adds ae95c78d26 Automatic date update in version.in adds 8eb82ba1fd gdb/NEWS: Fix typo and stray full stop adds 44f871628c x86: allow @size to also (sensibly) apply to sections adds 3abbafc2aa x86: relax when/how @size can be used adds 5edb8e3f5a Correct the text describing windres's --processor option. adds a2443c8988 x86-64: adjust recently added tests adds 89ba430c6b gdb: move some variables to an inner scope in save_waitstatus adds 063e75c9e4 Fix illegal memory accesses when parsing a corrupt SOM format file. adds 09e40e44ad Fix an access through a null pointer when parsing a corrupt [...] adds e197dfae62 gdb: don't use C++17 namespace declaration style adds 3f33407487 [gdb/testsuite] Fix timeout in gdb.base/valgrind-infcall-2.exp adds 7a8238b072 Automatic date update in version.in adds 7f7f284dfe [gdb/testsuite] Fix duplicate test name in gdb.mi/mi-sym-info.exp adds 5536f0cc62 [gdb/testsuite] Make gdb.mi/mi-sym-info.exp more robust agai [...] adds bceb87ef4d Fix illegal memory access when parsing a corrupt PE format file. adds bfbfa6e7f4 Fix attempt to free non-allocated pointer when parsing .debu [...] adds 6cb40a679b Fix a double free when re-allocating a buffer to size 0. adds 9f84cb380e Fix an illegal memory access when parsing a corrupt core note. adds d1fbc3ba09 Fix illegal memory access parsing a corrupt MACH-O format file. adds 2869ac4b59 Fix crash with GNAT minimal encodings adds 698facb837 Use rvalue reference in thread_pool::post_task adds 1053c6389a Use template functions in windows-nat.c adds 9e439f0098 Move function indirection code to nat/windows-nat adds de07187290 Use nat/windows-nat function indirection code adds e228ef975e Share DLL code between gdb and gdbserver adds 1bee48c7ad Make get_image_name static adds 0d305d5c67 Allocate dwarf2_per_cu_data with 'new' adds 91eea9cc48 Remove dwarf2_per_bfd::all_type_units adds b8efb248a8 Do not separately read type units adds 698d38980e Automatic date update in version.in adds 6aee2cb249 opcodes: xtensa: support branch visualization adds ccf2e5927c sim: callback: inline wrap helper adds 163cb76122 sim: arm: move build logic to source files adds ce2248135a sim: aarch64: fix 64-bit immediate shifts adds f1ca32150c sim: aarch64: use PRIx64 for formatting 64-bit types adds bd12755bf4 sim: riscv: fix building on 32-bit hosts w/out int128 adds 2a83fd8f48 sim: rx: cast bfd_vma when printing adds fe34861780 sim: nrun: add local strsignal prototype adds d113096b47 Automatic date update in version.in adds 8e5f151657 sim: add framework for declaring init callbacks locally adds adbaa7b838 sim: mips: mark local func static adds 328e805b5a sim: dv-sockser: localize init callback adds e4821e2f5f sim: options: fix --help output adds d89a87ba3c sim: bfin: move option inits to respective modules adds f0c4dc40b2 sim: replace custom attributes with ansidecl.h adds 72042732bc sim: add default cases to two switches in sim-options.c adds d68fbfe75d Automatic date update in version.in adds df6fbc21a5 Re: section symbols without a name adds db543a7de3 testsuite: Don't start directives in first column adds 5072b52d28 csky: fix annobin test fails adds 337d0bf887 PR27755, powerpc-ld infinite loop adds b293661219 PPC: ensure_undef_dynamic on weak undef only in plt adds 4916030821 PPC: undefweak dynamic relocs adds d389a1a769 gdb/testsuite: update expected results in gdb.python/py-star [...] adds 4c398cc06d x86: don't request useless overflow checking adds deea497309 x86: fold both instances of lex_got() adds 3e301ce0b5 x86: use UNIX EOL in secrel testcase adds 5e0a033bd2 x86: allow @secrel32 also in data definitions adds f08708cbf5 sim: add ATTRIBUTE_PRINTF / ATTRIBUTE_NULL_PRINTF where necessary adds 8228833924 Fix x86_64 mingw build adds 6bdf164fc5 RISC-V: PR27764, Add tests for A extension adds 7b06fcf566 RISC-V: PR27764, Add tests for A extension adds ae0373ce07 Automatic date update in version.in adds 225bda24db [gdb/guile] Don't allow libguile to change libgmp mem fns adds 5ee0bc23a6 sim: clean up bfd_vma printing adds aa0fca163e sim: add support for build-time ar & ranlib adds a8d6316b67 Replace AC_PROG_CC with AC_PROG_CC_C99 in top level configure file. adds bd6d8601f3 Define bfd_realloc(ptr,0) to return allocated memory, whilst [...] adds 858c8f2c1b gdb/testsuite: adjust gdb.python/flexible-array-member.exp e [...] adds c17253b974 gnulib: import getline adds 4aaaa4e03b gnulib: import gendocs adds 937a049c95 Add config.h to generated_files for sim adds a0c4531a55 Fix igen build adds be7547b077 Add missing stdlib.h includes to sim adds 3897046fe0 Automatic date update in version.in adds 13ffdac36f PowerPC undefweak testcase adds cd09ab7c74 sim: microblaze: hook up libgloss syscalls adds 4d47dcfcf1 sim: microblaze: enable some basic trace points adds 2849d28d96 sim: hw: localize init callback adds 4df817de57 sim: mips: fix qh_acc table adds a147f3ff8c sim: remove sys/times.h in most places adds 91eea12156 sim: mcore: fix build time warnings adds d97ba9c60c sim: mips: delete unused constant variables adds 9b1af85c78 sim: mips: always enable device models adds 77c0fdb7ff sim: mips: include stdlib.h for memory prototypes adds bf06b2a2f9 sim: m68hc11: tweak types to fix warnings adds fa94b3a7c8 gdb: update Type.fields doc based on actual GDB behavior adds 5318ba65f8 sim: rl78: clean up various warnings adds c38c6234f2 asan: stack-buffer-overflow vms-lib.c:367 adds 09f83f79f7 [gdb/testsuite] Fix gdb.threads/fork-plus-threads.exp with readnow adds 2f000c80e2 [gdb/testsuite] Fix timeout in gdb.threads/detach-step-over. [...] adds 9311cd60e1 Automatic date update in version.in adds 4467df35a9 elf: Always append ".COUNT" to local symbols adds 75070a4ede sim: m32c/rl78/rx: fix command parsing adds 15091ded14 sim: h8300 special case test adds 49da556c65 libctf, include: support an alternative encoding for nonrepr [...] adds ae064303ef libctf, ld: fix test results for upstream GCC adds 10e578d7e0 gdb/mi: add a '--force-condition' flag to the '-break-insert' cmd adds 79aabb7308 gdb/mi: add a '--force' flag to the '-break-condition' command adds 7ebbaa1c0a gdb/testsuite: resolve duplicate test names in gdb.guile/scm [...] adds a7ed4ea6af gdb/testsuite: use proc_with_prefix in gdb.guile/scm-breakpoint.exp adds 0618ecf6eb gdb/guile: don't try to print location for watchpoints adds a76ef689b6 or1k: Fix issue with plt link failure for local calls adds 0b3e14c902 or1k: Implement relocation R_OR1K_GOT_AHI16 for gotha() adds 3c3de29b04 or1k: Avoid R_OR1K_GOT16 overflow failures in presence of R_ [...] adds 284a130902 or1k: Support large plt_relocs when generating plt entries adds 482155e609 gdbserver/server: make some functions void adds ec66d6ea54 gdb: make inferior::args a unique_xmalloc_ptr adds 973bba9164 Re: elf: Always append ".COUNT" to local symbols adds 5790a27645 Automatic date update in version.in adds a41513efec Regenerate bfd-in2.h and libbfd.h adds 8852d02874 sim: m68hc11: warn when emul_write fails adds 8e78e9b995 sim: m68hc11: fix up last warnings adds a588403597 sim: m32c: switch from custom fgets to getline adds 0ae995e2df sim: m32c: fix warnings about mixing code & decls adds 44056b7ce4 sim: m32c: clean up various warnings adds 70993db314 multiple definition warnings from script symbols adds 4896932e62 dwarf: Don't omit second operand of '?' operator adds 9589edb836 gdb/guile: Have gdbscm_safe_source_script return a unique_ptr adds d820a652a6 When computing section link order for a relocateable link, i [...] adds 87ed972dc3 x86: minor improvements to optimize_imm() adds 9aac24b1a8 x86: move register check in immediate operand parsing adds 98da05bf26 x86: don't mix disp and imm processing adds 17c6c3b991 x86-64/ELF: clear src_mask for all reloc types adds 4cf88725da [gdb/symtab] Fix infinite recursion in dwarf2_cu::get_builder() adds c759c777c9 libiberty: add htab_eq_string adds 3ecc00ec9c Srop readelf's unwind decoder from complaining about x86 binaries. adds 97834047e1 Fix .dwsect generation for XCOFF. Handle .function generate [...] adds a9b49cbcd5 gdb: add lookup_cmd_exact to simplify a common pattern adds 13123da89a gdb: re-format Python files using black 21.4b0 adds 2698f5ead6 Remove streq_hash in favor of htab_eq_string adds 1d1669e40f debuginfod-support.c: Use long-lived debuginfod_client adds 27f0a4314a gdb: make target_close check that the target isn't pushed in [...] adds bedc473418 gdb: remove reference to current inferior in target_stack::unpush adds 8a82de5884 gdb: some int to bool conversion adds 476654beae Add a generic .bss directive for ELF based targets. adds 0d315c88a7 sim: Add bfd include path for common testsuite tools adds c2962e6ab4 gdb: remove target description macros adds 820c449092 gdb: change target_desc_info::fetched to bool adds 0b2f7ade53 gdb: (de-)allocate target_desc_info with new/delete adds 91e3c425d6 gdb: make target_desc_info::filename an std::string adds a3237c7cc7 gdb/testsuite: use gdb_test_no_output instead of send_gdb adds 1845e25464 gdb/guile: perform tilde expansion when sourcing guile scripts adds f6593c3d4b Automatic date update in version.in adds 8a16cc4b93 sim: m68hc11: fix up cycle buffer printing adds e2ea3a381a Don't include sys/personality.h in linux-low.cc anymore adds 4655f8509f Don't run personality syscall at configure time; don't check [...] adds 65a9835b29 sim: use htab_eq_string adds 0d0878d72e sim: add html & pdf stubs adds 2faf902da5 generate single html manual page by default adds cf758b3960 support generating multi-html pages in parallel adds 354c317ea4 binutils: update release docs process adds aac7ce3c87 sim: cgen: tweak initializers to avoid warnings adds 6ae9091ab0 sim: cgen: tweak cgen_rtx_error to fix warnings adds 1227922933 sim: cgen: namespace mode_names a bit adds 532497fe6f sim: cgen: tweak trace format adds b50a658ac1 sim: touch modules target adds bb608f811b sim: h8300: clean up various warnings adds 9ef1d5f4c9 Automatic date update in version.in adds 550e9289ab gdb: add missing space in infrun_debug_printf adds 8d06918ff5 gdb, gdbserver: make status_to_str return std::string adds b6703327bb gdbsupport: re-generate configure & friends adds b05a0fc79b Use htab_eq_string in binutils adds 4821e618ad Use htab_eq_string in libctf adds 927c4e355e gdb: replace fprint_frame_id adds 1ef40c1362 gdb/py: convert debug logging in py-unwind to use new scheme adds 75140e3b75 gdb/py: add some debugging to py-breakpoint.c adds 9dffa1aa8e gdb/doc: document 'set debug py-unwind' adds 400f0c9b88 Automatic date update in version.in adds 2d4b49864e Avoid possible pointer wrap adds 802021d46d gdb/doc: reword a sentence adds 749c700282 Restore old behaviour of windres so that options containing [...] adds e4b1ab2062 Add support for 8-bit and 24-bit shifts in the z80 assembler. adds 261980de18 PRU: Add alignment for resource table, and allow sizes of me [...] adds 5b45e89f56 Enable linker garbage collection for the PRU target. adds 23182ac0d8 Fix an indirection via uninitialised memory when parsing a c [...] adds 31aceaef1c gdb, gdbserver: make status_to_str display the signal name adds 0709cf686d gdb/testsuite: use proc parameters in gdb.arch/amd64-osabi.exp adds 9344937b04 gdb/testsuite: don't use source tree as temporary HOME directory adds b397aef4cd Remove strayed fprintf in commit 23182ac0d83 adds db1f6cd692 [PR gdb/27614] gdb-add-index fails on symlinks. adds 2005aa0281 Automatic date update in version.in adds f2f9554bf0 PR27845, readelf heap-buffer-overflow adds cfe7a19169 Report illegal Z80 load instructions. adds 22604fe675 Prevent libdel.dll.a from being installed on Windows based systems. adds a680affc63 Fix an illegal memory access when attempting to disassemble [...] adds 8ca5537ba5 PR27844, Unstable symbol name in objdump outputs adds abb894a470 gdb/fortran: Breakpoint location is modified. adds 2302f96354 [gdb/testsuite] Fix read1 timeout in gdb.base/gdb-sigterm.exp adds 5048549af9 [gdb/testsuite] Update infrun regexp in gdb.base/watch_threa [...] adds d30182b51e dwarf.c (process_abbrev_set): Properly parenthesize, fix fallout adds d8147d7053 arm: correctly decode Tag_THUMB_ISA_use=3 for thumb2 features adds 64f30eb0f8 gdb: fix indentation of cmd_list_element adds f2a883a81e gdb: fix indentation in arm_record_data_proc_misc_ld_str adds ad9e0d9c8b Automatic date update in version.in adds 4a1ad5c9e4 x86-64/ELF: Fix "clear src_mask for all reloc types" test case adds e7e40cedbb Fix build failure in d10v sim adds 425b0b1a98 sim: clean up explicit environment build calls adds 5ab3907543 PR27849, heap-buffer-overflow on readelf -w adds 55b26492bb PR27853, Infinite loop in dwarf.c adds d51344c909 gdb, btrace, pt: ignore status update enable events adds f0bbe8bab8 Add MTE register set support for core files adds 2f822da535 gdb: generate the prefix name for prefix commands on demand adds 84139c5864 arm: fix fallout from recent thumb2 detection patch adds 97cef6b7b7 Guile: improved rvalue reference support adds 9d4fc61d41 Guile: add value-{rvalue-,}reference-value adds ee35ce8200 Guile: add value-const-value adds 0d872fca02 PR27836, readelf -w pointer comparison UB adds af2ddf69ab SAFE_BYTE_GET64 adds 6d1ad6f783 SAFE_BYTE_GET adds a7077ce760 Ensure data pointer kept within bounds adds 3db19b2d72 Revert "[gdb/symtab] Fix infinite recursion in dwarf2_cu::ge [...] adds 4b8cb9dd9e gdb: make gdbpy_parse_command_name return a unique_xmalloc_ptr adds 3e5fac0797 Automatic date update in version.in adds 4863cddb50 PR27858, global-buffer-overflow adds cf893b0ef7 ld: Add -Bno-symbolic adds 7671eff8f0 RISC-V: Record implicit subsets in a table, to avoid repeate [...] adds 0746f49b1d [AArch64] Fix off-by-one when calculating tag granules. adds d21f875d67 PR27860, Segmentation fault on readelf -w adds b96a1bcb81 PR27861, Infinite loop in dwarf.c:7507-7526 adds c4375dd764 Fix an infinite loop in the DWARF decoder when parsing a cor [...] adds 0522d0165a revert previous delta adds 0b2256f772 gdb: remove cmd_list_element::pre_show_hook adds 5c6f801d8e gdb/testsuite: remove some duplicate test names from guile tests adds 62f2f198cd gdb/testsuite: resolve duplicate test names in gdb.guile/*.exp adds 4a0a0bd20a gdb/testsuite: resolve remaining duplicate tests in gdb.guile/ adds bab9eb490b gdb/testsuite: fix dates in last 3 ChangeLog entries adds 2af87c859f gdb: call target_follow_exec when "set follow-exec-mode" is "same" adds 294c36eb6a gdb: on exec, delegate pushing / unpushing target and adding [...] adds 737358ba1e gdb: maybe unpush target from old inferior in inf_child_targ [...] adds e218e27428 Automatic date update in version.in adds 183aaaf72a gdb: lm32: drop unused sim headers adds df68e12b3b sim: create header namespace adds 2e4885ee8f sim: callback: always include necessary headers adds 7fb6dc36bb sim: callback: use ATTRIBUTE_NORETURN adds 64654371d6 sim: callback: inline PTR define adds ecf25064e8 gdb: fix pretty printing max depth behaviour adds 75f03fa774 RISC-V: Check the overflow for %pcrel_lo addend more strictly. adds 2f63ec5ccc gdb: some int to bool conversion in remote.c adds 55789354fc gdb/python: add a 'connection_num' attribute to Inferior objects adds f8eec398fb testsuite: Cleanup some temp dirs with gdb-index files adds 823241a27c gold: Add -Bno-symbolic adds fcf102ba7a Automatic date update in version.in adds 00330cd18a sim: callback: convert time interface to 64-bit adds 2fbe9507bf sim: callback: convert FS interfaces to 64-bit adds 887e71588b Fix Python pretty-printing bug in Rust adds 7c96e6120f [GOLD]: Re: Add -Bno-symbolic adds fc5e0925d4 _mul_overflow and get_encoded_value adds ebb1786492 SAFE_BYTE_GET_INTERNAL adds edba4e4aba process_debug_info adds 37195e23e7 read_debug_line_header adds 56051e28a3 display_debug_lines_decoded adds 35b2c89ec8 display_debug_pubnames_worker adds c03df92247 display_debug_macinfo adds 46d1214d88 get_line_filename_and_dirname adds b0d461ec37 display_debug_macro adds 7848009791 display_loc_list adds 6ca0735017 display_debug_aranges adds 5250d2f0a5 display_debug_str_offsets adds 669f463dbc display_debug_rnglists_list adds b495154607 display_debug_ranges adds c93c4a8540 read_cie adds 5897a38984 display_debug_frames adds d7870f6304 display_debug_names adds bb19bf1269 display_gdb_index adds b9c0d70312 process_cu_tu_index adds c5a2e0123b sim: switch to libiberty environ.h adds be2bc30f9c sim: ppc: clean up various warnings adds 246ee38501 Automatic date update in version.in adds 79633c125e sim: riscv: move __int128 check to configure adds ea11a98dbd CTF: handle forward reference type adds 681eb80f12 Automatic date update in version.in adds 6df01ab8ab sim: switch config.h usage to defs.h adds 92bc001e1f sim: install library header files adds 383861bd08 sim: invert sim_state storage adds 85d93de3d8 sim: bfin: invert sim_state storage adds e106fc358c sim: cgen: invert sim_state storage for cgen ports adds 937af0fde5 sim: avr: invert sim_state storage adds 8ea7241cf3 sim: mips: invert sim_state storage adds 2ad10cb222 sim: h8300: invert sim_state storage adds 10c23a2c6f sim: riscv: invert sim_state storage adds f4fdd84587 sim: fully merge sim_state_base into sim_state adds 467f8eb233 gdb/fortran: test case modified to suit the clang behavior. adds e683cb4120 arm: Fix bugs with MVE vmov from two GPRs to vector lanes adds 413b49c2b6 gdb: move cmd_list_element::prefixname to cli/cli-decode.c adds ecd0a6b35d gdb: don't handle old == nullptr in add_alias_cmd adds 14b42fc4a0 gdb: rename cmd_list_element::prefixlist to subcommands adds 9985872497 gdb: rename cmd_list_element::cmd_pointer to target adds 1be99b11f8 gdb: add cmd_list_element::is_alias adds 3d0b356410 gdb: add cmd_list_element::is_prefix adds 034dce7a47 gdb: add cmd_list_element::is_command_class_help adds 91e159e93b gdb: add pyproject.toml adds 5277208d32 gdb/testsuite: rename .py.in files to .py adds 16e0020bfc Replace sort_tu_by_abbrev_offset with operator< adds 473ab96443 Change how dwarf2_per_cu_data is deleted adds baea2f9d52 Fix buffer underflow in add_path adds 5917321695 Fix ubsan build adds 9e541c7918 Avoid crash with GCC trunk adds c1c0a7e1f3 gdb: additional settings for emacs in .dir-locals.el adds 8ae78a440e Move dwarf2_cu to new header file adds 839118f920 Move some dwarf2_cu methods to new file adds 347212b819 Change dwarf2_cu marking to use methods adds cd53fa40d4 Rename dwarf2/comp-unit.h adds 549f123c68 Automatic date update in version.in adds 113bb7618a RISC-V: PR27814, Objdump crashes when disassembling a non-EL [...] adds 19fa7881a9 config: delete unused sim macros adds 9cc11ab5bf sim: depend on gnulib adds 75933ce3d9 Automatic date update in version.in adds 9d9e2a340b PR27879, stack-buffer-overflow on sysdump adds 1b3892bedc PR27884, skip_attr_bytes: Assertion (data) <= (end) failed adds b534617fd5 inflow.c: Do not leak tty. adds 83b0a6865c Warn when the plugin interface runs out of file descriptors. adds c485e47599 Fix a build problem if ENABLE_CHECKING is not defined. adds 2129a94255 [gdb/testsuite] Fix read1 timeout in gdb.base/info-types-c++.exp adds d9211df246 gdb/testsuite: resolve duplicate test names in gdb.guile/*.exp adds 4915bfdcfb gdb: Add an overloaded ui_out::text accepting a const std::string & adds 8dd8c8d4ab gdb: Pass std::strings to ui_out::field_string () where convenient adds ee22a1a31d Fix offset for ia64 PCREL60B relocation on HP-UX adds 8f09aa5ba8 sim: ppc: fix some Wunused-function warnings adds 4156e38676 sim: ppc: fix some more Wunused-function warnings adds 0d7e3cd15f gdb: Move definitions of std::string overloads in ui_out to [...] adds bfff0efb3d sim: ppc: fix Wnonnull warning adds 17bb1d80f5 sim: ppc: fix some Wenum-compare warnings adds 5433e20ec1 Mark tu_abbrev_offset::operator<() const. adds 93b196f931 Automatic date update in version.in adds d556135f02 PR27888, fix link of gas with zlib by libtool 2.4.6 adds 7f2b87189b [PATCH]rs6000,testsuite Add a powerpc64-prologue testcase. adds 8baee38bfe sim: ppc: fix Wpointer-sign warning adds 427e4066af gdb/bfd: avoid crash when architecture is forced to csky or riscv adds a5523cc3c4 Clean up my ChangeLog entry adds ed3130b740 Add myself to gdb/MAINTAINERS adds 9a01ec4c03 Fix overflow detection in the Z80 assembler. adds bb6203bf1d cli-script: use unique_ptr to not leak next struct adds 1487a14ec2 gdb: remove linespec_p typedef adds 75b969ccb1 Automatic date update in version.in adds 894982bfcc [AArch64] MTE corefile support adds 3b2bef8bbd [Binutils] Update NT_ARM note types for readelf adds 6d1a09b77a [gdb/breakpoint] Fix assert in jit_event_handler adds ca43e66033 testsuite/gdb.dwarf2: avoid dead code in dw2-inline-with-lex [...] adds 778ae9ccc8 [gdb/testsuite] Add target board cc-with-gnu-debuglink.exp adds 33d93379d2 Automatic date update in version.in adds 39549caef4 sim/d10v: Use offsetof in a static assertion about structure [...] adds b312488f10 sim: mips: Only truncate sign extension bits for 32-bit targ [...] adds 168671c14c sim: mips: Add shadow mappings for 32-bit memory address space adds 1f1fb219fd [GOLD] PR27815, gold fails to build with latest GCC adds 574ec1084d bfd dwarf2 sanity checking adds d71893802f Re: Fix offset for ia64 PCREL60B relocation on HP-UX adds 8569d6e13c Fix option type comments for CMDARG_EARLYINIT_FILE and CMDAR [...] adds 8dc196f2fa Automatic date update in version.in adds 01a8c731aa elf: Use official name LoongArch for EM_LOONGARCH. adds fbf3c4b979 [gdb/tdep] Use pid to choose process 64/32-bitness adds 01d3ae40df sim: bfin: add strings.h for ffs() adds e82a36be9a sim: cris: add unistd.h for environ decl adds 9a28444faa sim: rl78: rename open symbol to avoid collisions adds 98591adf69 Automatic date update in version.in adds 3cc4ee83ad sim: bfin: fix build warnings w/newer gcc adds d699be882b sim: bfin: fix the otp fix adds d16ce6e4d5 sim: cris: fix memory setup typos adds 5d0ed830d3 RISC-V: PR25212, Report errors for invalid march and mabi co [...] adds c45d37a9bd gdb/doc: add '@:' after 'e.g.' to help texinfo adds a56889ae38 Prevent flickering when redrawing the TUI python window adds 2e8adb6448 Update config.sub and config.guess for MIPS R3 and R5 ISA support adds 78a7f5766a MAINTAINERS: Update path to readline config.{sub,guess} files adds 32e2770e59 gnulib: import ffs adds 5471128011 opcodes: cris: move desc & opc files from sim/ adds e63e5f9f9f Automatic date update in version.in adds 4be1e8dbb3 asan: _bfd_elf_parse_attributes heap buffer overflow adds 5d7f11f0e7 [GOLD] PR27815, gold fails to build with latest GCC adds bc30a119f3 Regen cris files adds cc850f7472 Fix formatting in elf32-arm.c adds 74fd118fb9 Add range checks to local array accesses in elf32-arm.c. adds d3e52e120b Arm: Fix forward thumb references [PR gas/25235] adds 2c5731b647 Fix documentation of gdb.SYMBOL_LOC_COMMON_BLOCK adds 9495896335 Automatic date update in version.in adds fe1f847d9a RISC-V: Allow to link the objects with unknown prefixed extensions. adds ef5f598ca6 Introduce htab_delete_entry adds 3f335b75d8 i386: Replace movsb with movsxb adds 983d5689cc x86-64: Add ilp32-12 to check R_X86_64_32 for x32 adds 11bb5c41eb gdb: don't zero-initialize reg_buffer contents adds 50c95a739c x86: Propery check PC16 reloc overflow in 16-bit mode instructions adds cc37fec878 Automatic date update in version.in adds badf836a0c nds32: __builtin_strncpy bound equals destination size adds 6643bb0010 readelf -w and --debug-dump option help adds 749369c430 gdb: change dwarf_die_debug to bool adds 3a706c17ee Revert "gdb: change dwarf_die_debug to bool" adds 6dcd1193d9 [gdb/symtab] Fix Dwarf Error: cannot find DIE adds 2152b4fdec [gdb/symtab] Fix typo in dwarf error message adds e453275cdc [gdb/testsuite] Prevent proc override in gdb-index.exp adds 248f716500 [gdb/symtab] Fix segfault in process_psymtab_comp_unit adds 868027a48b Document gdb.SYMBOL_LOC_LABEL adds af7f8f52dd gdb: make add_setshow commands return set_show_commands adds 9f26053690 gdb: remove unnecessary lookup_cmd when deprecating commands adds 7bd22f56a3 gdb/python: use return values of add_setshow functions in ad [...] adds 3947f654ea gdb: make add_com_alias accept target as a cmd_list_element adds e0f25bd971 gdb: make add_info_alias accept target as a cmd_list_element adds 5e84b7eefb gdb: remove add_alias_cmd overload that accepts a string adds f39632d957 gdb: add make-init-c script adds d5a6313e1c gdb: add option to reverse order of _initialize function calls adds bdef572304 Add optional full_window argument to TuiWindow.write adds 43892fdfa1 gdb: add all_breakpoints function adds 1428b37afb gdb: add all_breakpoints_safe function adds f6d17b2b1c gdb: add all_tracepoints function adds 40cb8ca539 gdb: add breakpoint::locations method adds 5d51cd5d14 gdb: make bp_locations an std::vector adds 48d7020b7f gdb: add all_bp_locations function adds e0d9a27040 gdb: add all_bp_locations_at_addr function adds 240edef62f gdb: remove iterate_over_breakpoints function adds 055c879fcf gdb: remove iterate_over_bp_locations function adds 01add95bed gdb: fix some indentation issues adds 24b21115f5 gdb: fix tab after space indentation issues adds ebcab74124 PowerPC: Add new xxmr and xxlnot extended mnemonics adds 3633d4fb44 Automatic date update in version.in adds 0ef4c3f83b sim: h8300 Fixed different behavior in preinc/predec. adds 9d7c4ba5e5 sim: h8300 add special case test. adds 1273b2f8ac x86: Restore PC16 relocation overflow check adds c445a93910 Automatic date update in version.in adds 25663db430 MIPS/GAS: Use FCSR rather than RA with CFC1/CTC1 adds c9de3168a9 microMIPS/opcodes: Refer FPRs rather than FCRs with DMTC1 adds cccc84faff MIPS/opcodes: Free up redundant `g' operand code adds 9623cc5d1f MIPS/binutils/testsuite: Fix XPA and Virtualization ASE cases adds a3fb396f2d MIPS/opcodes: Add TX39 CP0 register names adds 9204ccd4b1 MIPS/opcodes: Do not use CP0 register names for control registers adds 709aa065e1 MIPS/GAS/testsuite: Add tests for coprocessor access instructions adds dd84446824 MIPS/opcodes: Add legacy CP1 control register names adds b1458c4569 MIPS/opcodes: Factor out ISA matching against flags adds 21629cf8bc MIPS/opcodes: Properly handle ISA exclusion adds b930964c42 MIPS/opcodes: Disassemble the RFE instruction adds 270e2b7ddc MIPS/GAS/testsuite: Add tests for coprocessor branch instructions adds fa49574399 MIPS/opcodes: Remove DMFC3 and DMTC3 instructions adds 9573a461da MIPS/opcodes: Accurately record coprocessor opcode CPU/ISA m [...] adds 2d5e2889ca MIPS/GAS/testsuite: Run coprocessor tests across all ISAs adds 4c67fb41f9 MIPS/GAS/testsuite: Run RFE test across all ISAs adds 28b7d4f1c9 MIPS/GAS/testsuite: Add C0, C1, C2, C3 opcode tests adds 49149d595c MIPS/opcodes: Reorder legacy COP0, COP2, COP3 opcode instructions adds f006d9e205 sim: bfin: fix the otp fix fix adds d6249f5f1c readelf and objdump help adds 1ff6a3b8e5 PowerPC table driven -Mraw disassembly adds 3067d0b1be Fix InlinedFrameDecorator example adds 63e47e1072 Re: readelf and objdump help adds 5c9e84c2d8 sim: leverage gnulib adds 80e61ea097 sim: m32c: rename open symbol to avoid collisions adds cd7caae651 sim: sh: fix a few compiler warnings adds fc12ae4215 sim: frv: fix compiler parentheses suggestions warnings adds 67514280fc sim: frv: fix up a bunch of prototype warnings adds 8ea881d9e3 sim: mips: fix build w/out dv-sockser adds b25370aa9f sim: pull in extra gnulib libs too adds fc23e71a17 sim: mn10300: add SIGTRAP fallback adds 1f8ef36f75 sim: v850: add pointer casts for execv on Windows adds 952170707b sim: ppc: avoid shadowing errno adds c5b349e1c5 sim: ppc: enable -Wno-format for mingw targets adds eddc7b6871 Automatic date update in version.in adds 140c5aec0d Automatic date update in version.in adds c96e8b04d3 Remove dwarf2_per_bfd::m_num_psymtabs adds cc653233da Set is_debug_types in allocate_signatured_type adds ef9d256562 RISC-V: PR27566, Do not relax when data segment phase is exp [...] adds 4631503b28 gdb: move dwarf2_per_cu_data and signatured_type up adds 46c6bcf650 gdb: add and use signatured_type_up adds 9ea36493f6 gdb: pass signature to allocate_signatured_type and signatur [...] adds a2cf3633b3 Automatic date update in version.in adds b4b3e2dee2 gdb: avoid premature dummy frame garbage collection adds 9b715c68e8 gdb/arm: add support for bare-metal core dumps adds b97eff8ffa gdb: run 'maint selftest' with an executable loaded adds 17d305ef8f [gdb/symtab] Ignore cold clones adds f99d1d3749 Remove gdb/testsuite/configure adds bdbbcd5774 Always build 'all' in gdb/testsuite adds 2adf178139 Apply silent Makefile rules to gdb/testsuite adds ba56237dab Clean up gdb's --enable-shared adds 906f72d454 Remove some gdb/data-directory special cases adds aeeb758df5 Conditionally restore displaced stepping state after fork. adds 75bf2c9cf7 Automatic date update in version.in adds 45342c7c91 asan: heap buffer overflow in _bfd_elf_parse_attributes adds 8a222a6b0f gdb/testsuite: escape '*' character in pattern used by flang adds f2d4211150 gdb/testsuite: only add -J option when compiling with gfortran adds 8f46711443 arc: Construct disassembler options dynamically adds 170960e8e1 Fix threadapply test adds ea6197bf5f sim m32c: Include defs.h in m32c.opc and r8c.opc. adds 60be64b396 Fix temp-dir leakage in per-bfd-sharing.exp adds 9ef5bfdad9 Automatic date update in version.in adds a38d139645 PR1202, mcore disassembler: wrong address loopt adds 364d772977 PR2589, ld vs. ld.so adds bbd47c1230 PR4283, update gprof manual with note about GMON_OUT_PREFIX adds 6ac5237cf1 Restore gdb.SYMBOL_LABEL_DOMAIN constant adds 7cfa3e63f9 Add myself to gdb/MAINTAINERS adds 4c958d7911 Add ChangeLog entry for previous commit adds 8381088119 Report additional details for signals received on FreeBSD. adds 415c8100a2 Update my email address in MAINTAINERS adds df5bc734f2 gdb: fix eval.c assert during inferior exit event adds 25e821a6c2 Automatic date update in version.in adds 1bace02a96 Initial TUI mouse support adds a53755664f Forward mouse click to python TUI window adds 4351271e9c gdb: add some additional debug output in remote.c adds 386de171cb Add PROP_VARIABLE_NAME adds 30569fbb57 Automatic date update in version.in adds ae61ef2c56 arc: Add 'set disassembler-options' support adds ad4bd975fc Fix symbol constants tests for Python 3 adds 5bea0c3276 sim: common: start dedicated local.mk adds b316465fab Use ACX_NONCANONICAL_TARGET in gdb/configure adds 19d6d783e1 Fix gdb/data-directory Makefile-regeneration rule adds 8ff8c543b4 Really fix data-directory/Makefile rebuilding adds 4a97754465 Fix gdb crash due to SIGPIPE when the compile command fails adds 9482e6e450 Automatic date update in version.in adds 921b2bc73e gdb/testsuite: set sysroot in gdb.server/stop-reply-no-threa [...] adds 53f18dfd3e Automatic date update in version.in adds 6bee34a1dc fix Dwarf2 build with certain gcc versions adds a442cac508 ix86: wrap constants adds 4e014f6ac0 x86: immediate operands don't allow for vector operations adds f70c6814bb x86: remove pointless 2nd parameter from check_VecOperations() adds 98ff9f1c5d x86/Intel: drop unnecessary bracket matching from parse_operands() adds c8d541e2e7 x86: correct absolute branch check with segment override adds 9d299bea8c x86: make symbol quotation check consistent in i386_att_operand() adds 014fbcda4c x86: allow unary operators to start a memory operand adds e68c3d59ac x86: better respect quotes in parse_operands() adds 6b5ba0d49e x86: honor quoted figure braces in i386_att_operand() adds 7ee8c12755 [gdb/testsuite] Fix info-types-c.exp adds bc37aacde1 [gdb/testsuite] Fix gdb.base/new-ui-pending-input.exp timeout adds 409cac34d9 [gdb/testsuite] Simplify gdb.base/info-types.exp.tcl adds b0e2f96b56 [gdb/testsuite] Fix gdb.base/run-attach-while-running.exp adds cfa8e270c9 gdb: set only inferior_ptid in sparc_{fetch,store}_inferior_ [...] adds f1854e35d8 gdb/testsuite: use proc_with_prefix in gdb.base/attach.exp adds ecac8d1c14 Add Power 10 PLT instruction patterns adds a12a15e7c5 gdb: handle case where type alignment is unknown adds cfc75767cc gdb/testsuite: gdb.base/continue-all-already-running.exp: ad [...] adds d8ca8e9fac nat/amd64-linux-siginfo.c: Move align attribute from typedef [...] adds c57eb1a269 nat/amd64-linux-siginfo.c: Remove typedefs adds fa6ec8efa4 gdb_rl_find_completion_word: Remove 'found_quote' local adds 1b453aed8b Fix a couple -Wdeprecated-copy issues adds e266dea992 Automatic date update in version.in adds 64c2e4a530 gnulib: import chown adds c469a50252 sim: v850: assume chown is available adds 172a7ff54b gnulib: import netdb adds d20bc12288 gnulib: import select adds a55b92be28 sim: igen: harmonize tool variables adds 25ff4de715 [gdb/testsuite] Fix gdb.base/sect-cmd.exp adds ac6c175edd [gdb/testsuite] Simplify gdb.base/sect-cmd.exp adds 4a11703a04 [gdb/testsuite] Fix gdb.threads/multi-create-ns-info-thr.exp adds 4c5d7c03c4 [gdb/testsuite] Fix gdb.base/batch-preserve-term-settings.ex [...] adds f185acddfa x86: minor improvements to optimize_disp() (part I) adds 77c5978907 x86-64: avoid bogus warnings with 32-bit addressing adds cd613c1fcc x86: minor improvements to optimize_disp() (part II) adds 7e96fb6871 x86: minor improvements to optimize_imm() (part II) adds 7c757f41aa x86: cover a.out in recently added tests adds 58f076c6f8 [gdb/testsuite] Simplify gdb.base/info-types.exp.tcl further adds c3cfd9eb5b [gdb/testsuite] Fix gdb.base/info-macros.exp with check-read1 adds 956ea65cd7 bfd/elf: Don't read non-existing secondary relocs adds fdae5c22ce [gdb/testsuite] Disallow single argument in multi_line adds 5804373d03 bfd/elf: Don't read non-existing secondary relocs adds 122373f7f2 gdb: try to load libthread_db only after reading all shared [...] adds f9e59d060f Use is/is not to check for None in python code. adds 1bc5b62129 Automatic date update in version.in adds f75bcf7e57 Fix the creation of archives for Sparc Solaris2 targets by e [...] adds d0a3c757b9 gdb/testsuite: add some logging in Term::_check_box adds cc96519fdc Remove Daniel Jacobwitz from the maintainers list adds c70fdc45f6 Update read1 example in gdb/testsuite/README adds 906192d785 sim: cgen: inline cgen_init logic adds eee649922f sim: bpf: use CURRENT_TARGET_BYTE_ORDER adds cfc6061bd8 sim: nrun: tweak init of callback endian adds dc3de083d5 sim: mn10300: tweak engine halt hook adds 943f9baa37 sim: cleanup obsolete NULL fallback adds c572c4580e Automatic date update in version.in adds 0cc809fa0f [gdb/testsuite] Fix gdb.cp/cplusfuncs.exp with check-read1 adds 36695cf8ff [gdb/testsuite] Fix gdb.cp/nested-types.exp with check-read1 adds 4bdd1a0620 [gdb/testsuite] Convert multi-line function call into si [...] adds 7772f16880 x86: suppress LEA optimization in a specific 16-bit case adds e925962f4e arm: fix array-out-of-bounds upon register parsing error adds 1db66fb653 arm: avoid "shadowing" of glibc function name adds 6179e5f1d8 [gdb/testsuite] Fix timeout in gdb.mi/user-selected-context- [...] adds 9edb1e0191 gdb/testsuite: capture GDB tty name in default_gdb_spawn adds 860cc54cd4 Automatic date update in version.in adds f64b9b13ce PR27952, Disallow ET_DYN DF_1_PIE linker input adds 4de91c10cd readelf section reading adds 066f8fbede readelf info leaks from one object to the next adds 28b2963ffb RISC-V: Update the riscv_opts.[rvc|rve] in the riscv_set_arch. adds 2748c1b17e x86: Always define TC_PARSE_CONS_EXPRESSION adds 48ec4c05c6 Implement Rust raw identifiers adds db77748be8 gdb, testsuite: Fix mi-var-child-f.exp for Intel compilers. adds 873793ae09 gdb: remove unused struct call_site_stuff forward declaration adds e2b9ea4bbb libthread_db initialization changes related to upcoming glibc-2.34 adds 4cc2e60671 testsuite/glib-2.34: Match/consume optional libthread_db rel [...] adds 72c4daa36a print-symbol-loading.exp: Allow libc symbols to be already loaded adds b8bd29a157 mi-sym-info.exp: Increase timeout for 114-symbol-info-functions adds 46f263ccff Fix ChangeLog entry location adds 6fe7f5c416 Automatic date update in version.in adds e331b18d42 Re: readelf section reading adds 8c60e272c7 readelf: don't clear section_headers in process_file_header adds b15c5d7a51 sim: unify platform function & header tests adds dba333c1e4 sim: unify assert build settings adds 5ea4547402 sim: unify environment build settings adds 5629cf2b98 sim: ppc: unify env settings too adds d424629da8 remote: Fix indentation in remote_new_objfile. adds a48ff3efda sim: ppc: unify header & function & type tests too adds 4b530cfa37 Automatic date update in version.in adds 497a20bd3b sim: split debug/stdio/trace/profile options into dedicated [...] adds 04381273a9 sim: unify debug/stdio/trace/profile build settings adds 6dd65fc048 sim: unify bug & package settings adds ba307cddcf sim: overhaul alignment settings management adds 4218a6dc8b sim: erc32/ppc: fix handling of $EXEEXT adds a80249d0a9 sim: erc32: replace caddr_t with void* adds 2726bbc339 sim: assume sys/select.h always exists adds a687671327 sim: rx: replace cycle-stats with common profile settings adds dd8e16ea7b sim: unify sim-load.o building adds ad9cc20970 sim: start unifying portability shims adds f4d7566aef Automatic date update in version.in adds 0f318b8478 sim: rx: move cycle-accurate settings to CPPFLAGS adds 92a3f61363 sim: ppc: use common version.o too adds 4981807e06 gas: drop TC_ADDRESS_BYTES conditionals adds 987610f2d6 gas: fold three as_warn() in emit_expr_with_reloc() adds 90d3edf016 GNU gettext introduced this change[0] in version 0.19.8 to f [...] adds 0121f438e8 Use consistent type in binutils/dwarf.c adds 739025e89c Include missing header signal.h adds c9923e71ff Fix silent gdb.base/annota1.exp test coverage regression adds 09db4332c6 fbsd nat: Disable address space randomization when requested. adds 483ab96a1b gnulib: define the path to gnulib's parent dir adds 1ff18ee652 Automatic date update in version.in adds fbe8d1cf5b sim: enable silent rules in common builds adds 82e6d6bf90 sim: drop redundant SIM_AC_OPTION_WARNINGS adds 4df5cdbd3a sim: erc32: fix build w/out termios.h adds 757b3c2fea sim: erc32: fix build w/out F_{G,S}ETFL adds aa077c0d18 sim: mn10300: switch abort to sim_engine_abort adds 79afa8caab sim: mn10300: enable -Werror adds 93df3340fd readelf: report DF_1_PIE as "Position-Independent Executable" adds cc0f96357e x86: permit parenthesized expressions again as addressing sc [...] adds 4fe51f7d3c x86: off-by-1 in offset_in_range() adds 86f041462e x86: make offset_in_range()'s warning contents useful (again) adds a50187b2c6 x86: harmonize disp with imm handling adds 649658972c x86: slightly simplify offset_in_range() adds 2f2be86bbb x86: simplify .dispNN setting adds b00af7c8c6 x86: bring "gas --help" output for --32 etc in sync with reality adds c8795e1f2f Allow readelf to recognise GO buildid notes. adds 6645c8ce71 Fix typo in vsx-regs.exp test adds 015f7b7462 sim: switch modules.c & version.c to stamp files adds bc10b67271 Automatic date update in version.in adds bcaa61f7c8 sim: move dv-sockser define to CPPFLAGS adds 52d37d2c91 sim: drop arch-specific config.h adds dae666c968 sim: mips: fix format warnings when setting up memory adds 430456e347 sim: ppc: drop host endian configure option adds 5976569641 sim: ppc: change bool variable name to boolean adds b778e6b079 sim: ppc: replace local CONCAT macros with common ones adds f6428ce423 sim: ppc: replace local UNUSED macros with common one adds 6e57d02532 sim: ppc: replace local NORETURN macros with common one adds 3547f99a30 sim: ppc: use common ATTRIBUTE_PACKED macro adds 69ff2dac7a sim: ppc: use common ATTRIBUTE_PRINTF macros adds 1b828ebe53 sim: ppc: replace local __attribute__ fallback adds 956f0babcd sim: ppc: convert to bfd_endian adds 46f0c0c6cc sim: ppc: use common sim-assert setting adds a8a3d90792 sim: drop obsolete AC_EXEEXT call adds 7b2298cbd8 sim: mips: fix uninitialized register use adds df32b446c3 sim: mips: tweak buffer sign adds 6828a30253 sim: mips: rework dynamic printf logic to avoid compiler warnings adds b80d447580 sim: mips: add printf attribute to trace func adds 4504a63467 gas: fix overflow diagnostics adds bb32eac5a9 gas: fix hex float parsing from .dcb.? directives adds 8457e5ecc4 [gdb/symtab] Fix infinite recursion in dwarf2_cu::get_builde [...] adds cdb2186c9f btrace, doc: Clarify record function-call-history documentation. adds 3aabdfe15b gdb, doc: Fix missed ChangeLog entry. adds 7daf500de2 sim: make some rules silent by default in Make-common.in adds 62cfa544a4 Automatic date update in version.in adds ef5058ae87 sim: split sim/callback.h include out adds 209f108f73 sim: mn10300: tweak static inlines adds 7993124ee2 powerpc: move cell "or rx,rx,rx" hints adds 3478a63d7e gas: ensure sections contents is zero for BFD_RELOC_PPC*_TLS [...] adds 82a5082ed3 Make the TUI command window support the mouse adds 18b5aadea2 gdb/testsuite: gdb.base/args.exp: use save_vars adds c4ddc1daef gdb/testsuite: gdb.base/args.exp: use $old_gdbflags last two tests adds d30e32637d gdb/testsuite: gdb.base/args.exp: remove trailing parenthesi [...] adds 18263be756 gdb/testsuite: gdb.base/args.exp: add KFAIL for native-exten [...] adds bcf8470303 gas: handle csect in bss section for XCOFF adds 96cbfd9f04 Fix an assertion failure in the AArch64 assembler triggered [...] adds 965febe599 Move scoped_ignore_sigttou to gdbsupport/ adds 6a7f1c20e8 Introduce scoped_restore_signal adds 606a431366 scoped_ignore_signal: Use sigprocmask+sigtimedwait instead o [...] adds 2af6d46fd3 Add a unit test for scoped_ignore_sigpipe adds e8f6c2a5ba ld: Add -no-pie adds d208bc7617 ld: Add ChangeLog entry for -no-pie adds b6b4298372 x86-64: Test protected function pointers adds e013d20dc7 x86-64: Use $NOPIE_LDFLAGS/$NOPIE_CFLAGS on protected-func-1 adds 336b30e58a Don't call sigtimedwait for scoped_ignore_sigttou adds a49dd19e81 sim: ppc: avoid "PAGE_SIZE" name adds 4470708442 Automatic date update in version.in adds f9a4d54332 sim: overhaul & unify endian settings management adds 7039b29160 sim: drop core libiberty.h include adds 1fef66b0dc sim: split sim-signal.h include out adds 162c6aef1f gas: fold symbol table entries generated for .startof.() / . [...] adds 3f8414df7a sim: create a makefile fragment to pass common settings down adds 982c3a65ca sim: move -Werror disabling to Makefile adds 5a767724d7 elf: Add GNU_PROPERTY_UINT32_AND_XXX/GNU_PROPERTY_UINT32_OR_XXX adds 47ce766a8b sim: unify -Werror build settings adds 2d95647bdd ld.texi: Move -z unique-symbol after -z undefs. adds ff5404f5b3 Fix powerpc-power8.exp test with new mnemonics adds 8ee63c6156 Automatic date update in version.in adds 539b54f03d dwarf.c: string_fortify.h strncpy error adds d984392e75 Fix another strncpy warning adds 43f71bc5df ppc raw test failure when 32-bit bfd adds 03e689aaac ubsan errors when 32-bit bfd adds 47399e9c45 ubsan: vax: pointer overflow adds 07490bf81d sim: unify various library testing logic adds 17a5da800d sim: mips: drop unused AC_PATH_X call adds b5689863bd sim: unify bfd library dependency testing logic adds c30420d82a elf: Update GNU_PROPERTY_UINT32_[AND|OR]_XXX tests adds d3562f83a7 sim: unify toolchain probing logic adds bc56166f66 sim: unify toolchain dependency logic adds ce3ec98acd sim: unify gettext/intl probing logic adds 83b1d8f4a6 elf: Correct DT_TEXTREL warning in PDE adds 89ee1c2f6e Automatic date update in version.in adds 36842f65be sim: drop old BUILT_SRC_FROM_COMMON ref adds 54c47dfb68 sim: ppc: rename inline defines to match common code adds a979f2a07a sim: unify dtc tool checks adds 57a922a598 sim: move UNUSED before TYPE in SIM_ENDIAN_INLINE's definition adds 7e3941ac06 gdb/gdbserver: switch to AC_CONFIG_MACRO_DIRS adds 406b4ada55 x86: Count PLT for GOTOFF relocation against IFUNC symbol adds d73f39ee43 sim: move sim-inline to the common code adds 4ca8baee00 sim: m68hc11: fix unused function warnings with -O0 adds 1bf5c34239 sim: unify cgen maintainer settings adds 3a829bc50c sim: unify general maintainer settings adds 3eda63f2e4 sim: delete SIM_AC_COMMON macro adds 4488e43c49 sim: rx: scope the unique configure flag adds e27c0d7ae3 Automatic date update in version.in adds 1b40d569a8 sim: cris: clean up printf & abort usage a bit adds 61e2dde2db gdb/python: handle saving user registers in a frame unwinder adds 8b9c48b287 gdb/python: move PyLong_From* calls into py-utils.c adds d52b800721 gdb/python: add PendingFrame.level and Frame.level methods adds 96f842cbdb gdb/riscv: add support for vector registers in target descriptions adds b4ee29a445 Automatic date update in version.in adds be0387eed0 sim: hw: rework configure option & device selection adds 456ef1c1d4 sim: unify hardware settings adds ded5cb9444 picojava assembler and disassembler fixes adds 46b8b3d6f8 opcodes: make use of __builtin_popcount when available adds 80dc83fd0e gdb/remote: handle target dying just before a stepi adds 50331d64f1 RISC-V: Clarify the addends of pc-relative access. adds e5b771060e [gdb/testsuite] Add gdb.dwarf2/imported-unit-c.exp adds 80d1206d7f gdb: Support DW_LLE_start_end adds 4e317a765b gdb/python: print name of unwinder that claimed frame in deb [...] adds ac0d67ed1d gdb: remove unnecessary parameter wait_ptid from do_target_wait adds 224506e95d gdb: fix python/lib/gdb/__init__.py formatting adds 36bb57e40c sim: drop configure scripts for simple ports adds e173c80fbb sim: rx: merge with common configure script adds c45cffdbe1 sim: callback: add a getpid interface adds cc40b4f2a3 sim: callback: generate signal map adds 13b0d6e5a2 sim: callback: add missing cb_target_to_host_signal adds 072d63a871 sim: cris: fix a few warnings adds 0b98ef1642 Automatic date update in version.in adds 2dd865d7c1 [gdb/testsuite] Rewrite gdb_test_lines adds b34084121a sim: switch common srcdir to abs_srcdir adds 02ddf7223d Automatic date update in version.in adds d394a6efed sim: callback: add a kill interface adds e91488f739 sim: cris: override getpid callback adds 2f631626f1 sim: syscall: handle killing the sim itself adds 1daf786ba3 gas: update csect alignment for PPC prefixed instructions on XCOFF adds 657dcee4cf [gdb/testsuite] Fix duplicate in gdb.base/argv0-symlink.exp adds 013270a16a [gdb/testsuite] Fix duplicate in gdb.base/info-macros.exp adds 22c6cfe9c8 Automatic date update in version.in adds bdedb2d21b sim: callback: extend syscall interface to handle 7 args adds a7cde6df40 sim: cris: fix a few missing prototype warnings adds 134df96436 Update the core file architecture if a target description is [...] adds 8a3df5acae Add non-wrapping mode to ada_decode adds 67470e9d8b Decode Ada types in Python layer adds 50a6759f0f Use gdb::function_view in addrmap_foreach adds 202054aea6 Add ISA 3.1 check to powerpc-plxv-norel.exp adds 81b327aadd gdb/guile: improve the errors when creating breakpoints adds 08080f9744 gdb/guile: allow for catchpoint type breakpoints in guile adds 6b95f5ad96 gdb/python: allow for catchpoint type breakpoints in python adds bf1dcdb391 Consolidate CU language setting adds 3e9f1ca148 Remove dwarf2_cu::language adds 3da4c6449b Change how .debug_aranges padding is skipped adds 79bd4d34f0 gdb: fix regression in evaluate_funcall for non C++ like cases adds 13221aec0d gdb: replace NULL terminated array with array_view adds 158cc4feb7 gdb: use gdb::optional instead of passing a pointer to gdb:: [...] adds d038ce48f1 gdb: fix invalid arg coercion when calling static member functions adds fc4d5ebf8f gdb: add new function quick_symbol_functions::has_unexpanded [...] adds 4a0788e08c gdb: make struct output_source_filename_data more C++ like adds 0e350a054b gdb/mi: add regexp filtering to -file-list-exec-source-files adds 1fb1ce02fc gdb/mi: add new --group-by-objfile flag for -file-list-exec- [...] adds bd742128ba gdb: change info sources to group results by objfile adds ac2d77c6a1 Automatic date update in version.in adds 0f8e203412 gdb: add context getter/setter to cmd_list_element adds d6ff04a343 gdb: add assert in cmd_list_element::set_context adds 4c0ba02a74 gdb: remove context parameter from add_setshow_enum_cmd adds 6a72dbb692 gdb/guile: use return values of add_setshow functions in add [...] adds f1fa7a3d88 Automatic date update in version.in adds d57b653328 sim: bfin: move pkg-config & SDL checks to common code adds 5d0b3088f7 sim: erc32: merge with common configure script adds cc9c19b030 sim: bpf: fix mixed decls & code warnings (and style) adds 44e88cd631 sim: bpf: add explicit casts when using explicit formats adds 5a4ce7aea0 sim: cgen: sync prototypes with implementation adds 694d6fdba1 sim: cgen: always leverage the ops prototypes adds 2d922d86ba sim: cgen: always leverage the mem prototypes adds ded82565c6 sim: cgen: constify trace strings adds a7ffa88dc6 sim: cgen: add printf attributes in a few more calls adds b69bd9e723 sim: cgen: add asserts to fix unused engine warnings adds 5db3a175cc sim: cgen: suppress trace non-literal printf warning adds 76f11310df sim: bpf: include more local headers & fix broken funcs adds e0fd25e485 sim: bpf/cris: include cgen-mem in decoders adds 9df51d7c47 Automatic date update in version.in adds ff68b4b5b1 sim: frv: fix ambiguous else compiler warnings adds 1415825a1b sim: frv: fix return type for post_wait_for funcs adds 247867ebd3 sim: frv: fix uninitialized variable warning adds 2b83b95803 sim: frv: fix some printf type mismatch warnings adds a9d200398a sim: frv: fix up various missing prototype warnings adds 520ca9a7be sim: frv: fix engine hook adds dd5ef931df sim: frv: add missing const type adds 05b8577206 gdb/fortran: Add type info of formal parameter for clang. adds ba4990f13f sim: cgen: delete unused record_trace_results functions adds f2ddf6e39d sim: bpf: fix printf warnings on 32-bit systems adds 78484bcab9 sim: bpf: enable -Werror usage adds 4d60b89770 gdb/remote: Use true/false instead of 1/0 adds c87c999c51 gdb: remove gdbarch_info::tdep_info adds b447dd03c1 gdb: remove gdbarch_info_init adds 0a3b55a669 Fix tag_ctl register size in the core file. adds e660f4e905 Fix FFR register size for core files. adds a52d0b9de1 Sanitize the address before working with allocation tags adds f07fad95a9 gdb: add .flake8 file adds 0c1bcd2327 gdb: convert obj_section macros to methods adds 2608aff552 gdb: use gdb_bfd_count_sections in macho_symfile_offsets adds 327f11dee1 Automatic date update in version.in adds 1fb164a112 sim: cgen: require long long support adds 54e66d16e8 sim: callback: drop unused printf helpers adds a1d9117f94 sim: callback: add printf attributes adds fda2f85e58 sim: io: add printf attributes to vprintf funcs too adds 4743af62eb gdb: remove duplicate declaration of 'find_thread_ptid' adds c2ce831330 Add the netbsdpe configuration to the list of obsolete targets. adds dd4f75f2b6 gdb: make frame_debug a boolean adds a05a883fba gdb: introduce frame_debug_printf adds a154d838a7 gdb: add names to unwinders, add debug messages when looking [...] adds fe67a58f98 gdb: introduce FRAME_SCOPED_DEBUG_ENTER_EXIT adds aa2e84dee6 Automatic date update in version.in adds ba9666525f sim: model: constify sim_machs storage adds c42ed5fca2 sim: cris: remove cgen-ops.h include hack adds 999b474b8a sim: callback: add check for HAVE_KILL adds 3167423f07 sim: use -Wno-error=maybe-uninitialized adds cc71756141 sim: fix arch Makefile regen when unified adds 7f6fa74374 sim: use -Wunused-but-set-parameter adds f8261de1b2 sim: ppc: fix printf warnings adds 1c636da093 sim: namespace sim_machs adds d414eb3e7f sim: move default model to the runtime sim state adds faa09946fe sim: delete unused model settings adds d8b04da736 sim: bfin: merge with common configure script adds 280c57ff58 Fix signedness of def_cfa_sf and def_cfa_offset_sf adds c63fc3680a Handle DW_FORM_implicit_const when displaying an attribute adds 9a39f7389d Mark .gnu.debuglto_.debug_* as SHT_MIPS_DWARF adds 05d54a045c sim: move engine init to dynamic modules.c adds 0ecdca38bc sim: move trace init to dynamic modules.c adds 953fac6481 sim: move profile init to dynamic modules.c adds 6cf75d895a sim: move scache init to dynamic modules.c adds e7954ef5e5 sim: frv: scope the unique configure flag adds b79efe264f sim: unify scache settings adds 408a44aac1 sim: cris/frv/iq2000/lm32: merge with common configure script adds 79c4446067 sim: ppc: unify (most) compiler warnings with common code adds 9cb74cfd81 Automatic date update in version.in adds 417f991f08 arm: don't treat XScale features as part of the FPU [PR 28031] adds 75a2da57a1 readelf: Reset file position to beginning for thin archive members adds 05c06f318f Linux: Access memory even if threads are running adds 1b8d1f5f38 Partially fix debuginfod tests in binutils testsuite. adds 6c2ede018c opcodes: constify aarch64_opcode_tables adds 52b8387412 opcodes: constify & scope microblaze opcodes adds ac8ef6961e opcodes: constify & localize z80 opcodes adds 9b2beaf778 opcodes: cleanup nds32 variables adds f375d32b35 opcodes: constify & local meps macros adds 2fe36d31f9 cgen: split GUILE setting out adds 72ab7b79dc Automatic date update in version.in adds 33b477e1c7 sim: m32r: namespace Linux syscall table adds 055a3f27e8 sim: m32r: fix virtual environment with Linux targets adds d4a0121347 sim: m32r: replace custom endian helpers with sim-endian adds fe41f7211a sim: m32r: unify ELF & Linux traps logic adds 54af62279c sim: m32r: reformat linux traps code adds 313c332ff2 sim: m32r: merge with common configure script adds 7eb1f99ada sim: unify reserved instruction bits settings adds af82b082c2 Fix minor NDS32 renaming snafu. adds 62194b631d Re: Fix minor NDS32 renaming snafu adds 4ff0bb2df5 PR28048, heap-buffer-overflow on readelf -Ww adds 49910fd88d Fix an illegal memory access triggered by an attempt to pars [...] adds 90b044ef10 Document TUI improvements in the manual & NEWS adds 57bb96d3a2 Use 'const' in ada-exp.y adds 0d03c52682 Automatic date update in version.in adds 20c4b12e93 Synchronize libiberty sources (and include/demangle.h) with [...] adds 514192487e Add markers for 2.37 branch adds a5e5d36ce2 Update version number and regenerate files adds 0ec34ffb3a Regenerate gprof/configure adds cf368e8306 Automatic date update in version.in adds 5185009113 Automatic date update in version.in adds 1f0bdd6866 Updated translations adds 8a52ca87f6 Reapply patch to allow libiberty to be built with LTO enabled. adds 0f206424c1 ld: Cache and reuse the IR archive file descriptor adds e07d83974e Automatic date update in version.in adds b3fac0a89d Automatic date update in version.in adds 64af9fedf2 Check for strnlen declaration to fix Solaris 10 build adds 0316a68cc0 Fix Solaris gprof build with --disable-nls adds f9b7710149 ld: Check archive only for archive member adds 7764dd1f5f elf/riscv: Fix relaxation with aliases [PR28021] adds 2798ba74c2 Automatic date update in version.in adds 26672a41ea Updated Portuguese translation for the BFD sub-directory adds cce64d8d01 x86-64: Disallow PC reloc against weak undefined symbols in PIE adds 23233f97a0 Automatic date update in version.in adds 003cfab844 Automatic date update in version.in adds b9225a9ff4 Automatic date update in version.in adds fcd5a45673 Automatic date update in version.in adds 8dfad6eb0d Updated French translation for the binutils sub-directory adds 9a5919bb07 Automatic date update in version.in adds 0a2fd6d1e2 Automatic date update in version.in adds eb2839e6a5 Automatic date update in version.in adds 25162c795b Fix a stack exhaustion problem in the Rust demangling code i [...] adds 3a78eed154 Automatic date update in version.in adds 3f8d5ef6ef Updated Swedish translation for the binutils sub-directory adds e0d372a0a6 Automatic date update in version.in adds 6d27f932a5 Automatic date update in version.in adds 116a737f43 This is the 2.37 release adds e2688c418f Re-enable development on the 2.37 branch adds bebfdeb46d Automatic date update in version.in adds 999566402e Change "uint" to "unsigned" adds ad71de582e Automatic date update in version.in adds 10b4dbbf28 PR28106, build of 2.37 fails on FreeBSD and Clang adds 87d4632d36 Automatic date update in version.in adds 28bb1699b1 Updated Russian translation for the bfd library adds f7d0012b0a Automatic date update in version.in adds ac20acd512 Automatic date update in version.in adds 2349a27fb3 Automatic date update in version.in adds 6afc66a777 Re: ld script expression parsing adds 9a98fad216 Revert: PowerPC: Don't generate unused section symbols adds e84dd6a27b Automatic date update in version.in adds b316ba4e00 Automatic date update in version.in adds 5df4b3a5c2 Automatic date update in version.in adds 37ecc81173 Automatic date update in version.in adds d61e1cbd9e Automatic date update in version.in adds 2dad02b6d4 texi2pod.pl: add no-op --no-split option support [PR28144] adds 9d6d087078 Re: opcodes: constify & local meps macros adds 1c611b40e6 bfd: Close the file descriptor if there is no archive fd adds 0f71a70358 Automatic date update in version.in adds f448ce02de Automatic date update in version.in adds 351c55564d Automatic date update in version.in adds 511be4d5ee Automatic date update in version.in adds 5a9e3421a8 Automatic date update in version.in adds 038f80914f Automatic date update in version.in adds 2e8e5a93a1 PR28156, rename.c doesn't compile with MinGW adds 0c966828ce IBM Z: Remove lpswey parameter adds d2cb9c60a5 IBM Z: Add another arch14 instruction adds 28392428d0 Automatic date update in version.in adds 1e6a1c8306 Automatic date update in version.in adds 96327e297b Automatic date update in version.in adds d86cf1b0d5 PR28186, SEGV elf.c:7991:30 in _bfd_elf_fixup_group_sections adds 9cb577deaa Automatic date update in version.in adds e096899095 Automatic date update in version.in adds d6b3a3af89 Automatic date update in version.in adds 1b1676bffb Automatic date update in version.in adds 303eea67cc Revert "Re: ld script expression parsing" adds 60a7dc5647 Revert "ld --defsym" adds dd713144aa Revert "ld script expression parsing" adds 0963896dde Automatic date update in version.in adds 07270a9e78 Automatic date update in version.in This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (84fd26d820) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_gnu_tk1/gnu-release- [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. No new revisions were added by this update. Summary of changes: ChangeLog | 182 + MAINTAINERS | 2 +- Makefile.def | 2 +- Makefile.in | 70 +- Makefile.tpl | 68 +- bfd/.gitignore | 1 - bfd/ChangeLog | 1766 +- bfd/Makefile.am | 8 +- bfd/Makefile.in | 12 +- bfd/aclocal.m4 | 2 +- bfd/aix5ppc-core.c | 10 +- bfd/aout-cris.c | 12 +- bfd/aout-ns32k.c | 74 +- bfd/aout-target.h | 20 +- bfd/aoutx.h | 623 +- bfd/arc-got.h | 32 +- bfd/archive.c | 272 +- bfd/archive64.c | 48 +- bfd/archures.c | 53 +- bfd/bfd-in.h | 95 +- bfd/bfd-in2.h | 528 +- bfd/bfd.c | 171 +- bfd/bfdwin.c | 14 +- bfd/binary.c | 26 +- bfd/cache.c | 38 +- bfd/coff-alpha.c | 210 +- bfd/coff-arm.c | 244 +- bfd/coff-arm.h | 6 +- bfd/coff-bfd.c | 12 +- bfd/coff-bfd.h | 12 +- bfd/coff-go32.c | 10 +- bfd/coff-i386.c | 56 +- bfd/coff-ia64.c | 4 +- bfd/coff-mcore.c | 74 +- bfd/coff-mips.c | 100 +- bfd/coff-rs6000.c | 1280 +- bfd/coff-sh.c | 368 +- bfd/coff-stgo32.c | 40 +- bfd/coff-tic30.c | 20 +- bfd/coff-tic4x.c | 34 +- bfd/coff-tic54x.c | 84 +- bfd/coff-x86_64.c | 155 +- bfd/coff-z80.c | 80 +- bfd/coff-z8k.c | 40 +- bfd/coff64-rs6000.c | 1615 +- bfd/coffcode.h | 630 +- bfd/coffgen.c | 277 +- bfd/cofflink.c | 365 +- bfd/coffswap.h | 11 +- bfd/compress.c | 89 +- bfd/config.bfd | 20 +- bfd/config.in | 93 +- bfd/configure | 9840 +++--- bfd/configure.ac | 67 +- bfd/configure.com | 9 +- bfd/corefile.c | 16 +- bfd/cpu-aarch64.c | 20 +- bfd/cpu-aarch64.h | 2 +- bfd/cpu-alpha.c | 8 +- bfd/cpu-arc.c | 16 +- bfd/cpu-arm.c | 104 +- bfd/cpu-arm.h | 6 +- bfd/cpu-avr.c | 38 +- bfd/cpu-bfin.c | 2 +- bfd/cpu-bpf.c | 4 +- bfd/cpu-cr16.c | 28 +- bfd/cpu-cris.c | 4 +- bfd/cpu-crx.c | 2 +- bfd/cpu-csky.c | 20 +- bfd/cpu-d10v.c | 6 +- bfd/cpu-d30v.c | 2 +- bfd/cpu-dlx.c | 2 +- bfd/cpu-epiphany.c | 5 +- bfd/cpu-fr30.c | 2 +- bfd/cpu-frv.c | 16 +- bfd/cpu-ft32.c | 6 +- bfd/cpu-h8300.c | 26 +- bfd/cpu-hppa.c | 8 +- bfd/cpu-i386.c | 36 +- bfd/cpu-ia64.c | 4 +- bfd/cpu-iamcu.c | 5 +- bfd/cpu-ip2k.c | 4 +- bfd/cpu-iq2000.c | 4 +- bfd/cpu-k1om.c | 9 +- bfd/cpu-l1om.c | 9 +- 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gas/config/bfin-lex-wrapper.c | 6 +- gas/config/bfin-lex.l | 9 +- gas/config/m68k-parse.y | 18 +- gas/config/obj-aout.c | 4 +- gas/config/obj-coff-seh.c | 21 +- gas/config/obj-coff.c | 28 +- gas/config/obj-coff.h | 18 + gas/config/obj-ecoff.c | 2 +- gas/config/obj-elf.c | 169 +- gas/config/obj-elf.h | 8 +- gas/config/obj-evax.c | 2 +- gas/config/obj-macho.c | 4 +- gas/config/obj-som.c | 2 +- gas/config/obj-som.h | 5 - gas/config/tc-aarch64.c | 756 +- gas/config/tc-alpha.c | 34 +- gas/config/tc-arc.c | 244 +- gas/config/tc-arc.h | 2 +- gas/config/tc-arm.c | 920 +- gas/config/tc-arm.h | 14 +- gas/config/tc-avr.c | 72 +- gas/config/tc-avr.h | 2 +- gas/config/tc-bfin.c | 30 +- gas/config/tc-bfin.h | 6 +- gas/config/tc-bpf.c | 2 +- gas/config/tc-cr16.c | 28 +- gas/config/tc-cris.c | 38 +- gas/config/tc-crx.c | 3 +- gas/config/tc-csky.c | 712 +- gas/config/tc-csky.h | 2 +- gas/config/tc-d10v.c | 17 +- gas/config/tc-d10v.h | 2 +- gas/config/tc-d30v.c | 39 +- gas/config/tc-d30v.h | 4 +- gas/config/tc-dlx.c | 8 +- gas/config/tc-dlx.h | 2 +- gas/config/tc-epiphany.c | 36 +- gas/config/tc-epiphany.h | 2 +- gas/config/tc-fr30.c | 4 +- gas/config/tc-fr30.h | 2 +- gas/config/tc-frv.c | 30 +- gas/config/tc-frv.h | 4 +- gas/config/tc-ft32.c | 28 +- gas/config/tc-ft32.h | 4 +- gas/config/tc-h8300.c | 13 +- gas/config/tc-hppa.c | 70 +- gas/config/tc-hppa.h | 6 - gas/config/tc-i386-intel.c | 53 +- gas/config/tc-i386.c | 1905 +- gas/config/tc-i386.h | 8 +- gas/config/tc-ia64.c | 55 +- gas/config/tc-ip2k.c | 4 +- gas/config/tc-iq2000.c | 14 +- gas/config/tc-iq2000.h | 8 +- gas/config/tc-lm32.c | 6 +- gas/config/tc-lm32.h | 2 +- gas/config/tc-m32c.c | 16 +- gas/config/tc-m32c.h | 2 +- gas/config/tc-m32r.c | 14 +- gas/config/tc-m32r.h | 8 +- gas/config/tc-m68hc11.c | 54 +- gas/config/tc-m68k.c | 14 +- gas/config/tc-mcore.c | 4 +- gas/config/tc-mcore.h | 8 +- gas/config/tc-mep.c | 4 +- gas/config/tc-mep.h | 2 +- gas/config/tc-metag.c | 367 +- gas/config/tc-metag.h | 2 +- gas/config/tc-microblaze.c | 55 +- gas/config/tc-mips.c | 1107 +- gas/config/tc-mips.h | 2 +- gas/config/tc-mmix.c | 4 +- gas/config/tc-mn10200.c | 20 +- gas/config/tc-mn10300.c | 76 +- gas/config/tc-mn10300.h | 8 +- gas/config/tc-moxie.c | 2 +- gas/config/tc-msp430.c | 306 +- gas/config/tc-msp430.h | 4 +- gas/config/tc-mt.c | 14 +- gas/config/tc-mt.h | 5 +- gas/config/tc-nds32.c | 573 +- gas/config/tc-nds32.h | 13 +- gas/config/tc-nios2.c | 105 +- gas/config/tc-ns32k.c | 20 +- gas/config/tc-or1k.c | 12 +- gas/config/tc-or1k.h | 2 +- gas/config/tc-pdp11.c | 75 +- gas/config/tc-pj.c | 9 +- gas/config/tc-ppc.c | 758 +- gas/config/tc-ppc.h | 36 +- gas/config/tc-pru.c | 48 +- gas/config/tc-pru.h | 3 +- gas/config/tc-riscv.c | 1072 +- gas/config/tc-riscv.h | 8 +- gas/config/tc-rx.c | 38 +- gas/config/tc-rx.h | 2 +- gas/config/tc-s12z.c | 202 +- gas/config/tc-s12z.h | 2 +- gas/config/tc-s390.c | 70 +- gas/config/tc-score.c | 119 +- gas/config/tc-score.h | 2 +- gas/config/tc-score7.c | 103 +- gas/config/tc-sh.c | 20 +- gas/config/tc-sh.h | 6 +- gas/config/tc-sparc.c | 86 +- gas/config/tc-spu.c | 2 +- gas/config/tc-tic54x.c | 38 +- gas/config/tc-tic6x.c | 374 +- gas/config/tc-tic6x.h | 16 +- gas/config/tc-tilegx.c | 4 +- gas/config/tc-tilepro.c | 4 +- gas/config/tc-v850.c | 148 +- gas/config/tc-v850.h | 2 +- gas/config/tc-vax.c | 2 +- gas/config/tc-visium.c | 2 +- gas/config/tc-visium.h | 2 +- gas/config/tc-wasm32.c | 32 +- gas/config/tc-wasm32.h | 2 +- gas/config/tc-xc16x.c | 2 +- gas/config/tc-xgate.c | 16 +- gas/config/tc-xstormy16.c | 20 +- gas/config/tc-xstormy16.h | 2 +- gas/config/tc-xtensa.c | 1249 +- gas/config/tc-xtensa.h | 6 +- gas/config/tc-z80.c | 89 +- gas/config/tc-z8k.c | 44 +- gas/config/te-symbian.h | 22 - gas/config/xtensa-istack.h | 10 +- gas/config/xtensa-relax.c | 124 +- gas/config/xtensa-relax.h | 4 +- gas/configure | 2687 +- gas/configure.ac | 44 +- gas/configure.tgt | 5 +- gas/doc/Makefile.am | 8 +- gas/doc/Makefile.in | 14 +- gas/doc/as.texi | 20 +- gas/doc/c-i386.texi | 2 +- gas/doc/c-riscv.texi | 160 +- gas/doc/c-s390.texi | 50 +- gas/doc/internals.texi | 10 +- gas/dw2gencfi.c | 174 +- gas/dwarf2dbg.c | 115 +- gas/dwarf2dbg.h | 4 +- gas/ehopt.c | 6 +- gas/expr.c | 111 +- gas/expr.h | 4 +- gas/frags.c | 28 +- gas/frags.h | 8 +- gas/input-file.c | 4 +- gas/itbl-lex-wrapper.c | 4 +- gas/itbl-lex.l | 1 - gas/listing.c | 56 +- gas/macro.c | 8 +- gas/messages.c | 16 - gas/output-file.c | 2 +- gas/po/POTFILES.in | 2 +- gas/po/fr.po | 5743 ++-- gas/po/gas.pot | 5627 ++-- gas/po/uk.po | 5739 ++-- gas/read.c | 181 +- gas/read.h | 4 +- gas/sb.c | 2 - gas/stabs.c | 12 +- gas/symbols.c | 4 +- gas/testsuite/gas/aarch64/dwarf.d | 16 +- gas/testsuite/gas/aarch64/illegal-sysreg-7.d | 2 + gas/testsuite/gas/aarch64/illegal-sysreg-7.l | 2 + gas/testsuite/gas/aarch64/illegal-sysreg-7.s | 2 + gas/testsuite/gas/aarch64/pr27217.d | 15 + gas/testsuite/gas/aarch64/pr27217.s | 16 + gas/testsuite/gas/aarch64/pr27904.d | 2 + gas/testsuite/gas/aarch64/pr27904.l | 2 + gas/testsuite/gas/aarch64/pr27904.s | 1 + gas/testsuite/gas/aarch64/rme-invalid.d | 3 + gas/testsuite/gas/aarch64/rme-invalid.l | 2 + gas/testsuite/gas/aarch64/rme-invalid.s | 4 + gas/testsuite/gas/aarch64/rme.d | 20 + gas/testsuite/gas/aarch64/rme.s | 20 + gas/testsuite/gas/aarch64/sysreg-7.d | 25 + gas/testsuite/gas/aarch64/sysreg-7.s | 20 + gas/testsuite/gas/all/byte.d | 4 - gas/testsuite/gas/all/byte.l | 3 - gas/testsuite/gas/all/byte.s | 2 - gas/testsuite/gas/all/float.s | 16 + gas/testsuite/gas/all/gas.exp | 30 +- gas/testsuite/gas/all/local-label-overflow.d | 5 +- gas/testsuite/gas/all/overflow.l | 9 + gas/testsuite/gas/all/overflow.s | 26 + gas/testsuite/gas/all/pr27381.d | 4 + gas/testsuite/gas/all/pr27381.err | 2 + gas/testsuite/gas/all/pr27381.s | 1 + gas/testsuite/gas/all/pr27384.d | 4 + gas/testsuite/gas/all/pr27384.err | 4 + gas/testsuite/gas/all/pr27384.s | 4 + gas/testsuite/gas/all/sleb128-2.d | 2 +- gas/testsuite/gas/all/sleb128-4.d | 3 +- gas/testsuite/gas/all/sleb128-5.d | 2 +- gas/testsuite/gas/all/sleb128-7.d | 2 +- gas/testsuite/gas/all/sleb128-9.d | 2 +- gas/testsuite/gas/all/string.d | 2 +- gas/testsuite/gas/arm/arch4t-eabi.d | 2 +- gas/testsuite/gas/arm/arch4t.d | 2 +- gas/testsuite/gas/arm/got_prel.d | 2 +- gas/testsuite/gas/arm/mapdir.d | 2 +- gas/testsuite/gas/arm/mapmisc.d | 2 +- gas/testsuite/gas/arm/mapsecs.d | 2 +- gas/testsuite/gas/arm/mapshort-eabi.d | 2 +- gas/testsuite/gas/arm/pr27411.d | 2 + gas/testsuite/gas/arm/pr27411.l | 6 + gas/testsuite/gas/arm/pr27411.s | 14 + gas/testsuite/gas/arm/thumb-eabi.d | 2 +- gas/testsuite/gas/arm/thumb.d | 2 +- gas/testsuite/gas/arm/thumbrel.d | 2 +- gas/testsuite/gas/arm/thumbver.d | 2 +- gas/testsuite/gas/bfin/loop_temps.d | 6 +- gas/testsuite/gas/elf/bignums.d | 2 +- gas/testsuite/gas/elf/dwarf-5-file0.d | 4 +- gas/testsuite/gas/elf/elf.exp | 4 + gas/testsuite/gas/elf/group0c.d | 2 +- gas/testsuite/gas/elf/group1a.d | 2 +- gas/testsuite/gas/elf/missing-build-notes.d | 2 +- gas/testsuite/gas/elf/pr27355.d | 3 + gas/testsuite/gas/elf/pr27355.err | 5 + gas/testsuite/gas/elf/pr27355.s | 4 + gas/testsuite/gas/elf/section-symbol-redef.d | 2 +- gas/testsuite/gas/elf/section0.d | 2 +- gas/testsuite/gas/elf/section1.d | 2 +- gas/testsuite/gas/elf/section10.d | 2 +- gas/testsuite/gas/elf/section11.d | 4 +- gas/testsuite/gas/elf/section15.d | 2 +- gas/testsuite/gas/elf/section2.e-arc | 10 +- gas/testsuite/gas/elf/section2.e-arm | 10 +- gas/testsuite/gas/elf/section2.e-csky | 10 +- gas/testsuite/gas/elf/section2.e-m32r | 10 +- gas/testsuite/gas/elf/section2.e-mips | 2 +- gas/testsuite/gas/elf/section2.e-msp430 | 10 +- gas/testsuite/gas/elf/section2.e-riscv | 10 +- gas/testsuite/gas/elf/section2.e-rl78 | 8 +- gas/testsuite/gas/elf/section2.e-rx | 8 +- gas/testsuite/gas/elf/section2.e-score | 10 +- gas/testsuite/gas/elf/section2.e-tic6x | 10 +- gas/testsuite/gas/elf/section2.e-unused | 8 +- gas/testsuite/gas/elf/section2.e-v850 | 10 +- gas/testsuite/gas/elf/section2.e-xtensa | 10 +- gas/testsuite/gas/elf/section25.s | 12 +- gas/testsuite/gas/elf/section26.s | 16 +- gas/testsuite/gas/elf/section28.d | 16 + gas/testsuite/gas/elf/section28.s | 11 + gas/testsuite/gas/elf/section29.d | 11 + gas/testsuite/gas/elf/section29.s | 4 + gas/testsuite/gas/elf/section4.d | 2 +- gas/testsuite/gas/elf/section6.d | 2 +- gas/testsuite/gas/elf/section7.d | 2 +- gas/testsuite/gas/elf/startof.d | 10 + gas/testsuite/gas/elf/startof.s | 6 + gas/testsuite/gas/elf/symtab.d | 4 +- gas/testsuite/gas/elf/symtab.s | 2 +- gas/testsuite/gas/i386/avx512f-intel.d | 256 +- gas/testsuite/gas/i386/avx512f-nondef.d | 8 +- gas/testsuite/gas/i386/avx512f-nondef.s | 10 + gas/testsuite/gas/i386/avx512f_vl-intel.d | 384 +- gas/testsuite/gas/i386/avx512pf-intel.d | 256 +- gas/testsuite/gas/i386/code16-2.d | 3 + gas/testsuite/gas/i386/code16-2.s | 10 + gas/testsuite/gas/i386/disp-imm-16.l | 10 + gas/testsuite/gas/i386/disp-imm-16.s | 17 + gas/testsuite/gas/i386/disp-imm-32.d | 21 + gas/testsuite/gas/i386/disp-imm-32.s | 17 + gas/testsuite/gas/i386/disp-imm-64.l | 22 + gas/testsuite/gas/i386/disp-imm-64.s | 28 + gas/testsuite/gas/i386/dwarf5-line-1.d | 2 +- gas/testsuite/gas/i386/enqcmd-16bit.d | 27 +- gas/testsuite/gas/i386/enqcmd-16bit.s | 2 +- gas/testsuite/gas/i386/i386.exp | 67 +- gas/testsuite/gas/i386/ilp32/enqcmd.d | 38 + gas/testsuite/gas/i386/ilp32/enqcmd.s | 35 + gas/testsuite/gas/i386/ilp32/movdir.d | 29 + gas/testsuite/gas/i386/ilp32/movdir.s | 26 + gas/testsuite/gas/i386/invlpgb.d | 4 + gas/testsuite/gas/i386/invlpgb.s | 22 +- gas/testsuite/gas/i386/invlpgb64.d | 5 +- gas/testsuite/gas/i386/lea-optimize.d | 41 +- gas/testsuite/gas/i386/lea.d | 39 +- gas/testsuite/gas/i386/lea.e | 1 + gas/testsuite/gas/i386/lea.s | 54 +- gas/testsuite/gas/i386/lea16-optimize.d | 50 + gas/testsuite/gas/i386/lea16-optimize2.d | 50 + gas/testsuite/gas/i386/lea16.d | 50 + gas/testsuite/gas/i386/lea16.s | 10 + gas/testsuite/gas/i386/lea64-optimize.d | 77 + gas/testsuite/gas/i386/lea64.d | 76 + gas/testsuite/gas/i386/lea64.e | 4 + gas/testsuite/gas/i386/lea64.s | 92 + gas/testsuite/gas/i386/no-got.d | 17 + gas/testsuite/gas/i386/no-got.s | 5 + gas/testsuite/gas/i386/nops-8.d | 2327 ++ gas/testsuite/gas/i386/nops-8.s | 19 + gas/testsuite/gas/i386/noreg-intel64.l | 1 + gas/testsuite/gas/i386/noreg64-data16.d | 1 + gas/testsuite/gas/i386/noreg64-data16.e | 4 +- gas/testsuite/gas/i386/noreg64-rex64.d | 1 + gas/testsuite/gas/i386/noreg64.d | 1 + gas/testsuite/gas/i386/noreg64.l | 1 + gas/testsuite/gas/i386/noreg64.s | 1 + gas/testsuite/gas/i386/pcrel64.l | 54 + gas/testsuite/gas/i386/pcrel64.s | 27 + gas/testsuite/gas/i386/pr27198.d | 2 + gas/testsuite/gas/i386/pr27198.err | 5 + gas/testsuite/gas/i386/pr27198.s | 1 + gas/testsuite/gas/i386/prefetch-intel.d | 8 +- gas/testsuite/gas/i386/prefetch.d | 8 +- gas/testsuite/gas/i386/property-12.d | 2 +- gas/testsuite/gas/i386/property-4.d | 2 +- gas/testsuite/gas/i386/property-5.d | 2 +- gas/testsuite/gas/i386/property-cvtpi2pd.d | 9 + gas/testsuite/gas/i386/property-cvtpi2pd.s | 2 + gas/testsuite/gas/i386/property-cvtpi2ps.d | 9 + gas/testsuite/gas/i386/property-cvtpi2ps.s | 2 + gas/testsuite/gas/i386/property-ldmxcsr.d | 9 + gas/testsuite/gas/i386/property-ldmxcsr.s | 2 + gas/testsuite/gas/i386/property-vldmxcsr.d | 9 + gas/testsuite/gas/i386/property-vldmxcsr.s | 2 + gas/testsuite/gas/i386/property-vzeroall.d | 9 + gas/testsuite/gas/i386/property-vzeroall.s | 2 + gas/testsuite/gas/i386/quoted.d | 21 + gas/testsuite/gas/i386/quoted.s | 16 + gas/testsuite/gas/i386/rela.d | 13 + gas/testsuite/gas/i386/rela.s | 14 + gas/testsuite/gas/i386/secrel.d | 90 +- gas/testsuite/gas/i386/secrel.s | 166 +- gas/testsuite/gas/i386/sib-intel.d | 4 + gas/testsuite/gas/i386/sib.d | 4 + gas/testsuite/gas/i386/sib.s | 4 + gas/testsuite/gas/i386/size-2.d | 13 +- gas/testsuite/gas/i386/size-2.s | 3 + gas/testsuite/gas/i386/size-5.s | 32 + gas/testsuite/gas/i386/size-5a.d | 28 + gas/testsuite/gas/i386/size-5b.d | 15 + gas/testsuite/gas/i386/snp.d | 7 +- gas/testsuite/gas/i386/snp.s | 44 +- gas/testsuite/gas/i386/snp64.d | 18 +- gas/testsuite/gas/i386/sse-check-error.l | 91 +- gas/testsuite/gas/i386/sse-check-warn.e | 17 +- gas/testsuite/gas/i386/sse-check.d | 2 + gas/testsuite/gas/i386/sse-check.s | 4 + gas/testsuite/gas/i386/sse2avx.d | 2 + gas/testsuite/gas/i386/sse2avx.s | 2 + gas/testsuite/gas/i386/unary.d | 17 + gas/testsuite/gas/i386/unary.s | 11 + gas/testsuite/gas/i386/vgather-check-none.d | 32 +- gas/testsuite/gas/i386/vgather-check-warn.d | 33 +- gas/testsuite/gas/i386/vgather-check.d | 24 +- gas/testsuite/gas/i386/wrap32-data.d | 23 + gas/testsuite/gas/i386/wrap32-text.d | 43 + gas/testsuite/gas/i386/wrap32.s | 60 + gas/testsuite/gas/i386/x86-64-addr32-bad.l | 29 + gas/testsuite/gas/i386/x86-64-addr32-bad.s | 15 + gas/testsuite/gas/i386/x86-64-avx-swap-2.d | 4 +- gas/testsuite/gas/i386/x86-64-avx512f-intel.d | 260 +- gas/testsuite/gas/i386/x86-64-avx512f_vl-intel.d | 448 +- gas/testsuite/gas/i386/x86-64-avx512pf-intel.d | 256 +- gas/testsuite/gas/i386/x86-64-code16-2.d | 4 + gas/testsuite/gas/i386/x86-64-enqcmd-intel.d | 5 - gas/testsuite/gas/i386/x86-64-enqcmd-inval.l | 16 +- gas/testsuite/gas/i386/x86-64-enqcmd-inval.s | 6 +- gas/testsuite/gas/i386/x86-64-enqcmd.d | 6 - gas/testsuite/gas/i386/x86-64-enqcmd.s | 4 - gas/testsuite/gas/i386/x86-64-movdir-intel.d | 3 - gas/testsuite/gas/i386/x86-64-movdir.d | 4 - gas/testsuite/gas/i386/x86-64-movdir.s | 2 - gas/testsuite/gas/i386/x86-64-movdir64b-reg.l | 6 +- gas/testsuite/gas/i386/x86-64-movdir64b-reg.s | 2 + gas/testsuite/gas/i386/x86-64-mpx.d | 29 +- gas/testsuite/gas/i386/x86-64-mpx.s | 17 +- gas/testsuite/gas/i386/x86-64-no-got.d | 17 + gas/testsuite/gas/i386/x86-64-no-got.s | 5 + gas/testsuite/gas/i386/x86-64-nosse2.l | 15 + gas/testsuite/gas/i386/x86-64-nosse2.s | 9 + gas/testsuite/gas/i386/x86-64-prefetch-intel.d | 8 +- gas/testsuite/gas/i386/x86-64-prefetch.d | 8 +- gas/testsuite/gas/i386/x86-64-property-10.d | 10 - gas/testsuite/gas/i386/x86-64-property-11.d | 10 - gas/testsuite/gas/i386/x86-64-property-12.d | 10 - gas/testsuite/gas/i386/x86-64-property-13.d | 10 - gas/testsuite/gas/i386/x86-64-property-2.d | 10 - gas/testsuite/gas/i386/x86-64-property-3.d | 10 - gas/testsuite/gas/i386/x86-64-property-4.d | 10 - gas/testsuite/gas/i386/x86-64-property-5.d | 10 - gas/testsuite/gas/i386/x86-64-property-6.d | 10 - gas/testsuite/gas/i386/x86-64-rip-2.d | 21 + gas/testsuite/gas/i386/x86-64-rip-2.s | 10 + gas/testsuite/gas/i386/x86-64-rip-inval-1.l | 11 + gas/testsuite/gas/i386/x86-64-rip-inval-1.s | 5 + gas/testsuite/gas/i386/x86-64-rip-inval-2.l | 11 + gas/testsuite/gas/i386/x86-64-rip-inval-2.s | 5 + gas/testsuite/gas/i386/x86-64-size-2.d | 13 +- gas/testsuite/gas/i386/x86-64-sse-check-error.l | 94 +- gas/testsuite/gas/i386/x86-64-sse2avx.d | 3 + gas/testsuite/gas/i386/x86-64-sse2avx.s | 3 + gas/testsuite/gas/i386/x86-64-sysenter-amd.d | 2 + gas/testsuite/gas/i386/x86-64-sysenter-amd.l | 4 +- gas/testsuite/gas/i386/x86-64-sysenter-amd.s | 6 +- gas/testsuite/gas/i386/x86-64-sysenter-intel.d | 6 +- .../gas/i386/x86-64-vgather-check-error.l | 23 +- gas/testsuite/gas/i386/x86-64-vgather-check-none.d | 35 +- gas/testsuite/gas/i386/x86-64-vgather-check-warn.d | 35 +- gas/testsuite/gas/i386/x86-64-vgather-check-warn.e | 23 +- gas/testsuite/gas/i386/x86-64-vgather-check.d | 29 +- gas/testsuite/gas/i386/x86-64-vgather-check.s | 3 + gas/testsuite/gas/ia64/alias-ilp32.d | 8 +- gas/testsuite/gas/ia64/alias.d | 8 +- gas/testsuite/gas/ia64/global.d | 6 +- gas/testsuite/gas/ia64/reloc-mlx.d | 2 +- gas/testsuite/gas/m68hc11/m68hc11.exp | 22 +- gas/testsuite/gas/mach-o/sections-1.d | 2 +- gas/testsuite/gas/macros/irp.d | 2 +- gas/testsuite/gas/macros/repeat.d | 2 +- gas/testsuite/gas/macros/rept.d | 2 +- gas/testsuite/gas/macros/test2.d | 2 +- gas/testsuite/gas/macros/test3.d | 1 - gas/testsuite/gas/macros/vararg.d | 2 +- gas/testsuite/gas/mcore/allinsn.d | 2 +- gas/testsuite/gas/microblaze/relax_size.elf | 4 +- gas/testsuite/gas/microblaze/relax_size2.elf | 4 +- gas/testsuite/gas/mips/branch-misc-3.d | 10 +- gas/testsuite/gas/mips/c0.d | 264 + gas/testsuite/gas/mips/c0.l | 257 + gas/testsuite/gas/mips/c0.s | 265 + gas/testsuite/gas/mips/c1.d | 266 + gas/testsuite/gas/mips/c1.s | 265 + gas/testsuite/gas/mips/c2.d | 264 + gas/testsuite/gas/mips/c2.l | 257 + gas/testsuite/gas/mips/c2.s | 265 + gas/testsuite/gas/mips/c3.d | 4 + gas/testsuite/gas/mips/c3.l | 257 + gas/testsuite/gas/mips/c3.s | 265 + gas/testsuite/gas/mips/cp0-names-r3900.d | 43 + gas/testsuite/gas/mips/cp0b.d | 5 + gas/testsuite/gas/mips/cp0b.l | 3 + gas/testsuite/gas/mips/cp0b.s | 13 + gas/testsuite/gas/mips/cp0bl.d | 4 + gas/testsuite/gas/mips/cp0bl.l | 3 + gas/testsuite/gas/mips/cp0bl.s | 14 + gas/testsuite/gas/mips/cp0c.d | 4 + gas/testsuite/gas/mips/cp0c.l | 65 + gas/testsuite/gas/mips/cp0c.s | 72 + gas/testsuite/gas/mips/cp0m.d | 4 + gas/testsuite/gas/mips/cp0m.l | 65 + gas/testsuite/gas/mips/cp0m.s | 72 + gas/testsuite/gas/mips/cp1-names-r3000.d | 8 +- gas/testsuite/gas/mips/cp1-names-r3900.d | 5 + gas/testsuite/gas/mips/cp1-names-r4000.d | 8 +- gas/testsuite/gas/mips/cp2-64.d | 72 + gas/testsuite/gas/mips/cp2-64.l | 65 + gas/testsuite/gas/mips/cp2-64.s | 72 + gas/testsuite/gas/mips/cp2.d | 136 + gas/testsuite/gas/mips/cp2.l | 129 + gas/testsuite/gas/mips/cp2.s | 138 + gas/testsuite/gas/mips/cp2b.d | 12 + gas/testsuite/gas/mips/cp2b.l | 3 + gas/testsuite/gas/mips/cp2b.s | 13 + gas/testsuite/gas/mips/cp2bl.d | 12 + gas/testsuite/gas/mips/cp2bl.l | 3 + gas/testsuite/gas/mips/cp2bl.s | 14 + gas/testsuite/gas/mips/cp2d.d | 72 + gas/testsuite/gas/mips/cp2d.l | 65 + gas/testsuite/gas/mips/cp2d.s | 71 + gas/testsuite/gas/mips/cp2m.d | 72 + gas/testsuite/gas/mips/cp2m.l | 65 + gas/testsuite/gas/mips/cp2m.s | 72 + gas/testsuite/gas/mips/cp3.d | 4 + gas/testsuite/gas/mips/cp3.l | 129 + gas/testsuite/gas/mips/cp3.s | 138 + gas/testsuite/gas/mips/cp3b.d | 4 + gas/testsuite/gas/mips/cp3b.l | 3 + gas/testsuite/gas/mips/cp3b.s | 13 + gas/testsuite/gas/mips/cp3bl.d | 4 + gas/testsuite/gas/mips/cp3bl.l | 3 + gas/testsuite/gas/mips/cp3bl.s | 14 + gas/testsuite/gas/mips/cp3d.d | 4 + gas/testsuite/gas/mips/cp3d.l | 65 + gas/testsuite/gas/mips/cp3d.s | 72 + gas/testsuite/gas/mips/cp3m.d | 4 + gas/testsuite/gas/mips/cp3m.l | 65 + gas/testsuite/gas/mips/cp3m.s | 72 + .../gas/mips/global-local-symtab-sort-n64t.d | 12 +- .../gas/mips/global-local-symtab-sort-o32t.d | 12 +- gas/testsuite/gas/mips/interaptiv-mr2(a)c0.d | 265 + gas/testsuite/gas/mips/interaptiv-mr2(a)c1.d | 5 + gas/testsuite/gas/mips/interaptiv-mr2(a)cp2-64.d | 5 + gas/testsuite/gas/mips/micromips-compact.d | 128 +- gas/testsuite/gas/mips/micromips-insn32.d | 128 +- gas/testsuite/gas/mips/micromips-noinsn32.d | 128 +- gas/testsuite/gas/mips/micromips-trap.d | 128 +- gas/testsuite/gas/mips/micromips.d | 128 +- gas/testsuite/gas/mips/micromips(a)cp2-64.d | 73 + gas/testsuite/gas/mips/micromips(a)cp2.d | 137 + gas/testsuite/gas/mips/micromips(a)cp2b.d | 14 + gas/testsuite/gas/mips/micromips(a)cp2bl.d | 18 + gas/testsuite/gas/mips/micromips(a)cp2d.d | 73 + gas/testsuite/gas/mips/micromips(a)cp2m.d | 73 + gas/testsuite/gas/mips/micromips(a)isa-override-1.d | 2 +- gas/testsuite/gas/mips/mips.exp | 45 + gas/testsuite/gas/mips/mips1(a)c0.d | 265 + gas/testsuite/gas/mips/mips1(a)c1.d | 265 + gas/testsuite/gas/mips/mips1(a)c3.d | 265 + gas/testsuite/gas/mips/mips1(a)cp0b.d | 13 + gas/testsuite/gas/mips/mips1(a)cp0c.d | 73 + gas/testsuite/gas/mips/mips1(a)cp0m.d | 73 + gas/testsuite/gas/mips/mips1(a)cp2-64.d | 5 + gas/testsuite/gas/mips/mips1(a)cp2bl.d | 5 + gas/testsuite/gas/mips/mips1(a)cp2d.d | 5 + gas/testsuite/gas/mips/mips1(a)cp3.d | 137 + gas/testsuite/gas/mips/mips1(a)cp3b.d | 13 + gas/testsuite/gas/mips/mips1(a)cp3m.d | 73 + gas/testsuite/gas/mips/mips1(a)rfe.d | 10 + gas/testsuite/gas/mips/mips2(a)c0.d | 5 + gas/testsuite/gas/mips/mips2(a)c1.d | 265 + gas/testsuite/gas/mips/mips2(a)c3.d | 5 + gas/testsuite/gas/mips/mips2(a)cp0b.d | 5 + gas/testsuite/gas/mips/mips2(a)cp0bl.d | 13 + gas/testsuite/gas/mips/mips2(a)cp0c.d | 5 + gas/testsuite/gas/mips/mips2(a)cp2-64.d | 5 + gas/testsuite/gas/mips/mips2(a)cp3.d | 5 + gas/testsuite/gas/mips/mips2(a)cp3b.d | 5 + gas/testsuite/gas/mips/mips2(a)cp3bl.d | 13 + gas/testsuite/gas/mips/mips2(a)cp3d.d | 73 + gas/testsuite/gas/mips/mips2(a)cp3m.d | 5 + gas/testsuite/gas/mips/mips2(a)rfe.d | 5 + gas/testsuite/gas/mips/mips32(a)c0.d | 265 + gas/testsuite/gas/mips/mips32(a)c1.d | 265 + gas/testsuite/gas/mips/mips32(a)c3.d | 5 + gas/testsuite/gas/mips/mips32(a)cp2-64.d | 5 + gas/testsuite/gas/mips/mips32(a)cp3.d | 5 + gas/testsuite/gas/mips/mips32(a)cp3b.d | 5 + gas/testsuite/gas/mips/mips32(a)cp3bl.d | 5 + gas/testsuite/gas/mips/mips32(a)isa-override-1.d | 47 +- gas/testsuite/gas/mips/mips32r2(a)cp2-64.d | 5 + gas/testsuite/gas/mips/mips32r2(a)isa-override-1.d | 2 +- gas/testsuite/gas/mips/mips32r3(a)cp2-64.d | 5 + gas/testsuite/gas/mips/mips32r5(a)cp2-64.d | 5 + gas/testsuite/gas/mips/mips32r6(a)cp2-64.d | 5 + gas/testsuite/gas/mips/mips3(a)c0.d | 265 + gas/testsuite/gas/mips/mips3(a)c1.d | 265 + gas/testsuite/gas/mips/mips3(a)cp0b.d | 5 + gas/testsuite/gas/mips/mips3(a)cp0bl.d | 5 + gas/testsuite/gas/mips/mips3(a)cp0c.d | 5 + gas/testsuite/gas/mips/mips4(a)c0.d | 5 + gas/testsuite/gas/mips/mips4(a)c1.d | 265 + gas/testsuite/gas/mips/mips4(a)cp0c.d | 5 + gas/testsuite/gas/mips/mips5(a)c0.d | 5 + gas/testsuite/gas/mips/mips5(a)c1.d | 265 + gas/testsuite/gas/mips/mips5(a)cp0c.d | 5 + gas/testsuite/gas/mips/mips64(a)c0.d | 5 + gas/testsuite/gas/mips/mips64(a)c1.d | 265 + gas/testsuite/gas/mips/mipsr6(a)c1.d | 266 + gas/testsuite/gas/mips/mipsr6(a)cp2b.d | 5 + gas/testsuite/gas/mips/mipsr6(a)cp2bl.d | 5 + gas/testsuite/gas/mips/mipsr6(a)cp2d.d | 73 + gas/testsuite/gas/mips/mipsr6(a)cp2m.d | 73 + gas/testsuite/gas/mips/octeon(a)c0.d | 5 + gas/testsuite/gas/mips/octeon(a)c1.d | 265 + gas/testsuite/gas/mips/octeon(a)c2.d | 5 + gas/testsuite/gas/mips/octeon(a)cp2.d | 5 + gas/testsuite/gas/mips/octeon(a)cp2b.d | 5 + gas/testsuite/gas/mips/octeon(a)cp2bl.d | 5 + gas/testsuite/gas/mips/octeon(a)cp2d.d | 5 + gas/testsuite/gas/mips/octeon(a)cp2m.d | 5 + gas/testsuite/gas/mips/r3000(a)c0.d | 5 + gas/testsuite/gas/mips/r3000(a)c1.d | 5 + gas/testsuite/gas/mips/r3000(a)c3.d | 5 + gas/testsuite/gas/mips/r3000(a)cp0b.d | 5 + gas/testsuite/gas/mips/r3000(a)cp0c.d | 5 + gas/testsuite/gas/mips/r3000(a)cp0m.d | 5 + gas/testsuite/gas/mips/r3000(a)cp2-64.d | 5 + gas/testsuite/gas/mips/r3000(a)cp2bl.d | 5 + gas/testsuite/gas/mips/r3000(a)cp2d.d | 5 + gas/testsuite/gas/mips/r3000(a)cp3.d | 5 + gas/testsuite/gas/mips/r3000(a)cp3b.d | 5 + gas/testsuite/gas/mips/r3000(a)cp3m.d | 5 + gas/testsuite/gas/mips/r3000(a)rfe.d | 5 + gas/testsuite/gas/mips/r3900(a)c0.d | 265 + gas/testsuite/gas/mips/r3900(a)c1.d | 5 + gas/testsuite/gas/mips/r3900(a)c3.d | 5 + gas/testsuite/gas/mips/r3900(a)cp0b.d | 5 + gas/testsuite/gas/mips/r3900(a)cp0bl.d | 5 + gas/testsuite/gas/mips/r3900(a)cp0c.d | 5 + gas/testsuite/gas/mips/r3900(a)cp0m.d | 73 + gas/testsuite/gas/mips/r3900(a)cp2-64.d | 5 + gas/testsuite/gas/mips/r3900(a)cp2d.d | 5 + gas/testsuite/gas/mips/r3900(a)cp3.d | 5 + gas/testsuite/gas/mips/r3900(a)cp3b.d | 5 + gas/testsuite/gas/mips/r3900(a)cp3bl.d | 5 + gas/testsuite/gas/mips/r3900(a)cp3m.d | 5 + gas/testsuite/gas/mips/r3900(a)rfe.d | 5 + gas/testsuite/gas/mips/r4000(a)c0.d | 5 + gas/testsuite/gas/mips/r4000(a)c1.d | 5 + gas/testsuite/gas/mips/r4000(a)cp0b.d | 5 + gas/testsuite/gas/mips/r4000(a)cp0bl.d | 5 + gas/testsuite/gas/mips/r4000(a)cp0c.d | 5 + gas/testsuite/gas/mips/r5900(a)c0.d | 265 + gas/testsuite/gas/mips/r5900(a)c1.d | 265 + gas/testsuite/gas/mips/r5900(a)c2.d | 265 + gas/testsuite/gas/mips/r5900(a)cp0b.d | 5 + gas/testsuite/gas/mips/r5900(a)cp0bl.d | 5 + gas/testsuite/gas/mips/r5900(a)cp0c.d | 5 + gas/testsuite/gas/mips/r5900(a)cp2d.d | 5 + gas/testsuite/gas/mips/r5900(a)cp2m.d | 5 + gas/testsuite/gas/mips/relax-swap1-mips1.d | 8 +- gas/testsuite/gas/mips/relax-swap1-mips2.d | 8 +- gas/testsuite/gas/mips/rfe.d | 4 + gas/testsuite/gas/mips/rfe.l | 2 + gas/testsuite/gas/mips/rfe.s | 8 + gas/testsuite/gas/mips/sb1(a)c0.d | 5 + gas/testsuite/gas/mips/sb1(a)c1.d | 5 + gas/testsuite/gas/mips/trunc.d | 16 +- gas/testsuite/gas/mips/vr5400(a)c0.d | 5 + gas/testsuite/gas/mips/vr5400(a)c1.d | 5 + gas/testsuite/gas/mips/vr5400(a)c2.d | 5 + gas/testsuite/gas/mips/vr5400(a)cp0c.d | 5 + gas/testsuite/gas/mips/vr5400(a)cp2b.d | 5 + gas/testsuite/gas/mips/vr5400(a)cp2bl.d | 5 + gas/testsuite/gas/mips/vr5400(a)cp2d.d | 5 + gas/testsuite/gas/mips/vr5400(a)cp2m.d | 5 + gas/testsuite/gas/mips/xlr(a)c0.d | 5 + gas/testsuite/gas/mips/xlr(a)c1.d | 5 + gas/testsuite/gas/mmix/bspec-1.d | 8 +- gas/testsuite/gas/mmix/byte-1.d | 6 +- gas/testsuite/gas/mmix/comment-1.d | 10 +- gas/testsuite/gas/mmix/loc-1.d | 6 +- gas/testsuite/gas/mmix/loc-2.d | 6 +- gas/testsuite/gas/mmix/loc-3.d | 6 +- gas/testsuite/gas/mmix/loc-4.d | 6 +- gas/testsuite/gas/mmix/loc-5.d | 6 +- gas/testsuite/gas/nios2/brn.d | 10 + gas/testsuite/gas/nios2/brn.s | 4 + gas/testsuite/gas/or1k/reloc-1.d | 4 +- gas/testsuite/gas/or1k/reloc-1.s | 4 + gas/testsuite/gas/pj/ops.d | 284 +- gas/testsuite/gas/pj/ops.s | 34 +- gas/testsuite/gas/ppc/a2.d | 8 +- gas/testsuite/gas/ppc/aix.exp | 8 + gas/testsuite/gas/ppc/dcbt.d | 2 +- gas/testsuite/gas/ppc/power4_32.d | 6 +- gas/testsuite/gas/ppc/power8.d | 8 +- gas/testsuite/gas/ppc/ppc.exp | 2 + gas/testsuite/gas/ppc/pr27676.d | 79 + gas/testsuite/gas/ppc/pr27676.s | 71 + gas/testsuite/gas/ppc/prefix-pcrel.d | 102 +- gas/testsuite/gas/ppc/prefix-pcrel.s | 11 + gas/testsuite/gas/ppc/prefix-reloc.d | 10 +- gas/testsuite/gas/ppc/raw.d | 62 + gas/testsuite/gas/ppc/raw.s | 52 + gas/testsuite/gas/ppc/vsx.d | 4 + gas/testsuite/gas/ppc/vsx.s | 4 + gas/testsuite/gas/ppc/vsx_32byte.d | 8 +- gas/testsuite/gas/ppc/xcoff-dwsect-2-32.d | 18 + gas/testsuite/gas/ppc/xcoff-dwsect-2-64.d | 18 + gas/testsuite/gas/ppc/xcoff-dwsect-2.s | 12 + gas/testsuite/gas/ppc/xcoff-function-1-32.d | 20 + gas/testsuite/gas/ppc/xcoff-function-1-64.d | 20 + gas/testsuite/gas/ppc/xcoff-function-1.s | 16 + gas/testsuite/gas/ppc/xcoff-tlsm-32.d | 34 + gas/testsuite/gas/ppc/xcoff-tlsm-64.d | 36 + gas/testsuite/gas/ppc/xcoff-tlsm.s | 12 + gas/testsuite/gas/riscv/a-ext-64.d | 186 + gas/testsuite/gas/riscv/a-ext-64.s | 177 + gas/testsuite/gas/riscv/a-ext.d | 98 + gas/testsuite/gas/riscv/a-ext.s | 89 + gas/testsuite/gas/riscv/b-ext-64.d | 48 + gas/testsuite/gas/riscv/b-ext-64.s | 39 + gas/testsuite/gas/riscv/b-ext.d | 35 + gas/testsuite/gas/riscv/b-ext.s | 26 + gas/testsuite/gas/riscv/c-zero-imm.d | 16 +- gas/testsuite/gas/riscv/c-zero-imm.s | 2 +- gas/testsuite/gas/riscv/insn.d | 26 +- gas/testsuite/gas/riscv/insn.s | 24 +- gas/testsuite/gas/riscv/mabi-attr-rv32e.s | 1 + .../riscv/{mabi-attr-01.s => mabi-attr-rv32i.s} | 0 .../riscv/{mabi-attr-02.s => mabi-attr-rv32id.s} | 0 .../riscv/{mabi-attr-03.s => mabi-attr-rv64iq.s} | 0 gas/testsuite/gas/riscv/mabi-fail-01.d | 3 - gas/testsuite/gas/riscv/mabi-fail-02.d | 3 - gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64d.d | 3 + gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64d.l | 4 + gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64f.d | 3 + gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64f.l | 4 + gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64q.d | 3 + gas/testsuite/gas/riscv/mabi-fail-rv32e-lp64q.l | 4 + gas/testsuite/gas/riscv/mabi-fail-rv32i-lp64.d | 3 + .../{mabi-fail-01.l => mabi-fail-rv32i-lp64.l} | 0 gas/testsuite/gas/riscv/mabi-fail-rv64iq-ilp32.d | 3 + .../{mabi-fail-02.l => mabi-fail-rv64iq-ilp32.l} | 0 gas/testsuite/gas/riscv/mabi-noabi-attr-01a.d | 10 - gas/testsuite/gas/riscv/mabi-noabi-attr-01b.d | 12 - gas/testsuite/gas/riscv/mabi-noabi-attr-02a.d | 10 - gas/testsuite/gas/riscv/mabi-noabi-attr-02b.d | 12 - gas/testsuite/gas/riscv/mabi-noabi-attr-03a.d | 10 - gas/testsuite/gas/riscv/mabi-noabi-attr-03b.d | 12 - gas/testsuite/gas/riscv/mabi-noabi-attr-rv32i-01.d | 10 + gas/testsuite/gas/riscv/mabi-noabi-attr-rv32i-02.d | 12 + .../gas/riscv/mabi-noabi-attr-rv32id-01.d | 10 + .../gas/riscv/mabi-noabi-attr-rv32id-02.d | 12 + .../gas/riscv/mabi-noabi-attr-rv64iq-01.d | 10 + .../gas/riscv/mabi-noabi-attr-rv64iq-02.d | 12 + gas/testsuite/gas/riscv/mabi-noabi-march-02.d | 10 - gas/testsuite/gas/riscv/mabi-noabi-march-03.d | 10 - ...i-noabi-march-01.d => mabi-noabi-march-rv32i.d} | 0 gas/testsuite/gas/riscv/mabi-noabi-march-rv32id.d | 10 + gas/testsuite/gas/riscv/mabi-noabi-march-rv64iq.d | 10 + gas/testsuite/gas/riscv/march-fail-order-x-std.d | 3 + gas/testsuite/gas/riscv/march-fail-order-x-z.d | 3 + gas/testsuite/gas/riscv/march-fail-order-x-z.l | 2 + gas/testsuite/gas/riscv/march-fail-order-x.l | 2 +- gas/testsuite/gas/riscv/march-fail-order-z-std.d | 3 + gas/testsuite/gas/riscv/march-fail-order-z.l | 2 +- gas/testsuite/gas/riscv/march-fail-order-zx-std.l | 2 + gas/testsuite/gas/riscv/march-fail-porder-x-std.d | 3 - gas/testsuite/gas/riscv/march-fail-porder-x-z.d | 3 - gas/testsuite/gas/riscv/march-fail-porder-z-std.d | 3 - gas/testsuite/gas/riscv/march-fail-porder.l | 2 - gas/testsuite/gas/riscv/march-fail-single-char-h.d | 3 - gas/testsuite/gas/riscv/march-fail-single-char-s.d | 3 - gas/testsuite/gas/riscv/march-fail-single-char-x.d | 3 - gas/testsuite/gas/riscv/march-fail-single-char-z.d | 3 - gas/testsuite/gas/riscv/march-fail-single-char.l | 2 - .../gas/riscv/march-fail-single-prefix-h.d | 3 + .../gas/riscv/march-fail-single-prefix-s.d | 3 + .../gas/riscv/march-fail-single-prefix-x.d | 3 + .../gas/riscv/march-fail-single-prefix-z.d | 3 + .../gas/riscv/march-fail-single-prefix-zxm.d | 3 + gas/testsuite/gas/riscv/march-fail-single-prefix.l | 2 + gas/testsuite/gas/riscv/march-fail-unknown-std.l | 2 +- gas/testsuite/gas/riscv/march-fail-unknown-zxm.d | 3 + gas/testsuite/gas/riscv/march-fail-unknown.l | 2 +- gas/testsuite/gas/riscv/priv-reg-fail-fext.l | 6 +- .../gas/riscv/priv-reg-fail-read-only-01.l | 136 +- .../gas/riscv/priv-reg-fail-read-only-02.l | 48 +- gas/testsuite/gas/riscv/priv-reg-fail-rv32-only.l | 130 +- .../gas/riscv/priv-reg-fail-version-1p10.l | 48 +- .../gas/riscv/priv-reg-fail-version-1p11.l | 46 +- .../gas/riscv/priv-reg-fail-version-1p9p1.l | 54 +- gas/testsuite/gas/riscv/shamt-32.d | 3 + gas/testsuite/gas/riscv/shamt-32.l | 13 + gas/testsuite/gas/riscv/shamt-32.s | 31 + gas/testsuite/gas/riscv/shamt-64.d | 3 + gas/testsuite/gas/riscv/shamt-64.l | 7 + gas/testsuite/gas/riscv/shamt-64.s | 46 + gas/testsuite/gas/s390/zarch-arch14.d | 3 +- gas/testsuite/gas/s390/zarch-arch14.s | 3 +- gas/testsuite/gas/tic6x/scomm-directive-4.d | 8 +- gas/testsuite/gas/xgate/insns-dwarf2.d | 2 +- gas/testsuite/gas/z80/ez80_adl_suf.d | 2 +- gas/testsuite/gas/z80/ez80_isuf.s | 380 +- gas/testsuite/gas/z80/ez80_z80_suf.d | 2 +- gas/testsuite/gas/z80/ill_ops.d | 3 + gas/testsuite/gas/z80/ill_ops.l | 39 + gas/testsuite/gas/z80/ill_ops.s | 42 + gas/testsuite/gas/z80/z80_reloc.d | 5 + gas/testsuite/gas/z80/z80_reloc.s | 7 +- gas/write.c | 39 +- gdb/.dir-locals.el | 5 +- gdb/.flake8 | 2 + gdb/ChangeLog | 7315 +++- gdb/MAINTAINERS | 13 +- gdb/Makefile.in | 85 +- gdb/NEWS | 207 + gdb/aarch64-linux-nat.c | 130 +- gdb/aarch64-linux-tdep.c | 416 +- gdb/aarch64-linux-tdep.h | 3 + gdb/aarch64-tdep.c | 219 +- gdb/aarch64-tdep.h | 12 +- gdb/acinclude.m4 | 47 +- gdb/aclocal.m4 | 12 + gdb/ada-exp.h | 729 + gdb/ada-exp.y | 830 +- gdb/ada-lang.c | 4082 +-- gdb/ada-lang.h | 64 +- gdb/ada-tasks.c | 6 +- gdb/ada-typeprint.c | 58 +- gdb/ada-valprint.c | 42 +- gdb/addrmap.c | 34 +- gdb/addrmap.h | 18 +- gdb/agent.c | 3 +- gdb/aix-thread.c | 27 +- gdb/alpha-mdebug-tdep.c | 8 +- gdb/alpha-tdep.c | 16 +- gdb/amd64-fbsd-tdep.c | 2 +- gdb/amd64-linux-tdep.c | 43 +- gdb/amd64-obsd-tdep.c | 6 +- gdb/amd64-tdep.c | 33 +- gdb/amd64-windows-tdep.c | 94 +- gdb/annotate.c | 8 +- gdb/arc-linux-nat.c | 16 +- gdb/arc-linux-tdep.c | 124 +- gdb/arc-newlib-tdep.c | 11 +- gdb/arc-tdep.c | 183 +- gdb/arc-tdep.h | 7 +- gdb/arch-utils.c | 107 +- gdb/arch-utils.h | 28 +- gdb/arch/aarch64-insn.c | 9 +- gdb/arch/aarch64-insn.h | 14 + gdb/arch/aarch64-mte-linux.c | 77 + gdb/arch/aarch64-mte-linux.h | 74 + gdb/arch/aarch64.c | 7 +- gdb/arch/aarch64.h | 7 +- gdb/arch/riscv.c | 6 + gdb/arch/riscv.h | 12 +- gdb/arm-fbsd-tdep.c | 4 +- gdb/arm-linux-nat.c | 4 +- gdb/arm-linux-tdep.c | 47 +- gdb/arm-none-tdep.c | 213 + gdb/arm-symbian-tdep.c | 132 - gdb/arm-tdep.c | 165 +- gdb/async-event.c | 9 +- gdb/async-event.h | 12 + gdb/auto-load.c | 237 +- gdb/auto-load.h | 35 +- gdb/auxv.c | 12 +- gdb/avr-tdep.c | 15 +- gdb/ax-gdb.c | 1144 +- gdb/ax-gdb.h | 1 - gdb/bfd-target.c | 14 +- gdb/bfd-target.h | 9 +- gdb/bfin-tdep.c | 3 +- gdb/bpf-tdep.c | 3 +- gdb/break-catch-sig.c | 5 +- gdb/break-catch-syscall.c | 8 +- gdb/break-catch-throw.c | 9 +- gdb/breakpoint.c | 2208 +- gdb/breakpoint.h | 84 +- gdb/bsd-kvm.c | 6 +- gdb/bsd-uthread.c | 13 +- gdb/btrace.c | 12 +- gdb/c-exp.h | 220 + gdb/c-exp.y | 720 +- gdb/c-lang.c | 347 +- gdb/c-lang.h | 27 +- gdb/c-typeprint.c | 25 +- gdb/c-valprint.c | 8 +- gdb/cli/cli-cmds.c | 132 +- gdb/cli/cli-decode.c | 519 +- gdb/cli/cli-decode.h | 402 +- gdb/cli/cli-dump.c | 25 +- gdb/cli/cli-interp.c | 28 +- gdb/cli/cli-logging.c | 4 +- gdb/cli/cli-script.c | 132 +- gdb/cli/cli-script.h | 3 + gdb/cli/cli-setshow.c | 34 +- gdb/cli/cli-style.c | 97 +- gdb/cli/cli-style.h | 9 +- gdb/coff-pe-read.c | 2 +- gdb/coffread.c | 39 +- gdb/command.h | 269 +- gdb/compile/compile-c-support.c | 16 +- gdb/compile/compile-c-symbols.c | 13 +- gdb/compile/compile-c-types.c | 12 +- gdb/compile/compile-c.h | 2 +- gdb/compile/compile-cplus-types.c | 12 +- gdb/compile/compile-internal.h | 3 +- gdb/compile/compile-loc2c.c | 30 +- gdb/compile/compile.c | 37 +- gdb/compile/compile.h | 4 +- gdb/completer.c | 49 +- gdb/config.in | 16 +- gdb/configure | 252 +- gdb/configure.ac | 82 +- gdb/configure.nat | 3 +- gdb/configure.tgt | 13 +- gdb/continuations.c | 134 - gdb/continuations.h | 55 - gdb/contrib/cc-with-tweaks.sh | 46 +- gdb/contrib/gdb-add-index.sh | 53 +- gdb/contrib/test_pubnames_and_indexes.py | 303 +- gdb/copyright.py | 291 +- gdb/corefile.c | 18 +- gdb/corelow.c | 42 +- gdb/cp-name-parser.y | 68 +- gdb/cp-support.c | 27 +- gdb/cp-valprint.c | 12 +- gdb/cris-tdep.c | 16 +- gdb/csky-tdep.c | 6 +- gdb/ctfread.c | 320 +- gdb/d-exp.y | 308 +- gdb/d-lang.c | 48 - gdb/darwin-nat.c | 6 +- gdb/data-directory/Makefile.in | 2 +- gdb/dbxread.c | 100 +- gdb/dcache.c | 5 +- gdb/debuginfod-support.c | 32 +- gdb/debuginfod-support.h | 2 + gdb/disasm.c | 11 +- gdb/doc/ChangeLog | 298 + gdb/doc/gdb.texinfo | 1364 +- gdb/doc/guile.texi | 24 +- gdb/doc/python.texi | 165 +- gdb/dtrace-probe.c | 18 +- gdb/dummy-frame.c | 13 +- gdb/dwarf2/abbrev.c | 97 +- gdb/dwarf2/abbrev.h | 44 +- gdb/dwarf2/attribute.c | 16 +- gdb/dwarf2/attribute.h | 28 +- gdb/dwarf2/comp-unit-head.c | 246 + gdb/dwarf2/comp-unit-head.h | 121 + gdb/dwarf2/comp-unit.c | 272 - gdb/dwarf2/comp-unit.h | 122 - gdb/dwarf2/cu.c | 155 + gdb/dwarf2/cu.h | 278 + gdb/dwarf2/die.h | 36 +- gdb/dwarf2/dwz.c | 242 + gdb/dwarf2/dwz.h | 11 + gdb/dwarf2/frame-tailcall.c | 1 + gdb/dwarf2/frame.c | 3 + gdb/dwarf2/index-cache.c | 4 +- gdb/dwarf2/index-common.h | 21 +- gdb/dwarf2/index-write.c | 163 +- gdb/dwarf2/index-write.h | 2 +- gdb/dwarf2/line-header.c | 2 +- gdb/dwarf2/loc.c | 72 +- gdb/dwarf2/loc.h | 3 +- gdb/dwarf2/macro.c | 6 +- gdb/dwarf2/public.h | 46 + gdb/dwarf2/read.c | 3882 +-- gdb/dwarf2/read.h | 547 +- gdb/dwarf2/sect-names.h | 78 + gdb/dwarf2/section.c | 12 +- gdb/dwarf2/stringify.c | 13 + gdb/dwarf2/stringify.h | 3 + gdb/elf-none-tdep.c | 126 + gdb/elf-none-tdep.h | 30 + gdb/elfread.c | 116 +- gdb/eval.c | 4040 ++- gdb/event-top.c | 24 +- gdb/event-top.h | 19 +- gdb/exec.c | 67 +- gdb/exec.h | 2 +- gdb/expop.h | 2188 ++ gdb/expprint.c | 1171 +- gdb/expression.h | 193 +- gdb/extension-priv.h | 11 +- gdb/extension.c | 45 +- gdb/extension.h | 7 +- gdb/f-array-walker.h | 4 +- gdb/f-exp.h | 294 + gdb/f-exp.y | 514 +- gdb/f-lang.c | 1372 +- gdb/f-lang.h | 19 - gdb/f-typeprint.c | 7 +- gdb/f-valprint.c | 7 +- gdb/fbsd-nat.c | 137 +- gdb/fbsd-nat.h | 7 +- gdb/fbsd-tdep.c | 411 +- gdb/features/Makefile | 1 + gdb/features/aarch64-fpu.c | 5 + gdb/features/aarch64-fpu.xml | 2 + gdb/features/aarch64-mte.c | 14 + gdb/features/aarch64-mte.xml | 11 + gdb/findvar.c | 22 +- gdb/frame-unwind.c | 12 +- gdb/frame-unwind.h | 1 + gdb/frame.c | 431 +- gdb/frame.h | 37 +- gdb/frv-linux-tdep.c | 15 +- gdb/frv-tdep.c | 3 +- gdb/ft32-tdep.c | 1 + gdb/gcore-elf.c | 166 + gdb/gcore-elf.h | 47 + gdb/gcore.c | 32 +- gdb/gcore.h | 9 + gdb/gdb-gdb.py.in | 160 +- gdb/gdb_bfd.c | 70 +- gdb/gdb_regex.h | 6 - gdb/gdbarch.c | 150 +- gdb/gdbarch.h | 94 +- gdb/gdbarch.sh | 78 +- gdb/gdbcmd.h | 9 +- gdb/gdbthread.h | 4 - gdb/gdbtypes.c | 170 +- gdb/gdbtypes.h | 156 +- gdb/gnu-nat.c | 75 +- gdb/gnu-nat.h | 4 +- gdb/gnu-v2-abi.c | 2 +- gdb/gnu-v3-abi.c | 27 +- gdb/go-exp.y | 238 +- gdb/go-lang.c | 46 - gdb/go-lang.h | 16 - gdb/go-valprint.c | 2 +- gdb/go32-nat.c | 132 +- gdb/guile/guile-internal.h | 8 +- gdb/guile/guile.c | 153 +- gdb/guile/scm-arch.c | 5 + gdb/guile/scm-auto-load.c | 5 +- gdb/guile/scm-block.c | 5 + gdb/guile/scm-breakpoint.c | 48 +- gdb/guile/scm-cmd.c | 12 +- gdb/guile/scm-frame.c | 16 +- gdb/guile/scm-objfile.c | 14 +- gdb/guile/scm-param.c | 158 +- gdb/guile/scm-pretty-print.c | 30 +- gdb/guile/scm-progspace.c | 5 + gdb/guile/scm-safe-call.c | 4 +- gdb/guile/scm-symbol.c | 5 + gdb/guile/scm-symtab.c | 5 + gdb/guile/scm-type.c | 27 +- gdb/guile/scm-value.c | 70 +- gdb/h8300-tdep.c | 1 + gdb/hppa-bsd-tdep.c | 4 +- gdb/hppa-linux-tdep.c | 7 +- gdb/hppa-tdep.c | 41 +- gdb/i386-darwin-nat.c | 3 +- gdb/i386-fbsd-nat.c | 16 +- gdb/i386-fbsd-tdep.c | 16 +- gdb/i386-gnu-tdep.c | 2 +- gdb/i386-linux-tdep.c | 10 +- gdb/i386-linux-tdep.h | 2 +- gdb/i386-netbsd-tdep.c | 2 +- gdb/i386-obsd-tdep.c | 3 +- gdb/i386-tdep.c | 272 +- gdb/i386-tdep.h | 5 +- gdb/i387-tdep.c | 6 +- gdb/ia64-tdep.c | 28 +- gdb/ia64-vms-tdep.c | 3 +- gdb/inf-child.c | 22 +- gdb/inf-child.h | 3 + gdb/inf-loop.c | 3 +- gdb/inf-ptrace.c | 33 +- gdb/infcall.c | 15 +- gdb/infcmd.c | 213 +- gdb/inferior.c | 88 +- gdb/inferior.h | 33 +- gdb/inflow.c | 6 +- gdb/inflow.h | 56 - gdb/infrun.c | 1154 +- gdb/infrun.h | 104 +- gdb/inline-frame.c | 1 + gdb/interps.c | 1 - gdb/iq2000-tdep.c | 1 + gdb/jit.c | 99 +- gdb/language.c | 74 +- gdb/language.h | 45 +- gdb/linespec.c | 39 +- gdb/linux-nat.c | 350 +- gdb/linux-nat.h | 9 +- gdb/linux-tdep.c | 560 +- gdb/linux-tdep.h | 4 + gdb/linux-thread-db.c | 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gdb/sparc64-tdep.c | 16 +- gdb/stabsread.c | 4 +- gdb/stabsread.h | 3 +- gdb/stack.c | 77 +- gdb/stap-probe.c | 220 +- gdb/std-operator.def | 71 +- gdb/stubs/sh-stub.c | 10 +- gdb/stubs/sparc-stub.c | 2 +- gdb/symfile-debug.c | 625 +- gdb/symfile-mem.c | 2 +- gdb/symfile.c | 98 +- gdb/symfile.h | 313 +- gdb/symmisc.c | 110 +- gdb/symtab.c | 749 +- gdb/symtab.h | 98 +- gdb/syscalls/arm-linux.py | 29 +- gdb/syscalls/update-netbsd.sh | 4 +- gdb/system-gdbinit/elinos.py | 5 +- gdb/system-gdbinit/wrs-linux.py | 4 +- gdb/target-connection.c | 2 +- gdb/target-debug.h | 26 +- gdb/target-delegates.c | 198 +- gdb/target-descriptions.c | 110 +- gdb/target-float.c | 10 +- gdb/target-memory.c | 5 +- gdb/target.c | 1016 +- gdb/target.h | 461 +- gdb/testsuite/ChangeLog | 1889 ++ gdb/testsuite/Makefile.in | 85 +- gdb/testsuite/README | 11 +- gdb/testsuite/aclocal.m4 | 37 - gdb/testsuite/analyze-racy-logs.py | 100 +- gdb/testsuite/boards/cc-with-gnu-debuglink.exp | 26 + gdb/testsuite/boards/simavr.exp | 4 + gdb/testsuite/configure | 4806 --- gdb/testsuite/configure.ac | 99 - gdb/testsuite/gdb.ada/array_of_symbolic_length.exp | 59 + .../gdb.ada/array_of_symbolic_length/foo.adb | 25 + .../gdb.ada/array_of_symbolic_length/gl.adb | 23 + .../gdb.ada/array_of_symbolic_length/gl.ads | 18 + .../gdb.ada/array_of_symbolic_length/pck.adb | 23 + .../gdb.ada/array_of_symbolic_length/pck.ads | 43 + gdb/testsuite/gdb.ada/assign_arr.exp | 7 + gdb/testsuite/gdb.ada/assign_arr/main_p324_051.adb | 2 + .../gdb.ada/assign_arr/target_wrapper.adb | 28 + .../gdb.ada/assign_arr/target_wrapper.ads | 8 + gdb/testsuite/gdb.ada/catch_ex_std.exp | 3 +- gdb/testsuite/gdb.ada/enum_idx_packed.exp | 3 + gdb/testsuite/gdb.ada/enum_idx_packed/foo.adb | 4 + gdb/testsuite/gdb.ada/enum_idx_packed/pck.ads | 5 + gdb/testsuite/gdb.ada/enums_overload.exp | 37 + .../gdb.ada/enums_overload/enums_overload.adb | 38 + .../gdb.ada/enums_overload/enums_overload.ads | 24 + .../gdb.ada/enums_overload/enums_overload_main.adb | 20 + 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gdb/testsuite/gdb.arch/amd64-osabi.exp | 6 +- gdb/testsuite/gdb.arch/amd64-stap-expressions.S | 43 + gdb/testsuite/gdb.arch/amd64-stap-expressions.exp | 68 + gdb/testsuite/gdb.arch/amd64-stap-three-arg-disp.S | 5 +- .../gdb.arch/arc-disassembler-options.exp | 45 + gdb/testsuite/gdb.arch/arc-disassembler-options.s | 21 + gdb/testsuite/gdb.arch/i386-biarch-core.exp | 5 + gdb/testsuite/gdb.arch/i386-gnu-cfi.exp | 26 +- gdb/testsuite/gdb.arch/i386-mpx-call.c | 78 +- gdb/testsuite/gdb.arch/i386-mpx-call.exp | 17 +- gdb/testsuite/gdb.arch/i386-mpx-map.c | 45 +- gdb/testsuite/gdb.arch/i386-mpx-map.exp | 23 +- gdb/testsuite/gdb.arch/i386-mpx-sigsegv.c | 80 +- gdb/testsuite/gdb.arch/i386-mpx-sigsegv.exp | 15 +- gdb/testsuite/gdb.arch/i386-mpx-simple_segv.c | 40 +- gdb/testsuite/gdb.arch/i386-mpx-simple_segv.exp | 15 +- gdb/testsuite/gdb.arch/i386-mpx.c | 100 +- gdb/testsuite/gdb.arch/i386-mpx.exp | 22 +- gdb/testsuite/gdb.arch/i386-sse-stack-align.S | 40 +- gdb/testsuite/gdb.arch/i386-sse-stack-align.c | 13 +- gdb/testsuite/gdb.arch/i386-sse-stack-align.exp | 2 +- gdb/testsuite/gdb.arch/insn-reloc.c | 81 + gdb/testsuite/gdb.arch/powerpc-addpcis.exp | 105 + gdb/testsuite/gdb.arch/powerpc-addpcis.s | 35 + .../gdb.arch/powerpc-disassembler-options.exp | 4 +- gdb/testsuite/gdb.arch/powerpc-fpscr-gcore.exp | 4 +- gdb/testsuite/gdb.arch/powerpc-lnia.exp | 101 + gdb/testsuite/gdb.arch/powerpc-lnia.s | 33 + gdb/testsuite/gdb.arch/powerpc-plxv-nonrel.exp | 131 + gdb/testsuite/gdb.arch/powerpc-plxv-nonrel.s | 45 + gdb/testsuite/gdb.arch/powerpc-power10.exp | 686 + gdb/testsuite/gdb.arch/powerpc-power10.s | 639 + gdb/testsuite/gdb.arch/powerpc-power8.exp | 4 +- gdb/testsuite/gdb.arch/powerpc-power8.s | 4 +- gdb/testsuite/gdb.arch/powerpc64-prologue.c | 92 + gdb/testsuite/gdb.arch/powerpc64-prologue.exp | 82 + gdb/testsuite/gdb.arch/riscv-default-tdesc.exp | 59 + gdb/testsuite/gdb.arch/vsx-regs.exp | 13 +- gdb/testsuite/gdb.arch/vsx-vsr-float28.c | 31 + gdb/testsuite/gdb.arch/vsx-vsr-float28.exp | 90 + gdb/testsuite/gdb.base/access-mem-running.c | 47 + gdb/testsuite/gdb.base/access-mem-running.exp | 124 + gdb/testsuite/gdb.base/address_space_qualifier.exp | 35 + gdb/testsuite/gdb.base/annota1.exp | 9 +- gdb/testsuite/gdb.base/args.exp | 71 +- gdb/testsuite/gdb.base/argv0-symlink.exp | 119 +- gdb/testsuite/gdb.base/attach.exp | 50 +- .../gdb.base/batch-preserve-term-settings.exp | 12 +- gdb/testsuite/gdb.base/bitfields.exp | 137 +- gdb/testsuite/gdb.base/bitfields2.exp | 81 +- gdb/testsuite/gdb.base/break.exp | 23 +- gdb/testsuite/gdb.base/call-sc.exp | 2 +- gdb/testsuite/gdb.base/callfuncs.exp | 2 +- gdb/testsuite/gdb.base/cast-call.c | 37 + gdb/testsuite/gdb.base/cast-call.exp | 38 + gdb/testsuite/gdb.base/catch-syscall.exp | 3 + gdb/testsuite/gdb.base/complex-parts.exp | 11 + .../gdb.base/continue-all-already-running.exp | 1 + gdb/testsuite/gdb.base/ctf-ptype.c | 12 + gdb/testsuite/gdb.base/ctf-ptype.exp | 21 +- gdb/testsuite/gdb.base/debug-expr.exp | 4 +- gdb/testsuite/gdb.base/dfp-test.exp | 48 +- gdb/testsuite/gdb.base/disasm-optim.exp | 2 +- gdb/testsuite/gdb.base/dump.exp | 10 + gdb/testsuite/gdb.base/dup-sect.exp | 1 - gdb/testsuite/gdb.base/early-init-file.c | 22 + gdb/testsuite/gdb.base/early-init-file.exp | 148 + gdb/testsuite/gdb.base/endian.exp | 36 +- gdb/testsuite/gdb.base/ending-run.exp | 4 - .../gdb.base/execl-update-breakpoints.exp | 1 + gdb/testsuite/gdb.base/exprs.exp | 9 +- gdb/testsuite/gdb.base/foll-exec-mode.exp | 14 +- gdb/testsuite/gdb.base/foll-exec.c | 19 +- .../gdb.base/fork-print-inferior-events.exp | 3 +- gdb/testsuite/gdb.base/funcargs.exp | 156 +- gdb/testsuite/gdb.base/gdb-sigterm.exp | 2 +- gdb/testsuite/gdb.base/gdbinit-history.exp | 6 +- gdb/testsuite/gdb.base/gnu-ifunc.exp | 4 + gdb/testsuite/gdb.base/hbreak2.exp | 27 +- gdb/testsuite/gdb.base/index-cache-load-twice.c | 22 - gdb/testsuite/gdb.base/index-cache-load-twice.exp | 42 - gdb/testsuite/gdb.base/index-cache.exp | 11 + gdb/testsuite/gdb.base/inferior-noarg.c | 22 + gdb/testsuite/gdb.base/inferior-noarg.exp | 36 + gdb/testsuite/gdb.base/info-macros.exp | 31 +- gdb/testsuite/gdb.base/info-types.exp.tcl | 48 +- gdb/testsuite/gdb.base/info_sources.exp | 17 +- gdb/testsuite/gdb.base/info_sources_2-header.h | 28 + gdb/testsuite/gdb.base/info_sources_2-lib.c | 25 + gdb/testsuite/gdb.base/info_sources_2-test.c | 26 + gdb/testsuite/gdb.base/info_sources_2.exp | 169 + gdb/testsuite/gdb.base/jit-reader.exp | 4 +- gdb/testsuite/gdb.base/line65535.exp | 2 +- gdb/testsuite/gdb.base/long_long.exp | 3 +- gdb/testsuite/gdb.base/macscp.exp | 4 +- gdb/testsuite/gdb.base/maint-info-sections.exp | 248 + gdb/testsuite/gdb.base/maint.exp | 92 +- gdb/testsuite/gdb.base/memtag.c | 22 + gdb/testsuite/gdb.base/memtag.exp | 66 + gdb/testsuite/gdb.base/new-ui-pending-input.exp | 2 +- gdb/testsuite/gdb.base/options.exp | 1 + .../gdb.base/premature-dummy-frame-removal.c | 65 + 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gdb/testsuite/gdb.base/watch_thread_num.exp | 20 +- gdb/testsuite/gdb.base/with.exp | 2 +- gdb/testsuite/gdb.btrace/delta.exp | 9 +- gdb/testsuite/gdb.btrace/exception.cc | 6 +- gdb/testsuite/gdb.btrace/exception.exp | 26 +- gdb/testsuite/gdb.btrace/function_call_history.exp | 20 +- gdb/testsuite/gdb.btrace/non-stop.exp | 4 +- gdb/testsuite/gdb.btrace/reconnect.exp | 2 +- gdb/testsuite/gdb.btrace/rn-dl-bind.exp | 31 +- gdb/testsuite/gdb.btrace/stepi.exp | 2 +- gdb/testsuite/gdb.btrace/unknown_functions.exp | 2 +- gdb/testsuite/gdb.cp/breakpoint.exp | 8 +- gdb/testsuite/gdb.cp/casts.exp | 6 +- gdb/testsuite/gdb.cp/cold-clone.cc | 54 + gdb/testsuite/gdb.cp/cold-clone.exp | 30 + gdb/testsuite/gdb.cp/cplusfuncs.exp | 13 +- gdb/testsuite/gdb.cp/filename.exp | 6 +- gdb/testsuite/gdb.cp/gdb2384.cc | 4 +- gdb/testsuite/gdb.cp/gdb2384.exp | 20 +- gdb/testsuite/gdb.cp/gdb2495.exp | 6 +- gdb/testsuite/gdb.cp/maint.exp | 31 +- gdb/testsuite/gdb.cp/mb-ctor.exp | 4 +- gdb/testsuite/gdb.cp/method-call-in-c.cc | 61 + gdb/testsuite/gdb.cp/method-call-in-c.exp | 50 + gdb/testsuite/gdb.cp/misc.exp | 12 +- gdb/testsuite/gdb.cp/nested-types.exp | 11 +- gdb/testsuite/gdb.cp/nsnested.exp | 9 +- gdb/testsuite/gdb.cp/nsusing.exp | 133 +- gdb/testsuite/gdb.cp/ovldbreak.exp | 6 +- gdb/testsuite/gdb.cp/pr17494.exp | 2 +- gdb/testsuite/gdb.cp/ref-types.exp | 2 +- gdb/testsuite/gdb.cp/rvalue-ref-params.cc | 19 + gdb/testsuite/gdb.cp/rvalue-ref-params.exp | 9 + gdb/testsuite/gdb.cp/temargs.exp | 2 +- gdb/testsuite/gdb.ctf/funcreturn.exp | 190 + gdb/testsuite/gdb.ctf/whatis.c | 339 + gdb/testsuite/gdb.dwarf2/arr-stride.exp | 33 +- gdb/testsuite/gdb.dwarf2/clang-debug-names.exp | 16 + gdb/testsuite/gdb.dwarf2/dw2-bfloat16.exp | 82 + gdb/testsuite/gdb.dwarf2/dw2-cu-size.S | 3 + gdb/testsuite/gdb.dwarf2/dw2-dummy-cu.exp | 6 +- gdb/testsuite/gdb.dwarf2/dw2-filename.exp | 2 +- .../gdb.dwarf2/dw2-inline-with-lexical-scope.c | 52 + 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gdb/testsuite/gdb.dwarf2/fission-loclists-pie.S | 4 +- gdb/testsuite/gdb.dwarf2/fission-loclists-pie.exp | 18 +- gdb/testsuite/gdb.dwarf2/fission-loclists.S | 5 +- gdb/testsuite/gdb.dwarf2/fission-loclists.exp | 17 +- gdb/testsuite/gdb.dwarf2/fission-multi-cu.S | 360 - gdb/testsuite/gdb.dwarf2/fission-multi-cu.c | 41 + gdb/testsuite/gdb.dwarf2/fission-multi-cu.exp | 201 +- gdb/testsuite/gdb.dwarf2/fission-multi-cu1.c | 22 - gdb/testsuite/gdb.dwarf2/fission-multi-cu2.c | 24 - gdb/testsuite/gdb.dwarf2/fission-relative-dwo.c | 28 + gdb/testsuite/gdb.dwarf2/fission-relative-dwo.exp | 130 + gdb/testsuite/gdb.dwarf2/fission-reread.S | 7 +- gdb/testsuite/gdb.dwarf2/fission-reread.exp | 41 +- gdb/testsuite/gdb.dwarf2/gdb-add-index-symlink.exp | 47 + gdb/testsuite/gdb.dwarf2/gdb-index-nodebug.exp | 28 + gdb/testsuite/gdb.dwarf2/gdb-index.exp | 5 +- gdb/testsuite/gdb.dwarf2/imported-unit-bp-alt.c | 50 + gdb/testsuite/gdb.dwarf2/imported-unit-bp-main.c | 24 + gdb/testsuite/gdb.dwarf2/imported-unit-bp.exp | 128 + gdb/testsuite/gdb.dwarf2/imported-unit-c.exp | 110 + gdb/testsuite/gdb.dwarf2/loclists-multiple-cus.c | 37 + gdb/testsuite/gdb.dwarf2/loclists-multiple-cus.exp | 146 + gdb/testsuite/gdb.dwarf2/loclists-sec-offset.c | 69 + gdb/testsuite/gdb.dwarf2/loclists-sec-offset.exp | 261 + gdb/testsuite/gdb.dwarf2/loclists-start-end.c | 37 + gdb/testsuite/gdb.dwarf2/loclists-start-end.exp | 137 + gdb/testsuite/gdb.dwarf2/main-subprogram.exp | 14 +- gdb/testsuite/gdb.dwarf2/per-bfd-sharing.c | 28 + gdb/testsuite/gdb.dwarf2/per-bfd-sharing.exp | 105 + gdb/testsuite/gdb.dwarf2/pr13961.S | 157 +- gdb/testsuite/gdb.dwarf2/rnglists-multiple-cus.exp | 102 + gdb/testsuite/gdb.dwarf2/rnglists-sec-offset.exp | 143 + gdb/testsuite/gdb.fortran/allocated.exp | 49 + gdb/testsuite/gdb.fortran/allocated.f90 | 49 + gdb/testsuite/gdb.fortran/array-element.exp | 4 +- gdb/testsuite/gdb.fortran/array-slices.exp | 5 +- gdb/testsuite/gdb.fortran/associated.exp | 87 + gdb/testsuite/gdb.fortran/associated.f90 | 97 + gdb/testsuite/gdb.fortran/call-no-debug-func.f90 | 29 + gdb/testsuite/gdb.fortran/call-no-debug-prog.f90 | 35 + gdb/testsuite/gdb.fortran/call-no-debug.exp | 102 + .../gdb.fortran/class-allocatable-array.exp | 13 +- gdb/testsuite/gdb.fortran/debug-expr.exp | 8 + gdb/testsuite/gdb.fortran/dot-ops.exp | 38 + gdb/testsuite/gdb.fortran/dynamic-ptype-whatis.exp | 158 + gdb/testsuite/gdb.fortran/dynamic-ptype-whatis.f90 | 93 + gdb/testsuite/gdb.fortran/function-calls.exp | 15 + gdb/testsuite/gdb.fortran/intrinsics.exp | 5 + gdb/testsuite/gdb.fortran/lbound-ubound.F90 | 105 + gdb/testsuite/gdb.fortran/lbound-ubound.exp | 199 + gdb/testsuite/gdb.fortran/mixed-lang-stack.exp | 21 +- gdb/testsuite/gdb.fortran/pointer-to-pointer.exp | 29 +- gdb/testsuite/gdb.fortran/ptype-on-functions.exp | 36 +- gdb/testsuite/gdb.fortran/rank.exp | 79 + gdb/testsuite/gdb.fortran/rank.f90 | 57 + gdb/testsuite/gdb.fortran/shape.exp | 86 + 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gdb/testsuite/gdb.mi/mi-info-sources.c | 25 + gdb/testsuite/gdb.mi/mi-info-sources.exp | 184 + gdb/testsuite/gdb.mi/mi-sym-info.exp | 109 +- gdb/testsuite/gdb.mi/mi-var-child-f.exp | 4 +- gdb/testsuite/gdb.mi/user-selected-context-sync.c | 10 +- gdb/testsuite/gdb.multi/multi-target.exp.tcl | 8 +- gdb/testsuite/gdb.opt/inline-cmds.exp | 17 +- gdb/testsuite/gdb.opt/inline-locals.c | 20 + gdb/testsuite/gdb.opt/inline-locals.exp | 34 +- gdb/testsuite/gdb.opt/solib-intra-step.exp | 35 +- gdb/testsuite/gdb.perf/backtrace.py | 15 +- gdb/testsuite/gdb.perf/disassemble.py | 20 +- gdb/testsuite/gdb.perf/gmonster-null-lookup.py | 4 +- .../gdb.perf/gmonster-pervasive-typedef.py | 4 +- gdb/testsuite/gdb.perf/gmonster-print-cerr.py | 4 +- gdb/testsuite/gdb.perf/gmonster-ptype-string.py | 4 +- gdb/testsuite/gdb.perf/gmonster-runto-main.py | 4 +- gdb/testsuite/gdb.perf/gmonster-select-file.py | 4 +- gdb/testsuite/gdb.perf/lib/perftest/measure.py | 16 +- gdb/testsuite/gdb.perf/lib/perftest/perftest.py | 11 +- gdb/testsuite/gdb.perf/lib/perftest/reporter.py | 25 +- gdb/testsuite/gdb.perf/lib/perftest/testresult.py | 8 +- gdb/testsuite/gdb.perf/lib/perftest/utils.py | 3 +- gdb/testsuite/gdb.perf/single-step.py | 5 +- gdb/testsuite/gdb.perf/skip-command.py | 5 +- gdb/testsuite/gdb.perf/skip-prologue.py | 1 + gdb/testsuite/gdb.perf/solib.py | 16 +- gdb/testsuite/gdb.perf/template-breakpoints.py | 5 +- .../flexible-array-member.c | 0 gdb/testsuite/gdb.python/flexible-array-member.exp | 92 + gdb/testsuite/gdb.python/lib-types.exp | 2 +- ...d-pretty-printers-in-newobjfile-event.so-gdb.py | 43 + .../gdb.python/py-auto-load-chaining-f1.c | 24 + .../gdb.python/py-auto-load-chaining-f1.o-gdb.py | 35 + .../gdb.python/py-auto-load-chaining-f2.c | 24 + .../gdb.python/py-auto-load-chaining-f2.o-gdb.py | 23 + gdb/testsuite/gdb.python/py-auto-load-chaining.c | 58 + gdb/testsuite/gdb.python/py-auto-load-chaining.exp | 78 + ...aded-pretty-printers-in-newobjfile-event-lib.cc | 28 + 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gdb/testsuite/gdb.python/py-finish-breakpoint2.py | 17 +- gdb/testsuite/gdb.python/py-format-string.c | 6 + gdb/testsuite/gdb.python/py-format-string.exp | 51 +- gdb/testsuite/gdb.python/py-format-string.py | 23 +- gdb/testsuite/gdb.python/py-frame-args.py | 39 +- gdb/testsuite/gdb.python/py-frame-inline.exp | 2 +- gdb/testsuite/gdb.python/py-frame.exp | 14 +- gdb/testsuite/gdb.python/py-framefilter-addr.c | 40 + gdb/testsuite/gdb.python/py-framefilter-addr.exp | 61 + gdb/testsuite/gdb.python/py-framefilter-addr.py | 51 + gdb/testsuite/gdb.python/py-framefilter-gdb.py | 48 + gdb/testsuite/gdb.python/py-framefilter-gdb.py.in | 48 - .../gdb.python/py-framefilter-invalidarg-gdb.py | 48 + .../gdb.python/py-framefilter-invalidarg-gdb.py.in | 48 - .../gdb.python/py-framefilter-invalidarg.exp | 2 +- .../gdb.python/py-framefilter-invalidarg.py | 26 +- gdb/testsuite/gdb.python/py-framefilter.exp | 6 +- gdb/testsuite/gdb.python/py-framefilter.py | 77 +- gdb/testsuite/gdb.python/py-inferior.exp | 25 +- gdb/testsuite/gdb.python/py-infthread.exp | 3 +- gdb/testsuite/gdb.python/py-lookup-type.exp | 2 - gdb/testsuite/gdb.python/py-mi-events-gdb.py | 26 +- .../gdb.python/py-mi-var-info-path-expression.py | 54 +- gdb/testsuite/gdb.python/py-mi.exp | 322 +- gdb/testsuite/gdb.python/py-nested-maps.exp | 6 +- gdb/testsuite/gdb.python/py-nested-maps.py | 75 +- gdb/testsuite/gdb.python/py-objfile-script-gdb.py | 28 +- gdb/testsuite/gdb.python/py-parameter.exp | 52 + gdb/testsuite/gdb.python/py-pending-frame-level.c | 49 + .../gdb.python/py-pending-frame-level.exp | 65 + gdb/testsuite/gdb.python/py-pending-frame-level.py | 55 + gdb/testsuite/gdb.python/py-pp-integral.py | 2 +- gdb/testsuite/gdb.python/py-pp-maint.exp | 15 +- gdb/testsuite/gdb.python/py-pp-maint.py | 24 +- gdb/testsuite/gdb.python/py-pp-re-notag.py | 2 +- gdb/testsuite/gdb.python/py-pp-registration.py | 16 +- gdb/testsuite/gdb.python/py-prettyprint.c | 2 + gdb/testsuite/gdb.python/py-prettyprint.exp | 29 + gdb/testsuite/gdb.python/py-prettyprint.py | 313 +- gdb/testsuite/gdb.python/py-prompt.exp | 85 +- gdb/testsuite/gdb.python/py-recurse-unwind.py | 28 +- gdb/testsuite/gdb.python/py-section-script.exp | 1 - gdb/testsuite/gdb.python/py-section-script.py | 28 +- gdb/testsuite/gdb.python/py-startup-opt.exp | 146 + gdb/testsuite/gdb.python/py-strfns.exp | 4 +- gdb/testsuite/gdb.python/py-symbol.exp | 48 + gdb/testsuite/gdb.python/py-symtab.exp | 6 +- gdb/testsuite/gdb.python/py-type.exp | 3 + gdb/testsuite/gdb.python/py-typeprint.py | 9 +- gdb/testsuite/gdb.python/py-unwind-inline.py | 37 +- gdb/testsuite/gdb.python/py-unwind-maint.py | 9 +- gdb/testsuite/gdb.python/py-unwind-user-regs.c | 37 + gdb/testsuite/gdb.python/py-unwind-user-regs.exp | 98 + gdb/testsuite/gdb.python/py-unwind-user-regs.py | 72 + gdb/testsuite/gdb.python/py-unwind.py | 26 +- gdb/testsuite/gdb.python/py-value-cc.exp | 2 - gdb/testsuite/gdb.python/py-xmethods.py | 136 +- gdb/testsuite/gdb.python/python.exp | 4 +- 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10 + .../gdb.threads/access-mem-running-thread-exit.c | 123 + .../gdb.threads/access-mem-running-thread-exit.exp | 166 + gdb/testsuite/gdb.threads/attach-non-stop.c | 58 + gdb/testsuite/gdb.threads/attach-non-stop.exp | 148 + gdb/testsuite/gdb.threads/detach-step-over.c | 112 + gdb/testsuite/gdb.threads/detach-step-over.exp | 305 + gdb/testsuite/gdb.threads/execl.exp | 11 +- gdb/testsuite/gdb.threads/fork-plus-threads.exp | 14 +- gdb/testsuite/gdb.threads/gcore-thread.exp | 20 +- gdb/testsuite/gdb.threads/killed-outside.exp | 3 + .../gdb.threads/multi-create-ns-info-thr.exp | 2 +- gdb/testsuite/gdb.threads/print-threads.exp | 62 +- gdb/testsuite/gdb.threads/queue-signal.exp | 12 +- .../gdb.threads/signal-command-handle-nopass.exp | 4 +- .../signal-command-multiple-signals-pending.exp | 10 +- .../gdb.threads/signal-delivered-right-thread.exp | 4 +- gdb/testsuite/gdb.threads/signal-sigtrap.exp | 4 +- gdb/testsuite/gdb.threads/threadapply.c | 12 +- gdb/testsuite/gdb.trace/ax.exp | 2 +- gdb/testsuite/gdb.trace/mi-tsv-changed.exp | 10 +- gdb/testsuite/gdb.tui/scroll.exp | 72 + .../gdb.tui/tui-layout-asm-short-prog.exp | 4 +- gdb/testsuite/gdb.tui/tui-layout-asm.exp | 7 +- gdb/testsuite/gdb.tui/winheight.exp | 14 + gdb/testsuite/gdb.xml/tdesc-regs.exp | 3 +- gdb/testsuite/gdb.xml/tdesc-reload.exp | 7 +- gdb/testsuite/lib/ada.exp | 4 +- gdb/testsuite/lib/cp-support.exp | 36 +- gdb/testsuite/lib/dwarf.exp | 828 +- gdb/testsuite/lib/fortran.exp | 2 +- gdb/testsuite/lib/gdb-guile.exp | 15 +- gdb/testsuite/lib/gdb-utils.exp | 2 + gdb/testsuite/lib/gdb.exp | 461 +- gdb/testsuite/lib/gdbserver-support.exp | 10 +- gdb/testsuite/lib/mi-support.exp | 41 +- gdb/testsuite/lib/pdtrace.in | 2 +- gdb/testsuite/lib/prelink-support.exp | 12 +- gdb/testsuite/lib/prompt.exp | 2 - gdb/testsuite/lib/range-stepping-support.exp | 8 +- gdb/testsuite/lib/rust-support.exp | 17 + gdb/testsuite/lib/tuiterm.exp | 654 +- gdb/testsuite/lib/valgrind.exp | 5 +- gdb/testsuite/print-ts.py | 9 +- gdb/thread.c | 31 +- gdb/tic6x-tdep.c | 2 + gdb/tilegx-tdep.c | 21 +- gdb/top.c | 110 +- gdb/top.h | 18 +- gdb/tracectf.c | 2 +- gdb/tracefile-tfile.c | 8 +- gdb/tracepoint.c | 149 +- gdb/tracepoint.h | 2 +- gdb/trad-frame.c | 103 +- gdb/trad-frame.h | 50 +- gdb/tramp-frame.c | 7 +- gdb/tui/tui-data.h | 11 +- gdb/tui/tui-disasm.c | 22 +- gdb/tui/tui-hooks.c | 4 +- gdb/tui/tui-interp.c | 43 +- gdb/tui/tui-io.c | 244 +- gdb/tui/tui-io.h | 5 + gdb/tui/tui-layout.c | 51 +- gdb/tui/tui-layout.h | 16 + gdb/tui/tui-location.c | 81 + gdb/tui/tui-location.h | 93 + gdb/tui/tui-regs.c | 19 +- gdb/tui/tui-source.c | 9 +- gdb/tui/tui-stack.c | 118 +- gdb/tui/tui-stack.h | 19 - gdb/tui/tui-win.c | 44 +- gdb/tui/tui-wingeneral.c | 4 - gdb/tui/tui-winsource.c | 14 +- gdb/tui/tui.c | 35 +- gdb/tui/tui.h | 1 + gdb/typeprint.c | 89 +- gdb/typeprint.h | 69 +- gdb/ui-out.c | 6 - gdb/ui-out.h | 7 +- gdb/ui-style.c | 4 +- gdb/unittests/command-def-selftests.c | 14 +- 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+ intl/Makefile.in | 16 +- intl/aclocal.m4 | 1 + intl/configure | 137 +- intl/configure.ac | 30 +- intl/plural-config.h | 1 + intl/plural-exp.h | 8 +- intl/plural.c | 62 +- intl/plural.y | 27 +- ld/ChangeLog | 1178 +- ld/Makefile.am | 24 +- ld/Makefile.in | 40 +- ld/NEWS | 12 + ld/aclocal.m4 | 1 + ld/config.in | 40 +- ld/configure | 2320 +- ld/configure.ac | 87 +- ld/configure.tgt | 9 +- ld/elf-hints-local.h | 2 +- ld/emulparams/alphavms.sh | 3 +- ld/emulparams/armsymbian.sh | 25 - ld/emulparams/call_nop.sh | 8 +- ld/emulparams/cet.sh | 6 +- ld/emulparams/dynamic_undefined_weak.sh | 4 +- ld/emulparams/elf32_x86_64.sh | 1 + ld/emulparams/elf32b4300.sh | 2 +- ld/emulparams/elf32lm32.sh | 2 +- ld/emulparams/elf32lr5900.sh | 2 +- ld/emulparams/elf32lr5900n32.sh | 2 +- ld/emulparams/elf32visium.sh | 2 +- ld/emulparams/elf64_ia64_vms.sh | 1 - ld/emulparams/elf64mmix.sh | 1 - ld/emulparams/elf_i386.sh | 1 + ld/emulparams/elf_iamcu.sh | 1 - ld/emulparams/elf_k1om.sh | 1 - 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ld/ldlex.h | 2 + ld/ldmain.c | 121 +- ld/ldmain.h | 8 +- ld/ldmisc.c | 30 +- ld/ldmisc.h | 2 +- ld/ldwrite.c | 14 +- ld/lexsup.c | 232 +- ld/libdep_plugin.c | 6 +- ld/mri.c | 6 +- ld/pe-dll.c | 150 +- ld/pe-dll.h | 4 +- ld/pep-dll.h | 4 +- ld/plugin.c | 112 +- ld/plugin.h | 4 +- ld/po/BLD-POTFILES.in | 1 - ld/po/fr.po | 2949 +- ld/po/ld.pot | 2882 +- ld/po/pt_BR.po | 2966 +- ld/po/uk.po | 2951 +- ld/scripttempl/aix.sc | 31 +- ld/scripttempl/armbpabi.sc | 417 - ld/scripttempl/mcorepe.sc | 2 +- ld/scripttempl/pdp11.sc | 2 +- ld/scripttempl/pe.sc | 81 +- ld/scripttempl/pep.sc | 87 +- ld/scripttempl/pru.sc | 11 +- ld/sysdep.h | 39 +- ld/testplug.c | 25 +- ld/testplug2.c | 26 +- ld/testplug3.c | 22 +- ld/testplug4.c | 26 +- ld/testsuite/config/default.exp | 9 + ld/testsuite/ld-aarch64/variant_pcs-now.d | 16 +- ld/testsuite/ld-aarch64/variant_pcs-r.d | 6 +- ld/testsuite/ld-aarch64/variant_pcs-shared.d | 16 +- ld/testsuite/ld-alpha/tlsbin.rd | 26 +- ld/testsuite/ld-alpha/tlsbinr.rd | 22 +- ld/testsuite/ld-alpha/tlspic.rd | 24 +- ld/testsuite/ld-arm/arm-elf.exp | 6 +- ld/testsuite/ld-arm/rodata-merge-map.sym | 4 +- ld/testsuite/ld-arm/script-type.sym | 4 +- ld/testsuite/ld-arm/symbian-seg1.d | 8 - ld/testsuite/ld-arm/symbian-seg1.s | 13 - ld/testsuite/ld-bootstrap/bootstrap.exp | 3 + ld/testsuite/ld-cdtest/cdtest.exp | 4 +- ld/testsuite/ld-checks/checks.exp | 2 +- ld/testsuite/ld-cris/libdso-2.d | 20 +- ld/testsuite/ld-cris/pr16044.d | 2 +- ld/testsuite/ld-ctf/array.d | 4 +- ld/testsuite/ld-ctf/conflicting-enums.d | 2 +- ld/testsuite/ld-ctf/cross-tu-cyclic-conflicting.d | 4 +- ld/testsuite/ld-ctf/cross-tu-noncyclic.d | 6 +- ld/testsuite/ld-ctf/ctf.exp | 2 +- ld/testsuite/ld-ctf/data-func-2.c | 4 + ld/testsuite/ld-ctf/data-func-conflicted.d | 8 +- ld/testsuite/ld-ctf/diag-parlabel.d | 4 +- ld/testsuite/ld-ctf/enums.d | 8 +- ld/testsuite/ld-ctf/function.d | 2 +- ld/testsuite/ld-ctf/nonrepresentable-1.c | 7 + ld/testsuite/ld-ctf/nonrepresentable-2.c | 11 + ld/testsuite/ld-ctf/nonrepresentable.d | 26 + ld/testsuite/ld-ctf/slice.c | 3 + ld/testsuite/ld-ctf/slice.d | 11 +- ld/testsuite/ld-elf/anno-sym.d | 5 + ld/testsuite/ld-elf/anno-sym.l | 4 + ld/testsuite/ld-elf/anno-sym.s | 13 + ld/testsuite/ld-elf/binutils.exp | 10 +- ld/testsuite/ld-elf/compress.exp | 20 +- ld/testsuite/ld-elf/dwarf.exp | 6 +- ld/testsuite/ld-elf/exclude.exp | 4 +- ld/testsuite/ld-elf/frame.exp | 4 +- ld/testsuite/ld-elf/group8a.d | 2 +- ld/testsuite/ld-elf/group8b.d | 2 +- ld/testsuite/ld-elf/group9a.d | 2 +- ld/testsuite/ld-elf/group9b.d | 2 +- ld/testsuite/ld-elf/indirect.exp | 2 +- ld/testsuite/ld-elf/linux-x86.exp | 4 +- ld/testsuite/ld-elf/mbind2b.c | 2 +- ld/testsuite/ld-elf/pr12851.d | 2 +- ld/testsuite/ld-elf/pr18718.c | 2 +- ld/testsuite/ld-elf/pr18720a.c | 2 +- ld/testsuite/ld-elf/pr22677.d | 2 +- ld/testsuite/ld-elf/pr25708.d | 2 +- ld/testsuite/ld-elf/pr25749-1.c | 4 +- ld/testsuite/ld-elf/pr25749-1a.c | 2 +- ld/testsuite/ld-elf/pr25749-1b.c | 2 +- ld/testsuite/ld-elf/pr25749-1c.c | 2 +- ld/testsuite/ld-elf/pr25749-1d.c | 2 +- ld/testsuite/ld-elf/pr25749-2.c | 4 +- ld/testsuite/ld-elf/pr25754-1a.c | 2 +- ld/testsuite/ld-elf/pr25754-2a.c | 2 +- ld/testsuite/ld-elf/pr25754-3a.c | 2 +- ld/testsuite/ld-elf/pr25754-4a.c | 2 +- ld/testsuite/ld-elf/pr25754-5a.c | 2 +- ld/testsuite/ld-elf/pr25754-6a.c | 2 +- ld/testsuite/ld-elf/pr26256-2a.d | 1 - ld/testsuite/ld-elf/pr26256-2b.d | 3 +- ld/testsuite/ld-elf/pr26256-3b.d | 1 - ld/testsuite/ld-elf/pr26391.nd | 2 +- ld/testsuite/ld-elf/pr27128a.d | 2 +- ld/testsuite/ld-elf/pr27128b.d | 2 +- ld/testsuite/ld-elf/pr27128c.d | 2 +- ld/testsuite/ld-elf/pr27128d.d | 2 +- ld/testsuite/ld-elf/pr27128e.d | 2 +- ld/testsuite/ld-elf/pr27259.d | 7 + ld/testsuite/ld-elf/pr27259.s | 14 + ld/testsuite/ld-elf/pr27590.s | 6 + ld/testsuite/ld-elf/pr27590a.d | 12 + ld/testsuite/ld-elf/pr27590b.d | 12 + ld/testsuite/ld-elf/pr27825-1.d | 20 + ld/testsuite/ld-elf/pr27825-1a.s | 7 + ld/testsuite/ld-elf/pr27825-1b.s | 5 + ld/testsuite/ld-elf/pr27825-2.d | 17 + ld/testsuite/ld-elf/pr27825-2a.s | 5 + ld/testsuite/ld-elf/pr27825-2b.s | 3 + ld/testsuite/ld-elf/pr27825-2c.s | 4 + ld/testsuite/ld-elf/property-and-1.d | 15 + ld/testsuite/ld-elf/property-and-1.s | 15 + ld/testsuite/ld-elf/property-and-2.d | 16 + ld/testsuite/ld-elf/property-and-2.s | 15 + ld/testsuite/ld-elf/property-and-3.d | 16 + ld/testsuite/ld-elf/property-and-3.s | 15 + ld/testsuite/ld-elf/property-and-4.d | 18 + ld/testsuite/ld-elf/property-and-empty.s | 15 + ld/testsuite/ld-elf/property-or-1.d | 17 + ld/testsuite/ld-elf/property-or-1.s | 15 + ld/testsuite/ld-elf/property-or-2.d | 18 + ld/testsuite/ld-elf/property-or-2.s | 15 + ld/testsuite/ld-elf/property-or-3.d | 18 + ld/testsuite/ld-elf/property-or-3.s | 15 + ld/testsuite/ld-elf/property-or-4.d | 18 + ld/testsuite/ld-elf/property-or-empty.s | 15 + ld/testsuite/ld-elf/sec-to-seg.exp | 2 +- ld/testsuite/ld-elf/sec64k.exp | 6 +- ld/testsuite/ld-elf/shared.exp | 7 + ld/testsuite/ld-elf/size-2.d | 2 +- ld/testsuite/ld-elf/tls_common.exp | 10 +- ld/testsuite/ld-elfcomm/elfcomm.exp | 11 +- ld/testsuite/ld-elfvers/vers.exp | 16 +- ld/testsuite/ld-elfvers/vers16.dsym | 2 +- ld/testsuite/ld-elfvers/vers6.dsym | 2 +- ld/testsuite/ld-elfvsb/elfvsb.exp | 22 +- ld/testsuite/ld-elfweak/elfweak.exp | 6 +- ld/testsuite/ld-gc/abi-note.d | 1 - ld/testsuite/ld-gc/gc.exp | 48 +- ld/testsuite/ld-gc/pr13683.d | 1 + ld/testsuite/ld-gc/pr14265.d | 15 +- ld/testsuite/ld-gc/pr19167.d | 3 +- ld/testsuite/ld-gc/pr19167a.s | 4 + ld/testsuite/ld-gc/start.d | 5 +- ld/testsuite/ld-gc/start.s | 6 +- ld/testsuite/ld-gc/start2.d | 10 + ld/testsuite/ld-gc/start2.s | 12 + ld/testsuite/ld-gc/start3.d | 9 + ld/testsuite/ld-gc/start3.s | 29 + ld/testsuite/ld-gc/start4.d | 9 + ld/testsuite/ld-gc/start4.s | 19 + ld/testsuite/ld-gc/stop.d | 3 +- ld/testsuite/ld-i386/code16.d | 19 + ld/testsuite/ld-i386/code16.t | 7 + ld/testsuite/ld-i386/i386.exp | 14 +- ld/testsuite/ld-i386/pcrel16-2.d | 6 + ld/testsuite/ld-i386/pcrel16-2.s | 12 + ld/testsuite/ld-i386/pr27998a.d | 7 + ld/testsuite/ld-i386/pr27998a.s | 22 + ld/testsuite/ld-i386/pr27998b.d | 7 + ld/testsuite/ld-i386/pr27998b.s | 20 + ld/testsuite/ld-i386/property-x86-isa1.d | 2 +- ld/testsuite/ld-i386/report-reloc-1.d | 10 + ld/testsuite/ld-i386/report-reloc-1.l | 2 + ld/testsuite/ld-i386/report-reloc-1.s | 12 + ld/testsuite/ld-ia64/tlsbin.rd | 30 +- ld/testsuite/ld-ia64/tlspic.rd | 28 +- ld/testsuite/ld-ifunc/binutils.exp | 8 +- .../ld-mips-elf/global-local-symtab-sort-n64t.d | 2 +- .../ld-mips-elf/global-local-symtab-sort-o32t.d | 2 +- ld/testsuite/ld-mips-elf/mips-elf-flags.exp | 2 +- ld/testsuite/ld-misc/defsym.exp | 6 +- ld/testsuite/ld-mmix/bspec1.d | 4 +- ld/testsuite/ld-mmix/bspec2.d | 6 +- ld/testsuite/ld-mmix/local1.d | 4 +- ld/testsuite/ld-mmix/local3.d | 4 +- ld/testsuite/ld-mmix/local5.d | 4 +- ld/testsuite/ld-mmix/local7.d | 4 +- ld/testsuite/ld-mmix/undef-3.d | 2 +- ld/testsuite/ld-mn10300/mn10300.exp | 16 +- ld/testsuite/ld-or1k/gotha1.dd | 34 + ld/testsuite/ld-or1k/gotha1.s | 24 + ld/testsuite/ld-or1k/gotha2.dd | 21 + ld/testsuite/ld-or1k/gotha2.s | 22 + ld/testsuite/ld-or1k/or1k.exp | 8 + ld/testsuite/ld-or1k/pltlib.s | 1 + ld/testsuite/ld-pe/pe.exp | 2 + ld/testsuite/ld-pe/pr26659-weak-undef-sym.d | 43 +- ld/testsuite/ld-pe/reloc.d | 15 + ld/testsuite/ld-pe/reloc.s | 20 + ld/testsuite/ld-pie/vaddr-0.d | 2 +- ld/testsuite/ld-plugin/lto.exp | 57 +- ld/testsuite/ld-plugin/plugin.exp | 12 +- ld/testsuite/ld-plugin/pr27441a.c | 2 + ld/testsuite/ld-plugin/pr27441b.c | 1 + ld/testsuite/ld-plugin/pr27441c.c | 8 + ld/testsuite/ld-plugin/pr27441c.d | 4 + ld/testsuite/ld-plugin/pr28138-1.c | 6 + ld/testsuite/ld-plugin/pr28138-2.c | 6 + ld/testsuite/ld-plugin/pr28138-3.c | 6 + ld/testsuite/ld-plugin/pr28138-4.c | 6 + ld/testsuite/ld-plugin/pr28138-5.c | 6 + ld/testsuite/ld-plugin/pr28138-6.c | 6 + ld/testsuite/ld-plugin/pr28138-7.c | 6 + ld/testsuite/ld-plugin/pr28138.c | 20 + ld/testsuite/ld-powerpc/aix-largetoc-1-32.d | 20 + ld/testsuite/ld-powerpc/aix-largetoc-1-64.d | 20 + .../{aix-abs-branch-1.ex => aix-largetoc-1.ex} | 0 ld/testsuite/ld-powerpc/aix-largetoc-1.s | 25 + ld/testsuite/ld-powerpc/aix-neg-reloc-32.d | 23 + ld/testsuite/ld-powerpc/aix-neg-reloc-64.d | 23 + .../{aix-abs-branch-1.ex => aix-neg-reloc.ex} | 0 ld/testsuite/ld-powerpc/aix-neg-reloc.s | 30 + ld/testsuite/ld-powerpc/aix-tls-reloc-32.d | 35 + ld/testsuite/ld-powerpc/aix-tls-reloc-64.d | 31 + .../{aix-abs-branch-1.ex => aix-tls-reloc.ex} | 0 ld/testsuite/ld-powerpc/aix-tls-reloc.s | 65 + ld/testsuite/ld-powerpc/aix-tls-section-32.d | 15 + ld/testsuite/ld-powerpc/aix-tls-section-64.d | 15 + .../aix-tls-section.ex} | 0 ld/testsuite/ld-powerpc/aix-tls-section.s | 8 + ld/testsuite/ld-powerpc/aix52.exp | 33 + ld/testsuite/{ld-mips-elf => ld-powerpc}/empty.s | 0 ld/testsuite/ld-powerpc/inlinepcrel-1.d | 2 +- ld/testsuite/ld-powerpc/inlinepcrel-2.d | 2 +- ld/testsuite/ld-powerpc/notoc2.d | 12 +- ld/testsuite/ld-powerpc/notoc3.d | 6 +- ld/testsuite/ld-powerpc/pcrelopt.d | 64 +- ld/testsuite/ld-powerpc/powerpc.exp | 6 + ld/testsuite/ld-powerpc/relbrlt.d | 46 +- ld/testsuite/ld-powerpc/relbrlt.s | 5 +- ld/testsuite/ld-powerpc/startstop.d | 10 + ld/testsuite/ld-powerpc/startstop.r | 2 + ld/testsuite/ld-powerpc/startstop.s | 16 + ld/testsuite/ld-powerpc/tlsexe.r | 26 +- ld/testsuite/ld-powerpc/tlsexe32.r | 24 +- ld/testsuite/ld-powerpc/tlsexe32no.r | 24 +- ld/testsuite/ld-powerpc/tlsexeno.r | 26 +- ld/testsuite/ld-powerpc/tlsexenors.r | 26 +- ld/testsuite/ld-powerpc/tlsexers.r | 26 +- ld/testsuite/ld-powerpc/tlsexetoc.r | 26 +- ld/testsuite/ld-powerpc/tlsexetocrs.r | 26 +- ld/testsuite/ld-powerpc/tlsget.d | 2 +- ld/testsuite/ld-powerpc/tlsget2.d | 2 +- ld/testsuite/ld-powerpc/tlsld.d | 2 +- ld/testsuite/ld-powerpc/tlsso.r | 28 +- ld/testsuite/ld-powerpc/tlsso32.r | 24 +- ld/testsuite/ld-powerpc/tlstocso.r | 28 +- ld/testsuite/ld-powerpc/undefweak.d | 10 + ld/testsuite/ld-powerpc/undefweak.s | 8 + ld/testsuite/ld-powerpc/weak1.d | 8 +- ld/testsuite/ld-powerpc/weak1so.d | 8 +- .../ld-riscv-elf/attr-merge-priv-spec-failed-01.d | 4 +- .../ld-riscv-elf/attr-merge-priv-spec-failed-02.d | 4 +- .../ld-riscv-elf/attr-merge-priv-spec-failed-03.d | 4 +- .../ld-riscv-elf/attr-merge-priv-spec-failed-04.d | 4 +- .../ld-riscv-elf/attr-merge-priv-spec-failed-05.d | 4 +- .../ld-riscv-elf/attr-merge-priv-spec-failed-06.d | 4 +- ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp | 51 +- ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.d | 5 - ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2.s | 16 - ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.d | 5 + ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2a.s | 16 + ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2b.d | 5 + ld/testsuite/ld-riscv-elf/pcrel-lo-addend-2b.s | 16 + ld/testsuite/ld-riscv-elf/pcrel-lo-addend-3.ld | 13 + ld/testsuite/ld-riscv-elf/pcrel-lo-addend-3a.d | 18 + ld/testsuite/ld-riscv-elf/pcrel-lo-addend-3a.s | 21 + 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+ libctf/testsuite/libctf-lookup/enum-many-ctf.c | 10 + libctf/testsuite/libctf-lookup/enum-many.lk | 101 + libctf/testsuite/libctf-lookup/enum-symbol-obj.lk | 5 + libctf/testsuite/libctf-lookup/enum-symbol.c | 115 +- libctf/testsuite/libctf-lookup/struct-iteration.c | 6 +- .../nonstatic-var-section-ld-executable.lk | 9 + .../nonstatic-var-section-ld-r-ctf.c | 9 + .../libctf-regression/nonstatic-var-section-ld-r.c | 73 + .../nonstatic-var-section-ld-r.lk | 6 + .../libctf-regression/nonstatic-var-section-ld.c | 76 + .../libctf-regression/nonstatic-var-section-ld.lk | 6 + .../type-add-unnamed-struct-ctf.c | 1 + .../libctf-regression/type-add-unnamed-struct.c | 4 +- .../libctf-regression/type-add-unnamed-struct.lk | 1 + .../reserialize-strtab-corruption.c | 91 + .../reserialize-strtab-corruption.lk | 5 + .../symtypetab-nonlinker-writeout.c | 253 + .../symtypetab-nonlinker-writeout.lk | 12 + libiberty/ChangeLog | 111 + libiberty/Makefile.in | 17 +- libiberty/acinclude.m4 | 185 + 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315 - sim/sh64/sh-opc.h | 214 - sim/sh64/sh64-sim.h | 84 - sim/sh64/sh64.c | 1138 - sim/sh64/sim-if.c | 204 - sim/sh64/sim-main.h | 72 - sim/testsuite/ChangeLog | 111 +- sim/testsuite/Makefile.in | 182 - sim/testsuite/aarch64/ChangeLog | 91 + sim/testsuite/{sim => }/aarch64/adds.s | 0 sim/testsuite/{sim => }/aarch64/addv.s | 0 sim/testsuite/{sim => }/aarch64/allinsn.exp | 0 sim/testsuite/{sim => }/aarch64/bit.s | 0 sim/testsuite/{sim => }/aarch64/cmtst.s | 0 sim/testsuite/{sim => }/aarch64/cnt.s | 0 sim/testsuite/{sim => }/aarch64/fcmXX.s | 0 sim/testsuite/{sim => }/aarch64/fcmp.s | 0 sim/testsuite/{sim => }/aarch64/fcsel.s | 0 sim/testsuite/{sim => }/aarch64/fcvtl.s | 0 sim/testsuite/{sim => }/aarch64/fcvtz.s | 0 sim/testsuite/{sim => }/aarch64/fminnm.s | 0 sim/testsuite/{sim => }/aarch64/fstur.s | 0 sim/testsuite/{sim => }/aarch64/ldn_multiple.s | 0 sim/testsuite/{sim => }/aarch64/ldn_single.s | 0 sim/testsuite/{sim => }/aarch64/ldnr.s | 0 sim/testsuite/{sim => }/aarch64/mla.s | 0 sim/testsuite/{sim => }/aarch64/mls.s | 0 sim/testsuite/{sim => }/aarch64/mul.s | 0 sim/testsuite/{sim => }/aarch64/pass.s | 0 sim/testsuite/{sim => }/aarch64/stn_multiple.s | 0 sim/testsuite/{sim => }/aarch64/stn_single.s | 0 sim/testsuite/{sim => }/aarch64/sumov.s | 0 sim/testsuite/{sim => }/aarch64/sumulh.s | 0 sim/testsuite/{sim => }/aarch64/tbnz.s | 0 sim/testsuite/{sim => }/aarch64/testutils.inc | 0 sim/testsuite/{sim => }/aarch64/uzp.s | 0 sim/testsuite/{sim => }/aarch64/xtl.s | 0 sim/testsuite/{sim => }/aarch64/xtn.s | 0 sim/testsuite/arm/ChangeLog | 133 + sim/testsuite/{sim => }/arm/adc.cgs | 0 sim/testsuite/{sim => }/arm/add.cgs | 0 sim/testsuite/arm/allinsn.exp | 25 + sim/testsuite/{sim => }/arm/and.cgs | 0 sim/testsuite/{sim => }/arm/b.cgs | 0 sim/testsuite/{sim => }/arm/bic.cgs | 0 sim/testsuite/{sim => }/arm/bl.cgs | 0 sim/testsuite/{sim => }/arm/bx.cgs | 0 sim/testsuite/{sim => }/arm/cmn.cgs | 0 sim/testsuite/{sim => }/arm/cmp.cgs | 0 sim/testsuite/{sim => }/arm/eor.cgs | 0 sim/testsuite/{sim => }/arm/hello.ms | 0 sim/testsuite/arm/iwmmxt/iwmmxt.exp | 25 + sim/testsuite/{sim => }/arm/iwmmxt/tbcst.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/testutils.inc | 0 sim/testsuite/{sim => }/arm/iwmmxt/textrm.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/tinsr.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/tmia.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/tmiaph.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/tmiaxy.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/tmovmsk.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wacc.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wadd.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/waligni.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/walignr.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wand.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wandn.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wavg2.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wcmpeq.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wcmpgt.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wmac.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wmadd.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wmax.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wmin.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wmov.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wmul.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wor.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wpack.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wror.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wsad.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wshufh.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wsll.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wsra.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wsrl.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wsub.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wunpckeh.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wunpckel.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wunpckih.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wunpckil.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wxor.cgs | 0 sim/testsuite/{sim => }/arm/iwmmxt/wzero.cgs | 0 sim/testsuite/{sim => }/arm/ldm.cgs | 0 sim/testsuite/{sim => }/arm/ldr.cgs | 0 sim/testsuite/{sim => }/arm/ldrb.cgs | 0 sim/testsuite/{sim => }/arm/ldrh.cgs | 0 sim/testsuite/{sim => }/arm/ldrsb.cgs | 0 sim/testsuite/{sim => }/arm/ldrsh.cgs | 0 sim/testsuite/{sim => }/arm/misaligned1.ms | 0 sim/testsuite/{sim => }/arm/misaligned2.ms | 0 sim/testsuite/{sim => }/arm/misaligned3.ms | 0 sim/testsuite/arm/misc.exp | 17 + sim/testsuite/{sim => }/arm/mla.cgs | 0 sim/testsuite/{sim => }/arm/mov.cgs | 0 sim/testsuite/{sim => }/arm/movw-movt.ms | 0 sim/testsuite/{sim => }/arm/mrs.cgs | 0 sim/testsuite/{sim => }/arm/msr.cgs | 0 sim/testsuite/{sim => }/arm/mul.cgs | 0 sim/testsuite/{sim => }/arm/mvn.cgs | 0 sim/testsuite/{sim => }/arm/orr.cgs | 0 sim/testsuite/{sim => }/arm/rsb.cgs | 0 sim/testsuite/{sim => }/arm/rsc.cgs | 0 sim/testsuite/{sim => }/arm/sbc.cgs | 0 sim/testsuite/{sim => }/arm/smlal.cgs | 0 sim/testsuite/{sim => }/arm/smull.cgs | 0 sim/testsuite/{sim => }/arm/stm.cgs | 0 sim/testsuite/{sim => }/arm/str.cgs | 0 sim/testsuite/{sim => }/arm/strb.cgs | 0 sim/testsuite/{sim => }/arm/strh.cgs | 0 sim/testsuite/{sim => }/arm/sub.cgs | 0 sim/testsuite/{sim => }/arm/swi.cgs | 0 sim/testsuite/{sim => }/arm/swp.cgs | 0 sim/testsuite/{sim => }/arm/swpb.cgs | 0 sim/testsuite/{sim => }/arm/teq.cgs | 0 sim/testsuite/{sim => }/arm/testutils.inc | 0 sim/testsuite/{sim => }/arm/thumb/adc.cgs | 0 sim/testsuite/{sim => }/arm/thumb/add-hd-hs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/add-hd-rs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/add-rd-hs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/add-sp.cgs | 0 sim/testsuite/{sim => }/arm/thumb/add.cgs | 0 sim/testsuite/{sim => }/arm/thumb/addi.cgs | 0 sim/testsuite/{sim => }/arm/thumb/addi8.cgs | 0 sim/testsuite/arm/thumb/allthumb.exp | 17 + sim/testsuite/{sim => }/arm/thumb/and.cgs | 0 sim/testsuite/{sim => }/arm/thumb/asr.cgs | 0 sim/testsuite/{sim => }/arm/thumb/b.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bcc.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bcs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/beq.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bge.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bgt.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bhi.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bic.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bl-hi.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bl-lo.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ble.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bls.cgs | 0 sim/testsuite/{sim => }/arm/thumb/blt.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bmi.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bne.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bpl.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bvc.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bvs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bx-hs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/bx-rs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/cmn.cgs | 0 sim/testsuite/{sim => }/arm/thumb/cmp-hd-hs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/cmp-hd-rs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/cmp-rd-hs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/cmp.cgs | 0 sim/testsuite/{sim => }/arm/thumb/eor.cgs | 0 sim/testsuite/{sim => }/arm/thumb/lda-pc.cgs | 0 sim/testsuite/{sim => }/arm/thumb/lda-sp.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ldmia.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ldr-imm.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ldr-pc.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ldr-sprel.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ldr.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ldrb-imm.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ldrb.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ldrh-imm.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ldrh.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ldsb.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ldsh.cgs | 0 sim/testsuite/{sim => }/arm/thumb/lsl.cgs | 0 sim/testsuite/{sim => }/arm/thumb/lsr.cgs | 0 sim/testsuite/{sim => }/arm/thumb/mov-hd-hs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/mov-hd-rs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/mov-rd-hs.cgs | 0 sim/testsuite/{sim => }/arm/thumb/mov.cgs | 0 sim/testsuite/{sim => }/arm/thumb/mul.cgs | 0 sim/testsuite/{sim => }/arm/thumb/mvn.cgs | 0 sim/testsuite/{sim => }/arm/thumb/neg.cgs | 0 sim/testsuite/{sim => }/arm/thumb/orr.cgs | 0 sim/testsuite/{sim => }/arm/thumb/pop-pc.cgs | 0 sim/testsuite/{sim => }/arm/thumb/pop.cgs | 0 sim/testsuite/{sim => }/arm/thumb/push-lr.cgs | 0 sim/testsuite/{sim => }/arm/thumb/push.cgs | 0 sim/testsuite/{sim => }/arm/thumb/ror.cgs | 0 sim/testsuite/{sim => }/arm/thumb/sbc.cgs | 0 sim/testsuite/{sim => }/arm/thumb/stmia.cgs | 0 sim/testsuite/{sim => }/arm/thumb/str-imm.cgs | 0 sim/testsuite/{sim => }/arm/thumb/str-sprel.cgs | 0 sim/testsuite/{sim => }/arm/thumb/str.cgs | 0 sim/testsuite/{sim => }/arm/thumb/strb-imm.cgs | 0 sim/testsuite/{sim => }/arm/thumb/strb.cgs | 0 sim/testsuite/{sim => }/arm/thumb/strh-imm.cgs | 0 sim/testsuite/{sim => }/arm/thumb/strh.cgs | 0 sim/testsuite/{sim => }/arm/thumb/sub-sp.cgs | 0 sim/testsuite/{sim => }/arm/thumb/sub.cgs | 0 sim/testsuite/{sim => }/arm/thumb/subi.cgs | 0 sim/testsuite/{sim => }/arm/thumb/subi8.cgs | 0 sim/testsuite/{sim => }/arm/thumb/swi.cgs | 0 sim/testsuite/{sim => }/arm/thumb/testutils.inc | 0 sim/testsuite/{sim => }/arm/thumb/tst.cgs | 0 sim/testsuite/{sim => }/arm/tst.cgs | 0 sim/testsuite/{sim => }/arm/umlal.cgs | 0 sim/testsuite/{sim => }/arm/umull.cgs | 0 sim/testsuite/{sim => }/arm/xscale/blx.cgs | 0 sim/testsuite/{sim => }/arm/xscale/mia.cgs | 0 sim/testsuite/{sim => }/arm/xscale/miaph.cgs | 0 sim/testsuite/{sim => }/arm/xscale/miaxy.cgs | 0 sim/testsuite/{sim => }/arm/xscale/mra.cgs | 0 sim/testsuite/{sim => }/arm/xscale/testutils.inc | 0 sim/testsuite/arm/xscale/xscale.exp | 25 + sim/testsuite/avr/ChangeLog | 15 + sim/testsuite/{sim => }/avr/allinsn.exp | 0 sim/testsuite/{sim => }/avr/pass.s | 0 sim/testsuite/{sim => }/avr/testutils.inc | 0 sim/testsuite/{sim => }/bfin/.gitignore | 0 sim/testsuite/{sim => }/bfin/10272_small.s | 0 sim/testsuite/{sim => }/bfin/10436.s | 0 sim/testsuite/{sim => }/bfin/10622.s | 0 sim/testsuite/{sim => }/bfin/10742.s | 0 sim/testsuite/{sim => }/bfin/10799.s | 0 sim/testsuite/{sim => }/bfin/11080.s | 0 sim/testsuite/{sim => }/bfin/7641.s | 0 sim/testsuite/bfin/ChangeLog | 386 + sim/testsuite/{sim => }/bfin/PN_generator.s | 0 sim/testsuite/{sim => }/bfin/a0.s | 0 sim/testsuite/{sim => }/bfin/a0shift.S | 0 sim/testsuite/{sim => }/bfin/a1.s | 0 sim/testsuite/{sim => }/bfin/a10.s | 0 sim/testsuite/{sim => }/bfin/a11.S | 0 sim/testsuite/{sim => }/bfin/a12.s | 0 sim/testsuite/{sim => }/bfin/a2.s | 0 sim/testsuite/{sim => }/bfin/a20.S | 0 sim/testsuite/{sim => }/bfin/a21.s | 0 sim/testsuite/{sim => }/bfin/a22.s | 0 sim/testsuite/{sim => }/bfin/a23.s | 0 sim/testsuite/{sim => }/bfin/a24.s | 0 sim/testsuite/{sim => }/bfin/a25.s | 0 sim/testsuite/{sim => }/bfin/a26.s | 0 sim/testsuite/{sim => }/bfin/a3.s | 0 sim/testsuite/{sim => }/bfin/a30.s | 0 sim/testsuite/{sim => }/bfin/a4.s | 0 sim/testsuite/{sim => }/bfin/a5.s | 0 sim/testsuite/{sim => }/bfin/a6.s | 0 sim/testsuite/{sim => }/bfin/a7.s | 0 sim/testsuite/{sim => }/bfin/a8.s | 0 sim/testsuite/{sim => }/bfin/a9.s | 0 sim/testsuite/{sim => }/bfin/abs-2.S | 0 sim/testsuite/{sim => }/bfin/abs-3.S | 0 sim/testsuite/{sim => }/bfin/abs-4.S | 0 sim/testsuite/{sim => }/bfin/abs.S | 0 sim/testsuite/{sim => }/bfin/abs_acc.s | 0 sim/testsuite/{sim => }/bfin/acc-rot.s | 0 sim/testsuite/{sim => }/bfin/acp5_19.s | 0 sim/testsuite/{sim => }/bfin/acp5_4.s | 0 sim/testsuite/{sim => }/bfin/add_imm7.s | 0 sim/testsuite/{sim => }/bfin/add_shift.S | 0 sim/testsuite/{sim => }/bfin/add_sub_acc.s | 0 sim/testsuite/{sim => }/bfin/addsub_flags.S | 0 sim/testsuite/{sim => }/bfin/algnbug1.s | 0 sim/testsuite/{sim => }/bfin/algnbug2.s | 0 sim/testsuite/{sim => }/bfin/allinsn.exp | 0 sim/testsuite/{sim => }/bfin/argc.c | 0 sim/testsuite/{sim => }/bfin/ashift.s | 0 sim/testsuite/{sim => }/bfin/ashift_flags.s | 0 sim/testsuite/{sim => }/bfin/ashift_left.s | 0 sim/testsuite/{sim => }/bfin/b0.S | 0 sim/testsuite/{sim => }/bfin/b1.s | 0 sim/testsuite/{sim => }/bfin/b2.S | 0 sim/testsuite/{sim => }/bfin/brcc.s | 0 sim/testsuite/{sim => }/bfin/brevadd.s | 0 sim/testsuite/{sim => }/bfin/byteop16m.s | 0 sim/testsuite/{sim => }/bfin/byteop16p.s | 0 sim/testsuite/{sim => }/bfin/byteop1p.s | 0 sim/testsuite/{sim => }/bfin/byteop2p.s | 0 sim/testsuite/{sim => }/bfin/byteop3p.s | 0 sim/testsuite/{sim => }/bfin/byteunpack.s | 0 .../{sim => }/bfin/c_alu2op_arith_r_sft.s | 0 sim/testsuite/{sim => }/bfin/c_alu2op_conv_b.s | 0 sim/testsuite/{sim => }/bfin/c_alu2op_conv_h.s | 0 sim/testsuite/{sim => }/bfin/c_alu2op_conv_mix.s | 0 sim/testsuite/{sim => }/bfin/c_alu2op_conv_neg.s | 0 .../{sim => }/bfin/c_alu2op_conv_toggle.s | 0 sim/testsuite/{sim => }/bfin/c_alu2op_conv_xb.s | 0 sim/testsuite/{sim => }/bfin/c_alu2op_conv_xh.s | 0 sim/testsuite/{sim => }/bfin/c_alu2op_divq.s | 0 sim/testsuite/{sim => }/bfin/c_alu2op_divs.s | 0 sim/testsuite/{sim => }/bfin/c_alu2op_log_l_sft.s | 0 sim/testsuite/{sim => }/bfin/c_alu2op_log_r_sft.s | 0 sim/testsuite/{sim => }/bfin/c_alu2op_shadd_1.s | 0 sim/testsuite/{sim => }/bfin/c_alu2op_shadd_2.s | 0 sim/testsuite/{sim => }/bfin/c_br_preg_killed_ac.s | 0 .../{sim => }/bfin/c_br_preg_killed_ex1.s | 0 sim/testsuite/{sim => }/bfin/c_br_preg_stall_ac.s | 0 sim/testsuite/{sim => }/bfin/c_br_preg_stall_ex1.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_bp1.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_bp2.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_bp3.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_bp4.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_brf_bp.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_brf_brt_bp.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_brf_brt_nbp.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_brf_fbkwd.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_brf_nbp.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_brt_bp.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_brt_nbp.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_kills_dhits.s | 0 sim/testsuite/{sim => }/bfin/c_brcc_kills_dmiss.s | 0 sim/testsuite/{sim => }/bfin/c_cactrl_iflush_pr.s | 0 .../{sim => }/bfin/c_cactrl_iflush_pr_pp.s | 0 sim/testsuite/{sim => }/bfin/c_calla_ljump.s | 0 sim/testsuite/{sim => }/bfin/c_calla_subr.s | 0 sim/testsuite/{sim => }/bfin/c_cc2dreg.s | 0 sim/testsuite/{sim => }/bfin/c_cc2stat_cc_ac.S | 0 sim/testsuite/{sim => }/bfin/c_cc2stat_cc_an.s | 0 sim/testsuite/{sim => }/bfin/c_cc2stat_cc_aq.s | 0 sim/testsuite/{sim => }/bfin/c_cc2stat_cc_av0.S | 0 sim/testsuite/{sim => }/bfin/c_cc2stat_cc_av1.S | 0 sim/testsuite/{sim => }/bfin/c_cc2stat_cc_az.s | 0 .../{sim => }/bfin/c_cc_flag_ccmv_depend.S | 0 .../{sim => }/bfin/c_cc_flagdreg_mvbrsft.s | 0 .../{sim => }/bfin/c_cc_flagdreg_mvbrsft_s1.s | 0 .../{sim => }/bfin/c_cc_flagdreg_mvbrsft_sn.s | 0 .../{sim => }/bfin/c_cc_regmvlogi_mvbrsft.s | 0 .../{sim => }/bfin/c_cc_regmvlogi_mvbrsft_s1.s | 0 .../{sim => }/bfin/c_cc_regmvlogi_mvbrsft_sn.S | 0 sim/testsuite/{sim => }/bfin/c_ccflag_a0a1.S | 0 sim/testsuite/{sim => }/bfin/c_ccflag_dr_dr.s | 0 sim/testsuite/{sim => }/bfin/c_ccflag_dr_dr_uu.s | 0 sim/testsuite/{sim => }/bfin/c_ccflag_dr_imm3.s | 0 sim/testsuite/{sim => }/bfin/c_ccflag_dr_imm3_uu.s | 0 sim/testsuite/{sim => }/bfin/c_ccflag_pr_imm3.s | 0 sim/testsuite/{sim => }/bfin/c_ccflag_pr_imm3_uu.s | 0 sim/testsuite/{sim => }/bfin/c_ccflag_pr_pr.s | 0 sim/testsuite/{sim => }/bfin/c_ccflag_pr_pr_uu.s | 0 sim/testsuite/{sim => }/bfin/c_ccmv_cc_dr_dr.s | 0 sim/testsuite/{sim => }/bfin/c_ccmv_cc_dr_pr.s | 0 sim/testsuite/{sim => }/bfin/c_ccmv_cc_pr_pr.s | 0 sim/testsuite/{sim => }/bfin/c_ccmv_ncc_dr_dr.s | 0 sim/testsuite/{sim => }/bfin/c_ccmv_ncc_dr_pr.s | 0 sim/testsuite/{sim => }/bfin/c_ccmv_ncc_pr_pr.s | 0 sim/testsuite/{sim => }/bfin/c_comp3op_dr_and_dr.s | 0 .../{sim => }/bfin/c_comp3op_dr_minus_dr.s | 0 sim/testsuite/{sim => }/bfin/c_comp3op_dr_mix.s | 0 sim/testsuite/{sim => }/bfin/c_comp3op_dr_or_dr.s | 0 .../{sim => }/bfin/c_comp3op_dr_plus_dr.s | 0 sim/testsuite/{sim => }/bfin/c_comp3op_dr_xor_dr.s | 0 .../{sim => }/bfin/c_comp3op_pr_plus_pr_sh1.s | 0 .../{sim => }/bfin/c_comp3op_pr_plus_pr_sh2.s | 0 .../{sim => }/bfin/c_compi2opd_dr_add_i7_n.s | 0 .../{sim => }/bfin/c_compi2opd_dr_add_i7_p.s | 0 .../{sim => }/bfin/c_compi2opd_dr_eq_i7_n.s | 0 .../{sim => }/bfin/c_compi2opd_dr_eq_i7_p.s | 0 sim/testsuite/{sim => }/bfin/c_compi2opd_flags.S | 0 sim/testsuite/{sim => }/bfin/c_compi2opd_flags_2.S | 0 .../{sim => }/bfin/c_compi2opp_pr_add_i7_n.s | 0 .../{sim => }/bfin/c_compi2opp_pr_add_i7_p.s | 0 .../{sim => }/bfin/c_compi2opp_pr_eq_i7_n.s | 0 .../{sim => }/bfin/c_compi2opp_pr_eq_i7_p.s | 0 .../{sim => }/bfin/c_dagmodik_lnz_imgebl.s | 0 .../{sim => }/bfin/c_dagmodik_lnz_imltbl.s | 0 .../{sim => }/bfin/c_dagmodik_lz_inc_dec.s | 0 .../{sim => }/bfin/c_dagmodim_lnz_imgebl.s | 0 .../{sim => }/bfin/c_dagmodim_lnz_imltbl.s | 0 .../{sim => }/bfin/c_dagmodim_lz_inc_dec.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_a0_pm_a1.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_a0a1s.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_a_abs_a.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_a_neg_a.s | 0 .../{sim => }/bfin/c_dsp32alu_aa_absabs.s | 0 .../{sim => }/bfin/c_dsp32alu_aa_negneg.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_abs.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_absabs.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_alhwx.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_awx.s | 0 .../{sim => }/bfin/c_dsp32alu_byteop1ew.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_byteop2.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_byteop3.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_bytepack.s | 0 .../{sim => }/bfin/c_dsp32alu_byteunpack.s | 0 .../{sim => }/bfin/c_dsp32alu_disalnexcpt.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_max.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_maxmax.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_min.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_minmin.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_mix.s | 0 .../{sim => }/bfin/c_dsp32alu_r_lh_a0pa1.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_r_negneg.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_m.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rh_p.s | 0 .../{sim => }/bfin/c_dsp32alu_rh_rnd12_m.s | 0 .../{sim => }/bfin/c_dsp32alu_rh_rnd12_p.s | 0 .../{sim => }/bfin/c_dsp32alu_rh_rnd20_m.s | 0 .../{sim => }/bfin/c_dsp32alu_rh_rnd20_p.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_m.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rl_p.s | 0 .../{sim => }/bfin/c_dsp32alu_rl_rnd12_m.s | 0 .../{sim => }/bfin/c_dsp32alu_rl_rnd12_p.s | 0 .../{sim => }/bfin/c_dsp32alu_rl_rnd20_m.s | 0 .../{sim => }/bfin/c_dsp32alu_rl_rnd20_p.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rlh_rnd.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rm.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rmm.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rmp.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rp.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rpm.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rpp.s | 0 .../{sim => }/bfin/c_dsp32alu_rr_lph_a1a0.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpm.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpm_aa.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rrpmmp.s | 0 .../{sim => }/bfin/c_dsp32alu_rrpmmp_sft.s | 0 .../{sim => }/bfin/c_dsp32alu_rrpmmp_sft_x.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_rrppmm.s | 0 .../{sim => }/bfin/c_dsp32alu_rrppmm_sft.s | 0 .../{sim => }/bfin/c_dsp32alu_rrppmm_sft_x.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_saa.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_sat_aa.S | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_search.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32alu_sgn.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_a1a0.s | 0 .../{sim => }/bfin/c_dsp32mac_a1a0_iuw32.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_a1a0_m.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_i.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_ih.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_is.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_iu.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_m.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_s.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_t.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_tu.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a0_u.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a1.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a1_i.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a1_ih.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a1_is.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a1_iu.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a1_m.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a1_s.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a1_t.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a1_tu.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a1_u.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_dr_a1a0.s | 0 .../{sim => }/bfin/c_dsp32mac_dr_a1a0_iutsh.s | 0 .../{sim => }/bfin/c_dsp32mac_dr_a1a0_m.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_mix.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a0.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a0_i.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a0_is.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a0_m.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a0_s.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a0_u.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_a1.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a1_i.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a1_is.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a1_m.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a1_s.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a1_u.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a1a0.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a1a0_i.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a1a0_is.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a1a0_m.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a1a0_s.s | 0 .../{sim => }/bfin/c_dsp32mac_pair_a1a0_u.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mac_pair_mix.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_i.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_ih.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_is.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_iu.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_i.s | 0 .../{sim => }/bfin/c_dsp32mult_dr_m_iutsh.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_s.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_t.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_m_u.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_mix.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_s.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_t.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_tu.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_dr_u.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_pair.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_i.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_is.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_m.s | 0 .../{sim => }/bfin/c_dsp32mult_pair_m_i.s | 0 .../{sim => }/bfin/c_dsp32mult_pair_m_is.s | 0 .../{sim => }/bfin/c_dsp32mult_pair_m_s.s | 0 .../{sim => }/bfin/c_dsp32mult_pair_m_u.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_s.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32mult_pair_u.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_a0alr.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_af.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_af_s.s | 0 .../{sim => }/bfin/c_dsp32shift_ahalf_ln.s | 0 .../{sim => }/bfin/c_dsp32shift_ahalf_ln_s.s | 0 .../{sim => }/bfin/c_dsp32shift_ahalf_lp.s | 0 .../{sim => }/bfin/c_dsp32shift_ahalf_lp_s.s | 0 .../{sim => }/bfin/c_dsp32shift_ahalf_rn.s | 0 .../{sim => }/bfin/c_dsp32shift_ahalf_rn_s.s | 0 .../{sim => }/bfin/c_dsp32shift_ahalf_rp.s | 0 .../{sim => }/bfin/c_dsp32shift_ahalf_rp_s.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_ahh.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_ahh_s.s | 0 .../{sim => }/bfin/c_dsp32shift_align16.s | 0 .../{sim => }/bfin/c_dsp32shift_align24.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_align8.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_amix.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_bitmux.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_bxor.s | 0 .../{sim => }/bfin/c_dsp32shift_expadj_h.s | 0 .../{sim => }/bfin/c_dsp32shift_expadj_l.s | 0 .../{sim => }/bfin/c_dsp32shift_expadj_r.s | 0 .../{sim => }/bfin/c_dsp32shift_expexp_r.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_fdepx.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_fextx.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_lf.s | 0 .../{sim => }/bfin/c_dsp32shift_lhalf_ln.s | 0 .../{sim => }/bfin/c_dsp32shift_lhalf_lp.s | 0 .../{sim => }/bfin/c_dsp32shift_lhalf_rn.s | 0 .../{sim => }/bfin/c_dsp32shift_lhalf_rp.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_lhh.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_lmix.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_ones.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_pack.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_rot.s | 0 .../{sim => }/bfin/c_dsp32shift_rot_mix.s | 0 .../{sim => }/bfin/c_dsp32shift_signbits_r.s | 0 .../{sim => }/bfin/c_dsp32shift_signbits_rh.s | 0 .../{sim => }/bfin/c_dsp32shift_signbits_rl.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shift_vmax.s | 0 .../{sim => }/bfin/c_dsp32shift_vmaxvmax.s | 0 .../{sim => }/bfin/c_dsp32shiftim_a0alr.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shiftim_af.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shiftim_af_s.s | 0 .../{sim => }/bfin/c_dsp32shiftim_ahalf_ln.s | 0 .../{sim => }/bfin/c_dsp32shiftim_ahalf_ln_s.s | 0 .../{sim => }/bfin/c_dsp32shiftim_ahalf_lp.s | 0 .../{sim => }/bfin/c_dsp32shiftim_ahalf_lp_s.s | 0 .../{sim => }/bfin/c_dsp32shiftim_ahalf_rn.s | 0 .../{sim => }/bfin/c_dsp32shiftim_ahalf_rn_s.s | 0 .../{sim => }/bfin/c_dsp32shiftim_ahalf_rp.s | 0 .../{sim => }/bfin/c_dsp32shiftim_ahalf_rp_s.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shiftim_ahh.s | 0 .../{sim => }/bfin/c_dsp32shiftim_ahh_s.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shiftim_amix.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lf.s | 0 .../{sim => }/bfin/c_dsp32shiftim_lhalf_ln.s | 0 .../{sim => }/bfin/c_dsp32shiftim_lhalf_lp.s | 0 .../{sim => }/bfin/c_dsp32shiftim_lhalf_rn.s | 0 .../{sim => }/bfin/c_dsp32shiftim_lhalf_rp.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lhh.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shiftim_lmix.s | 0 sim/testsuite/{sim => }/bfin/c_dsp32shiftim_rot.s | 0 sim/testsuite/{sim => }/bfin/c_dspldst_ld_dr_i.s | 0 sim/testsuite/{sim => }/bfin/c_dspldst_ld_dr_ipp.s | 0 .../{sim => }/bfin/c_dspldst_ld_dr_ippm.s | 0 sim/testsuite/{sim => }/bfin/c_dspldst_ld_drhi_i.s | 0 .../{sim => }/bfin/c_dspldst_ld_drhi_ipp.s | 0 sim/testsuite/{sim => }/bfin/c_dspldst_ld_drlo_i.s | 0 .../{sim => }/bfin/c_dspldst_ld_drlo_ipp.s | 0 sim/testsuite/{sim => }/bfin/c_dspldst_st_dr_i.s | 0 sim/testsuite/{sim => }/bfin/c_dspldst_st_dr_ipp.s | 0 .../{sim => }/bfin/c_dspldst_st_dr_ippm.s | 0 sim/testsuite/{sim => }/bfin/c_dspldst_st_drhi_i.s | 0 .../{sim => }/bfin/c_dspldst_st_drhi_ipp.s | 0 sim/testsuite/{sim => }/bfin/c_dspldst_st_drlo_i.s | 0 .../{sim => }/bfin/c_dspldst_st_drlo_ipp.s | 0 sim/testsuite/{sim => }/bfin/c_except_illopcode.S | 0 sim/testsuite/{sim => }/bfin/c_except_sys_sstep.S | 0 sim/testsuite/{sim => }/bfin/c_except_user_mode.S | 0 sim/testsuite/{sim => }/bfin/c_interr_disable.S | 0 .../{sim => }/bfin/c_interr_disable_enable.S | 0 sim/testsuite/{sim => }/bfin/c_interr_excpt.S | 0 .../{sim => }/bfin/c_interr_loopsetup_stld.S | 0 sim/testsuite/{sim => }/bfin/c_interr_nested.S | 0 sim/testsuite/{sim => }/bfin/c_interr_nmi.S | 0 sim/testsuite/{sim => }/bfin/c_interr_pending.S | 0 sim/testsuite/{sim => }/bfin/c_interr_pending_2.S | 0 sim/testsuite/{sim => }/bfin/c_interr_timer.S | 0 .../{sim => }/bfin/c_interr_timer_reload.S | 0 .../{sim => }/bfin/c_interr_timer_tcount.S | 0 .../{sim => }/bfin/c_interr_timer_tscale.S | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_dreg.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_drhi.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_drlo.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_h_dr.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_h_ibml.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_h_pr.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_l_dr.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_l_ibml.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_l_pr.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_lz_dr.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_lz_ibml.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_lz_pr.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_lzhi_dr.s | 0 .../{sim => }/bfin/c_ldimmhalf_lzhi_ibml.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_lzhi_pr.s | 0 sim/testsuite/{sim => }/bfin/c_ldimmhalf_pibml.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_b.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_h.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_mm.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_mm_b.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_mm_h.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_mm_xb.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_mm_xh.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_pp.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_pp_b.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_pp_h.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_pp_xb.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_pp_xh.s | 0 .../{sim => }/bfin/c_ldst_ld_d_p_ppmm_hbx.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_xb.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_xh.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_p_p.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_p_p_mm.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_ld_p_p_pp.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_st_p_d.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_b.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_h.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_mm.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_mm_b.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_mm_h.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_pp.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_pp_b.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_pp_h.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_st_p_p.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_st_p_p_mm.s | 0 sim/testsuite/{sim => }/bfin/c_ldst_st_p_p_pp.s | 0 sim/testsuite/{sim => }/bfin/c_ldstidxl_ld_dr_b.s | 0 sim/testsuite/{sim => }/bfin/c_ldstidxl_ld_dr_h.s | 0 sim/testsuite/{sim => }/bfin/c_ldstidxl_ld_dr_xb.s | 0 sim/testsuite/{sim => }/bfin/c_ldstidxl_ld_dr_xh.s | 0 sim/testsuite/{sim => }/bfin/c_ldstidxl_ld_dreg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstidxl_ld_preg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstidxl_st_dr_b.s | 0 sim/testsuite/{sim => }/bfin/c_ldstidxl_st_dr_h.s | 0 sim/testsuite/{sim => }/bfin/c_ldstidxl_st_dreg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstidxl_st_preg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstii_ld_dr_h.s | 0 sim/testsuite/{sim => }/bfin/c_ldstii_ld_dr_xh.s | 0 sim/testsuite/{sim => }/bfin/c_ldstii_ld_dreg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstii_ld_preg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstii_st_dr_h.s | 0 sim/testsuite/{sim => }/bfin/c_ldstii_st_dreg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstii_st_preg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstiifp_ld_dreg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstiifp_ld_preg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstiifp_st_dreg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstiifp_st_preg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstpmod_ld_dr_hi.s | 0 sim/testsuite/{sim => }/bfin/c_ldstpmod_ld_dr_lo.s | 0 sim/testsuite/{sim => }/bfin/c_ldstpmod_ld_dreg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstpmod_ld_h_xh.s | 0 sim/testsuite/{sim => }/bfin/c_ldstpmod_ld_lohi.s | 0 sim/testsuite/{sim => }/bfin/c_ldstpmod_st_dr_hi.s | 0 sim/testsuite/{sim => }/bfin/c_ldstpmod_st_dr_lo.s | 0 sim/testsuite/{sim => }/bfin/c_ldstpmod_st_dreg.s | 0 sim/testsuite/{sim => }/bfin/c_ldstpmod_st_lohi.s | 0 sim/testsuite/{sim => }/bfin/c_linkage.s | 0 .../{sim => }/bfin/c_logi2op_alshft_mix.s | 0 .../{sim => }/bfin/c_logi2op_arith_shft.s | 0 sim/testsuite/{sim => }/bfin/c_logi2op_bitclr.s | 0 sim/testsuite/{sim => }/bfin/c_logi2op_bitset.s | 0 sim/testsuite/{sim => }/bfin/c_logi2op_bittgl.s | 0 sim/testsuite/{sim => }/bfin/c_logi2op_bittst.s | 0 .../{sim => }/bfin/c_logi2op_log_l_shft.s | 0 .../{sim => }/bfin/c_logi2op_log_l_shft_astat.S | 0 .../{sim => }/bfin/c_logi2op_log_r_shft.s | 0 .../{sim => }/bfin/c_logi2op_log_r_shft_astat.S | 0 sim/testsuite/{sim => }/bfin/c_logi2op_nbittst.s | 0 sim/testsuite/{sim => }/bfin/c_loopsetup_nested.s | 0 .../{sim => }/bfin/c_loopsetup_nested_bot.s | 0 .../{sim => }/bfin/c_loopsetup_nested_prelc.s | 0 .../{sim => }/bfin/c_loopsetup_nested_top.s | 0 sim/testsuite/{sim => }/bfin/c_loopsetup_overlap.s | 0 .../{sim => }/bfin/c_loopsetup_preg_div2_lc0.s | 0 .../{sim => }/bfin/c_loopsetup_preg_div2_lc1.s | 0 .../{sim => }/bfin/c_loopsetup_preg_lc0.s | 0 .../{sim => }/bfin/c_loopsetup_preg_lc1.s | 0 .../{sim => }/bfin/c_loopsetup_preg_stld.s | 0 sim/testsuite/{sim => }/bfin/c_loopsetup_prelc.s | 0 .../{sim => }/bfin/c_loopsetup_topbotcntr.s | 0 sim/testsuite/{sim => }/bfin/c_mmr_interr_ctl.s | 0 sim/testsuite/{sim => }/bfin/c_mmr_loop.S | 0 .../{sim => }/bfin/c_mmr_loop_user_except.S | 0 .../{sim => }/bfin/c_mmr_ppop_illegal_adr.S | 0 .../{sim => }/bfin/c_mmr_ppopm_illegal_adr.S | 0 sim/testsuite/{sim => }/bfin/c_mmr_timer.S | 0 sim/testsuite/{sim => }/bfin/c_mode_supervisor.S | 0 sim/testsuite/{sim => }/bfin/c_mode_user.S | 0 .../{sim => }/bfin/c_mode_user_superivsor.S | 0 .../{sim => }/bfin/c_multi_issue_dsp_ld_ld.s | 0 .../{sim => }/bfin/c_multi_issue_dsp_ldst_1.s | 0 .../{sim => }/bfin/c_multi_issue_dsp_ldst_2.s | 0 .../{sim => }/bfin/c_progctrl_call_pcpr.s | 0 sim/testsuite/{sim => }/bfin/c_progctrl_call_pr.s | 0 .../{sim => }/bfin/c_progctrl_clisti_interr.S | 0 .../{sim => }/bfin/c_progctrl_csync_mmr.S | 0 .../{sim => }/bfin/c_progctrl_except_rtx.S | 0 sim/testsuite/{sim => }/bfin/c_progctrl_excpt.S | 0 .../{sim => }/bfin/c_progctrl_jump_pcpr.s | 0 sim/testsuite/{sim => }/bfin/c_progctrl_jump_pr.s | 0 sim/testsuite/{sim => }/bfin/c_progctrl_nop.s | 0 .../{sim => }/bfin/c_progctrl_raise_rt_i_n.S | 0 sim/testsuite/{sim => }/bfin/c_progctrl_rts.s | 0 sim/testsuite/{sim => }/bfin/c_ptr2op_pr_neg_pr.s | 0 sim/testsuite/{sim => }/bfin/c_ptr2op_pr_sft_2_1.s | 0 .../{sim => }/bfin/c_ptr2op_pr_shadd_1_2.s | 0 .../{sim => }/bfin/c_pushpopmultiple_dp.s | 0 .../{sim => }/bfin/c_pushpopmultiple_dp_pair.s | 0 .../{sim => }/bfin/c_pushpopmultiple_dreg.s | 0 .../{sim => }/bfin/c_pushpopmultiple_preg.s | 0 sim/testsuite/{sim => }/bfin/c_regmv_acc_acc.s | 0 sim/testsuite/{sim => }/bfin/c_regmv_dag_lz_dep.s | 0 sim/testsuite/{sim => }/bfin/c_regmv_dr_acc_acc.s | 0 .../{sim => }/bfin/c_regmv_dr_dep_nostall.s | 0 sim/testsuite/{sim => }/bfin/c_regmv_dr_dr.s | 0 sim/testsuite/{sim => }/bfin/c_regmv_dr_imlb.s | 0 sim/testsuite/{sim => }/bfin/c_regmv_dr_pr.s | 0 .../{sim => }/bfin/c_regmv_imlb_dep_nostall.s | 0 .../{sim => }/bfin/c_regmv_imlb_dep_stall.s | 0 sim/testsuite/{sim => }/bfin/c_regmv_imlb_dr.s | 0 sim/testsuite/{sim => }/bfin/c_regmv_imlb_imlb.s | 0 sim/testsuite/{sim => }/bfin/c_regmv_imlb_pr.s | 0 .../{sim => }/bfin/c_regmv_pr_dep_nostall.s | 0 .../{sim => }/bfin/c_regmv_pr_dep_stall.s | 0 sim/testsuite/{sim => }/bfin/c_regmv_pr_dr.s | 0 sim/testsuite/{sim => }/bfin/c_regmv_pr_imlb.s | 0 sim/testsuite/{sim => }/bfin/c_regmv_pr_pr.s | 0 sim/testsuite/{sim => }/bfin/c_seq_ac_raise_mv.S | 0 .../{sim => }/bfin/c_seq_ac_raise_mv_ppop.S | 0 .../{sim => }/bfin/c_seq_ac_regmv_pushpop.S | 0 .../{sim => }/bfin/c_seq_dec_raise_pushpop.S | 0 .../{sim => }/bfin/c_seq_ex1_brcc_mv_pop.S | 0 .../{sim => }/bfin/c_seq_ex1_call_mv_pop.S | 0 sim/testsuite/{sim => }/bfin/c_seq_ex1_j_mv_pop.S | 0 .../{sim => }/bfin/c_seq_ex1_raise_brcc_mv_pop.S | 0 .../{sim => }/bfin/c_seq_ex1_raise_call_mv_pop.S | 0 .../{sim => }/bfin/c_seq_ex1_raise_j_mv_pop.S | 0 .../{sim => }/bfin/c_seq_ex2_brcc_mp_mv_pop.S | 0 sim/testsuite/{sim => }/bfin/c_seq_ex2_mmr_mvpop.S | 0 .../{sim => }/bfin/c_seq_ex2_mmrj_mvpop.S | 0 .../{sim => }/bfin/c_seq_ex2_raise_mmr_mvpop.S | 0 .../{sim => }/bfin/c_seq_ex2_raise_mmrj_mvpop.S | 0 .../{sim => }/bfin/c_seq_ex3_ls_brcc_mvp.S | 0 .../{sim => }/bfin/c_seq_ex3_ls_mmr_mvp.S | 0 .../{sim => }/bfin/c_seq_ex3_ls_mmrj_mvp.S | 0 .../{sim => }/bfin/c_seq_ex3_raise_ls_mmrj_mvp.S | 0 .../{sim => }/bfin/c_seq_wb_cs_lsmmrj_mvp.S | 0 .../{sim => }/bfin/c_seq_wb_raisecs_lsmmrj_mvp.S | 0 .../{sim => }/bfin/c_seq_wb_rti_lsmmrj_mvp.S | 0 .../{sim => }/bfin/c_seq_wb_rtn_lsmmrj_mvp.S | 0 .../{sim => }/bfin/c_seq_wb_rtx_lsmmrj_mvp.S | 0 sim/testsuite/{sim => }/bfin/c_ujump.s | 0 sim/testsuite/{sim => }/bfin/cc-alu.S | 0 sim/testsuite/{sim => }/bfin/cc-astat-bits.s | 0 sim/testsuite/{sim => }/bfin/cc0.s | 0 sim/testsuite/{sim => }/bfin/cc1.s | 0 sim/testsuite/{sim => }/bfin/cc5.S | 0 sim/testsuite/{sim => }/bfin/cec-exact-exception.S | 0 sim/testsuite/{sim => }/bfin/cec-ifetch.S | 0 sim/testsuite/{sim => }/bfin/cec-multi-pending.S | 0 sim/testsuite/{sim => }/bfin/cec-no-snen-reti.S | 0 .../{sim => }/bfin/cec-non-operating-env.s | 0 sim/testsuite/{sim => }/bfin/cec-raise-reti.S | 0 sim/testsuite/{sim => }/bfin/cec-snen-reti.S | 0 sim/testsuite/{sim => }/bfin/cec-syscfg-ssstep.S | 0 sim/testsuite/{sim => }/bfin/cec-system-call.S | 0 sim/testsuite/{sim => }/bfin/cir.s | 0 sim/testsuite/{sim => }/bfin/cir1.s | 0 sim/testsuite/{sim => }/bfin/cli-sti.s | 0 sim/testsuite/{sim => }/bfin/cmpacc.s | 0 sim/testsuite/{sim => }/bfin/cmpdreg.S | 0 sim/testsuite/{sim => }/bfin/compare.s | 0 sim/testsuite/{sim => }/bfin/conv_enc_gen.s | 0 sim/testsuite/{sim => }/bfin/cycles.s | 0 sim/testsuite/{sim => }/bfin/d0.s | 0 sim/testsuite/{sim => }/bfin/d1.s | 0 sim/testsuite/{sim => }/bfin/d2.s | 0 .../{sim => }/bfin/dbg_brprd_ntkn_src_kill.S | 0 .../{sim => }/bfin/dbg_brtkn_nprd_src_kill.S | 0 sim/testsuite/{sim => }/bfin/dbg_jmp_src_kill.S | 0 sim/testsuite/{sim => }/bfin/dbg_tr_basic.S | 0 sim/testsuite/{sim => }/bfin/dbg_tr_simplejp.S | 0 sim/testsuite/{sim => }/bfin/dbg_tr_tbuf0.S | 0 sim/testsuite/{sim => }/bfin/dbg_tr_umode.S | 0 .../{sim => }/bfin/disalnexcpt_implicit.S | 0 sim/testsuite/{sim => }/bfin/div0.s | 0 sim/testsuite/{sim => }/bfin/divq.s | 0 sim/testsuite/{sim => }/bfin/dotproduct.s | 0 sim/testsuite/{sim => }/bfin/dotproduct2.s | 0 sim/testsuite/{sim => }/bfin/double_prec_mult.s | 0 sim/testsuite/{sim => }/bfin/dsp_a4.s | 0 sim/testsuite/{sim => }/bfin/dsp_a7.s | 0 sim/testsuite/{sim => }/bfin/dsp_a8.s | 0 sim/testsuite/{sim => }/bfin/dsp_d0.s | 0 sim/testsuite/{sim => }/bfin/dsp_d1.s | 0 sim/testsuite/{sim => }/bfin/dsp_neg.S | 0 sim/testsuite/{sim => }/bfin/dsp_s1.s | 0 sim/testsuite/{sim => }/bfin/e0.s | 0 sim/testsuite/{sim => }/bfin/edn_snafu.s | 0 sim/testsuite/{sim => }/bfin/eu_dsp32mac_s.s | 0 sim/testsuite/{sim => }/bfin/events.s | 0 sim/testsuite/{sim => }/bfin/f221.s | 0 sim/testsuite/{sim => }/bfin/fact.s | 0 sim/testsuite/{sim => }/bfin/fir.s | 0 sim/testsuite/{sim => }/bfin/fsm.s | 0 sim/testsuite/bfin/getpid.c | 18 + sim/testsuite/{sim => }/bfin/greg2.s | 0 sim/testsuite/{sim => }/bfin/hwloop-bits.S | 0 sim/testsuite/{sim => }/bfin/hwloop-branch-in.s | 0 sim/testsuite/{sim => }/bfin/hwloop-branch-out.s | 0 sim/testsuite/{sim => }/bfin/hwloop-lt-bits.s | 0 sim/testsuite/{sim => }/bfin/hwloop-nested.s | 0 sim/testsuite/{sim => }/bfin/i0.s | 0 sim/testsuite/{sim => }/bfin/iir.s | 0 sim/testsuite/{sim => }/bfin/issue103.s | 0 sim/testsuite/{sim => }/bfin/issue109.s | 0 sim/testsuite/{sim => }/bfin/issue112.s | 0 sim/testsuite/{sim => }/bfin/issue113.s | 0 sim/testsuite/{sim => }/bfin/issue117.s | 0 sim/testsuite/{sim => }/bfin/issue118.s | 0 sim/testsuite/{sim => }/bfin/issue119.s | 0 sim/testsuite/{sim => }/bfin/issue121.s | 0 sim/testsuite/{sim => }/bfin/issue123.s | 0 sim/testsuite/{sim => }/bfin/issue124.s | 0 sim/testsuite/{sim => }/bfin/issue125.s | 0 sim/testsuite/{sim => }/bfin/issue126.s | 0 sim/testsuite/{sim => }/bfin/issue127.s | 0 sim/testsuite/{sim => }/bfin/issue129.s | 0 sim/testsuite/{sim => }/bfin/issue139.S | 0 sim/testsuite/{sim => }/bfin/issue140.S | 0 sim/testsuite/{sim => }/bfin/issue142.s | 0 sim/testsuite/{sim => }/bfin/issue144.s | 0 sim/testsuite/{sim => }/bfin/issue146.S | 0 sim/testsuite/{sim => }/bfin/issue175.s | 0 sim/testsuite/{sim => }/bfin/issue205.s | 0 sim/testsuite/{sim => }/bfin/issue257.s | 0 sim/testsuite/{sim => }/bfin/issue272.S | 0 sim/testsuite/{sim => }/bfin/issue83.s | 0 sim/testsuite/{sim => }/bfin/issue89.s | 0 sim/testsuite/{sim => }/bfin/l0.s | 0 sim/testsuite/{sim => }/bfin/l0shift.s | 0 sim/testsuite/{sim => }/bfin/l2_loop.s | 0 sim/testsuite/{sim => }/bfin/link-2.s | 0 sim/testsuite/{sim => }/bfin/link.s | 0 sim/testsuite/{sim => }/bfin/lmu_cplb_multiple0.S | 0 sim/testsuite/{sim => }/bfin/lmu_cplb_multiple1.S | 0 sim/testsuite/{sim => }/bfin/lmu_excpt_align.S | 0 sim/testsuite/{sim => }/bfin/lmu_excpt_default.S | 0 sim/testsuite/{sim => }/bfin/lmu_excpt_illaddr.S | 0 sim/testsuite/{sim => }/bfin/lmu_excpt_prot0.S | 0 sim/testsuite/{sim => }/bfin/lmu_excpt_prot1.S | 0 sim/testsuite/{sim => }/bfin/load.s | 0 sim/testsuite/{sim => }/bfin/logic.s | 0 sim/testsuite/{sim => }/bfin/loop_snafu.s | 0 sim/testsuite/{sim => }/bfin/loop_strncpy.s | 0 sim/testsuite/{sim => }/bfin/lp0.s | 0 sim/testsuite/{sim => }/bfin/lp1.s | 0 sim/testsuite/{sim => }/bfin/lsetup.s | 0 sim/testsuite/{sim => }/bfin/m0boundary.s | 0 sim/testsuite/{sim => }/bfin/m1.S | 0 sim/testsuite/{sim => }/bfin/m10.s | 0 sim/testsuite/{sim => }/bfin/m11.s | 0 sim/testsuite/{sim => }/bfin/m12.s | 0 sim/testsuite/{sim => }/bfin/m13.s | 0 sim/testsuite/{sim => }/bfin/m14.s | 0 sim/testsuite/{sim => }/bfin/m15.s | 0 sim/testsuite/{sim => }/bfin/m16.s | 0 sim/testsuite/{sim => }/bfin/m17.s | 0 sim/testsuite/{sim => }/bfin/m2.s | 0 sim/testsuite/{sim => }/bfin/m3.s | 0 sim/testsuite/{sim => }/bfin/m4.s | 0 sim/testsuite/{sim => }/bfin/m5.s | 0 sim/testsuite/{sim => }/bfin/m6.s | 0 sim/testsuite/{sim => }/bfin/m7.s | 0 sim/testsuite/{sim => }/bfin/m8.s | 0 sim/testsuite/{sim => }/bfin/m9.s | 0 sim/testsuite/{sim => }/bfin/mac2halfreg.S | 0 sim/testsuite/{sim => }/bfin/math.s | 0 sim/testsuite/{sim => }/bfin/max_min_flags.s | 0 sim/testsuite/{sim => }/bfin/mc_s2.s | 0 .../{sim => }/bfin/mdma-32bit-1d-neg-count.c | 0 sim/testsuite/{sim => }/bfin/mdma-32bit-1d.c | 0 .../{sim => }/bfin/mdma-8bit-1d-neg-count.c | 0 sim/testsuite/{sim => }/bfin/mdma-8bit-1d.c | 0 sim/testsuite/{sim => }/bfin/mdma-skel.h | 0 sim/testsuite/{sim => }/bfin/mem3.s | 0 sim/testsuite/{sim => }/bfin/mmr-exception.s | 0 sim/testsuite/{sim => }/bfin/move.s | 0 sim/testsuite/{sim => }/bfin/msa_acp_5.10.S | 0 sim/testsuite/{sim => }/bfin/msa_acp_5.12_1.S | 0 sim/testsuite/{sim => }/bfin/msa_acp_5.12_2.S | 0 sim/testsuite/{sim => }/bfin/msa_acp_5_10.s | 0 sim/testsuite/{sim => }/bfin/mult.s | 0 sim/testsuite/{sim => }/bfin/neg-2.S | 0 sim/testsuite/{sim => }/bfin/neg-3.S | 0 sim/testsuite/{sim => }/bfin/neg.S | 0 sim/testsuite/{sim => }/bfin/nshift.s | 0 sim/testsuite/{sim => }/bfin/pr.s | 0 sim/testsuite/{sim => }/bfin/push-pop-multiple.s | 0 sim/testsuite/{sim => }/bfin/push-pop.s | 0 sim/testsuite/{sim => }/bfin/pushpopreg_1.s | 0 sim/testsuite/{sim => }/bfin/quadaddsub.s | 0 sim/testsuite/{sim => }/bfin/random_0001.s | 0 sim/testsuite/{sim => }/bfin/random_0002.S | 0 sim/testsuite/{sim => }/bfin/random_0003.S | 0 sim/testsuite/{sim => }/bfin/random_0004.S | 0 sim/testsuite/{sim => }/bfin/random_0005.S | 0 sim/testsuite/{sim => }/bfin/random_0006.S | 0 sim/testsuite/{sim => }/bfin/random_0007.S | 0 sim/testsuite/{sim => }/bfin/random_0008.S | 0 sim/testsuite/{sim => }/bfin/random_0009.S | 0 sim/testsuite/{sim => }/bfin/random_0010.S | 0 sim/testsuite/{sim => }/bfin/random_0011.S | 0 sim/testsuite/{sim => }/bfin/random_0012.S | 0 sim/testsuite/{sim => }/bfin/random_0013.S | 0 sim/testsuite/{sim => }/bfin/random_0014.S | 0 sim/testsuite/{sim => }/bfin/random_0015.S | 0 sim/testsuite/{sim => }/bfin/random_0016.S | 0 sim/testsuite/{sim => }/bfin/random_0017.S | 0 sim/testsuite/{sim => }/bfin/random_0018.S | 0 sim/testsuite/{sim => }/bfin/random_0019.S | 0 sim/testsuite/{sim => }/bfin/random_0020.S | 0 sim/testsuite/{sim => }/bfin/random_0021.S | 0 sim/testsuite/{sim => }/bfin/random_0022.S | 0 sim/testsuite/{sim => }/bfin/random_0023.S | 0 sim/testsuite/{sim => }/bfin/random_0024.S | 0 sim/testsuite/{sim => }/bfin/random_0025.S | 0 sim/testsuite/{sim => }/bfin/random_0026.S | 0 sim/testsuite/{sim => }/bfin/random_0027.S | 0 sim/testsuite/{sim => }/bfin/random_0028.S | 0 sim/testsuite/{sim => }/bfin/random_0029.S | 0 sim/testsuite/{sim => }/bfin/random_0030.S | 0 sim/testsuite/{sim => }/bfin/random_0031.S | 0 sim/testsuite/{sim => }/bfin/random_0032.S | 0 sim/testsuite/{sim => }/bfin/random_0033.S | 0 sim/testsuite/{sim => }/bfin/random_0034.S | 0 sim/testsuite/{sim => }/bfin/random_0035.S | 0 sim/testsuite/{sim => }/bfin/random_0036.S | 0 sim/testsuite/{sim => }/bfin/random_0037.S | 0 sim/testsuite/{sim => }/bfin/run-tests.sh | 0 sim/testsuite/{sim => }/bfin/s0.s | 0 sim/testsuite/{sim => }/bfin/s1.s | 0 sim/testsuite/{sim => }/bfin/s10.s | 0 sim/testsuite/{sim => }/bfin/s11.s | 0 sim/testsuite/{sim => }/bfin/s12.s | 0 sim/testsuite/{sim => }/bfin/s13.s | 0 sim/testsuite/{sim => }/bfin/s14.s | 0 sim/testsuite/{sim => }/bfin/s15.s | 0 sim/testsuite/{sim => }/bfin/s16.s | 0 sim/testsuite/{sim => }/bfin/s17.s | 0 sim/testsuite/{sim => }/bfin/s18.s | 0 sim/testsuite/{sim => }/bfin/s19.s | 0 sim/testsuite/{sim => }/bfin/s2.s | 0 sim/testsuite/{sim => }/bfin/s20.s | 0 sim/testsuite/bfin/s21.s | 297 + sim/testsuite/{sim => }/bfin/s3.s | 0 sim/testsuite/{sim => }/bfin/s30.s | 0 sim/testsuite/{sim => }/bfin/s4.s | 0 sim/testsuite/{sim => }/bfin/s5.s | 0 sim/testsuite/{sim => }/bfin/s6.s | 0 sim/testsuite/{sim => }/bfin/s7.s | 0 sim/testsuite/{sim => }/bfin/s8.s | 0 sim/testsuite/{sim => }/bfin/s9.s | 0 sim/testsuite/{sim => }/bfin/saatest.s | 0 sim/testsuite/{sim => }/bfin/se_all16bitopcodes.S | 0 sim/testsuite/{sim => }/bfin/se_all32bitopcodes.S | 0 .../{sim => }/bfin/se_all32bitopcodes.lds | 0 .../{sim => }/bfin/se_all64bitg0opcodes.S | 0 .../{sim => }/bfin/se_all64bitg1opcodes.S | 0 .../{sim => }/bfin/se_all64bitg2opcodes.S | 0 sim/testsuite/{sim => }/bfin/se_allopcodes.h | 0 sim/testsuite/{sim => }/bfin/se_brtarget_stall.S | 0 sim/testsuite/{sim => }/bfin/se_bug_ui.S | 0 sim/testsuite/{sim => }/bfin/se_bug_ui2.S | 0 sim/testsuite/{sim => }/bfin/se_bug_ui3.S | 0 sim/testsuite/{sim => }/bfin/se_cc2stat_haz.S | 0 sim/testsuite/{sim => }/bfin/se_cc_kill.S | 0 sim/testsuite/{sim => }/bfin/se_cof.S | 0 sim/testsuite/{sim => }/bfin/se_event_quad.S | 0 .../{sim => }/bfin/se_excpt_dagprotviol.S | 0 sim/testsuite/{sim => }/bfin/se_excpt_ifprotviol.S | 0 sim/testsuite/{sim => }/bfin/se_excpt_ssstep.S | 0 .../{sim => }/bfin/se_illegalcombination.S | 0 sim/testsuite/{sim => }/bfin/se_kill_wbbr.S | 0 sim/testsuite/{sim => }/bfin/se_kills2.S | 0 sim/testsuite/{sim => }/bfin/se_loop_disable.S | 0 sim/testsuite/{sim => }/bfin/se_loop_kill.S | 0 sim/testsuite/{sim => }/bfin/se_loop_kill_01.S | 0 sim/testsuite/{sim => }/bfin/se_loop_kill_dcr.S | 0 sim/testsuite/{sim => }/bfin/se_loop_kill_dcr_01.S | 0 sim/testsuite/{sim => }/bfin/se_loop_lr.S | 0 sim/testsuite/{sim => }/bfin/se_loop_mv2lb_stall.S | 0 sim/testsuite/{sim => }/bfin/se_loop_mv2lc.S | 0 sim/testsuite/{sim => }/bfin/se_loop_mv2lc_stall.S | 0 sim/testsuite/{sim => }/bfin/se_loop_mv2lt_stall.S | 0 sim/testsuite/{sim => }/bfin/se_loop_nest_ppm.S | 0 sim/testsuite/{sim => }/bfin/se_loop_nest_ppm_1.S | 0 sim/testsuite/{sim => }/bfin/se_loop_nest_ppm_2.S | 0 sim/testsuite/{sim => }/bfin/se_loop_ppm.S | 0 sim/testsuite/{sim => }/bfin/se_loop_ppm_1.S | 0 sim/testsuite/{sim => }/bfin/se_loop_ppm_int.S | 0 sim/testsuite/{sim => }/bfin/se_lsetup_kill.S | 0 sim/testsuite/{sim => }/bfin/se_misaligned_fetch.S | 0 sim/testsuite/{sim => }/bfin/se_more_ret_haz.S | 0 sim/testsuite/{sim => }/bfin/se_mv2lp.S | 0 sim/testsuite/{sim => }/bfin/se_oneins_zoff.S | 0 sim/testsuite/{sim => }/bfin/se_popkill.S | 0 sim/testsuite/{sim => }/bfin/se_regmv_usp_sysreg.S | 0 sim/testsuite/{sim => }/bfin/se_rets_hazard.s | 0 sim/testsuite/{sim => }/bfin/se_rts_rti.S | 0 .../{sim => }/bfin/se_ssstep_dagprotviol.S | 0 sim/testsuite/{sim => }/bfin/se_ssync.S | 0 sim/testsuite/{sim => }/bfin/se_stall_if2.S | 0 .../{sim => }/bfin/se_undefinedinstruction1.S | 0 .../{sim => }/bfin/se_undefinedinstruction2.S | 0 .../{sim => }/bfin/se_undefinedinstruction3.S | 0 .../{sim => }/bfin/se_undefinedinstruction4.S | 0 .../{sim => }/bfin/se_usermode_protviol.S | 0 sim/testsuite/{sim => }/bfin/seqstat.s | 0 sim/testsuite/{sim => }/bfin/sign.s | 0 sim/testsuite/{sim => }/bfin/simple0.s | 0 sim/testsuite/{sim => }/bfin/sri.s | 0 sim/testsuite/{sim => }/bfin/stk.s | 0 sim/testsuite/{sim => }/bfin/stk2.s | 0 sim/testsuite/{sim => }/bfin/stk3.s | 0 sim/testsuite/{sim => }/bfin/stk4.s | 0 sim/testsuite/{sim => }/bfin/stk5.s | 0 sim/testsuite/{sim => }/bfin/stk6.s | 0 sim/testsuite/{sim => }/bfin/syscfg.s | 0 sim/testsuite/{sim => }/bfin/tar10622.s | 0 sim/testsuite/{sim => }/bfin/test-dma.h | 0 sim/testsuite/{sim => }/bfin/test.h | 0 sim/testsuite/{sim => }/bfin/testset.s | 0 sim/testsuite/{sim => }/bfin/testset2.s | 0 sim/testsuite/{sim => }/bfin/testutils.inc | 0 sim/testsuite/{sim => }/bfin/unlink.S | 0 sim/testsuite/{sim => }/bfin/up0.s | 0 sim/testsuite/{sim => }/bfin/usp.S | 0 sim/testsuite/{sim => }/bfin/vec-abs-2.S | 0 sim/testsuite/{sim => }/bfin/vec-abs-3.S | 0 sim/testsuite/{sim => }/bfin/vec-abs.S | 0 sim/testsuite/{sim => }/bfin/vec-neg-2.S | 0 sim/testsuite/{sim => }/bfin/vec-neg-3.S | 0 sim/testsuite/{sim => }/bfin/vec-neg.S | 0 sim/testsuite/{sim => }/bfin/vecadd.s | 0 sim/testsuite/{sim => }/bfin/vit_max.s | 0 sim/testsuite/{sim => }/bfin/vit_max2.s | 0 sim/testsuite/{sim => }/bfin/viterbi2.s | 0 sim/testsuite/{sim => }/bfin/wtf.s | 0 sim/testsuite/{sim => }/bfin/x1.s | 0 sim/testsuite/{sim => }/bfin/zcall.s | 0 sim/testsuite/{sim => }/bfin/zeroflagrnd.s | 0 sim/testsuite/bpf/ChangeLog | 28 + sim/testsuite/{sim => }/bpf/allinsn.exp | 0 sim/testsuite/{sim => }/bpf/alu.s | 0 sim/testsuite/{sim => }/bpf/alu32.s | 0 sim/testsuite/{sim => }/bpf/endbe.s | 0 sim/testsuite/{sim => }/bpf/endle.s | 0 sim/testsuite/{sim => }/bpf/jmp.s | 0 sim/testsuite/{sim => }/bpf/jmp32.s | 0 sim/testsuite/{sim => }/bpf/ldabs.s | 0 sim/testsuite/{sim => }/bpf/mem.s | 0 sim/testsuite/{sim => }/bpf/mov.s | 0 sim/testsuite/{sim => }/bpf/testutils.inc | 0 sim/testsuite/{sim => }/bpf/xadd.s | 0 sim/testsuite/common/Makefile.in | 53 - sim/testsuite/common/alu-tst.c | 7 +- sim/testsuite/common/bits-gen.c | 25 +- sim/testsuite/common/bits-tst.c | 39 +- sim/testsuite/common/local.mk | 85 + sim/testsuite/configure | 3267 -- sim/testsuite/configure.ac | 32 - sim/testsuite/cr16/ChangeLog | 60 + sim/testsuite/{sim => }/cr16/addb.cgs | 0 sim/testsuite/{sim => }/cr16/addd.cgs | 0 sim/testsuite/{sim => }/cr16/addi.cgs | 0 sim/testsuite/{sim => }/cr16/addw.cgs | 0 sim/testsuite/cr16/allinsn.exp | 28 + sim/testsuite/{sim => }/cr16/andb.cgs | 0 sim/testsuite/{sim => }/cr16/andd.cgs | 0 sim/testsuite/{sim => }/cr16/andw.cgs | 0 sim/testsuite/{sim => }/cr16/ashub.cgs | 0 sim/testsuite/{sim => }/cr16/ashub_i.cgs | 0 sim/testsuite/{sim => }/cr16/ashud.cgs | 0 sim/testsuite/{sim => }/cr16/ashud_i.cgs | 0 sim/testsuite/{sim => }/cr16/ashuw.cgs | 0 sim/testsuite/{sim => }/cr16/ashuw_i.cgs | 0 sim/testsuite/{sim => }/cr16/bal1_24.cgs | 0 sim/testsuite/{sim => }/cr16/bal2_24.cgs | 0 sim/testsuite/{sim => }/cr16/bcc.cgs | 0 sim/testsuite/{sim => }/cr16/bcs.cgs | 0 sim/testsuite/{sim => }/cr16/beq.cgs | 0 sim/testsuite/{sim => }/cr16/beq0b.cgs | 0 sim/testsuite/{sim => }/cr16/beq0w.cgs | 0 sim/testsuite/{sim => }/cr16/bge.cgs | 0 sim/testsuite/{sim => }/cr16/bgt.cgs | 0 sim/testsuite/{sim => }/cr16/bhi.cgs | 0 sim/testsuite/{sim => }/cr16/bhs.cgs | 0 sim/testsuite/{sim => }/cr16/bht.cgs | 0 sim/testsuite/{sim => }/cr16/blo.cgs | 0 sim/testsuite/{sim => }/cr16/bls.cgs | 0 sim/testsuite/{sim => }/cr16/blt.cgs | 0 sim/testsuite/{sim => }/cr16/bne.cgs | 0 sim/testsuite/{sim => }/cr16/bne0b.cgs | 0 sim/testsuite/{sim => }/cr16/bne0w.cgs | 0 sim/testsuite/{sim => }/cr16/br.cgs | 0 sim/testsuite/{sim => }/cr16/cbitb.cgs | 0 sim/testsuite/{sim => }/cr16/cbitw.cgs | 0 sim/testsuite/{sim => }/cr16/cmpb.cgs | 0 sim/testsuite/{sim => }/cr16/cmpb_i.cgs | 0 sim/testsuite/{sim => }/cr16/cmpd.cgs | 0 sim/testsuite/{sim => }/cr16/cmpd_i.cgs | 0 sim/testsuite/{sim => }/cr16/cmpi.cgs | 0 sim/testsuite/{sim => }/cr16/cmpw.cgs | 0 sim/testsuite/{sim => }/cr16/cmpw_i.cgs | 0 sim/testsuite/{sim => }/cr16/excp.cgs | 0 sim/testsuite/{sim => }/cr16/hello.ms | 0 sim/testsuite/{sim => }/cr16/hw-trap.ms | 0 sim/testsuite/{sim => }/cr16/jal.cgs | 0 sim/testsuite/{sim => }/cr16/jcc.cgs | 0 sim/testsuite/{sim => }/cr16/jcs.cgs | 0 sim/testsuite/{sim => }/cr16/jeq.cgs | 0 sim/testsuite/{sim => }/cr16/jfc.cgs | 0 sim/testsuite/{sim => }/cr16/jfs.cgs | 0 sim/testsuite/{sim => }/cr16/jge.cgs | 0 sim/testsuite/{sim => }/cr16/jgt.cgs | 0 sim/testsuite/{sim => }/cr16/jhi.cgs | 0 sim/testsuite/{sim => }/cr16/jhs.cgs | 0 sim/testsuite/{sim => }/cr16/jlo.cgs | 0 sim/testsuite/{sim => }/cr16/jls.cgs | 0 sim/testsuite/{sim => }/cr16/jlt.cgs | 0 sim/testsuite/{sim => }/cr16/jne.cgs | 0 sim/testsuite/{sim => }/cr16/jump.cgs | 0 sim/testsuite/{sim => }/cr16/loadb.cgs | 0 sim/testsuite/{sim => }/cr16/loadd.cgs | 0 sim/testsuite/{sim => }/cr16/loadm.cgs | 0 sim/testsuite/{sim => }/cr16/loadmp.cgs | 0 sim/testsuite/{sim => }/cr16/loadw.cgs | 0 sim/testsuite/{sim => }/cr16/lpr-spr.cgs | 0 sim/testsuite/{sim => }/cr16/lprd-sprd.cgs | 0 sim/testsuite/{sim => }/cr16/lshb.cgs | 0 sim/testsuite/{sim => }/cr16/lshb_i.cgs | 0 sim/testsuite/{sim => }/cr16/lshd.cgs | 0 sim/testsuite/{sim => }/cr16/lshd_i.cgs | 0 sim/testsuite/{sim => }/cr16/lshw.cgs | 0 sim/testsuite/{sim => }/cr16/lshw_i.cgs | 0 sim/testsuite/{sim => }/cr16/macqw.cgs | 0 sim/testsuite/{sim => }/cr16/macsw.cgs | 0 sim/testsuite/{sim => }/cr16/macuw.cgs | 0 sim/testsuite/cr16/misc.exp | 28 + sim/testsuite/{sim => }/cr16/movb.cgs | 0 sim/testsuite/{sim => }/cr16/movd.cgs | 0 sim/testsuite/{sim => }/cr16/movw.cgs | 0 sim/testsuite/{sim => }/cr16/movxb.cgs | 0 sim/testsuite/{sim => }/cr16/movxw.cgs | 0 sim/testsuite/{sim => }/cr16/movzb.cgs | 0 sim/testsuite/{sim => }/cr16/movzw.cgs | 0 sim/testsuite/{sim => }/cr16/mulb.cgs | 0 sim/testsuite/{sim => }/cr16/mulsb.cgs | 0 sim/testsuite/{sim => }/cr16/mulsw.cgs | 0 sim/testsuite/{sim => }/cr16/muluw.cgs | 0 sim/testsuite/{sim => }/cr16/mulw.cgs | 0 sim/testsuite/{sim => }/cr16/nop.cgs | 0 sim/testsuite/{sim => }/cr16/orb.cgs | 0 sim/testsuite/{sim => }/cr16/ord.cgs | 0 sim/testsuite/{sim => }/cr16/orw.cgs | 0 sim/testsuite/{sim => }/cr16/pop1.cgs | 0 sim/testsuite/{sim => }/cr16/pop2.cgs | 0 sim/testsuite/{sim => }/cr16/pop3.cgs | 0 sim/testsuite/{sim => }/cr16/popret1.cgs | 0 sim/testsuite/{sim => }/cr16/popret2.cgs | 0 sim/testsuite/{sim => }/cr16/popret3.cgs | 0 sim/testsuite/{sim => }/cr16/push1.cgs | 0 sim/testsuite/{sim => }/cr16/push2.cgs | 0 sim/testsuite/{sim => }/cr16/push3.cgs | 0 sim/testsuite/{sim => }/cr16/sbitb.cgs | 0 sim/testsuite/{sim => }/cr16/sbitw.cgs | 0 sim/testsuite/{sim => }/cr16/scc.cgs | 0 sim/testsuite/{sim => }/cr16/scs.cgs | 0 sim/testsuite/{sim => }/cr16/seq.cgs | 0 sim/testsuite/{sim => }/cr16/sfc.cgs | 0 sim/testsuite/{sim => }/cr16/sfs.cgs | 0 sim/testsuite/{sim => }/cr16/sge.cgs | 0 sim/testsuite/{sim => }/cr16/sgt.cgs | 0 sim/testsuite/{sim => }/cr16/shi.cgs | 0 sim/testsuite/{sim => }/cr16/shs.cgs | 0 sim/testsuite/{sim => }/cr16/slo.cgs | 0 sim/testsuite/{sim => }/cr16/sls.cgs | 0 sim/testsuite/{sim => }/cr16/slt.cgs | 0 sim/testsuite/{sim => }/cr16/sne.cgs | 0 sim/testsuite/{sim => }/cr16/storb.cgs | 0 sim/testsuite/{sim => }/cr16/stord.cgs | 0 sim/testsuite/{sim => }/cr16/storw.cgs | 0 sim/testsuite/{sim => }/cr16/subb.cgs | 0 sim/testsuite/{sim => }/cr16/subd.cgs | 0 sim/testsuite/{sim => }/cr16/subi.cgs | 0 sim/testsuite/{sim => }/cr16/subw.cgs | 0 sim/testsuite/{sim => }/cr16/tbit.cgs | 0 sim/testsuite/{sim => }/cr16/tbitb.cgs | 0 sim/testsuite/{sim => }/cr16/tbitw.cgs | 0 sim/testsuite/{sim => }/cr16/testutils.inc | 0 sim/testsuite/{sim => }/cr16/uread16.ms | 0 sim/testsuite/{sim => }/cr16/uread32.ms | 0 sim/testsuite/{sim => }/cr16/xorb.cgs | 0 sim/testsuite/{sim => }/cr16/xord.cgs | 0 sim/testsuite/{sim => }/cr16/xorw.cgs | 0 sim/testsuite/cris/ChangeLog | 213 + sim/testsuite/{sim => }/cris/asm/abs.ms | 0 sim/testsuite/{sim => }/cris/asm/addc.ms | 0 sim/testsuite/{sim => }/cris/asm/addcpc.ms | 0 sim/testsuite/{sim => }/cris/asm/addcv32c.ms | 0 sim/testsuite/{sim => }/cris/asm/addcv32m.ms | 0 sim/testsuite/{sim => }/cris/asm/addcv32r.ms | 0 sim/testsuite/{sim => }/cris/asm/addi.ms | 0 sim/testsuite/{sim => }/cris/asm/addiv32.ms | 0 sim/testsuite/{sim => }/cris/asm/addm.ms | 0 sim/testsuite/{sim => }/cris/asm/addoc.ms | 0 sim/testsuite/{sim => }/cris/asm/addom.ms | 0 sim/testsuite/{sim => }/cris/asm/addoq.ms | 0 sim/testsuite/{sim => }/cris/asm/addq.ms | 0 sim/testsuite/{sim => }/cris/asm/addqpc.ms | 0 sim/testsuite/{sim => }/cris/asm/addr.ms | 0 sim/testsuite/{sim => }/cris/asm/addswpc.ms | 0 sim/testsuite/{sim => }/cris/asm/addxc.ms | 0 sim/testsuite/{sim => }/cris/asm/addxm.ms | 0 sim/testsuite/{sim => }/cris/asm/addxr.ms | 0 sim/testsuite/{sim => }/cris/asm/andc.ms | 0 sim/testsuite/{sim => }/cris/asm/andm.ms | 0 sim/testsuite/{sim => }/cris/asm/andq.ms | 0 sim/testsuite/{sim => }/cris/asm/andr.ms | 0 sim/testsuite/{sim => }/cris/asm/asm.exp | 0 sim/testsuite/{sim => }/cris/asm/asr.ms | 0 sim/testsuite/{sim => }/cris/asm/ba.ms | 0 sim/testsuite/{sim => }/cris/asm/badarch1.ms | 0 sim/testsuite/{sim => }/cris/asm/bare1.ms | 0 sim/testsuite/{sim => }/cris/asm/bare2.ms | 0 sim/testsuite/{sim => }/cris/asm/bare3.ms | 0 sim/testsuite/{sim => }/cris/asm/bas.ms | 0 sim/testsuite/{sim => }/cris/asm/bccb.ms | 0 sim/testsuite/{sim => }/cris/asm/bdapc.ms | 0 sim/testsuite/{sim => }/cris/asm/bdapm.ms | 0 sim/testsuite/{sim => }/cris/asm/bdapq.ms | 0 sim/testsuite/{sim => }/cris/asm/bdapqpc.ms | 0 sim/testsuite/{sim => }/cris/asm/biap.ms | 0 sim/testsuite/{sim => }/cris/asm/boundc.ms | 0 sim/testsuite/{sim => }/cris/asm/boundm.ms | 0 sim/testsuite/{sim => }/cris/asm/boundmv32.ms | 0 sim/testsuite/{sim => }/cris/asm/boundr.ms | 0 sim/testsuite/{sim => }/cris/asm/break.ms | 0 sim/testsuite/{sim => }/cris/asm/btst.ms | 0 sim/testsuite/{sim => }/cris/asm/ccr-v10.ms | 0 sim/testsuite/{sim => }/cris/asm/ccs-v32.ms | 0 sim/testsuite/{sim => }/cris/asm/clearfv10.ms | 0 sim/testsuite/{sim => }/cris/asm/clearfv32.ms | 0 sim/testsuite/{sim => }/cris/asm/clrjmp1.ms | 0 sim/testsuite/{sim => }/cris/asm/cmpc.ms | 0 sim/testsuite/{sim => }/cris/asm/cmpm.ms | 0 sim/testsuite/{sim => }/cris/asm/cmpq.ms | 0 sim/testsuite/{sim => }/cris/asm/cmpr.ms | 0 sim/testsuite/{sim => }/cris/asm/cmpxc.ms | 0 sim/testsuite/{sim => }/cris/asm/cmpxm.ms | 0 sim/testsuite/{sim => }/cris/asm/dflags.ms | 0 sim/testsuite/{sim => }/cris/asm/dip.ms | 0 sim/testsuite/{sim => }/cris/asm/dstep.ms | 0 sim/testsuite/{sim => }/cris/asm/fidxd.ms | 0 sim/testsuite/{sim => }/cris/asm/fidxi.ms | 0 sim/testsuite/{sim => }/cris/asm/ftagd.ms | 0 sim/testsuite/{sim => }/cris/asm/ftagi.ms | 0 sim/testsuite/{sim => }/cris/asm/halt.ms | 0 sim/testsuite/{sim => }/cris/asm/io1.ms | 0 sim/testsuite/{sim => }/cris/asm/io2.ms | 0 sim/testsuite/{sim => }/cris/asm/io3.ms | 0 sim/testsuite/{sim => }/cris/asm/io4.ms | 0 sim/testsuite/{sim => }/cris/asm/io5.ms | 0 sim/testsuite/{sim => }/cris/asm/io6.ms | 0 sim/testsuite/{sim => }/cris/asm/io7.ms | 0 sim/testsuite/{sim => }/cris/asm/io8.ms | 0 sim/testsuite/{sim => }/cris/asm/io9.ms | 0 sim/testsuite/{sim => }/cris/asm/jsr.ms | 0 sim/testsuite/{sim => }/cris/asm/jsrmv10.ms | 0 sim/testsuite/{sim => }/cris/asm/jumpmp.ms | 0 sim/testsuite/{sim => }/cris/asm/jumppv32.ms | 0 sim/testsuite/{sim => }/cris/asm/lapc.ms | 0 sim/testsuite/{sim => }/cris/asm/lsl.ms | 0 sim/testsuite/{sim => }/cris/asm/lsr.ms | 0 sim/testsuite/{sim => }/cris/asm/lz.ms | 0 sim/testsuite/{sim => }/cris/asm/mcp.ms | 0 sim/testsuite/{sim => }/cris/asm/movdelsr1.ms | 0 sim/testsuite/{sim => }/cris/asm/movecpc.ms | 0 sim/testsuite/{sim => }/cris/asm/movecr.ms | 0 sim/testsuite/{sim => }/cris/asm/movecrt10.ms | 0 sim/testsuite/{sim => }/cris/asm/movecrt32.ms | 0 sim/testsuite/{sim => }/cris/asm/movect10.ms | 0 sim/testsuite/{sim => }/cris/asm/movei.ms | 0 sim/testsuite/{sim => }/cris/asm/movempc.ms | 0 sim/testsuite/{sim => }/cris/asm/movemr.ms | 0 sim/testsuite/{sim => }/cris/asm/movemrv10.ms | 0 sim/testsuite/{sim => }/cris/asm/movemrv32.ms | 0 sim/testsuite/{sim => }/cris/asm/movepcb.ms | 0 sim/testsuite/{sim => }/cris/asm/movepcd.ms | 0 sim/testsuite/{sim => }/cris/asm/movepcw.ms | 0 sim/testsuite/{sim => }/cris/asm/moveq.ms | 0 sim/testsuite/{sim => }/cris/asm/moveqpc.ms | 0 sim/testsuite/{sim => }/cris/asm/mover.ms | 0 sim/testsuite/{sim => }/cris/asm/moverbpc.ms | 0 sim/testsuite/{sim => }/cris/asm/moverdpc.ms | 0 sim/testsuite/{sim => }/cris/asm/moverm.ms | 0 sim/testsuite/{sim => }/cris/asm/moverpcb.ms | 0 sim/testsuite/{sim => }/cris/asm/moverpcd.ms | 0 sim/testsuite/{sim => }/cris/asm/moverpcw.ms | 0 sim/testsuite/{sim => }/cris/asm/moverwpc.ms | 0 sim/testsuite/{sim => }/cris/asm/movesmp.ms | 0 sim/testsuite/{sim => }/cris/asm/movmp.ms | 0 sim/testsuite/{sim => }/cris/asm/movmp8.ms | 0 sim/testsuite/{sim => }/cris/asm/movpmv10.ms | 0 sim/testsuite/{sim => }/cris/asm/movpmv32.ms | 0 sim/testsuite/{sim => }/cris/asm/movppc.ms | 0 sim/testsuite/{sim => }/cris/asm/movpr.ms | 0 sim/testsuite/{sim => }/cris/asm/movprv10.ms | 0 sim/testsuite/{sim => }/cris/asm/movprv32.ms | 0 sim/testsuite/{sim => }/cris/asm/movrss.ms | 0 sim/testsuite/{sim => }/cris/asm/movscpc.ms | 0 sim/testsuite/{sim => }/cris/asm/movscr.ms | 0 sim/testsuite/{sim => }/cris/asm/movsm.ms | 0 sim/testsuite/{sim => }/cris/asm/movsmpc.ms | 0 sim/testsuite/{sim => }/cris/asm/movsr.ms | 0 sim/testsuite/{sim => }/cris/asm/movsrpc.ms | 0 sim/testsuite/{sim => }/cris/asm/movssr.ms | 0 sim/testsuite/{sim => }/cris/asm/movucpc.ms | 0 sim/testsuite/{sim => }/cris/asm/movucr.ms | 0 sim/testsuite/{sim => }/cris/asm/movum.ms | 0 sim/testsuite/{sim => }/cris/asm/movumpc.ms | 0 sim/testsuite/{sim => }/cris/asm/movur.ms | 0 sim/testsuite/{sim => }/cris/asm/movurpc.ms | 0 sim/testsuite/{sim => }/cris/asm/mstep.ms | 0 sim/testsuite/{sim => }/cris/asm/msteppc1.ms | 0 sim/testsuite/{sim => }/cris/asm/msteppc2.ms | 0 sim/testsuite/{sim => }/cris/asm/msteppc3.ms | 0 sim/testsuite/{sim => }/cris/asm/mulv10.ms | 0 sim/testsuite/{sim => }/cris/asm/mulv32.ms | 0 sim/testsuite/{sim => }/cris/asm/mulx.ms | 0 sim/testsuite/{sim => }/cris/asm/neg.ms | 0 sim/testsuite/{sim => }/cris/asm/nonvcv32.ms | 0 sim/testsuite/{sim => }/cris/asm/nopv10t.ms | 0 sim/testsuite/{sim => }/cris/asm/nopv32t.ms | 0 sim/testsuite/{sim => }/cris/asm/nopv32t2.ms | 0 sim/testsuite/{sim => }/cris/asm/nopv32t3.ms | 0 sim/testsuite/{sim => }/cris/asm/nopv32t4.ms | 0 sim/testsuite/{sim => }/cris/asm/not.ms | 0 sim/testsuite/{sim => }/cris/asm/op3.ms | 0 sim/testsuite/{sim => }/cris/asm/opterr1.ms | 0 sim/testsuite/{sim => }/cris/asm/opterr2.ms | 0 sim/testsuite/{sim => }/cris/asm/opterr3.ms | 0 sim/testsuite/{sim => }/cris/asm/opterr4.ms | 0 sim/testsuite/{sim => }/cris/asm/opterr5.ms | 0 sim/testsuite/{sim => }/cris/asm/option1.ms | 0 sim/testsuite/{sim => }/cris/asm/option2.ms | 0 sim/testsuite/{sim => }/cris/asm/option3.ms | 0 sim/testsuite/{sim => }/cris/asm/option4.ms | 0 sim/testsuite/{sim => }/cris/asm/orc.ms | 0 sim/testsuite/{sim => }/cris/asm/orm.ms | 0 sim/testsuite/{sim => }/cris/asm/orq.ms | 0 sim/testsuite/{sim => }/cris/asm/orr.ms | 0 sim/testsuite/{sim => }/cris/asm/pcplus.ms | 0 sim/testsuite/{sim => }/cris/asm/pid1.ms | 0 sim/testsuite/{sim => }/cris/asm/raw1.ms | 0 sim/testsuite/{sim => }/cris/asm/raw10.ms | 0 sim/testsuite/{sim => }/cris/asm/raw11.ms | 0 sim/testsuite/{sim => }/cris/asm/raw12.ms | 0 sim/testsuite/{sim => }/cris/asm/raw13.ms | 0 sim/testsuite/{sim => }/cris/asm/raw14.ms | 0 sim/testsuite/{sim => }/cris/asm/raw15.ms | 0 sim/testsuite/{sim => }/cris/asm/raw16.ms | 0 sim/testsuite/{sim => }/cris/asm/raw17.ms | 0 sim/testsuite/{sim => }/cris/asm/raw2.ms | 0 sim/testsuite/{sim => }/cris/asm/raw3.ms | 0 sim/testsuite/{sim => }/cris/asm/raw4.ms | 0 sim/testsuite/{sim => }/cris/asm/raw5.ms | 0 sim/testsuite/{sim => }/cris/asm/raw6.ms | 0 sim/testsuite/{sim => }/cris/asm/raw7.ms | 0 sim/testsuite/{sim => }/cris/asm/raw8.ms | 0 sim/testsuite/{sim => }/cris/asm/raw9.ms | 0 sim/testsuite/{sim => }/cris/asm/ret.ms | 0 sim/testsuite/{sim => }/cris/asm/rfe.ms | 0 sim/testsuite/{sim => }/cris/asm/rfg.ms | 0 sim/testsuite/{sim => }/cris/asm/rfn.ms | 0 sim/testsuite/{sim => }/cris/asm/sbfs.ms | 0 sim/testsuite/{sim => }/cris/asm/scc.ms | 0 sim/testsuite/{sim => }/cris/asm/sfe.ms | 0 sim/testsuite/{sim => }/cris/asm/subc.ms | 0 sim/testsuite/{sim => }/cris/asm/subm.ms | 0 sim/testsuite/{sim => }/cris/asm/subq.ms | 0 sim/testsuite/{sim => }/cris/asm/subqpc.ms | 0 sim/testsuite/{sim => }/cris/asm/subr.ms | 0 sim/testsuite/{sim => }/cris/asm/subxc.ms | 0 sim/testsuite/{sim => }/cris/asm/subxm.ms | 0 sim/testsuite/{sim => }/cris/asm/subxr.ms | 0 sim/testsuite/{sim => }/cris/asm/swap.ms | 0 sim/testsuite/{sim => }/cris/asm/tb.ms | 0 sim/testsuite/{sim => }/cris/asm/test.ms | 0 sim/testsuite/{sim => }/cris/asm/testutils.inc | 0 sim/testsuite/{sim => }/cris/asm/tjmpsrv32-2.ms | 0 sim/testsuite/{sim => }/cris/asm/tjmpsrv32.ms | 0 sim/testsuite/{sim => }/cris/asm/tjsrcv10.ms | 0 sim/testsuite/{sim => }/cris/asm/tjsrcv32.ms | 0 sim/testsuite/{sim => }/cris/asm/tmemv10.ms | 0 sim/testsuite/{sim => }/cris/asm/tmemv32.ms | 0 sim/testsuite/{sim => }/cris/asm/tmulv10.ms | 0 sim/testsuite/{sim => }/cris/asm/tmulv32.ms | 0 sim/testsuite/{sim => }/cris/asm/tmvm1.ms | 0 sim/testsuite/{sim => }/cris/asm/tmvm2.ms | 0 sim/testsuite/{sim => }/cris/asm/tmvmrv10.ms | 0 sim/testsuite/{sim => }/cris/asm/tmvmrv32.ms | 0 sim/testsuite/{sim => }/cris/asm/tmvrmv10.ms | 0 sim/testsuite/{sim => }/cris/asm/tmvrmv32.ms | 0 sim/testsuite/{sim => }/cris/asm/user.ms | 0 sim/testsuite/{sim => }/cris/asm/x0-v10.ms | 0 sim/testsuite/{sim => }/cris/asm/x0-v32.ms | 0 sim/testsuite/{sim => }/cris/asm/x1-v10.ms | 0 sim/testsuite/{sim => }/cris/asm/x1-v32.ms | 0 sim/testsuite/{sim => }/cris/asm/x10-v10.ms | 0 sim/testsuite/{sim => }/cris/asm/x2-v10.ms | 0 sim/testsuite/{sim => }/cris/asm/x2-v32.ms | 0 sim/testsuite/{sim => }/cris/asm/x3-v10.ms | 0 sim/testsuite/{sim => }/cris/asm/x3-v32.ms | 0 sim/testsuite/{sim => }/cris/asm/x4-v32.ms | 0 sim/testsuite/{sim => }/cris/asm/x5-v10.ms | 0 sim/testsuite/{sim => }/cris/asm/x5-v32.ms | 0 sim/testsuite/{sim => }/cris/asm/x6-v10.ms | 0 sim/testsuite/{sim => }/cris/asm/x6-v32.ms | 0 sim/testsuite/{sim => }/cris/asm/x7-v10.ms | 0 sim/testsuite/{sim => }/cris/asm/x7-v32.ms | 0 sim/testsuite/{sim => }/cris/asm/x8-v10.ms | 0 sim/testsuite/{sim => }/cris/asm/x9-v10.ms | 0 sim/testsuite/{sim => }/cris/asm/xor.ms | 0 sim/testsuite/{sim => }/cris/c/access1.c | 0 sim/testsuite/{sim => }/cris/c/append1.c | 0 sim/testsuite/{sim => }/cris/c/badldso1.c | 0 sim/testsuite/{sim => }/cris/c/badldso2.c | 0 sim/testsuite/{sim => }/cris/c/badldso3.c | 0 sim/testsuite/cris/c/c.exp | 253 + sim/testsuite/{sim => }/cris/c/clone1.c | 0 sim/testsuite/{sim => }/cris/c/clone2.c | 0 sim/testsuite/{sim => }/cris/c/clone3.c | 0 sim/testsuite/{sim => }/cris/c/clone4.c | 0 sim/testsuite/{sim => }/cris/c/clone5.c | 0 sim/testsuite/{sim => }/cris/c/clone6.c | 0 sim/testsuite/{sim => }/cris/c/ex1.c | 0 sim/testsuite/{sim => }/cris/c/exitg1.c | 0 sim/testsuite/{sim => }/cris/c/exitg2.c | 0 sim/testsuite/{sim => }/cris/c/fcntl1.c | 0 sim/testsuite/{sim => }/cris/c/fcntl2.c | 0 sim/testsuite/{sim => }/cris/c/fdopen1.c | 0 sim/testsuite/{sim => }/cris/c/fdopen2.c | 0 sim/testsuite/{sim => }/cris/c/freopen1.c | 0 sim/testsuite/{sim => }/cris/c/freopen2.c | 0 sim/testsuite/{sim => }/cris/c/ftruncate1.c | 0 sim/testsuite/{sim => }/cris/c/ftruncate2.c | 0 sim/testsuite/{sim => }/cris/c/getcwd1.c | 0 sim/testsuite/{sim => }/cris/c/gettod.c | 0 sim/testsuite/{sim => }/cris/c/hello.c | 0 sim/testsuite/{sim => }/cris/c/helloaout.c | 0 sim/testsuite/{sim => }/cris/c/hellodyn.c | 0 sim/testsuite/{sim => }/cris/c/hellodyn2.c | 0 sim/testsuite/{sim => }/cris/c/hellodyn3.c | 0 sim/testsuite/{sim => }/cris/c/kill1.c | 0 sim/testsuite/{sim => }/cris/c/kill2.c | 0 sim/testsuite/{sim => }/cris/c/kill3.c | 0 sim/testsuite/{sim => }/cris/c/mapbrk.c | 0 sim/testsuite/{sim => }/cris/c/mmap1.c | 0 sim/testsuite/{sim => }/cris/c/mmap2.c | 0 sim/testsuite/{sim => }/cris/c/mmap3.c | 0 sim/testsuite/{sim => }/cris/c/mmap4.c | 0 sim/testsuite/{sim => }/cris/c/mmap5.c | 0 sim/testsuite/{sim => }/cris/c/mmap6.c | 0 sim/testsuite/{sim => }/cris/c/mmap7.c | 0 sim/testsuite/{sim => }/cris/c/mmap8.c | 0 sim/testsuite/{sim => }/cris/c/mprotect1.c | 0 sim/testsuite/{sim => }/cris/c/mprotect2.c | 0 sim/testsuite/{sim => }/cris/c/mremap.c | 0 sim/testsuite/{sim => }/cris/c/openpf1.c | 0 sim/testsuite/{sim => }/cris/c/openpf2.c | 0 sim/testsuite/{sim => }/cris/c/openpf3.c | 0 sim/testsuite/{sim => }/cris/c/openpf4.c | 0 sim/testsuite/{sim => }/cris/c/openpf5.c | 0 sim/testsuite/{sim => }/cris/c/pipe1.c | 0 sim/testsuite/{sim => }/cris/c/pipe2.c | 0 sim/testsuite/{sim => }/cris/c/pipe3.c | 0 sim/testsuite/{sim => }/cris/c/pipe4.c | 0 sim/testsuite/{sim => }/cris/c/pipe5.c | 0 sim/testsuite/{sim => }/cris/c/pipe6.c | 0 sim/testsuite/{sim => }/cris/c/pipe7.c | 0 sim/testsuite/{sim => }/cris/c/readlink1.c | 0 sim/testsuite/{sim => }/cris/c/readlink10.c | 0 sim/testsuite/{sim => }/cris/c/readlink11.c | 0 sim/testsuite/{sim => }/cris/c/readlink2.c | 0 sim/testsuite/{sim => }/cris/c/readlink3.c | 0 sim/testsuite/cris/c/readlink4.c | 62 + sim/testsuite/{sim => }/cris/c/readlink5.c | 0 sim/testsuite/{sim => }/cris/c/readlink6.c | 0 sim/testsuite/{sim => }/cris/c/readlink7.c | 0 sim/testsuite/{sim => }/cris/c/readlink8.c | 0 sim/testsuite/{sim => }/cris/c/readlink9.c | 0 sim/testsuite/{sim => }/cris/c/rename2.c | 0 sim/testsuite/{sim => }/cris/c/rtsigprocmask1.c | 0 sim/testsuite/{sim => }/cris/c/rtsigprocmask2.c | 0 sim/testsuite/{sim => }/cris/c/rtsigsuspend1.c | 0 sim/testsuite/{sim => }/cris/c/rtsigsuspend2.c | 0 sim/testsuite/{sim => }/cris/c/sched1.c | 0 sim/testsuite/{sim => }/cris/c/sched2.c | 0 sim/testsuite/{sim => }/cris/c/sched3.c | 0 sim/testsuite/{sim => }/cris/c/sched4.c | 0 sim/testsuite/{sim => }/cris/c/sched5.c | 0 sim/testsuite/{sim => }/cris/c/sched6.c | 0 sim/testsuite/{sim => }/cris/c/sched7.c | 0 sim/testsuite/{sim => }/cris/c/sched8.c | 0 sim/testsuite/{sim => }/cris/c/sched9.c | 0 sim/testsuite/{sim => }/cris/c/seek1.c | 0 sim/testsuite/{sim => }/cris/c/seek2.c | 0 sim/testsuite/{sim => }/cris/c/seek3.c | 0 sim/testsuite/{sim => }/cris/c/seek4.c | 0 sim/testsuite/{sim => }/cris/c/setrlimit1.c | 0 sim/testsuite/{sim => }/cris/c/settls1.c | 0 sim/testsuite/{sim => }/cris/c/sig1.c | 0 sim/testsuite/{sim => }/cris/c/sig10.c | 0 sim/testsuite/{sim => }/cris/c/sig11.c | 0 sim/testsuite/{sim => }/cris/c/sig12.c | 0 sim/testsuite/{sim => }/cris/c/sig13.c | 0 sim/testsuite/{sim => }/cris/c/sig2.c | 0 sim/testsuite/{sim => }/cris/c/sig3.c | 0 sim/testsuite/{sim => }/cris/c/sig4.c | 0 sim/testsuite/{sim => }/cris/c/sig5.c | 0 sim/testsuite/{sim => }/cris/c/sig6.c | 0 sim/testsuite/{sim => }/cris/c/sig7.c | 0 sim/testsuite/{sim => }/cris/c/sig8.c | 0 sim/testsuite/{sim => }/cris/c/sig9.c | 0 sim/testsuite/{sim => }/cris/c/sigreturn1.c | 0 sim/testsuite/{sim => }/cris/c/sigreturn2.c | 0 sim/testsuite/{sim => }/cris/c/sigreturn3.c | 0 sim/testsuite/{sim => }/cris/c/sigreturn4.c | 0 sim/testsuite/{sim => }/cris/c/sjlj.c | 0 sim/testsuite/{sim => }/cris/c/sock1.c | 0 sim/testsuite/{sim => }/cris/c/stat1.c | 0 sim/testsuite/{sim => }/cris/c/stat2.c | 0 sim/testsuite/{sim => }/cris/c/stat3.c | 0 sim/testsuite/{sim => }/cris/c/stat4.c | 0 sim/testsuite/{sim => }/cris/c/stat5.c | 0 sim/testsuite/{sim => }/cris/c/stat7.c | 0 sim/testsuite/{sim => }/cris/c/stat8.c | 0 sim/testsuite/{sim => }/cris/c/syscall1.c | 0 sim/testsuite/{sim => }/cris/c/syscall2.c | 0 sim/testsuite/{sim => }/cris/c/syscall3.c | 0 sim/testsuite/{sim => }/cris/c/syscall4.c | 0 sim/testsuite/{sim => }/cris/c/syscall5.c | 0 sim/testsuite/{sim => }/cris/c/syscall6.c | 0 sim/testsuite/{sim => }/cris/c/syscall7.c | 0 sim/testsuite/{sim => }/cris/c/syscall8.c | 0 sim/testsuite/{sim => }/cris/c/sysctl1.c | 0 sim/testsuite/{sim => }/cris/c/sysctl2.c | 0 sim/testsuite/{sim => }/cris/c/sysctl3.c | 0 sim/testsuite/{sim => }/cris/c/thread2.c | 0 sim/testsuite/{sim => }/cris/c/thread3.c | 0 sim/testsuite/{sim => }/cris/c/thread4.c | 0 sim/testsuite/{sim => }/cris/c/thread5.c | 0 sim/testsuite/{sim => }/cris/c/time1.c | 0 sim/testsuite/{sim => }/cris/c/time2.c | 0 sim/testsuite/{sim => }/cris/c/truncate1.c | 0 sim/testsuite/{sim => }/cris/c/truncate2.c | 0 sim/testsuite/{sim => }/cris/c/ugetrlimit1.c | 0 sim/testsuite/{sim => }/cris/c/uname1.c | 0 sim/testsuite/{sim => }/cris/c/writev1.c | 0 sim/testsuite/{sim => }/cris/c/writev2.c | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/host1.ms | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/irq1.ms | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/irq2.ms | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/irq3.ms | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/irq4.ms | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/irq5.ms | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/irq6.ms | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/mbox1.ms | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/mem1.ms | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/mem2.ms | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/poll1.ms | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/quit.s | 0 sim/testsuite/cris/hw/rv-n-cris/rvc.exp | 248 + sim/testsuite/{sim => }/cris/hw/rv-n-cris/std.dev | 0 .../{sim => }/cris/hw/rv-n-cris/testutils.inc | 0 .../{sim => }/cris/hw/rv-n-cris/trivial1.ms | 0 .../{sim => }/cris/hw/rv-n-cris/trivial2.ms | 0 .../{sim => }/cris/hw/rv-n-cris/trivial3.ms | 0 .../{sim => }/cris/hw/rv-n-cris/trivial4.ms | 0 .../{sim => }/cris/hw/rv-n-cris/trivial4.r | 0 .../{sim => }/cris/hw/rv-n-cris/trivial5.ms | 0 sim/testsuite/{sim => }/cris/hw/rv-n-cris/wd1.ms | 0 sim/testsuite/d10v-elf/ChangeLog | 139 - sim/testsuite/d10v-elf/Makefile.in | 180 - sim/testsuite/d10v-elf/configure | 2984 -- sim/testsuite/d10v-elf/configure.ac | 18 - sim/testsuite/d10v-elf/exit47.s | 4 - sim/testsuite/d10v-elf/hello.s | 5 - sim/testsuite/d10v-elf/loop.s | 6 - sim/testsuite/d10v-elf/t-ae-ld-d.s | 13 - sim/testsuite/d10v-elf/t-ae-ld-i.s | 16 - sim/testsuite/d10v-elf/t-ae-ld-id.s | 15 - sim/testsuite/d10v-elf/t-ae-ld-im.s | 16 - sim/testsuite/d10v-elf/t-ae-ld-ip.s | 16 - sim/testsuite/d10v-elf/t-ae-ld2w-d.s | 13 - sim/testsuite/d10v-elf/t-ae-ld2w-i.s | 16 - sim/testsuite/d10v-elf/t-ae-ld2w-id.s | 14 - sim/testsuite/d10v-elf/t-ae-ld2w-im.s | 16 - sim/testsuite/d10v-elf/t-ae-ld2w-ip.s | 16 - sim/testsuite/d10v-elf/t-ae-st-d.s | 13 - sim/testsuite/d10v-elf/t-ae-st-i.s | 16 - sim/testsuite/d10v-elf/t-ae-st-id.s | 14 - sim/testsuite/d10v-elf/t-ae-st-im.s | 16 - sim/testsuite/d10v-elf/t-ae-st-ip.s | 16 - sim/testsuite/d10v-elf/t-ae-st-is.s | 16 - sim/testsuite/d10v-elf/t-ae-st2w-d.s | 13 - sim/testsuite/d10v-elf/t-ae-st2w-i.s | 16 - sim/testsuite/d10v-elf/t-ae-st2w-id.s | 14 - sim/testsuite/d10v-elf/t-ae-st2w-im.s | 16 - sim/testsuite/d10v-elf/t-ae-st2w-ip.s | 16 - sim/testsuite/d10v-elf/t-ae-st2w-is.s | 16 - sim/testsuite/d10v-elf/t-dbt.s | 33 - sim/testsuite/d10v-elf/t-ld-st.s | 32 - sim/testsuite/d10v-elf/t-mac.s | 71 - sim/testsuite/d10v-elf/t-macros.i | 233 - sim/testsuite/d10v-elf/t-mod-ld-pre.s | 126 - sim/testsuite/d10v-elf/t-msbu.s | 28 - sim/testsuite/d10v-elf/t-mulxu.s | 28 - sim/testsuite/d10v-elf/t-mvtac.s | 19 - sim/testsuite/d10v-elf/t-mvtc.s | 129 - sim/testsuite/d10v-elf/t-rac.s | 16 - sim/testsuite/d10v-elf/t-rachi.s | 28 - sim/testsuite/d10v-elf/t-rdt.s | 18 - sim/testsuite/d10v-elf/t-rep.s | 45 - sim/testsuite/d10v-elf/t-rie-xx.s | 12 - sim/testsuite/d10v-elf/t-rte.s | 18 - sim/testsuite/d10v-elf/t-sac.s | 23 - sim/testsuite/d10v-elf/t-sachi.s | 22 - sim/testsuite/d10v-elf/t-sadd.s | 38 - sim/testsuite/d10v-elf/t-slae.s | 39 - sim/testsuite/d10v-elf/t-sp.s | 17 - sim/testsuite/d10v-elf/t-sub.s | 42 - sim/testsuite/d10v-elf/t-sub2w.s | 57 - sim/testsuite/d10v-elf/t-subi.s | 39 - sim/testsuite/d10v-elf/t-trap.s | 5 - sim/testsuite/d10v/ChangeLog | 151 + sim/testsuite/d10v/allinsn.exp | 15 + sim/testsuite/d10v/exit47.s | 8 + sim/testsuite/d10v/hello.s | 8 + sim/testsuite/d10v/t-ae-ld-d.s | 17 + sim/testsuite/d10v/t-ae-ld-i.s | 20 + sim/testsuite/d10v/t-ae-ld-id.s | 19 + sim/testsuite/d10v/t-ae-ld-im.s | 20 + sim/testsuite/d10v/t-ae-ld-ip.s | 20 + sim/testsuite/d10v/t-ae-ld2w-d.s | 17 + sim/testsuite/d10v/t-ae-ld2w-i.s | 20 + sim/testsuite/d10v/t-ae-ld2w-id.s | 18 + sim/testsuite/d10v/t-ae-ld2w-im.s | 20 + sim/testsuite/d10v/t-ae-ld2w-ip.s | 20 + sim/testsuite/d10v/t-ae-st-d.s | 17 + sim/testsuite/d10v/t-ae-st-i.s | 20 + sim/testsuite/d10v/t-ae-st-id.s | 18 + sim/testsuite/d10v/t-ae-st-im.s | 20 + sim/testsuite/d10v/t-ae-st-ip.s | 20 + sim/testsuite/d10v/t-ae-st-is.s | 20 + sim/testsuite/d10v/t-ae-st2w-d.s | 17 + sim/testsuite/d10v/t-ae-st2w-i.s | 20 + sim/testsuite/d10v/t-ae-st2w-id.s | 18 + sim/testsuite/d10v/t-ae-st2w-im.s | 20 + sim/testsuite/d10v/t-ae-st2w-ip.s | 20 + sim/testsuite/d10v/t-ae-st2w-is.s | 20 + sim/testsuite/d10v/t-dbt.s | 38 + sim/testsuite/d10v/t-ld-st.s | 36 + sim/testsuite/d10v/t-mac.s | 75 + sim/testsuite/d10v/t-macros.i | 235 + sim/testsuite/d10v/t-mod-ld-pre.s | 126 + sim/testsuite/d10v/t-msbu.s | 32 + sim/testsuite/d10v/t-mulxu.s | 32 + sim/testsuite/d10v/t-mvtac.s | 23 + sim/testsuite/d10v/t-mvtc.s | 134 + sim/testsuite/d10v/t-rac.s | 20 + sim/testsuite/d10v/t-rachi.s | 32 + sim/testsuite/d10v/t-rdt.s | 23 + sim/testsuite/d10v/t-rep.s | 49 + sim/testsuite/d10v/t-rie-xx.s | 16 + sim/testsuite/d10v/t-rte.s | 22 + sim/testsuite/d10v/t-sac.s | 27 + sim/testsuite/d10v/t-sachi.s | 26 + sim/testsuite/d10v/t-sadd.s | 42 + sim/testsuite/d10v/t-slae.s | 43 + sim/testsuite/d10v/t-sp.s | 21 + sim/testsuite/d10v/t-sub.s | 46 + sim/testsuite/d10v/t-sub2w.s | 61 + sim/testsuite/d10v/t-subi.s | 43 + sim/testsuite/d10v/t-trap.s | 10 + sim/testsuite/example-synacor/ChangeLog | 9 + sim/testsuite/example-synacor/add.s | 24 + sim/testsuite/example-synacor/allinsn.exp | 15 + sim/testsuite/example-synacor/and.s | 18 + sim/testsuite/example-synacor/call.s | 14 + sim/testsuite/example-synacor/exit-0.s | 10 + sim/testsuite/example-synacor/gt.s | 31 + sim/testsuite/example-synacor/isa.inc | 108 + sim/testsuite/example-synacor/jmp.s | 9 + sim/testsuite/example-synacor/mem.s | 25 + sim/testsuite/example-synacor/mod.s | 18 + sim/testsuite/example-synacor/mult.s | 18 + sim/testsuite/example-synacor/not.s | 15 + sim/testsuite/example-synacor/or.s | 18 + sim/testsuite/example-synacor/push-pop.s | 22 + sim/testsuite/example-synacor/ret.s | 13 + sim/testsuite/example-synacor/set.s | 20 + sim/testsuite/example-synacor/testutils.inc | 31 + sim/testsuite/frv-elf/ChangeLog | 48 - sim/testsuite/frv-elf/Makefile.in | 158 - sim/testsuite/frv-elf/cache.s | 164 - sim/testsuite/frv-elf/configure | 2984 -- sim/testsuite/frv-elf/configure.ac | 18 - sim/testsuite/frv-elf/exit47.s | 5 - sim/testsuite/frv-elf/grloop.s | 10 - sim/testsuite/frv-elf/hello.s | 16 - sim/testsuite/frv-elf/loop.s | 2 - sim/testsuite/frv/ChangeLog | 94 + sim/testsuite/{sim => }/frv/add.cgs | 0 sim/testsuite/{sim => }/frv/add.pcgs | 0 sim/testsuite/{sim => }/frv/addcc.cgs | 0 sim/testsuite/{sim => }/frv/addi.cgs | 0 sim/testsuite/{sim => }/frv/addicc.cgs | 0 sim/testsuite/{sim => }/frv/addx.cgs | 0 sim/testsuite/{sim => }/frv/addxcc.cgs | 0 sim/testsuite/{sim => }/frv/addxi.cgs | 0 sim/testsuite/{sim => }/frv/addxicc.cgs | 0 sim/testsuite/frv/allinsn.exp | 17 + sim/testsuite/{sim => }/frv/and.cgs | 0 sim/testsuite/{sim => }/frv/andcc.cgs | 0 sim/testsuite/{sim => }/frv/andcr.cgs | 0 sim/testsuite/{sim => }/frv/andi.cgs | 0 sim/testsuite/{sim => }/frv/andicc.cgs | 0 sim/testsuite/{sim => }/frv/andncr.cgs | 0 sim/testsuite/{sim => }/frv/bar.cgs | 0 sim/testsuite/{sim => }/frv/bc.cgs | 0 sim/testsuite/{sim => }/frv/bcclr.cgs | 0 sim/testsuite/{sim => }/frv/bceqlr.cgs | 0 sim/testsuite/{sim => }/frv/bcgelr.cgs | 0 sim/testsuite/{sim => }/frv/bcgtlr.cgs | 0 sim/testsuite/{sim => }/frv/bchilr.cgs | 0 sim/testsuite/{sim => }/frv/bclelr.cgs | 0 sim/testsuite/{sim => }/frv/bclr.cgs | 0 sim/testsuite/{sim => }/frv/bclslr.cgs | 0 sim/testsuite/{sim => }/frv/bcltlr.cgs | 0 sim/testsuite/{sim => }/frv/bcnclr.cgs | 0 sim/testsuite/{sim => }/frv/bcnelr.cgs | 0 sim/testsuite/{sim => }/frv/bcnlr.cgs | 0 sim/testsuite/{sim => }/frv/bcnolr.cgs | 0 sim/testsuite/{sim => }/frv/bcnvlr.cgs | 0 sim/testsuite/{sim => }/frv/bcplr.cgs | 0 sim/testsuite/{sim => }/frv/bcralr.cgs | 0 sim/testsuite/{sim => }/frv/bctrlr.cgs | 0 sim/testsuite/{sim => }/frv/bcvlr.cgs | 0 sim/testsuite/{sim => }/frv/beq.cgs | 0 sim/testsuite/{sim => }/frv/beqlr.cgs | 0 sim/testsuite/{sim => }/frv/bge.cgs | 0 sim/testsuite/{sim => }/frv/bgelr.cgs | 0 sim/testsuite/{sim => }/frv/bgt.cgs | 0 sim/testsuite/{sim => }/frv/bgtlr.cgs | 0 sim/testsuite/{sim => }/frv/bhi.cgs | 0 sim/testsuite/{sim => }/frv/bhilr.cgs | 0 sim/testsuite/{sim => }/frv/ble.cgs | 0 sim/testsuite/{sim => }/frv/blelr.cgs | 0 sim/testsuite/{sim => }/frv/bls.cgs | 0 sim/testsuite/{sim => }/frv/blslr.cgs | 0 sim/testsuite/{sim => }/frv/blt.cgs | 0 sim/testsuite/{sim => }/frv/bltlr.cgs | 0 sim/testsuite/{sim => }/frv/bn.cgs | 0 sim/testsuite/{sim => }/frv/bnc.cgs | 0 sim/testsuite/{sim => }/frv/bnclr.cgs | 0 sim/testsuite/{sim => }/frv/bne.cgs | 0 sim/testsuite/{sim => }/frv/bnelr.cgs | 0 sim/testsuite/{sim => }/frv/bnlr.cgs | 0 sim/testsuite/{sim => }/frv/bno.cgs | 0 sim/testsuite/{sim => }/frv/bnolr.cgs | 0 sim/testsuite/{sim => }/frv/bnv.cgs | 0 sim/testsuite/{sim => }/frv/bnvlr.cgs | 0 sim/testsuite/{sim => }/frv/bp.cgs | 0 sim/testsuite/{sim => }/frv/bplr.cgs | 0 sim/testsuite/{sim => }/frv/bra.cgs | 0 sim/testsuite/{sim => }/frv/bralr.cgs | 0 sim/testsuite/{sim => }/frv/branch.pcgs | 0 sim/testsuite/{sim => }/frv/break.cgs | 0 sim/testsuite/{sim => }/frv/bv.cgs | 0 sim/testsuite/{sim => }/frv/bvlr.cgs | 0 sim/testsuite/frv/cache.ms | 168 + sim/testsuite/{sim => }/frv/cadd.cgs | 0 sim/testsuite/{sim => }/frv/caddcc.cgs | 0 sim/testsuite/{sim => }/frv/call.cgs | 0 sim/testsuite/{sim => }/frv/call.pcgs | 0 sim/testsuite/{sim => }/frv/callil.cgs | 0 sim/testsuite/{sim => }/frv/calll.cgs | 0 sim/testsuite/{sim => }/frv/cand.cgs | 0 sim/testsuite/{sim => }/frv/candcc.cgs | 0 sim/testsuite/{sim => }/frv/ccalll.cgs | 0 sim/testsuite/{sim => }/frv/cckc.cgs | 0 sim/testsuite/{sim => }/frv/cckeq.cgs | 0 sim/testsuite/{sim => }/frv/cckge.cgs | 0 sim/testsuite/{sim => }/frv/cckgt.cgs | 0 sim/testsuite/{sim => }/frv/cckhi.cgs | 0 sim/testsuite/{sim => }/frv/cckle.cgs | 0 sim/testsuite/{sim => }/frv/cckls.cgs | 0 sim/testsuite/{sim => }/frv/ccklt.cgs | 0 sim/testsuite/{sim => }/frv/cckn.cgs | 0 sim/testsuite/{sim => }/frv/ccknc.cgs | 0 sim/testsuite/{sim => }/frv/cckne.cgs | 0 sim/testsuite/{sim => }/frv/cckno.cgs | 0 sim/testsuite/{sim => }/frv/ccknv.cgs | 0 sim/testsuite/{sim => }/frv/cckp.cgs | 0 sim/testsuite/{sim => }/frv/cckra.cgs | 0 sim/testsuite/{sim => }/frv/cckv.cgs | 0 sim/testsuite/{sim => }/frv/ccmp.cgs | 0 sim/testsuite/{sim => }/frv/cfabss.cgs | 0 sim/testsuite/{sim => }/frv/cfadds.cgs | 0 sim/testsuite/{sim => }/frv/cfckeq.cgs | 0 sim/testsuite/{sim => }/frv/cfckge.cgs | 0 sim/testsuite/{sim => }/frv/cfckgt.cgs | 0 sim/testsuite/{sim => }/frv/cfckle.cgs | 0 sim/testsuite/{sim => }/frv/cfcklg.cgs | 0 sim/testsuite/{sim => }/frv/cfcklt.cgs | 0 sim/testsuite/{sim => }/frv/cfckne.cgs | 0 sim/testsuite/{sim => }/frv/cfckno.cgs | 0 sim/testsuite/{sim => }/frv/cfcko.cgs | 0 sim/testsuite/{sim => }/frv/cfckra.cgs | 0 sim/testsuite/{sim => }/frv/cfcku.cgs | 0 sim/testsuite/{sim => }/frv/cfckue.cgs | 0 sim/testsuite/{sim => }/frv/cfckug.cgs | 0 sim/testsuite/{sim => }/frv/cfckuge.cgs | 0 sim/testsuite/{sim => }/frv/cfckul.cgs | 0 sim/testsuite/{sim => }/frv/cfckule.cgs | 0 sim/testsuite/{sim => }/frv/cfcmps.cgs | 0 sim/testsuite/{sim => }/frv/cfdivs.cgs | 0 sim/testsuite/{sim => }/frv/cfitos.cgs | 0 sim/testsuite/{sim => }/frv/cfmadds.cgs | 0 sim/testsuite/{sim => }/frv/cfmas.cgs | 0 sim/testsuite/{sim => }/frv/cfmovs.cgs | 0 sim/testsuite/{sim => }/frv/cfmss.cgs | 0 sim/testsuite/{sim => }/frv/cfmsubs.cgs | 0 sim/testsuite/{sim => }/frv/cfmuls.cgs | 0 sim/testsuite/{sim => }/frv/cfnegs.cgs | 0 sim/testsuite/{sim => }/frv/cfsqrts.cgs | 0 sim/testsuite/{sim => }/frv/cfstoi.cgs | 0 sim/testsuite/{sim => }/frv/cfsubs.cgs | 0 sim/testsuite/{sim => }/frv/cjmpl.cgs | 0 sim/testsuite/{sim => }/frv/ckc.cgs | 0 sim/testsuite/{sim => }/frv/ckeq.cgs | 0 sim/testsuite/{sim => }/frv/ckge.cgs | 0 sim/testsuite/{sim => }/frv/ckgt.cgs | 0 sim/testsuite/{sim => }/frv/ckhi.cgs | 0 sim/testsuite/{sim => }/frv/ckle.cgs | 0 sim/testsuite/{sim => }/frv/ckls.cgs | 0 sim/testsuite/{sim => }/frv/cklt.cgs | 0 sim/testsuite/{sim => }/frv/ckn.cgs | 0 sim/testsuite/{sim => }/frv/cknc.cgs | 0 sim/testsuite/{sim => }/frv/ckne.cgs | 0 sim/testsuite/{sim => }/frv/ckno.cgs | 0 sim/testsuite/{sim => }/frv/cknv.cgs | 0 sim/testsuite/{sim => }/frv/ckp.cgs | 0 sim/testsuite/{sim => }/frv/ckra.cgs | 0 sim/testsuite/{sim => }/frv/ckv.cgs | 0 sim/testsuite/{sim => }/frv/cld.cgs | 0 sim/testsuite/{sim => }/frv/cldbf.cgs | 0 sim/testsuite/{sim => }/frv/cldbfu.cgs | 0 sim/testsuite/{sim => }/frv/cldd.cgs | 0 sim/testsuite/{sim => }/frv/clddf.cgs | 0 sim/testsuite/{sim => }/frv/clddfu.cgs | 0 sim/testsuite/{sim => }/frv/clddu.cgs | 0 sim/testsuite/{sim => }/frv/cldf.cgs | 0 sim/testsuite/{sim => }/frv/cldfu.cgs | 0 sim/testsuite/{sim => }/frv/cldhf.cgs | 0 sim/testsuite/{sim => }/frv/cldhfu.cgs | 0 sim/testsuite/{sim => }/frv/cldq.cgs | 0 sim/testsuite/{sim => }/frv/cldqu.cgs | 0 sim/testsuite/{sim => }/frv/cldsb.cgs | 0 sim/testsuite/{sim => }/frv/cldsbu.cgs | 0 sim/testsuite/{sim => }/frv/cldsh.cgs | 0 sim/testsuite/{sim => }/frv/cldshu.cgs | 0 sim/testsuite/{sim => }/frv/cldu.cgs | 0 sim/testsuite/{sim => }/frv/cldub.cgs | 0 sim/testsuite/{sim => }/frv/cldubu.cgs | 0 sim/testsuite/{sim => }/frv/clduh.cgs | 0 sim/testsuite/{sim => }/frv/clduhu.cgs | 0 sim/testsuite/{sim => }/frv/clrfa.cgs | 0 sim/testsuite/{sim => }/frv/clrfr.cgs | 0 sim/testsuite/{sim => }/frv/clrga.cgs | 0 sim/testsuite/{sim => }/frv/clrgr.cgs | 0 sim/testsuite/{sim => }/frv/cmaddhss.cgs | 0 sim/testsuite/{sim => }/frv/cmaddhus.cgs | 0 sim/testsuite/{sim => }/frv/cmand.cgs | 0 sim/testsuite/{sim => }/frv/cmbtoh.cgs | 0 sim/testsuite/{sim => }/frv/cmbtohe.cgs | 0 sim/testsuite/{sim => }/frv/cmcpxis.cgs | 0 sim/testsuite/{sim => }/frv/cmcpxiu.cgs | 0 sim/testsuite/{sim => }/frv/cmcpxrs.cgs | 0 sim/testsuite/{sim => }/frv/cmcpxru.cgs | 0 sim/testsuite/{sim => }/frv/cmexpdhd.cgs | 0 sim/testsuite/{sim => }/frv/cmexpdhw.cgs | 0 sim/testsuite/{sim => }/frv/cmhtob.cgs | 0 sim/testsuite/{sim => }/frv/cmmachs.cgs | 0 sim/testsuite/{sim => }/frv/cmmachu.cgs | 0 sim/testsuite/{sim => }/frv/cmmulhs.cgs | 0 sim/testsuite/{sim => }/frv/cmmulhu.cgs | 0 sim/testsuite/{sim => }/frv/cmnot.cgs | 0 sim/testsuite/{sim => }/frv/cmor.cgs | 0 sim/testsuite/{sim => }/frv/cmov.cgs | 0 sim/testsuite/{sim => }/frv/cmovfg.cgs | 0 sim/testsuite/{sim => }/frv/cmovfgd.cgs | 0 sim/testsuite/{sim => }/frv/cmovgf.cgs | 0 sim/testsuite/{sim => }/frv/cmovgfd.cgs | 0 sim/testsuite/{sim => }/frv/cmp.cgs | 0 sim/testsuite/{sim => }/frv/cmpb.cgs | 0 sim/testsuite/{sim => }/frv/cmpba.cgs | 0 sim/testsuite/{sim => }/frv/cmpi.cgs | 0 sim/testsuite/{sim => }/frv/cmqmachs.cgs | 0 sim/testsuite/{sim => }/frv/cmqmachu.cgs | 0 sim/testsuite/{sim => }/frv/cmqmulhs.cgs | 0 sim/testsuite/{sim => }/frv/cmqmulhu.cgs | 0 sim/testsuite/{sim => }/frv/cmsubhss.cgs | 0 sim/testsuite/{sim => }/frv/cmsubhus.cgs | 0 sim/testsuite/{sim => }/frv/cmxor.cgs | 0 sim/testsuite/{sim => }/frv/cnot.cgs | 0 sim/testsuite/{sim => }/frv/commitfa.cgs | 0 sim/testsuite/{sim => }/frv/commitfr.cgs | 0 sim/testsuite/{sim => }/frv/commitga.cgs | 0 sim/testsuite/{sim => }/frv/commitgr.cgs | 0 sim/testsuite/{sim => }/frv/cop1.cgs | 0 sim/testsuite/{sim => }/frv/cop2.cgs | 0 sim/testsuite/{sim => }/frv/cor.cgs | 0 sim/testsuite/{sim => }/frv/corcc.cgs | 0 sim/testsuite/{sim => }/frv/cscan.cgs | 0 sim/testsuite/{sim => }/frv/csdiv.cgs | 0 sim/testsuite/{sim => }/frv/csll.cgs | 0 sim/testsuite/{sim => }/frv/csllcc.cgs | 0 sim/testsuite/{sim => }/frv/csmul.cgs | 0 sim/testsuite/{sim => }/frv/csmulcc.cgs | 0 sim/testsuite/{sim => }/frv/csra.cgs | 0 sim/testsuite/{sim => }/frv/csracc.cgs | 0 sim/testsuite/{sim => }/frv/csrl.cgs | 0 sim/testsuite/{sim => }/frv/csrlcc.cgs | 0 sim/testsuite/{sim => }/frv/cst.cgs | 0 sim/testsuite/{sim => }/frv/cstb.cgs | 0 sim/testsuite/{sim => }/frv/cstbf.cgs | 0 sim/testsuite/{sim => }/frv/cstbfu.cgs | 0 sim/testsuite/{sim => }/frv/cstbu.cgs | 0 sim/testsuite/{sim => }/frv/cstd.cgs | 0 sim/testsuite/{sim => }/frv/cstdf.cgs | 0 sim/testsuite/{sim => }/frv/cstdfu.cgs | 0 sim/testsuite/{sim => }/frv/cstdu.cgs | 0 sim/testsuite/{sim => }/frv/cstf.cgs | 0 sim/testsuite/{sim => }/frv/cstfu.cgs | 0 sim/testsuite/{sim => }/frv/csth.cgs | 0 sim/testsuite/{sim => }/frv/csthf.cgs | 0 sim/testsuite/{sim => }/frv/csthfu.cgs | 0 sim/testsuite/{sim => }/frv/csthu.cgs | 0 sim/testsuite/{sim => }/frv/cstq.cgs | 0 sim/testsuite/{sim => }/frv/cstu.cgs | 0 sim/testsuite/{sim => }/frv/csub.cgs | 0 sim/testsuite/{sim => }/frv/csubcc.cgs | 0 sim/testsuite/{sim => }/frv/cswap.cgs | 0 sim/testsuite/{sim => }/frv/cudiv.cgs | 0 sim/testsuite/{sim => }/frv/cxor.cgs | 0 sim/testsuite/{sim => }/frv/cxorcc.cgs | 0 sim/testsuite/{sim => }/frv/dcef.cgs | 0 sim/testsuite/{sim => }/frv/dcei.cgs | 0 sim/testsuite/{sim => }/frv/dcf.cgs | 0 sim/testsuite/{sim => }/frv/dci.cgs | 0 sim/testsuite/frv/exit47.ms | 11 + sim/testsuite/{sim => }/frv/fabsd.cgs | 0 sim/testsuite/{sim => }/frv/fabss.cgs | 0 sim/testsuite/{sim => }/frv/faddd.cgs | 0 sim/testsuite/{sim => }/frv/fadds.cgs | 0 sim/testsuite/{sim => }/frv/fbeq.cgs | 0 sim/testsuite/{sim => }/frv/fbeqlr.cgs | 0 sim/testsuite/{sim => }/frv/fbge.cgs | 0 sim/testsuite/{sim => }/frv/fbgelr.cgs | 0 sim/testsuite/{sim => }/frv/fbgt.cgs | 0 sim/testsuite/{sim => }/frv/fbgtlr.cgs | 0 sim/testsuite/{sim => }/frv/fble.cgs | 0 sim/testsuite/{sim => }/frv/fblelr.cgs | 0 sim/testsuite/{sim => }/frv/fblg.cgs | 0 sim/testsuite/{sim => }/frv/fblglr.cgs | 0 sim/testsuite/{sim => }/frv/fblt.cgs | 0 sim/testsuite/{sim => }/frv/fbltlr.cgs | 0 sim/testsuite/{sim => }/frv/fbne.cgs | 0 sim/testsuite/{sim => }/frv/fbnelr.cgs | 0 sim/testsuite/{sim => }/frv/fbno.cgs | 0 sim/testsuite/{sim => }/frv/fbnolr.cgs | 0 sim/testsuite/{sim => }/frv/fbo.cgs | 0 sim/testsuite/{sim => }/frv/fbolr.cgs | 0 sim/testsuite/{sim => }/frv/fbra.cgs | 0 sim/testsuite/{sim => }/frv/fbralr.cgs | 0 sim/testsuite/{sim => }/frv/fbu.cgs | 0 sim/testsuite/{sim => }/frv/fbue.cgs | 0 sim/testsuite/{sim => }/frv/fbuelr.cgs | 0 sim/testsuite/{sim => }/frv/fbug.cgs | 0 sim/testsuite/{sim => }/frv/fbuge.cgs | 0 sim/testsuite/{sim => }/frv/fbugelr.cgs | 0 sim/testsuite/{sim => }/frv/fbuglr.cgs | 0 sim/testsuite/{sim => }/frv/fbul.cgs | 0 sim/testsuite/{sim => }/frv/fbule.cgs | 0 sim/testsuite/{sim => }/frv/fbulelr.cgs | 0 sim/testsuite/{sim => }/frv/fbullr.cgs | 0 sim/testsuite/{sim => }/frv/fbulr.cgs | 0 sim/testsuite/{sim => }/frv/fcbeqlr.cgs | 0 sim/testsuite/{sim => }/frv/fcbgelr.cgs | 0 sim/testsuite/{sim => }/frv/fcbgtlr.cgs | 0 sim/testsuite/{sim => }/frv/fcblelr.cgs | 0 sim/testsuite/{sim => }/frv/fcblglr.cgs | 0 sim/testsuite/{sim => }/frv/fcbltlr.cgs | 0 sim/testsuite/{sim => }/frv/fcbnelr.cgs | 0 sim/testsuite/{sim => }/frv/fcbnolr.cgs | 0 sim/testsuite/{sim => }/frv/fcbolr.cgs | 0 sim/testsuite/{sim => }/frv/fcbralr.cgs | 0 sim/testsuite/{sim => }/frv/fcbuelr.cgs | 0 sim/testsuite/{sim => }/frv/fcbugelr.cgs | 0 sim/testsuite/{sim => }/frv/fcbuglr.cgs | 0 sim/testsuite/{sim => }/frv/fcbulelr.cgs | 0 sim/testsuite/{sim => }/frv/fcbullr.cgs | 0 sim/testsuite/{sim => }/frv/fcbulr.cgs | 0 sim/testsuite/{sim => }/frv/fckeq.cgs | 0 sim/testsuite/{sim => }/frv/fckge.cgs | 0 sim/testsuite/{sim => }/frv/fckgt.cgs | 0 sim/testsuite/{sim => }/frv/fckle.cgs | 0 sim/testsuite/{sim => }/frv/fcklg.cgs | 0 sim/testsuite/{sim => }/frv/fcklt.cgs | 0 sim/testsuite/{sim => }/frv/fckne.cgs | 0 sim/testsuite/{sim => }/frv/fckno.cgs | 0 sim/testsuite/{sim => }/frv/fcko.cgs | 0 sim/testsuite/{sim => }/frv/fckra.cgs | 0 sim/testsuite/{sim => }/frv/fcku.cgs | 0 sim/testsuite/{sim => }/frv/fckue.cgs | 0 sim/testsuite/{sim => }/frv/fckug.cgs | 0 sim/testsuite/{sim => }/frv/fckuge.cgs | 0 sim/testsuite/{sim => }/frv/fckul.cgs | 0 sim/testsuite/{sim => }/frv/fckule.cgs | 0 sim/testsuite/{sim => }/frv/fcmpd.cgs | 0 sim/testsuite/{sim => }/frv/fcmps.cgs | 0 sim/testsuite/{sim => }/frv/fdabss.cgs | 0 sim/testsuite/{sim => }/frv/fdadds.cgs | 0 sim/testsuite/{sim => }/frv/fdcmps.cgs | 0 sim/testsuite/{sim => }/frv/fddivs.cgs | 0 sim/testsuite/{sim => }/frv/fditos.cgs | 0 sim/testsuite/{sim => }/frv/fdivd.cgs | 0 sim/testsuite/{sim => }/frv/fdivs.cgs | 0 sim/testsuite/{sim => }/frv/fdmadds.cgs | 0 sim/testsuite/{sim => }/frv/fdmas.cgs | 0 sim/testsuite/{sim => }/frv/fdmovs.cgs | 0 sim/testsuite/{sim => }/frv/fdmss.cgs | 0 sim/testsuite/{sim => }/frv/fdmulcs.cgs | 0 sim/testsuite/{sim => }/frv/fdmuls.cgs | 0 sim/testsuite/{sim => }/frv/fdnegs.cgs | 0 sim/testsuite/{sim => }/frv/fdsads.cgs | 0 sim/testsuite/{sim => }/frv/fdsqrts.cgs | 0 sim/testsuite/{sim => }/frv/fdstoi.cgs | 0 sim/testsuite/{sim => }/frv/fdsubs.cgs | 0 sim/testsuite/{sim => }/frv/fdtoi.cgs | 0 sim/testsuite/{sim => }/frv/fitod.cgs | 0 sim/testsuite/{sim => }/frv/fitos.cgs | 0 sim/testsuite/{sim => }/frv/fmad.cgs | 0 sim/testsuite/{sim => }/frv/fmaddd.cgs | 0 sim/testsuite/{sim => }/frv/fmadds.cgs | 0 sim/testsuite/{sim => }/frv/fmas.cgs | 0 sim/testsuite/{sim => }/frv/fmovd.cgs | 0 sim/testsuite/{sim => }/frv/fmovs.cgs | 0 sim/testsuite/{sim => }/frv/fmsd.cgs | 0 sim/testsuite/{sim => }/frv/fmss.cgs | 0 sim/testsuite/{sim => }/frv/fmsubd.cgs | 0 sim/testsuite/{sim => }/frv/fmsubs.cgs | 0 sim/testsuite/{sim => }/frv/fmuld.cgs | 0 sim/testsuite/{sim => }/frv/fmuls.cgs | 0 sim/testsuite/{sim => }/frv/fnegd.cgs | 0 sim/testsuite/{sim => }/frv/fnegs.cgs | 0 sim/testsuite/{sim => }/frv/fnop.cgs | 0 sim/testsuite/{sim => }/frv/fr400/addss.cgs | 0 sim/testsuite/frv/fr400/allinsn.exp | 17 + sim/testsuite/{sim => }/frv/fr400/csdiv.cgs | 0 sim/testsuite/{sim => }/frv/fr400/maddaccs.cgs | 0 sim/testsuite/{sim => }/frv/fr400/masaccs.cgs | 0 sim/testsuite/{sim => }/frv/fr400/maveh.cgs | 0 sim/testsuite/{sim => }/frv/fr400/mclracc.cgs | 0 sim/testsuite/{sim => }/frv/fr400/mhdseth.cgs | 0 sim/testsuite/{sim => }/frv/fr400/mhdsets.cgs | 0 sim/testsuite/{sim => }/frv/fr400/mhsethih.cgs | 0 sim/testsuite/{sim => }/frv/fr400/mhsethis.cgs | 0 sim/testsuite/{sim => }/frv/fr400/mhsetloh.cgs | 0 sim/testsuite/{sim => }/frv/fr400/mhsetlos.cgs | 0 sim/testsuite/{sim => }/frv/fr400/movgs.cgs | 0 sim/testsuite/{sim => }/frv/fr400/movsg.cgs | 0 sim/testsuite/{sim => }/frv/fr400/msubaccs.cgs | 0 sim/testsuite/{sim => }/frv/fr400/scutss.cgs | 0 sim/testsuite/{sim => }/frv/fr400/sdiv.cgs | 0 sim/testsuite/{sim => }/frv/fr400/sdivi.cgs | 0 sim/testsuite/{sim => }/frv/fr400/slass.cgs | 0 sim/testsuite/{sim => }/frv/fr400/smass.cgs | 0 sim/testsuite/{sim => }/frv/fr400/smsss.cgs | 0 sim/testsuite/{sim => }/frv/fr400/smu.cgs | 0 sim/testsuite/{sim => }/frv/fr400/subss.cgs | 0 sim/testsuite/{sim => }/frv/fr400/udiv.cgs | 0 sim/testsuite/{sim => }/frv/fr400/udivi.cgs | 0 sim/testsuite/frv/fr500/allinsn.exp | 17 + sim/testsuite/{sim => }/frv/fr500/cmqaddhss.cgs | 0 sim/testsuite/{sim => }/frv/fr500/cmqaddhus.cgs | 0 sim/testsuite/{sim => }/frv/fr500/cmqsubhss.cgs | 0 sim/testsuite/{sim => }/frv/fr500/cmqsubhus.cgs | 0 sim/testsuite/{sim => }/frv/fr500/dcpl.cgs | 0 sim/testsuite/{sim => }/frv/fr500/dcul.cgs | 0 sim/testsuite/{sim => }/frv/fr500/mclracc.cgs | 0 sim/testsuite/{sim => }/frv/fr500/mqaddhss.cgs | 0 sim/testsuite/{sim => }/frv/fr500/mqaddhus.cgs | 0 sim/testsuite/{sim => }/frv/fr500/mqsubhss.cgs | 0 sim/testsuite/{sim => }/frv/fr500/mqsubhus.cgs | 0 sim/testsuite/frv/fr550/allinsn.exp | 17 + sim/testsuite/{sim => }/frv/fr550/cmaddhss.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmaddhus.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmcpxiu.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmcpxru.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmmachs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmmachu.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmqaddhss.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmqaddhus.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmqmachs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmqmachu.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmqsubhss.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmqsubhus.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmsubhss.cgs | 0 sim/testsuite/{sim => }/frv/fr550/cmsubhus.cgs | 0 sim/testsuite/{sim => }/frv/fr550/dcpl.cgs | 0 sim/testsuite/{sim => }/frv/fr550/dcul.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mabshs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/maddaccs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/maddhss.cgs | 0 sim/testsuite/{sim => }/frv/fr550/maddhus.cgs | 0 sim/testsuite/{sim => }/frv/fr550/masaccs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mdaddaccs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mdasaccs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mdsubaccs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mmachs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mmachu.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mmrdhs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mmrdhu.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mqaddhss.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mqaddhus.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mqmachs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mqmachu.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mqmacxhs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mqsubhss.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mqsubhus.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mqxmachs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mqxmacxhs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/msubaccs.cgs | 0 sim/testsuite/{sim => }/frv/fr550/msubhss.cgs | 0 sim/testsuite/{sim => }/frv/fr550/msubhus.cgs | 0 sim/testsuite/{sim => }/frv/fr550/mtrap.cgs | 0 sim/testsuite/{sim => }/frv/fr550/udiv.cgs | 0 sim/testsuite/{sim => }/frv/fr550/udivi.cgs | 0 sim/testsuite/{sim => }/frv/fsqrtd.cgs | 0 sim/testsuite/{sim => }/frv/fsqrts.cgs | 0 sim/testsuite/{sim => }/frv/fstoi.cgs | 0 sim/testsuite/{sim => }/frv/fsubd.cgs | 0 sim/testsuite/{sim => }/frv/fsubs.cgs | 0 sim/testsuite/{sim => }/frv/fteq.cgs | 0 sim/testsuite/{sim => }/frv/ftge.cgs | 0 sim/testsuite/{sim => }/frv/ftgt.cgs | 0 sim/testsuite/{sim => }/frv/ftieq.cgs | 0 sim/testsuite/{sim => }/frv/ftige.cgs | 0 sim/testsuite/{sim => }/frv/ftigt.cgs | 0 sim/testsuite/{sim => }/frv/ftile.cgs | 0 sim/testsuite/{sim => }/frv/ftilg.cgs | 0 sim/testsuite/{sim => }/frv/ftilt.cgs | 0 sim/testsuite/{sim => }/frv/ftine.cgs | 0 sim/testsuite/{sim => }/frv/ftino.cgs | 0 sim/testsuite/{sim => }/frv/ftio.cgs | 0 sim/testsuite/{sim => }/frv/ftira.cgs | 0 sim/testsuite/{sim => }/frv/ftiu.cgs | 0 sim/testsuite/{sim => }/frv/ftiue.cgs | 0 sim/testsuite/{sim => }/frv/ftiug.cgs | 0 sim/testsuite/{sim => }/frv/ftiuge.cgs | 0 sim/testsuite/{sim => }/frv/ftiul.cgs | 0 sim/testsuite/{sim => }/frv/ftle.cgs | 0 sim/testsuite/{sim => }/frv/ftlg.cgs | 0 sim/testsuite/{sim => }/frv/ftlt.cgs | 0 sim/testsuite/{sim => }/frv/ftne.cgs | 0 sim/testsuite/{sim => }/frv/ftno.cgs | 0 sim/testsuite/{sim => }/frv/fto.cgs | 0 sim/testsuite/{sim => }/frv/ftra.cgs | 0 sim/testsuite/{sim => }/frv/ftu.cgs | 0 sim/testsuite/{sim => }/frv/ftue.cgs | 0 sim/testsuite/{sim => }/frv/ftug.cgs | 0 sim/testsuite/{sim => }/frv/ftuge.cgs | 0 sim/testsuite/{sim => }/frv/ftul.cgs | 0 sim/testsuite/{sim => }/frv/ftule.cgs | 0 sim/testsuite/frv/grloop.ms | 13 + sim/testsuite/frv/hello.ms | 19 + sim/testsuite/{sim => }/frv/icei.cgs | 0 sim/testsuite/{sim => }/frv/ici.cgs | 0 sim/testsuite/{sim => }/frv/icpl.cgs | 0 sim/testsuite/{sim => }/frv/icul.cgs | 0 sim/testsuite/frv/interrupts.exp | 17 + .../{sim => }/frv/interrupts/Ipipe-fr400.cgs | 0 .../{sim => }/frv/interrupts/Ipipe-fr500.cgs | 0 .../{sim => }/frv/interrupts/badalign-fr550.cgs | 0 .../{sim => }/frv/interrupts/badalign.cgs | 0 .../{sim => }/frv/interrupts/compound-fr550.cgs | 0 .../{sim => }/frv/interrupts/compound.cgs | 0 .../frv/interrupts/data_store_error-fr550.cgs | 0 .../{sim => }/frv/interrupts/data_store_error.cgs | 0 .../frv/interrupts/fp_exception-fr550.cgs | 0 .../{sim => }/frv/interrupts/fp_exception.cgs | 0 sim/testsuite/{sim => }/frv/interrupts/illinsn.cgs | 0 .../frv/interrupts/insn_access_error-fr550.cgs | 0 .../{sim => }/frv/interrupts/insn_access_error.cgs | 0 .../{sim => }/frv/interrupts/mp_exception.cgs | 0 .../frv/interrupts/privileged_instruction.cgs | 0 .../{sim => }/frv/interrupts/regalign.cgs | 0 sim/testsuite/{sim => }/frv/interrupts/reset.cgs | 0 .../{sim => }/frv/interrupts/shadow_regs.cgs | 0 sim/testsuite/{sim => }/frv/interrupts/timer.cgs | 0 sim/testsuite/{sim => }/frv/jmpil.cgs | 0 sim/testsuite/{sim => }/frv/jmpl.cgs | 0 sim/testsuite/{sim => }/frv/jmpl.pcgs | 0 sim/testsuite/{sim => }/frv/ld.cgs | 0 sim/testsuite/{sim => }/frv/ldbf.cgs | 0 sim/testsuite/{sim => }/frv/ldbfi.cgs | 0 sim/testsuite/{sim => }/frv/ldbfu.cgs | 0 sim/testsuite/{sim => }/frv/ldc.cgs | 0 sim/testsuite/{sim => }/frv/ldcu.cgs | 0 sim/testsuite/{sim => }/frv/ldd.cgs | 0 sim/testsuite/{sim => }/frv/lddc.cgs | 0 sim/testsuite/{sim => }/frv/lddcu.cgs | 0 sim/testsuite/{sim => }/frv/lddf.cgs | 0 sim/testsuite/{sim => }/frv/lddfi.cgs | 0 sim/testsuite/{sim => }/frv/lddfu.cgs | 0 sim/testsuite/{sim => }/frv/lddi.cgs | 0 sim/testsuite/{sim => }/frv/lddu.cgs | 0 sim/testsuite/{sim => }/frv/ldf.cgs | 0 sim/testsuite/{sim => }/frv/ldfi.cgs | 0 sim/testsuite/{sim => }/frv/ldfu.cgs | 0 sim/testsuite/{sim => }/frv/ldhf.cgs | 0 sim/testsuite/{sim => }/frv/ldhfi.cgs | 0 sim/testsuite/{sim => }/frv/ldhfu.cgs | 0 sim/testsuite/{sim => }/frv/ldi.cgs | 0 sim/testsuite/{sim => }/frv/ldq.cgs | 0 sim/testsuite/{sim => }/frv/ldqc.cgs | 0 sim/testsuite/{sim => }/frv/ldqcu.cgs | 0 sim/testsuite/{sim => }/frv/ldqf.cgs | 0 sim/testsuite/{sim => }/frv/ldqfi.cgs | 0 sim/testsuite/{sim => }/frv/ldqfu.cgs | 0 sim/testsuite/{sim => }/frv/ldqi.cgs | 0 sim/testsuite/{sim => }/frv/ldqu.cgs | 0 sim/testsuite/{sim => }/frv/ldsb.cgs | 0 sim/testsuite/{sim => }/frv/ldsbi.cgs | 0 sim/testsuite/{sim => }/frv/ldsbu.cgs | 0 sim/testsuite/{sim => }/frv/ldsh.cgs | 0 sim/testsuite/{sim => }/frv/ldshi.cgs | 0 sim/testsuite/{sim => }/frv/ldshu.cgs | 0 sim/testsuite/{sim => }/frv/ldu.cgs | 0 sim/testsuite/{sim => }/frv/ldub.cgs | 0 sim/testsuite/{sim => }/frv/ldubi.cgs | 0 sim/testsuite/{sim => }/frv/ldubu.cgs | 0 sim/testsuite/{sim => }/frv/lduh.cgs | 0 sim/testsuite/{sim => }/frv/lduhi.cgs | 0 sim/testsuite/{sim => }/frv/lduhu.cgs | 0 sim/testsuite/{sim => }/frv/lrbranch.pcgs | 0 sim/testsuite/{sim => }/frv/mabshs.cgs | 0 sim/testsuite/{sim => }/frv/maddhss.cgs | 0 sim/testsuite/{sim => }/frv/maddhus.cgs | 0 sim/testsuite/{sim => }/frv/mand.cgs | 0 sim/testsuite/{sim => }/frv/maveh.cgs | 0 sim/testsuite/{sim => }/frv/mbtoh.cgs | 0 sim/testsuite/{sim => }/frv/mbtohe.cgs | 0 sim/testsuite/{sim => }/frv/mclracc.cgs | 0 sim/testsuite/{sim => }/frv/mcmpsh.cgs | 0 sim/testsuite/{sim => }/frv/mcmpuh.cgs | 0 sim/testsuite/{sim => }/frv/mcop1.cgs | 0 sim/testsuite/{sim => }/frv/mcop2.cgs | 0 sim/testsuite/{sim => }/frv/mcplhi.cgs | 0 sim/testsuite/{sim => }/frv/mcpli.cgs | 0 sim/testsuite/{sim => }/frv/mcpxis.cgs | 0 sim/testsuite/{sim => }/frv/mcpxiu.cgs | 0 sim/testsuite/{sim => }/frv/mcpxrs.cgs | 0 sim/testsuite/{sim => }/frv/mcpxru.cgs | 0 sim/testsuite/{sim => }/frv/mcut.cgs | 0 sim/testsuite/{sim => }/frv/mcuti.cgs | 0 sim/testsuite/{sim => }/frv/mcutss.cgs | 0 sim/testsuite/{sim => }/frv/mcutssi.cgs | 0 sim/testsuite/{sim => }/frv/mdaddaccs.cgs | 0 sim/testsuite/{sim => }/frv/mdasaccs.cgs | 0 sim/testsuite/{sim => }/frv/mdcutssi.cgs | 0 sim/testsuite/{sim => }/frv/mdpackh.cgs | 0 sim/testsuite/{sim => }/frv/mdrotli.cgs | 0 sim/testsuite/{sim => }/frv/mdsubaccs.cgs | 0 sim/testsuite/{sim => }/frv/mdunpackh.cgs | 0 sim/testsuite/{sim => }/frv/membar.cgs | 0 sim/testsuite/{sim => }/frv/mexpdhd.cgs | 0 sim/testsuite/{sim => }/frv/mexpdhw.cgs | 0 sim/testsuite/{sim => }/frv/mhdseth.cgs | 0 sim/testsuite/{sim => }/frv/mhdsets.cgs | 0 sim/testsuite/{sim => }/frv/mhsethih.cgs | 0 sim/testsuite/{sim => }/frv/mhsethis.cgs | 0 sim/testsuite/{sim => }/frv/mhsetloh.cgs | 0 sim/testsuite/{sim => }/frv/mhsetlos.cgs | 0 sim/testsuite/{sim => }/frv/mhtob.cgs | 0 sim/testsuite/frv/misc.exp | 17 + sim/testsuite/{sim => }/frv/mmachs.cgs | 0 sim/testsuite/{sim => }/frv/mmachu.cgs | 0 sim/testsuite/{sim => }/frv/mmrdhs.cgs | 0 sim/testsuite/{sim => }/frv/mmrdhu.cgs | 0 sim/testsuite/{sim => }/frv/mmulhs.cgs | 0 sim/testsuite/{sim => }/frv/mmulhu.cgs | 0 sim/testsuite/{sim => }/frv/mmulxhs.cgs | 0 sim/testsuite/{sim => }/frv/mmulxhu.cgs | 0 sim/testsuite/{sim => }/frv/mnop.cgs | 0 sim/testsuite/{sim => }/frv/mnot.cgs | 0 sim/testsuite/{sim => }/frv/mor.cgs | 0 sim/testsuite/{sim => }/frv/mov.cgs | 0 sim/testsuite/{sim => }/frv/movfg.cgs | 0 sim/testsuite/{sim => }/frv/movfgd.cgs | 0 sim/testsuite/{sim => }/frv/movfgq.cgs | 0 sim/testsuite/{sim => }/frv/movgf.cgs | 0 sim/testsuite/{sim => }/frv/movgfd.cgs | 0 sim/testsuite/{sim => }/frv/movgfq.cgs | 0 sim/testsuite/{sim => }/frv/movgs.cgs | 0 sim/testsuite/{sim => }/frv/movsg.cgs | 0 sim/testsuite/{sim => }/frv/mpackh.cgs | 0 sim/testsuite/{sim => }/frv/mqcpxis.cgs | 0 sim/testsuite/{sim => }/frv/mqcpxiu.cgs | 0 sim/testsuite/{sim => }/frv/mqcpxrs.cgs | 0 sim/testsuite/{sim => }/frv/mqcpxru.cgs | 0 sim/testsuite/{sim => }/frv/mqlclrhs.cgs | 0 sim/testsuite/{sim => }/frv/mqlmths.cgs | 0 sim/testsuite/{sim => }/frv/mqmachs.cgs | 0 sim/testsuite/{sim => }/frv/mqmachu.cgs | 0 sim/testsuite/{sim => }/frv/mqmacxhs.cgs | 0 sim/testsuite/{sim => }/frv/mqmulhs.cgs | 0 sim/testsuite/{sim => }/frv/mqmulhu.cgs | 0 sim/testsuite/{sim => }/frv/mqmulxhs.cgs | 0 sim/testsuite/{sim => }/frv/mqmulxhu.cgs | 0 sim/testsuite/{sim => }/frv/mqsaths.cgs | 0 sim/testsuite/{sim => }/frv/mqsllhi.cgs | 0 sim/testsuite/{sim => }/frv/mqsrahi.cgs | 0 sim/testsuite/{sim => }/frv/mqxmachs.cgs | 0 sim/testsuite/{sim => }/frv/mqxmacxhs.cgs | 0 sim/testsuite/{sim => }/frv/mrdacc.cgs | 0 sim/testsuite/{sim => }/frv/mrdaccg.cgs | 0 sim/testsuite/{sim => }/frv/mrotli.cgs | 0 sim/testsuite/{sim => }/frv/mrotri.cgs | 0 sim/testsuite/{sim => }/frv/msaths.cgs | 0 sim/testsuite/{sim => }/frv/msathu.cgs | 0 sim/testsuite/{sim => }/frv/msllhi.cgs | 0 sim/testsuite/{sim => }/frv/msrahi.cgs | 0 sim/testsuite/{sim => }/frv/msrlhi.cgs | 0 sim/testsuite/{sim => }/frv/msubhss.cgs | 0 sim/testsuite/{sim => }/frv/msubhus.cgs | 0 sim/testsuite/{sim => }/frv/mtrap.cgs | 0 sim/testsuite/{sim => }/frv/munpackh.cgs | 0 sim/testsuite/{sim => }/frv/mwcut.cgs | 0 sim/testsuite/{sim => }/frv/mwcuti.cgs | 0 sim/testsuite/{sim => }/frv/mwtacc.cgs | 0 sim/testsuite/{sim => }/frv/mwtaccg.cgs | 0 sim/testsuite/{sim => }/frv/mxor.cgs | 0 sim/testsuite/{sim => }/frv/nandcr.cgs | 0 sim/testsuite/{sim => }/frv/nandncr.cgs | 0 sim/testsuite/{sim => }/frv/nfadds.cgs | 0 sim/testsuite/{sim => }/frv/nfdadds.cgs | 0 sim/testsuite/{sim => }/frv/nfdcmps.cgs | 0 sim/testsuite/{sim => }/frv/nfddivs.cgs | 0 sim/testsuite/{sim => }/frv/nfditos.cgs | 0 sim/testsuite/{sim => }/frv/nfdivs.cgs | 0 sim/testsuite/{sim => }/frv/nfdmadds.cgs | 0 sim/testsuite/{sim => }/frv/nfdmas.cgs | 0 sim/testsuite/{sim => }/frv/nfdmss.cgs | 0 sim/testsuite/{sim => }/frv/nfdmulcs.cgs | 0 sim/testsuite/{sim => }/frv/nfdmuls.cgs | 0 sim/testsuite/{sim => }/frv/nfdsads.cgs | 0 sim/testsuite/{sim => }/frv/nfdsqrts.cgs | 0 sim/testsuite/{sim => }/frv/nfdstoi.cgs | 0 sim/testsuite/{sim => }/frv/nfdsubs.cgs | 0 sim/testsuite/{sim => }/frv/nfitos.cgs | 0 sim/testsuite/{sim => }/frv/nfmadds.cgs | 0 sim/testsuite/{sim => }/frv/nfmas.cgs | 0 sim/testsuite/{sim => }/frv/nfmss.cgs | 0 sim/testsuite/{sim => }/frv/nfmsubs.cgs | 0 sim/testsuite/{sim => }/frv/nfmuls.cgs | 0 sim/testsuite/{sim => }/frv/nfsqrts.cgs | 0 sim/testsuite/{sim => }/frv/nfstoi.cgs | 0 sim/testsuite/{sim => }/frv/nfsubs.cgs | 0 sim/testsuite/{sim => }/frv/nld.cgs | 0 sim/testsuite/{sim => }/frv/nldbf.cgs | 0 sim/testsuite/{sim => }/frv/nldbfi.cgs | 0 sim/testsuite/{sim => }/frv/nldbfu.cgs | 0 sim/testsuite/{sim => }/frv/nldd.cgs | 0 sim/testsuite/{sim => }/frv/nlddf.cgs | 0 sim/testsuite/{sim => }/frv/nlddfi.cgs | 0 sim/testsuite/{sim => }/frv/nlddfu.cgs | 0 sim/testsuite/{sim => }/frv/nlddi.cgs | 0 sim/testsuite/{sim => }/frv/nlddu.cgs | 0 sim/testsuite/{sim => }/frv/nldf.cgs | 0 sim/testsuite/{sim => }/frv/nldfi.cgs | 0 sim/testsuite/{sim => }/frv/nldfu.cgs | 0 sim/testsuite/{sim => }/frv/nldhf.cgs | 0 sim/testsuite/{sim => }/frv/nldhfi.cgs | 0 sim/testsuite/{sim => }/frv/nldhfu.cgs | 0 sim/testsuite/{sim => }/frv/nldi.cgs | 0 sim/testsuite/{sim => }/frv/nldq.cgs | 0 sim/testsuite/{sim => }/frv/nldqf.cgs | 0 sim/testsuite/{sim => }/frv/nldqfi.cgs | 0 sim/testsuite/{sim => }/frv/nldqfu.cgs | 0 sim/testsuite/{sim => }/frv/nldqu.cgs | 0 sim/testsuite/{sim => }/frv/nldsb.cgs | 0 sim/testsuite/{sim => }/frv/nldsbi.cgs | 0 sim/testsuite/{sim => }/frv/nldsbu.cgs | 0 sim/testsuite/{sim => }/frv/nldsh.cgs | 0 sim/testsuite/{sim => }/frv/nldshi.cgs | 0 sim/testsuite/{sim => }/frv/nldshu.cgs | 0 sim/testsuite/{sim => }/frv/nldu.cgs | 0 sim/testsuite/{sim => }/frv/nldub.cgs | 0 sim/testsuite/{sim => }/frv/nldubi.cgs | 0 sim/testsuite/{sim => }/frv/nldubu.cgs | 0 sim/testsuite/{sim => }/frv/nlduh.cgs | 0 sim/testsuite/{sim => }/frv/nlduhi.cgs | 0 sim/testsuite/{sim => }/frv/nlduhu.cgs | 0 sim/testsuite/{sim => }/frv/nop.cgs | 0 sim/testsuite/{sim => }/frv/norcr.cgs | 0 sim/testsuite/{sim => }/frv/norncr.cgs | 0 sim/testsuite/{sim => }/frv/not.cgs | 0 sim/testsuite/{sim => }/frv/notcr.cgs | 0 sim/testsuite/{sim => }/frv/nsdiv.cgs | 0 sim/testsuite/{sim => }/frv/nsdivi.cgs | 0 sim/testsuite/{sim => }/frv/nudiv.cgs | 0 sim/testsuite/{sim => }/frv/nudivi.cgs | 0 sim/testsuite/{sim => }/frv/or.cgs | 0 sim/testsuite/{sim => }/frv/orcc.cgs | 0 sim/testsuite/{sim => }/frv/orcr.cgs | 0 sim/testsuite/{sim => }/frv/ori.cgs | 0 sim/testsuite/{sim => }/frv/oricc.cgs | 0 sim/testsuite/{sim => }/frv/orncr.cgs | 0 sim/testsuite/frv/parallel.exp | 17 + sim/testsuite/{sim => }/frv/ret.cgs | 0 sim/testsuite/{sim => }/frv/rett.cgs | 0 sim/testsuite/{sim => }/frv/scan.cgs | 0 sim/testsuite/{sim => }/frv/scani.cgs | 0 sim/testsuite/{sim => }/frv/sdiv.cgs | 0 sim/testsuite/{sim => }/frv/sdivi.cgs | 0 sim/testsuite/{sim => }/frv/sethi.cgs | 0 sim/testsuite/{sim => }/frv/sethilo.pcgs | 0 sim/testsuite/{sim => }/frv/setlo.cgs | 0 sim/testsuite/{sim => }/frv/setlos.cgs | 0 sim/testsuite/{sim => }/frv/sll.cgs | 0 sim/testsuite/{sim => }/frv/sllcc.cgs | 0 sim/testsuite/{sim => }/frv/slli.cgs | 0 sim/testsuite/{sim => }/frv/sllicc.cgs | 0 sim/testsuite/{sim => }/frv/smul.cgs | 0 sim/testsuite/{sim => }/frv/smulcc.cgs | 0 sim/testsuite/{sim => }/frv/smuli.cgs | 0 sim/testsuite/{sim => }/frv/smulicc.cgs | 0 sim/testsuite/{sim => }/frv/sra.cgs | 0 sim/testsuite/{sim => }/frv/sracc.cgs | 0 sim/testsuite/{sim => }/frv/srai.cgs | 0 sim/testsuite/{sim => }/frv/sraicc.cgs | 0 sim/testsuite/{sim => }/frv/srl.cgs | 0 sim/testsuite/{sim => }/frv/srlcc.cgs | 0 sim/testsuite/{sim => }/frv/srli.cgs | 0 sim/testsuite/{sim => }/frv/srlicc.cgs | 0 sim/testsuite/{sim => }/frv/st.cgs | 0 sim/testsuite/{sim => }/frv/stb.cgs | 0 sim/testsuite/{sim => }/frv/stbf.cgs | 0 sim/testsuite/{sim => }/frv/stbfi.cgs | 0 sim/testsuite/{sim => }/frv/stbfu.cgs | 0 sim/testsuite/{sim => }/frv/stbi.cgs | 0 sim/testsuite/{sim => }/frv/stbu.cgs | 0 sim/testsuite/{sim => }/frv/stc.cgs | 0 sim/testsuite/{sim => }/frv/stcu.cgs | 0 sim/testsuite/{sim => }/frv/std.cgs | 0 sim/testsuite/{sim => }/frv/std.pcgs | 0 sim/testsuite/{sim => }/frv/stdc.cgs | 0 sim/testsuite/{sim => }/frv/stdc.pcgs | 0 sim/testsuite/{sim => }/frv/stdcu.cgs | 0 sim/testsuite/{sim => }/frv/stdf.cgs | 0 sim/testsuite/{sim => }/frv/stdf.pcgs | 0 sim/testsuite/{sim => }/frv/stdfi.cgs | 0 sim/testsuite/{sim => }/frv/stdfu.cgs | 0 sim/testsuite/{sim => }/frv/stdi.cgs | 0 sim/testsuite/{sim => }/frv/stdu.cgs | 0 sim/testsuite/{sim => }/frv/stf.cgs | 0 sim/testsuite/{sim => }/frv/stfi.cgs | 0 sim/testsuite/{sim => }/frv/stfu.cgs | 0 sim/testsuite/{sim => }/frv/sth.cgs | 0 sim/testsuite/{sim => }/frv/sthf.cgs | 0 sim/testsuite/{sim => }/frv/sthfi.cgs | 0 sim/testsuite/{sim => }/frv/sthfu.cgs | 0 sim/testsuite/{sim => }/frv/sthi.cgs | 0 sim/testsuite/{sim => }/frv/sthu.cgs | 0 sim/testsuite/{sim => }/frv/sti.cgs | 0 sim/testsuite/{sim => }/frv/stq.cgs | 0 sim/testsuite/{sim => }/frv/stq.pcgs | 0 sim/testsuite/{sim => }/frv/stqc.cgs | 0 sim/testsuite/{sim => }/frv/stqc.pcgs | 0 sim/testsuite/{sim => }/frv/stqcu.cgs | 0 sim/testsuite/{sim => }/frv/stqf.cgs | 0 sim/testsuite/{sim => }/frv/stqf.pcgs | 0 sim/testsuite/{sim => }/frv/stqfi.cgs | 0 sim/testsuite/{sim => }/frv/stqfu.cgs | 0 sim/testsuite/{sim => }/frv/stqi.cgs | 0 sim/testsuite/{sim => }/frv/stqu.cgs | 0 sim/testsuite/{sim => }/frv/stu.cgs | 0 sim/testsuite/{sim => }/frv/sub.cgs | 0 sim/testsuite/{sim => }/frv/subcc.cgs | 0 sim/testsuite/{sim => }/frv/subi.cgs | 0 sim/testsuite/{sim => }/frv/subicc.cgs | 0 sim/testsuite/{sim => }/frv/subx.cgs | 0 sim/testsuite/{sim => }/frv/subxcc.cgs | 0 sim/testsuite/{sim => }/frv/subxi.cgs | 0 sim/testsuite/{sim => }/frv/subxicc.cgs | 0 sim/testsuite/{sim => }/frv/swap.cgs | 0 sim/testsuite/{sim => }/frv/swapi.cgs | 0 sim/testsuite/{sim => }/frv/tc.cgs | 0 sim/testsuite/{sim => }/frv/teq.cgs | 0 sim/testsuite/{sim => }/frv/testutils.inc | 0 sim/testsuite/{sim => }/frv/tge.cgs | 0 sim/testsuite/{sim => }/frv/tgt.cgs | 0 sim/testsuite/{sim => }/frv/thi.cgs | 0 sim/testsuite/{sim => }/frv/tic.cgs | 0 sim/testsuite/{sim => }/frv/tieq.cgs | 0 sim/testsuite/{sim => }/frv/tige.cgs | 0 sim/testsuite/{sim => }/frv/tigt.cgs | 0 sim/testsuite/{sim => }/frv/tihi.cgs | 0 sim/testsuite/{sim => }/frv/tile.cgs | 0 sim/testsuite/{sim => }/frv/tils.cgs | 0 sim/testsuite/{sim => }/frv/tilt.cgs | 0 sim/testsuite/{sim => }/frv/tin.cgs | 0 sim/testsuite/{sim => }/frv/tinc.cgs | 0 sim/testsuite/{sim => }/frv/tine.cgs | 0 sim/testsuite/{sim => }/frv/tino.cgs | 0 sim/testsuite/{sim => }/frv/tinv.cgs | 0 sim/testsuite/{sim => }/frv/tip.cgs | 0 sim/testsuite/{sim => }/frv/tira.cgs | 0 sim/testsuite/{sim => }/frv/tiv.cgs | 0 sim/testsuite/{sim => }/frv/tle.cgs | 0 sim/testsuite/{sim => }/frv/tls.cgs | 0 sim/testsuite/{sim => }/frv/tlt.cgs | 0 sim/testsuite/{sim => }/frv/tn.cgs | 0 sim/testsuite/{sim => }/frv/tnc.cgs | 0 sim/testsuite/{sim => }/frv/tne.cgs | 0 sim/testsuite/{sim => }/frv/tno.cgs | 0 sim/testsuite/{sim => }/frv/tnv.cgs | 0 sim/testsuite/{sim => }/frv/tp.cgs | 0 sim/testsuite/{sim => }/frv/tra.cgs | 0 sim/testsuite/{sim => }/frv/tv.cgs | 0 sim/testsuite/{sim => }/frv/udiv.cgs | 0 sim/testsuite/{sim => }/frv/udivi.cgs | 0 sim/testsuite/{sim => }/frv/umul.cgs | 0 sim/testsuite/{sim => }/frv/umulcc.cgs | 0 sim/testsuite/{sim => }/frv/umuli.cgs | 0 sim/testsuite/{sim => }/frv/umulicc.cgs | 0 sim/testsuite/{sim => }/frv/xor.cgs | 0 sim/testsuite/{sim => }/frv/xorcc.cgs | 0 sim/testsuite/{sim => }/frv/xorcr.cgs | 0 sim/testsuite/{sim => }/frv/xori.cgs | 0 sim/testsuite/{sim => }/frv/xoricc.cgs | 0 sim/testsuite/ft32/ChangeLog | 16 + sim/testsuite/{sim => }/ft32/allinsn.exp | 0 sim/testsuite/{sim => }/ft32/basic.s | 0 sim/testsuite/{sim => }/ft32/testutils.inc | 0 sim/testsuite/h8300/ChangeLog | 134 + sim/testsuite/h8300/addb.s | 834 + sim/testsuite/{sim => }/h8300/addl.s | 0 sim/testsuite/{sim => }/h8300/adds.s | 0 sim/testsuite/{sim => }/h8300/addw.s | 0 sim/testsuite/{sim => }/h8300/addx.s | 0 sim/testsuite/{sim => }/h8300/allinsn.exp | 0 sim/testsuite/h8300/andb.s | 575 + sim/testsuite/{sim => }/h8300/andl.s | 0 sim/testsuite/{sim => }/h8300/andw.s | 0 sim/testsuite/{sim => }/h8300/band.s | 0 sim/testsuite/{sim => }/h8300/bfld.s | 0 sim/testsuite/{sim => }/h8300/biand.s | 0 sim/testsuite/{sim => }/h8300/bra.s | 0 sim/testsuite/{sim => }/h8300/brabc.s | 0 sim/testsuite/{sim => }/h8300/bset.s | 0 sim/testsuite/h8300/cmpb.s | 1130 + sim/testsuite/{sim => }/h8300/cmpl.s | 0 sim/testsuite/{sim => }/h8300/cmpw.s | 0 sim/testsuite/{sim => }/h8300/daa.s | 0 sim/testsuite/{sim => }/h8300/das.s | 0 sim/testsuite/{sim => }/h8300/dec.s | 0 sim/testsuite/{sim => }/h8300/div.s | 0 sim/testsuite/{sim => }/h8300/extl.s | 0 sim/testsuite/{sim => }/h8300/extw.s | 0 sim/testsuite/{sim => }/h8300/inc.s | 0 sim/testsuite/{sim => }/h8300/jmp.s | 0 sim/testsuite/{sim => }/h8300/ldc.s | 0 sim/testsuite/{sim => }/h8300/ldm.s | 0 sim/testsuite/{sim => }/h8300/mac.s | 0 sim/testsuite/{sim => }/h8300/mova.s | 0 sim/testsuite/h8300/movb.s | 2319 ++ sim/testsuite/h8300/movl.s | 2239 ++ sim/testsuite/{sim => }/h8300/movmd.s | 0 sim/testsuite/{sim => }/h8300/movsd.s | 0 sim/testsuite/h8300/movw.s | 1956 ++ sim/testsuite/{sim => }/h8300/mul.s | 0 sim/testsuite/{sim => }/h8300/neg.s | 0 sim/testsuite/{sim => }/h8300/nop.s | 0 sim/testsuite/{sim => }/h8300/not.s | 0 sim/testsuite/h8300/orb.s | 579 + sim/testsuite/{sim => }/h8300/orl.s | 0 sim/testsuite/{sim => }/h8300/orw.s | 0 sim/testsuite/{sim => }/h8300/rotl.s | 0 sim/testsuite/{sim => }/h8300/rotr.s | 0 sim/testsuite/{sim => }/h8300/rotxl.s | 0 sim/testsuite/{sim => }/h8300/rotxr.s | 0 sim/testsuite/{sim => }/h8300/shal.s | 0 sim/testsuite/{sim => }/h8300/shar.s | 0 sim/testsuite/{sim => }/h8300/shll.s | 0 sim/testsuite/{sim => }/h8300/shlr.s | 0 sim/testsuite/{sim => }/h8300/stack.s | 0 sim/testsuite/{sim => }/h8300/stc.s | 0 sim/testsuite/h8300/subb.s | 315 + sim/testsuite/{sim => }/h8300/subl.s | 0 sim/testsuite/{sim => }/h8300/subs.s | 0 sim/testsuite/{sim => }/h8300/subw.s | 0 sim/testsuite/{sim => }/h8300/subx.s | 0 sim/testsuite/{sim => }/h8300/tas.s | 0 sim/testsuite/{sim => }/h8300/testutils.inc | 0 sim/testsuite/h8300/xorb.s | 401 + sim/testsuite/{sim => }/h8300/xorl.s | 0 sim/testsuite/{sim => }/h8300/xorw.s | 0 sim/testsuite/iq2000/ChangeLog | 11 + sim/testsuite/{sim => }/iq2000/allinsn.exp | 0 sim/testsuite/{sim => }/iq2000/pass.s | 0 sim/testsuite/{sim => }/iq2000/testutils.inc | 0 sim/testsuite/lib/sim-defs.exp | 64 +- sim/testsuite/lm32/ChangeLog | 11 + sim/testsuite/{sim => }/lm32/allinsn.exp | 0 sim/testsuite/{sim => }/lm32/pass.s | 0 sim/testsuite/{sim => }/lm32/testutils.inc | 0 sim/testsuite/local.mk | 36 + sim/testsuite/m32c/ChangeLog | 18 + sim/testsuite/{sim => }/m32c/allinsn.exp | 0 sim/testsuite/{sim => }/m32c/blinky.s | 0 sim/testsuite/{sim => }/m32c/fail.s | 0 sim/testsuite/{sim => }/m32c/gloss.s | 0 sim/testsuite/{sim => }/m32c/pass.s | 0 sim/testsuite/{sim => }/m32c/sample.ld | 0 sim/testsuite/{sim => }/m32c/sample.s | 0 sim/testsuite/{sim => }/m32c/sample2.c | 0 sim/testsuite/{sim => }/m32c/testutils.inc | 0 sim/testsuite/m32r-elf/ChangeLog | 18 - sim/testsuite/m32r-elf/Makefile.in | 156 - sim/testsuite/m32r-elf/configure | 2984 -- sim/testsuite/m32r-elf/configure.ac | 18 - sim/testsuite/m32r-elf/exit47.s | 7 - sim/testsuite/m32r-elf/hello.s | 17 - sim/testsuite/m32r-elf/loop.s | 2 - sim/testsuite/m32r/ChangeLog | 140 + sim/testsuite/{sim => }/m32r/add.cgs | 0 sim/testsuite/{sim => }/m32r/add3.cgs | 0 sim/testsuite/{sim => }/m32r/addi.cgs | 0 sim/testsuite/{sim => }/m32r/addv.cgs | 0 sim/testsuite/{sim => }/m32r/addv3.cgs | 0 sim/testsuite/{sim => }/m32r/addx.cgs | 0 sim/testsuite/m32r/allinsn.exp | 18 + sim/testsuite/{sim => }/m32r/and.cgs | 0 sim/testsuite/{sim => }/m32r/and3.cgs | 0 sim/testsuite/{sim => }/m32r/bc24.cgs | 0 sim/testsuite/{sim => }/m32r/bc8.cgs | 0 sim/testsuite/{sim => }/m32r/beq.cgs | 0 sim/testsuite/{sim => }/m32r/beqz.cgs | 0 sim/testsuite/{sim => }/m32r/bgez.cgs | 0 sim/testsuite/{sim => }/m32r/bgtz.cgs | 0 sim/testsuite/{sim => }/m32r/bl24.cgs | 0 sim/testsuite/{sim => }/m32r/bl8.cgs | 0 sim/testsuite/{sim => }/m32r/blez.cgs | 0 sim/testsuite/{sim => }/m32r/bltz.cgs | 0 sim/testsuite/{sim => }/m32r/bnc24.cgs | 0 sim/testsuite/{sim => }/m32r/bnc8.cgs | 0 sim/testsuite/{sim => }/m32r/bne.cgs | 0 sim/testsuite/{sim => }/m32r/bnez.cgs | 0 sim/testsuite/{sim => }/m32r/bra24.cgs | 0 sim/testsuite/{sim => }/m32r/bra8.cgs | 0 sim/testsuite/{sim => }/m32r/cmp.cgs | 0 sim/testsuite/{sim => }/m32r/cmpi.cgs | 0 sim/testsuite/{sim => }/m32r/cmpu.cgs | 0 sim/testsuite/{sim => }/m32r/cmpui.cgs | 0 sim/testsuite/{sim => }/m32r/div.cgs | 0 sim/testsuite/{sim => }/m32r/divu.cgs | 0 sim/testsuite/m32r/exit47.ms | 11 + sim/testsuite/{sim => }/m32r/hello.ms | 0 sim/testsuite/m32r/hw-trap.ms | 32 + sim/testsuite/{sim => }/m32r/jl.cgs | 0 sim/testsuite/{sim => }/m32r/jmp.cgs | 0 sim/testsuite/{sim => }/m32r/ld-d.cgs | 0 sim/testsuite/{sim => }/m32r/ld-plus.cgs | 0 sim/testsuite/{sim => }/m32r/ld.cgs | 0 sim/testsuite/{sim => }/m32r/ld24.cgs | 0 sim/testsuite/{sim => }/m32r/ldb-d.cgs | 0 sim/testsuite/{sim => }/m32r/ldb.cgs | 0 sim/testsuite/{sim => }/m32r/ldh-d.cgs | 0 sim/testsuite/{sim => }/m32r/ldh.cgs | 0 sim/testsuite/{sim => }/m32r/ldi16.cgs | 0 sim/testsuite/{sim => }/m32r/ldi8.cgs | 0 sim/testsuite/{sim => }/m32r/ldub-d.cgs | 0 sim/testsuite/{sim => }/m32r/ldub.cgs | 0 sim/testsuite/{sim => }/m32r/lduh-d.cgs | 0 sim/testsuite/{sim => }/m32r/lduh.cgs | 0 sim/testsuite/{sim => }/m32r/lock.cgs | 0 sim/testsuite/{sim => }/m32r/machi.cgs | 0 sim/testsuite/{sim => }/m32r/maclo.cgs | 0 sim/testsuite/{sim => }/m32r/macwhi.cgs | 0 sim/testsuite/{sim => }/m32r/macwlo.cgs | 0 sim/testsuite/m32r/misc.exp | 18 + sim/testsuite/{sim => }/m32r/mul.cgs | 0 sim/testsuite/{sim => }/m32r/mulhi.cgs | 0 sim/testsuite/{sim => }/m32r/mullo.cgs | 0 sim/testsuite/{sim => }/m32r/mulwhi.cgs | 0 sim/testsuite/{sim => }/m32r/mulwlo.cgs | 0 sim/testsuite/{sim => }/m32r/mv.cgs | 0 sim/testsuite/{sim => }/m32r/mvfachi.cgs | 0 sim/testsuite/{sim => }/m32r/mvfaclo.cgs | 0 sim/testsuite/{sim => }/m32r/mvfacmi.cgs | 0 sim/testsuite/{sim => }/m32r/mvfc.cgs | 0 sim/testsuite/{sim => }/m32r/mvtachi.cgs | 0 sim/testsuite/{sim => }/m32r/mvtaclo.cgs | 0 sim/testsuite/{sim => }/m32r/mvtc.cgs | 0 sim/testsuite/{sim => }/m32r/neg.cgs | 0 sim/testsuite/{sim => }/m32r/nop.cgs | 0 sim/testsuite/{sim => }/m32r/not.cgs | 0 sim/testsuite/{sim => }/m32r/or.cgs | 0 sim/testsuite/{sim => }/m32r/or3.cgs | 0 sim/testsuite/{sim => }/m32r/rac.cgs | 0 sim/testsuite/{sim => }/m32r/rach.cgs | 0 sim/testsuite/{sim => }/m32r/rem.cgs | 0 sim/testsuite/{sim => }/m32r/remu.cgs | 0 sim/testsuite/{sim => }/m32r/rte.cgs | 0 sim/testsuite/{sim => }/m32r/seth.cgs | 0 sim/testsuite/{sim => }/m32r/sll.cgs | 0 sim/testsuite/{sim => }/m32r/sll3.cgs | 0 sim/testsuite/{sim => }/m32r/slli.cgs | 0 sim/testsuite/{sim => }/m32r/sra.cgs | 0 sim/testsuite/{sim => }/m32r/sra3.cgs | 0 sim/testsuite/{sim => }/m32r/srai.cgs | 0 sim/testsuite/{sim => }/m32r/srl.cgs | 0 sim/testsuite/{sim => }/m32r/srl3.cgs | 0 sim/testsuite/{sim => }/m32r/srli.cgs | 0 sim/testsuite/{sim => }/m32r/st-d.cgs | 0 sim/testsuite/{sim => }/m32r/st-minus.cgs | 0 sim/testsuite/{sim => }/m32r/st-plus.cgs | 0 sim/testsuite/{sim => }/m32r/st.cgs | 0 sim/testsuite/{sim => }/m32r/stb-d.cgs | 0 sim/testsuite/{sim => }/m32r/stb.cgs | 0 sim/testsuite/{sim => }/m32r/sth-d.cgs | 0 sim/testsuite/{sim => }/m32r/sth.cgs | 0 sim/testsuite/{sim => }/m32r/sub.cgs | 0 sim/testsuite/{sim => }/m32r/subv.cgs | 0 sim/testsuite/{sim => }/m32r/subx.cgs | 0 sim/testsuite/{sim => }/m32r/testutils.inc | 0 sim/testsuite/m32r/trap.cgs | 110 + sim/testsuite/{sim => }/m32r/unlock.cgs | 0 sim/testsuite/{sim => }/m32r/uread16.ms | 0 sim/testsuite/{sim => }/m32r/uread32.ms | 0 sim/testsuite/{sim => }/m32r/uwrite16.ms | 0 sim/testsuite/{sim => }/m32r/uwrite32.ms | 0 sim/testsuite/{sim => }/m32r/xor.cgs | 0 sim/testsuite/{sim => }/m32r/xor3.cgs | 0 sim/testsuite/m68hc11/ChangeLog | 11 + sim/testsuite/{sim => }/m68hc11/allinsn.exp | 0 sim/testsuite/{sim => }/m68hc11/pass.s | 0 sim/testsuite/{sim => }/m68hc11/testutils.inc | 0 sim/testsuite/mcore/ChangeLog | 16 + sim/testsuite/{sim => }/mcore/allinsn.exp | 0 sim/testsuite/{sim => }/mcore/fail.s | 0 sim/testsuite/{sim => }/mcore/pass.s | 0 sim/testsuite/{sim => }/mcore/testutils.inc | 0 sim/testsuite/microblaze/ChangeLog | 19 + sim/testsuite/{sim => }/microblaze/allinsn.exp | 0 sim/testsuite/microblaze/fail.s | 9 + sim/testsuite/microblaze/pass.s | 7 + sim/testsuite/microblaze/testutils.inc | 47 + sim/testsuite/mips/ChangeLog | 126 + sim/testsuite/mips/basic.exp | 105 + sim/testsuite/{sim => }/mips/fpu64-ps-sb1.s | 0 sim/testsuite/{sim => }/mips/fpu64-ps.s | 0 sim/testsuite/{sim => }/mips/hilo-hazard-1.s | 0 sim/testsuite/{sim => }/mips/hilo-hazard-2.s | 0 sim/testsuite/{sim => }/mips/hilo-hazard-3.s | 0 sim/testsuite/{sim => }/mips/hilo-hazard-4.s | 0 sim/testsuite/{sim => }/mips/mdmx-ob-sb1.s | 0 sim/testsuite/{sim => }/mips/mdmx-ob.s | 0 sim/testsuite/{sim => }/mips/mips32-dsp.s | 0 sim/testsuite/{sim => }/mips/mips32-dsp2.s | 0 sim/testsuite/{sim => }/mips/sanity.s | 0 sim/testsuite/{sim => }/mips/testutils.inc | 0 sim/testsuite/{sim => }/mips/utils-dsp.inc | 0 sim/testsuite/{sim => }/mips/utils-fpu.inc | 0 sim/testsuite/{sim => }/mips/utils-mdmx.inc | 0 sim/testsuite/mips64el-elf/ChangeLog | 19 - sim/testsuite/mips64el-elf/Makefile.in | 170 - sim/testsuite/mips64el-elf/configure | 2984 -- sim/testsuite/mips64el-elf/configure.ac | 18 - sim/testsuite/mn10300/ChangeLog | 11 + sim/testsuite/{sim => }/mn10300/allinsn.exp | 0 sim/testsuite/{sim => }/mn10300/pass.s | 0 sim/testsuite/{sim => }/mn10300/testutils.inc | 0 sim/testsuite/moxie/ChangeLog | 11 + sim/testsuite/{sim => }/moxie/allinsn.exp | 0 sim/testsuite/{sim => }/moxie/pass.s | 0 sim/testsuite/{sim => }/moxie/testutils.inc | 0 sim/testsuite/msp430/ChangeLog | 25 + sim/testsuite/{sim => }/msp430/add.s | 0 sim/testsuite/{sim => }/msp430/allinsn.exp | 0 sim/testsuite/{sim => }/msp430/mpyull_hwmult.s | 0 sim/testsuite/{sim => }/msp430/rrux.s | 0 sim/testsuite/{sim => }/msp430/testutils.inc | 0 sim/testsuite/or1k/ChangeLog | 54 + sim/testsuite/{sim => }/or1k/add.S | 0 sim/testsuite/{sim => }/or1k/adrp.S | 0 sim/testsuite/or1k/alltests.exp | 33 + sim/testsuite/{sim => }/or1k/and.S | 0 sim/testsuite/{sim => }/or1k/basic.S | 0 sim/testsuite/{sim => }/or1k/div.S | 0 sim/testsuite/{sim => }/or1k/ext.S | 0 sim/testsuite/{sim => }/or1k/find.S | 0 sim/testsuite/{sim => }/or1k/flag.S | 0 sim/testsuite/{sim => }/or1k/fpu-unordered.S | 0 sim/testsuite/{sim => }/or1k/fpu.S | 0 sim/testsuite/{sim => }/or1k/fpu64a32-unordered.S | 0 sim/testsuite/{sim => }/or1k/fpu64a32.S | 0 sim/testsuite/{sim => }/or1k/jump.S | 0 sim/testsuite/{sim => }/or1k/load.S | 0 sim/testsuite/{sim => }/or1k/mac.S | 0 sim/testsuite/{sim => }/or1k/mfspr.S | 0 sim/testsuite/{sim => }/or1k/mul.S | 0 sim/testsuite/{sim => }/or1k/or.S | 0 sim/testsuite/{sim => }/or1k/or1k-asm-test-env.h | 0 .../{sim => }/or1k/or1k-asm-test-helpers.h | 0 sim/testsuite/{sim => }/or1k/or1k-asm-test.h | 0 sim/testsuite/{sim => }/or1k/or1k-asm.h | 0 sim/testsuite/{sim => }/or1k/or1k-test.ld | 0 sim/testsuite/{sim => }/or1k/ror.S | 0 sim/testsuite/{sim => }/or1k/shift.S | 0 sim/testsuite/{sim => }/or1k/spr-defs.h | 0 sim/testsuite/{sim => }/or1k/sub.S | 0 sim/testsuite/{sim => }/or1k/xor.S | 0 sim/testsuite/pru/ChangeLog | 25 + sim/testsuite/{sim => }/pru/add.s | 0 sim/testsuite/{sim => }/pru/allinsn.exp | 0 sim/testsuite/{sim => }/pru/dmem-zero-pass.s | 0 sim/testsuite/{sim => }/pru/dmem-zero-trap.s | 0 sim/testsuite/{sim => }/pru/dram.s | 0 sim/testsuite/{sim => }/pru/jmp.s | 0 sim/testsuite/{sim => }/pru/lmbd.s | 0 sim/testsuite/{sim => }/pru/loop-imm.s | 0 sim/testsuite/{sim => }/pru/loop-reg.s | 0 sim/testsuite/{sim => }/pru/mul.s | 0 sim/testsuite/{sim => }/pru/subreg.s | 0 sim/testsuite/{sim => }/pru/testutils.inc | 0 sim/testsuite/riscv/ChangeLog | 11 + sim/testsuite/riscv/allinsn.exp | 15 + sim/testsuite/riscv/pass.s | 7 + sim/testsuite/riscv/testutils.inc | 52 + sim/testsuite/sh/ChangeLog | 85 + sim/testsuite/{sim => }/sh/add.s | 0 sim/testsuite/{sim => }/sh/allinsn.exp | 0 sim/testsuite/{sim => }/sh/and.s | 0 sim/testsuite/{sim => }/sh/bandor.s | 0 sim/testsuite/{sim => }/sh/bandornot.s | 0 sim/testsuite/{sim => }/sh/bclr.s | 0 sim/testsuite/{sim => }/sh/bld.s | 0 sim/testsuite/{sim => }/sh/bldnot.s | 0 sim/testsuite/{sim => }/sh/bset.s | 0 sim/testsuite/{sim => }/sh/bst.s | 0 sim/testsuite/{sim => }/sh/bxor.s | 0 sim/testsuite/{sim => }/sh/clip.s | 0 sim/testsuite/{sim => }/sh/div.s | 0 sim/testsuite/{sim => }/sh/dmxy.s | 0 sim/testsuite/{sim => }/sh/fabs.s | 0 sim/testsuite/{sim => }/sh/fadd.s | 0 sim/testsuite/{sim => }/sh/fail.s | 0 sim/testsuite/{sim => }/sh/fcmpeq.s | 0 sim/testsuite/{sim => }/sh/fcmpgt.s | 0 sim/testsuite/{sim => }/sh/fcnvds.s | 0 sim/testsuite/{sim => }/sh/fcnvsd.s | 0 sim/testsuite/{sim => }/sh/fdiv.s | 0 sim/testsuite/{sim => }/sh/fipr.s | 0 sim/testsuite/{sim => }/sh/fldi0.s | 0 sim/testsuite/{sim => }/sh/fldi1.s | 0 sim/testsuite/{sim => }/sh/flds.s | 0 sim/testsuite/{sim => }/sh/float.s | 0 sim/testsuite/{sim => }/sh/fmac.s | 0 sim/testsuite/{sim => }/sh/fmov.s | 0 sim/testsuite/{sim => }/sh/fmul.s | 0 sim/testsuite/{sim => }/sh/fneg.s | 0 sim/testsuite/{sim => }/sh/fpchg.s | 0 sim/testsuite/{sim => }/sh/frchg.s | 0 sim/testsuite/{sim => }/sh/fsca.s | 0 sim/testsuite/{sim => }/sh/fschg.s | 0 sim/testsuite/{sim => }/sh/fsqrt.s | 0 sim/testsuite/{sim => }/sh/fsrra.s | 0 sim/testsuite/{sim => }/sh/fsub.s | 0 sim/testsuite/{sim => }/sh/ftrc.s | 0 sim/testsuite/{sim => }/sh/ldrc.s | 0 sim/testsuite/{sim => }/sh/loop.s | 0 sim/testsuite/{sim => }/sh/macl.s | 0 sim/testsuite/{sim => }/sh/macw.s | 0 sim/testsuite/{sim => }/sh/mov.s | 0 sim/testsuite/{sim => }/sh/movi.s | 0 sim/testsuite/{sim => }/sh/movli.s | 0 sim/testsuite/{sim => }/sh/movua.s | 0 sim/testsuite/{sim => }/sh/movxy.s | 0 sim/testsuite/{sim => }/sh/mulr.s | 0 sim/testsuite/{sim => }/sh/pabs.s | 0 sim/testsuite/{sim => }/sh/padd.s | 0 sim/testsuite/{sim => }/sh/paddc.s | 0 sim/testsuite/{sim => }/sh/pand.s | 0 sim/testsuite/{sim => }/sh/pass.s | 0 sim/testsuite/{sim => }/sh/pclr.s | 0 sim/testsuite/{sim => }/sh/pdec.s | 0 sim/testsuite/{sim => }/sh/pdmsb.s | 0 sim/testsuite/{sim => }/sh/pinc.s | 0 sim/testsuite/{sim => }/sh/pmuls.s | 0 sim/testsuite/{sim => }/sh/prnd.s | 0 sim/testsuite/{sim => }/sh/pshai.s | 0 sim/testsuite/{sim => }/sh/pshar.s | 0 sim/testsuite/{sim => }/sh/pshli.s | 0 sim/testsuite/{sim => }/sh/pshlr.s | 0 sim/testsuite/{sim => }/sh/psub.s | 0 sim/testsuite/{sim => }/sh/pswap.s | 0 sim/testsuite/{sim => }/sh/pushpop.s | 0 sim/testsuite/{sim => }/sh/resbank.s | 0 sim/testsuite/{sim => }/sh/sett.s | 0 sim/testsuite/{sim => }/sh/shll.s | 0 sim/testsuite/{sim => }/sh/shll16.s | 0 sim/testsuite/{sim => }/sh/shll2.s | 0 sim/testsuite/{sim => }/sh/shll8.s | 0 sim/testsuite/{sim => }/sh/shlr.s | 0 sim/testsuite/{sim => }/sh/shlr16.s | 0 sim/testsuite/{sim => }/sh/shlr2.s | 0 sim/testsuite/{sim => }/sh/shlr8.s | 0 sim/testsuite/{sim => }/sh/swap.s | 0 sim/testsuite/{sim => }/sh/testutils.inc | 0 sim/testsuite/sim/aarch64/ChangeLog | 83 - sim/testsuite/sim/arm/ChangeLog | 122 - sim/testsuite/sim/arm/allinsn.exp | 28 - sim/testsuite/sim/arm/iwmmxt/iwmmxt.exp | 28 - sim/testsuite/sim/arm/misc.exp | 20 - sim/testsuite/sim/arm/thumb/allthumb.exp | 20 - sim/testsuite/sim/arm/xscale/xscale.exp | 28 - sim/testsuite/sim/avr/ChangeLog | 7 - sim/testsuite/sim/bfin/ChangeLog | 370 - sim/testsuite/sim/bfin/s21.s | 298 - sim/testsuite/sim/bpf/ChangeLog | 20 - sim/testsuite/sim/cr16/ChangeLog | 51 - sim/testsuite/sim/cr16/allinsn.exp | 31 - sim/testsuite/sim/cr16/misc.exp | 31 - sim/testsuite/sim/cris/ChangeLog | 193 - sim/testsuite/sim/cris/c/c.exp | 248 - sim/testsuite/sim/cris/c/readlink4.c | 62 - sim/testsuite/sim/cris/hw/rv-n-cris/rvc.exp | 249 - sim/testsuite/sim/frv/ChangeLog | 76 - sim/testsuite/sim/frv/allinsn.exp | 19 - sim/testsuite/sim/frv/fr400/allinsn.exp | 19 - sim/testsuite/sim/frv/fr500/allinsn.exp | 19 - sim/testsuite/sim/frv/fr550/allinsn.exp | 19 - sim/testsuite/sim/frv/interrupts.exp | 19 - sim/testsuite/sim/frv/parallel.exp | 19 - sim/testsuite/sim/ft32/ChangeLog | 8 - sim/testsuite/sim/h8300/ChangeLog | 107 - sim/testsuite/sim/h8300/addb.s | 778 - sim/testsuite/sim/h8300/andb.s | 527 - sim/testsuite/sim/h8300/cmpb.s | 1086 - sim/testsuite/sim/h8300/movb.s | 2221 -- sim/testsuite/sim/h8300/movl.s | 2160 -- sim/testsuite/sim/h8300/movw.s | 1857 -- sim/testsuite/sim/h8300/orb.s | 532 - sim/testsuite/sim/h8300/subb.s | 289 - sim/testsuite/sim/h8300/xorb.s | 378 - sim/testsuite/sim/iq2000/ChangeLog | 3 - sim/testsuite/sim/lm32/ChangeLog | 3 - sim/testsuite/sim/m32c/ChangeLog | 10 - sim/testsuite/sim/m32r/ChangeLog | 122 - sim/testsuite/sim/m32r/allinsn.exp | 21 - sim/testsuite/sim/m32r/hw-trap.ms | 31 - sim/testsuite/sim/m32r/misc.exp | 21 - sim/testsuite/sim/m32r/trap.cgs | 109 - sim/testsuite/sim/m68hc11/ChangeLog | 3 - sim/testsuite/sim/mcore/ChangeLog | 8 - sim/testsuite/sim/microblaze/ChangeLog | 3 - sim/testsuite/sim/microblaze/pass.s | 8 - sim/testsuite/sim/microblaze/testutils.inc | 29 - sim/testsuite/sim/mips/ChangeLog | 118 - sim/testsuite/sim/mips/basic.exp | 106 - sim/testsuite/sim/mn10300/ChangeLog | 3 - sim/testsuite/sim/moxie/ChangeLog | 3 - sim/testsuite/sim/msp430/ChangeLog | 17 - sim/testsuite/sim/or1k/ChangeLog | 46 - sim/testsuite/sim/or1k/alltests.exp | 34 - sim/testsuite/sim/pru/ChangeLog | 17 - sim/testsuite/sim/sh/ChangeLog | 77 - sim/testsuite/sim/sh64/ChangeLog | 21 - sim/testsuite/sim/sh64/compact.exp | 19 - sim/testsuite/sim/sh64/compact/ChangeLog | 26 - sim/testsuite/sim/sh64/compact/add.cgs | 55 - sim/testsuite/sim/sh64/compact/addc.cgs | 90 - sim/testsuite/sim/sh64/compact/addi.cgs | 46 - sim/testsuite/sim/sh64/compact/addv.cgs | 48 - sim/testsuite/sim/sh64/compact/and.cgs | 33 - sim/testsuite/sim/sh64/compact/andb.cgs | 24 - sim/testsuite/sim/sh64/compact/andi.cgs | 43 - sim/testsuite/sim/sh64/compact/bf.cgs | 24 - sim/testsuite/sim/sh64/compact/bfs.cgs | 28 - sim/testsuite/sim/sh64/compact/bra.cgs | 23 - sim/testsuite/sim/sh64/compact/braf.cgs | 24 - sim/testsuite/sim/sh64/compact/brk.cgs | 18 - sim/testsuite/sim/sh64/compact/bsr.cgs | 21 - sim/testsuite/sim/sh64/compact/bsrf.cgs | 22 - sim/testsuite/sim/sh64/compact/bt.cgs | 24 - sim/testsuite/sim/sh64/compact/bts.cgs | 28 - sim/testsuite/sim/sh64/compact/clrmac.cgs | 13 - sim/testsuite/sim/sh64/compact/clrs.cgs | 14 - sim/testsuite/sim/sh64/compact/clrt.cgs | 16 - sim/testsuite/sim/sh64/compact/cmpeq.cgs | 52 - sim/testsuite/sim/sh64/compact/cmpeqi.cgs | 39 - sim/testsuite/sim/sh64/compact/cmpge.cgs | 69 - sim/testsuite/sim/sh64/compact/cmpgt.cgs | 69 - sim/testsuite/sim/sh64/compact/cmphi.cgs | 68 - sim/testsuite/sim/sh64/compact/cmphs.cgs | 59 - sim/testsuite/sim/sh64/compact/cmppl.cgs | 37 - sim/testsuite/sim/sh64/compact/cmppz.cgs | 37 - sim/testsuite/sim/sh64/compact/cmpstr.cgs | 148 - sim/testsuite/sim/sh64/compact/div0s.cgs | 52 - sim/testsuite/sim/sh64/compact/div0u.cgs | 21 - sim/testsuite/sim/sh64/compact/div1.cgs | 52 - sim/testsuite/sim/sh64/compact/dmulsl.cgs | 115 - sim/testsuite/sim/sh64/compact/dmulul.cgs | 53 - sim/testsuite/sim/sh64/compact/dt.cgs | 42 - sim/testsuite/sim/sh64/compact/extsb.cgs | 29 - sim/testsuite/sim/sh64/compact/extsw.cgs | 32 - sim/testsuite/sim/sh64/compact/extub.cgs | 31 - sim/testsuite/sim/sh64/compact/extuw.cgs | 31 - sim/testsuite/sim/sh64/compact/fabs.cgs | 88 - sim/testsuite/sim/sh64/compact/fadd.cgs | 31 - sim/testsuite/sim/sh64/compact/fcmpeq.cgs | 88 - sim/testsuite/sim/sh64/compact/fcmpgt.cgs | 95 - sim/testsuite/sim/sh64/compact/fcnvds.cgs | 13 - sim/testsuite/sim/sh64/compact/fcnvsd.cgs | 27 - sim/testsuite/sim/sh64/compact/fdiv.cgs | 83 - sim/testsuite/sim/sh64/compact/fipr.cgs | 44 - sim/testsuite/sim/sh64/compact/fldi0.cgs | 17 - sim/testsuite/sim/sh64/compact/fldi1.cgs | 17 - sim/testsuite/sim/sh64/compact/flds.cgs | 26 - sim/testsuite/sim/sh64/compact/float.cgs | 80 - sim/testsuite/sim/sh64/compact/fmac.cgs | 78 - sim/testsuite/sim/sh64/compact/fmov.cgs | 273 - sim/testsuite/sim/sh64/compact/fmul.cgs | 121 - sim/testsuite/sim/sh64/compact/fneg.cgs | 83 - sim/testsuite/sim/sh64/compact/frchg.cgs | 13 - sim/testsuite/sim/sh64/compact/fschg.cgs | 13 - sim/testsuite/sim/sh64/compact/fsqrt.cgs | 93 - sim/testsuite/sim/sh64/compact/fsts.cgs | 11 - sim/testsuite/sim/sh64/compact/fsub.cgs | 120 - sim/testsuite/sim/sh64/compact/ftrc.cgs | 132 - sim/testsuite/sim/sh64/compact/ftrv.cgs | 74 - sim/testsuite/sim/sh64/compact/jmp.cgs | 29 - sim/testsuite/sim/sh64/compact/jsr.cgs | 29 - sim/testsuite/sim/sh64/compact/ldc-gbr.cgs | 22 - sim/testsuite/sim/sh64/compact/ldcl-gbr.cgs | 28 - sim/testsuite/sim/sh64/compact/lds-fpscr.cgs | 22 - sim/testsuite/sim/sh64/compact/lds-fpul.cgs | 17 - sim/testsuite/sim/sh64/compact/lds-mach.cgs | 23 - sim/testsuite/sim/sh64/compact/lds-macl.cgs | 23 - sim/testsuite/sim/sh64/compact/lds-pr.cgs | 23 - sim/testsuite/sim/sh64/compact/ldsl-fpscr.cgs | 43 - sim/testsuite/sim/sh64/compact/ldsl-fpul.cgs | 27 - sim/testsuite/sim/sh64/compact/ldsl-mach.cgs | 26 - sim/testsuite/sim/sh64/compact/ldsl-macl.cgs | 26 - sim/testsuite/sim/sh64/compact/ldsl-pr.cgs | 28 - sim/testsuite/sim/sh64/compact/macl.cgs | 76 - sim/testsuite/sim/sh64/compact/macw.cgs | 70 - sim/testsuite/sim/sh64/compact/mov.cgs | 40 - sim/testsuite/sim/sh64/compact/mova.cgs | 29 - sim/testsuite/sim/sh64/compact/movb1.cgs | 27 - sim/testsuite/sim/sh64/compact/movb10.cgs | 25 - sim/testsuite/sim/sh64/compact/movb2.cgs | 34 - sim/testsuite/sim/sh64/compact/movb3.cgs | 30 - sim/testsuite/sim/sh64/compact/movb4.cgs | 28 - sim/testsuite/sim/sh64/compact/movb5.cgs | 25 - sim/testsuite/sim/sh64/compact/movb6.cgs | 26 - sim/testsuite/sim/sh64/compact/movb7.cgs | 35 - sim/testsuite/sim/sh64/compact/movb8.cgs | 27 - sim/testsuite/sim/sh64/compact/movb9.cgs | 27 - sim/testsuite/sim/sh64/compact/movcal.cgs | 28 - sim/testsuite/sim/sh64/compact/movi.cgs | 39 - sim/testsuite/sim/sh64/compact/movl1.cgs | 31 - sim/testsuite/sim/sh64/compact/movl10.cgs | 34 - sim/testsuite/sim/sh64/compact/movl11.cgs | 32 - sim/testsuite/sim/sh64/compact/movl2.cgs | 43 - sim/testsuite/sim/sh64/compact/movl3.cgs | 36 - sim/testsuite/sim/sh64/compact/movl4.cgs | 38 - sim/testsuite/sim/sh64/compact/movl5.cgs | 37 - sim/testsuite/sim/sh64/compact/movl6.cgs | 25 - sim/testsuite/sim/sh64/compact/movl7.cgs | 37 - sim/testsuite/sim/sh64/compact/movl8.cgs | 24 - sim/testsuite/sim/sh64/compact/movl9.cgs | 24 - sim/testsuite/sim/sh64/compact/movt.cgs | 28 - sim/testsuite/sim/sh64/compact/movw1.cgs | 29 - sim/testsuite/sim/sh64/compact/movw10.cgs | 32 - sim/testsuite/sim/sh64/compact/movw11.cgs | 35 - sim/testsuite/sim/sh64/compact/movw2.cgs | 36 - sim/testsuite/sim/sh64/compact/movw3.cgs | 31 - sim/testsuite/sim/sh64/compact/movw4.cgs | 31 - sim/testsuite/sim/sh64/compact/movw5.cgs | 32 - sim/testsuite/sim/sh64/compact/movw6.cgs | 30 - sim/testsuite/sim/sh64/compact/movw7.cgs | 36 - sim/testsuite/sim/sh64/compact/movw8.cgs | 31 - sim/testsuite/sim/sh64/compact/movw9.cgs | 33 - sim/testsuite/sim/sh64/compact/mull.cgs | 64 - sim/testsuite/sim/sh64/compact/mulsw.cgs | 91 - sim/testsuite/sim/sh64/compact/muluw.cgs | 96 - sim/testsuite/sim/sh64/compact/neg.cgs | 55 - sim/testsuite/sim/sh64/compact/negc.cgs | 66 - sim/testsuite/sim/sh64/compact/nop.cgs | 13 - sim/testsuite/sim/sh64/compact/not.cgs | 47 - sim/testsuite/sim/sh64/compact/ocbi.cgs | 14 - sim/testsuite/sim/sh64/compact/ocbp.cgs | 15 - sim/testsuite/sim/sh64/compact/ocbwb.cgs | 15 - sim/testsuite/sim/sh64/compact/or.cgs | 43 - sim/testsuite/sim/sh64/compact/orb.cgs | 24 - sim/testsuite/sim/sh64/compact/ori.cgs | 40 - sim/testsuite/sim/sh64/compact/pref.cgs | 15 - sim/testsuite/sim/sh64/compact/rotcl.cgs | 121 - sim/testsuite/sim/sh64/compact/rotcr.cgs | 103 - sim/testsuite/sim/sh64/compact/rotl.cgs | 62 - sim/testsuite/sim/sh64/compact/rotr.cgs | 55 - sim/testsuite/sim/sh64/compact/rts.cgs | 24 - sim/testsuite/sim/sh64/compact/sets.cgs | 13 - sim/testsuite/sim/sh64/compact/sett.cgs | 16 - sim/testsuite/sim/sh64/compact/shad.cgs | 58 - sim/testsuite/sim/sh64/compact/shal.cgs | 57 - sim/testsuite/sim/sh64/compact/shar.cgs | 40 - sim/testsuite/sim/sh64/compact/shld.cgs | 48 - sim/testsuite/sim/sh64/compact/shll.cgs | 57 - sim/testsuite/sim/sh64/compact/shll16.cgs | 44 - sim/testsuite/sim/sh64/compact/shll2.cgs | 40 - sim/testsuite/sim/sh64/compact/shll8.cgs | 38 - sim/testsuite/sim/sh64/compact/shlr.cgs | 33 - sim/testsuite/sim/sh64/compact/shlr16.cgs | 14 - sim/testsuite/sim/sh64/compact/shlr2.cgs | 14 - sim/testsuite/sim/sh64/compact/shlr8.cgs | 14 - sim/testsuite/sim/sh64/compact/stc-gbr.cgs | 21 - sim/testsuite/sim/sh64/compact/stcl-gbr.cgs | 27 - sim/testsuite/sim/sh64/compact/sts-fpscr.cgs | 23 - sim/testsuite/sim/sh64/compact/sts-fpul.cgs | 14 - sim/testsuite/sim/sh64/compact/sts-mach.cgs | 22 - sim/testsuite/sim/sh64/compact/sts-macl.cgs | 21 - sim/testsuite/sim/sh64/compact/sts-pr.cgs | 22 - sim/testsuite/sim/sh64/compact/stsl-fpscr.cgs | 28 - sim/testsuite/sim/sh64/compact/stsl-fpul.cgs | 27 - sim/testsuite/sim/sh64/compact/stsl-mach.cgs | 42 - sim/testsuite/sim/sh64/compact/stsl-macl.cgs | 42 - sim/testsuite/sim/sh64/compact/stsl-pr.cgs | 42 - sim/testsuite/sim/sh64/compact/sub.cgs | 68 - sim/testsuite/sim/sh64/compact/subc.cgs | 109 - sim/testsuite/sim/sh64/compact/subv.cgs | 55 - sim/testsuite/sim/sh64/compact/swapb.cgs | 44 - sim/testsuite/sim/sh64/compact/swapw.cgs | 43 - sim/testsuite/sim/sh64/compact/tasb.cgs | 26 - sim/testsuite/sim/sh64/compact/testutils.inc | 49 - sim/testsuite/sim/sh64/compact/trapa.cgs | 13 - sim/testsuite/sim/sh64/compact/tst.cgs | 62 - sim/testsuite/sim/sh64/compact/tstb.cgs | 30 - sim/testsuite/sim/sh64/compact/tsti.cgs | 32 - sim/testsuite/sim/sh64/compact/xor.cgs | 70 - sim/testsuite/sim/sh64/compact/xorb.cgs | 24 - sim/testsuite/sim/sh64/compact/xori.cgs | 50 - sim/testsuite/sim/sh64/compact/xtrct.cgs | 46 - sim/testsuite/sim/sh64/interwork.exp | 20 - sim/testsuite/sim/sh64/media.exp | 19 - sim/testsuite/sim/sh64/media/ChangeLog | 102 - sim/testsuite/sim/sh64/media/add.cgs | 47 - sim/testsuite/sim/sh64/media/addi.cgs | 37 - sim/testsuite/sim/sh64/media/addil.cgs | 49 - sim/testsuite/sim/sh64/media/addl.cgs | 61 - sim/testsuite/sim/sh64/media/addzl.cgs | 39 - sim/testsuite/sim/sh64/media/alloco.cgs | 10 - sim/testsuite/sim/sh64/media/and.cgs | 68 - sim/testsuite/sim/sh64/media/andc.cgs | 50 - sim/testsuite/sim/sh64/media/andi.cgs | 46 - sim/testsuite/sim/sh64/media/beq.cgs | 52 - sim/testsuite/sim/sh64/media/beqi.cgs | 40 - sim/testsuite/sim/sh64/media/bge.cgs | 40 - sim/testsuite/sim/sh64/media/bgeu.cgs | 47 - sim/testsuite/sim/sh64/media/bgt.cgs | 32 - sim/testsuite/sim/sh64/media/bgtu.cgs | 36 - sim/testsuite/sim/sh64/media/blink.cgs | 17 - sim/testsuite/sim/sh64/media/bne.cgs | 23 - sim/testsuite/sim/sh64/media/bnei.cgs | 23 - sim/testsuite/sim/sh64/media/brk.cgs | 11 - sim/testsuite/sim/sh64/media/byterev.cgs | 67 - sim/testsuite/sim/sh64/media/cmpeq.cgs | 42 - sim/testsuite/sim/sh64/media/cmpgt.cgs | 43 - sim/testsuite/sim/sh64/media/cmpgtu.cgs | 43 - sim/testsuite/sim/sh64/media/cmveq.cgs | 32 - sim/testsuite/sim/sh64/media/cmvne.cgs | 32 - sim/testsuite/sim/sh64/media/fabsd.cgs | 39 - sim/testsuite/sim/sh64/media/fabss.cgs | 39 - sim/testsuite/sim/sh64/media/faddd.cgs | 33 - sim/testsuite/sim/sh64/media/fadds.cgs | 34 - sim/testsuite/sim/sh64/media/fcmpeqd.cgs | 36 - sim/testsuite/sim/sh64/media/fcmpeqs.cgs | 36 - sim/testsuite/sim/sh64/media/fcmpged.cgs | 46 - sim/testsuite/sim/sh64/media/fcmpges.cgs | 46 - sim/testsuite/sim/sh64/media/fcmpgtd.cgs | 36 - sim/testsuite/sim/sh64/media/fcmpgts.cgs | 36 - sim/testsuite/sim/sh64/media/fcmpund.cgs | 26 - sim/testsuite/sim/sh64/media/fcmpuns.cgs | 26 - sim/testsuite/sim/sh64/media/fcnvds.cgs | 27 - sim/testsuite/sim/sh64/media/fcnvsd.cgs | 27 - sim/testsuite/sim/sh64/media/fdivd.cgs | 39 - sim/testsuite/sim/sh64/media/fdivs.cgs | 39 - sim/testsuite/sim/sh64/media/fgetscr.cgs | 14 - sim/testsuite/sim/sh64/media/fiprs.cgs | 42 - sim/testsuite/sim/sh64/media/fldd.cgs | 13 - sim/testsuite/sim/sh64/media/fldp.cgs | 16 - sim/testsuite/sim/sh64/media/flds.cgs | 13 - sim/testsuite/sim/sh64/media/fldxd.cgs | 16 - sim/testsuite/sim/sh64/media/fldxp.cgs | 22 - sim/testsuite/sim/sh64/media/fldxs.cgs | 16 - sim/testsuite/sim/sh64/media/floatld.cgs | 12 - sim/testsuite/sim/sh64/media/floatls.cgs | 12 - sim/testsuite/sim/sh64/media/floatqd.cgs | 12 - sim/testsuite/sim/sh64/media/floatqs.cgs | 12 - sim/testsuite/sim/sh64/media/fmacs.cgs | 39 - sim/testsuite/sim/sh64/media/fmovd.cgs | 24 - sim/testsuite/sim/sh64/media/fmovdq.cgs | 23 - sim/testsuite/sim/sh64/media/fmovls.cgs | 26 - sim/testsuite/sim/sh64/media/fmovqd.cgs | 22 - sim/testsuite/sim/sh64/media/fmovs.cgs | 24 - sim/testsuite/sim/sh64/media/fmovsl.cgs | 21 - sim/testsuite/sim/sh64/media/fmuld.cgs | 30 - sim/testsuite/sim/sh64/media/fmuls.cgs | 31 - sim/testsuite/sim/sh64/media/fnegd.cgs | 35 - sim/testsuite/sim/sh64/media/fnegs.cgs | 35 - sim/testsuite/sim/sh64/media/fputscr.cgs | 14 - sim/testsuite/sim/sh64/media/fsqrtd.cgs | 27 - sim/testsuite/sim/sh64/media/fsqrts.cgs | 27 - sim/testsuite/sim/sh64/media/fstd.cgs | 34 - sim/testsuite/sim/sh64/media/fstp.cgs | 14 - sim/testsuite/sim/sh64/media/fsts.cgs | 34 - sim/testsuite/sim/sh64/media/fstxd.cgs | 31 - sim/testsuite/sim/sh64/media/fstxp.cgs | 14 - sim/testsuite/sim/sh64/media/fstxs.cgs | 30 - sim/testsuite/sim/sh64/media/fsubd.cgs | 36 - sim/testsuite/sim/sh64/media/fsubs.cgs | 36 - sim/testsuite/sim/sh64/media/ftrcdl.cgs | 26 - sim/testsuite/sim/sh64/media/ftrcdq.cgs | 24 - sim/testsuite/sim/sh64/media/ftrcsl.cgs | 26 - sim/testsuite/sim/sh64/media/ftrcsq.cgs | 25 - sim/testsuite/sim/sh64/media/ftrvs.cgs | 67 - sim/testsuite/sim/sh64/media/getcfg.cgs | 10 - sim/testsuite/sim/sh64/media/getcon.cgs | 29 - sim/testsuite/sim/sh64/media/gettr.cgs | 48 - sim/testsuite/sim/sh64/media/icbi.cgs | 10 - sim/testsuite/sim/sh64/media/ldb.cgs | 21 - sim/testsuite/sim/sh64/media/ldhil.cgs | 14 - sim/testsuite/sim/sh64/media/ldhiq.cgs | 14 - sim/testsuite/sim/sh64/media/ldl.cgs | 21 - sim/testsuite/sim/sh64/media/ldlol.cgs | 14 - sim/testsuite/sim/sh64/media/ldloq.cgs | 14 - sim/testsuite/sim/sh64/media/ldq.cgs | 21 - sim/testsuite/sim/sh64/media/ldub.cgs | 22 - sim/testsuite/sim/sh64/media/lduw.cgs | 22 - sim/testsuite/sim/sh64/media/ldw.cgs | 21 - sim/testsuite/sim/sh64/media/ldxb.cgs | 28 - sim/testsuite/sim/sh64/media/ldxl.cgs | 28 - sim/testsuite/sim/sh64/media/ldxq.cgs | 28 - sim/testsuite/sim/sh64/media/ldxub.cgs | 28 - sim/testsuite/sim/sh64/media/ldxuw.cgs | 29 - sim/testsuite/sim/sh64/media/ldxw.cgs | 29 - sim/testsuite/sim/sh64/media/mabsl.cgs | 39 - sim/testsuite/sim/sh64/media/mabsw.cgs | 38 - sim/testsuite/sim/sh64/media/maddl.cgs | 29 - sim/testsuite/sim/sh64/media/maddsl.cgs | 14 - sim/testsuite/sim/sh64/media/maddsub.cgs | 14 - sim/testsuite/sim/sh64/media/maddsw.cgs | 14 - sim/testsuite/sim/sh64/media/maddw.cgs | 29 - sim/testsuite/sim/sh64/media/mcmpeqb.cgs | 14 - sim/testsuite/sim/sh64/media/mcmpeql.cgs | 14 - sim/testsuite/sim/sh64/media/mcmpeqw.cgs | 14 - sim/testsuite/sim/sh64/media/mcmpgtl.cgs | 14 - sim/testsuite/sim/sh64/media/mcmpgtub.cgs | 14 - sim/testsuite/sim/sh64/media/mcmpgtw.cgs | 14 - sim/testsuite/sim/sh64/media/mcmv.cgs | 14 - sim/testsuite/sim/sh64/media/mcnvslw.cgs | 14 - sim/testsuite/sim/sh64/media/mcnvswb.cgs | 14 - sim/testsuite/sim/sh64/media/mcnvswub.cgs | 14 - sim/testsuite/sim/sh64/media/mextr1.cgs | 67 - sim/testsuite/sim/sh64/media/mextr2.cgs | 67 - sim/testsuite/sim/sh64/media/mextr3.cgs | 67 - sim/testsuite/sim/sh64/media/mextr4.cgs | 67 - sim/testsuite/sim/sh64/media/mextr5.cgs | 67 - sim/testsuite/sim/sh64/media/mextr6.cgs | 67 - sim/testsuite/sim/sh64/media/mextr7.cgs | 67 - sim/testsuite/sim/sh64/media/mmacfxwl.cgs | 14 - sim/testsuite/sim/sh64/media/mmacnfx-wl.cgs | 14 - sim/testsuite/sim/sh64/media/mmulfxl.cgs | 14 - sim/testsuite/sim/sh64/media/mmulfxrpw.cgs | 14 - sim/testsuite/sim/sh64/media/mmulfxw.cgs | 14 - sim/testsuite/sim/sh64/media/mmulhiwl.cgs | 14 - sim/testsuite/sim/sh64/media/mmull.cgs | 14 - sim/testsuite/sim/sh64/media/mmullowl.cgs | 14 - sim/testsuite/sim/sh64/media/mmulsumwq.cgs | 14 - sim/testsuite/sim/sh64/media/mmulw.cgs | 14 - sim/testsuite/sim/sh64/media/movi.cgs | 29 - sim/testsuite/sim/sh64/media/mpermw.cgs | 51 - sim/testsuite/sim/sh64/media/msadubq.cgs | 14 - sim/testsuite/sim/sh64/media/mshaldsl.cgs | 14 - sim/testsuite/sim/sh64/media/mshaldsw.cgs | 14 - sim/testsuite/sim/sh64/media/mshardl.cgs | 14 - sim/testsuite/sim/sh64/media/mshardsq.cgs | 14 - sim/testsuite/sim/sh64/media/mshardw.cgs | 14 - sim/testsuite/sim/sh64/media/mshfhib.cgs | 14 - sim/testsuite/sim/sh64/media/mshfhil.cgs | 14 - sim/testsuite/sim/sh64/media/mshfhiw.cgs | 14 - sim/testsuite/sim/sh64/media/mshflob.cgs | 14 - sim/testsuite/sim/sh64/media/mshflol.cgs | 14 - sim/testsuite/sim/sh64/media/mshflow.cgs | 14 - sim/testsuite/sim/sh64/media/mshlldl.cgs | 14 - sim/testsuite/sim/sh64/media/mshlldw.cgs | 14 - sim/testsuite/sim/sh64/media/mshlrdl.cgs | 14 - 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(100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_signbits_r.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_signbits_rh.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_signbits_rl.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_vmax.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shift_vmaxvmax.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_a0alr.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_af.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_af_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_ahalf_ln.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_ahalf_ln_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_ahalf_lp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_ahalf_lp_s.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_ahalf_rn.s (100%) rename sim/testsuite/{sim => }/bfin/c_dsp32shiftim_ahalf_rn_s.s (100%) rename sim/testsuite/{sim => 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}/bfin/c_dspldst_ld_dr_ippm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_drhi_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_drhi_ipp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_drlo_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_ld_drlo_ipp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_st_dr_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_st_dr_ipp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_st_dr_ippm.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_st_drhi_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_st_drhi_ipp.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_st_drlo_i.s (100%) rename sim/testsuite/{sim => }/bfin/c_dspldst_st_drlo_ipp.s (100%) rename sim/testsuite/{sim => }/bfin/c_except_illopcode.S (100%) rename sim/testsuite/{sim => }/bfin/c_except_sys_sstep.S (100%) rename sim/testsuite/{sim => }/bfin/c_except_user_mode.S (100%) rename sim/testsuite/{sim => }/bfin/c_interr_disable.S (100%) rename sim/testsuite/{sim => }/bfin/c_interr_disable_enable.S (100%) rename sim/testsuite/{sim => }/bfin/c_interr_excpt.S (100%) rename sim/testsuite/{sim => }/bfin/c_interr_loopsetup_stld.S (100%) rename sim/testsuite/{sim => }/bfin/c_interr_nested.S (100%) rename sim/testsuite/{sim => }/bfin/c_interr_nmi.S (100%) rename sim/testsuite/{sim => }/bfin/c_interr_pending.S (100%) rename sim/testsuite/{sim => }/bfin/c_interr_pending_2.S (100%) rename sim/testsuite/{sim => }/bfin/c_interr_timer.S (100%) rename sim/testsuite/{sim => }/bfin/c_interr_timer_reload.S (100%) rename sim/testsuite/{sim => }/bfin/c_interr_timer_tcount.S (100%) rename sim/testsuite/{sim => }/bfin/c_interr_timer_tscale.S (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_drhi.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_drlo.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_h_dr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_h_ibml.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_h_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_l_dr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_l_ibml.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_l_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_lz_dr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_lz_ibml.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_lz_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_lzhi_dr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_lzhi_ibml.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_lzhi_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldimmhalf_pibml.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_b.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_h.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_mm.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_mm_b.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_mm_h.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_mm_xb.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_mm_xh.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_pp.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_pp_b.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_pp_h.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_pp_xb.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_pp_xh.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_ppmm_hbx.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_xb.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_d_p_xh.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_p_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_p_p_mm.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_ld_p_p_pp.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_st_p_d.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_b.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_h.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_mm.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_mm_b.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_mm_h.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_pp.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_pp_b.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_st_p_d_pp_h.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_st_p_p.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_st_p_p_mm.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldst_st_p_p_pp.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstidxl_ld_dr_b.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstidxl_ld_dr_h.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstidxl_ld_dr_xb.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstidxl_ld_dr_xh.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstidxl_ld_dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstidxl_ld_preg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstidxl_st_dr_b.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstidxl_st_dr_h.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstidxl_st_dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstidxl_st_preg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstii_ld_dr_h.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstii_ld_dr_xh.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstii_ld_dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstii_ld_preg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstii_st_dr_h.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstii_st_dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstii_st_preg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstiifp_ld_dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstiifp_ld_preg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstiifp_st_dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstiifp_st_preg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstpmod_ld_dr_hi.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstpmod_ld_dr_lo.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstpmod_ld_dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstpmod_ld_h_xh.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstpmod_ld_lohi.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstpmod_st_dr_hi.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstpmod_st_dr_lo.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstpmod_st_dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_ldstpmod_st_lohi.s (100%) rename sim/testsuite/{sim => }/bfin/c_linkage.s (100%) rename sim/testsuite/{sim => }/bfin/c_logi2op_alshft_mix.s (100%) rename sim/testsuite/{sim => }/bfin/c_logi2op_arith_shft.s (100%) rename sim/testsuite/{sim => }/bfin/c_logi2op_bitclr.s (100%) rename sim/testsuite/{sim => }/bfin/c_logi2op_bitset.s (100%) rename sim/testsuite/{sim => }/bfin/c_logi2op_bittgl.s (100%) rename sim/testsuite/{sim => }/bfin/c_logi2op_bittst.s (100%) rename sim/testsuite/{sim => }/bfin/c_logi2op_log_l_shft.s (100%) rename sim/testsuite/{sim => }/bfin/c_logi2op_log_l_shft_astat.S (100%) rename sim/testsuite/{sim => }/bfin/c_logi2op_log_r_shft.s (100%) rename sim/testsuite/{sim => }/bfin/c_logi2op_log_r_shft_astat.S (100%) rename sim/testsuite/{sim => }/bfin/c_logi2op_nbittst.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_nested.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_nested_bot.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_nested_prelc.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_nested_top.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_overlap.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_div2_lc0.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_div2_lc1.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_lc0.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_lc1.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_preg_stld.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_prelc.s (100%) rename sim/testsuite/{sim => }/bfin/c_loopsetup_topbotcntr.s (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_interr_ctl.s (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_loop.S (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_loop_user_except.S (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_ppop_illegal_adr.S (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_ppopm_illegal_adr.S (100%) rename sim/testsuite/{sim => }/bfin/c_mmr_timer.S (100%) rename sim/testsuite/{sim => }/bfin/c_mode_supervisor.S (100%) rename sim/testsuite/{sim => }/bfin/c_mode_user.S (100%) rename sim/testsuite/{sim => }/bfin/c_mode_user_superivsor.S (100%) rename sim/testsuite/{sim => }/bfin/c_multi_issue_dsp_ld_ld.s (100%) rename sim/testsuite/{sim => }/bfin/c_multi_issue_dsp_ldst_1.s (100%) rename sim/testsuite/{sim => }/bfin/c_multi_issue_dsp_ldst_2.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_call_pcpr.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_call_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_clisti_interr.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_csync_mmr.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_except_rtx.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_excpt.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_jump_pcpr.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_jump_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_nop.s (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_raise_rt_i_n.S (100%) rename sim/testsuite/{sim => }/bfin/c_progctrl_rts.s (100%) rename sim/testsuite/{sim => }/bfin/c_ptr2op_pr_neg_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_ptr2op_pr_sft_2_1.s (100%) rename sim/testsuite/{sim => }/bfin/c_ptr2op_pr_shadd_1_2.s (100%) rename sim/testsuite/{sim => }/bfin/c_pushpopmultiple_dp.s (100%) rename sim/testsuite/{sim => }/bfin/c_pushpopmultiple_dp_pair.s (100%) rename sim/testsuite/{sim => }/bfin/c_pushpopmultiple_dreg.s (100%) rename sim/testsuite/{sim => }/bfin/c_pushpopmultiple_preg.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_acc_acc.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_dag_lz_dep.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_dr_acc_acc.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_dr_dep_nostall.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_dr_dr.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_dr_imlb.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_dr_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_imlb_dep_nostall.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_imlb_dep_stall.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_imlb_dr.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_imlb_imlb.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_imlb_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_pr_dep_nostall.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_pr_dep_stall.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_pr_dr.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_pr_imlb.s (100%) rename sim/testsuite/{sim => }/bfin/c_regmv_pr_pr.s (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ac_raise_mv.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ac_raise_mv_ppop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ac_regmv_pushpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_dec_raise_pushpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_brcc_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_call_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_j_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_raise_brcc_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_raise_call_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex1_raise_j_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_brcc_mp_mv_pop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_mmr_mvpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_mmrj_mvpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_raise_mmr_mvpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex2_raise_mmrj_mvpop.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex3_ls_brcc_mvp.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex3_ls_mmr_mvp.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex3_ls_mmrj_mvp.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_ex3_raise_ls_mmrj_mvp.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_wb_cs_lsmmrj_mvp.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_wb_raisecs_lsmmrj_mvp.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_wb_rti_lsmmrj_mvp.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_wb_rtn_lsmmrj_mvp.S (100%) rename sim/testsuite/{sim => }/bfin/c_seq_wb_rtx_lsmmrj_mvp.S (100%) rename sim/testsuite/{sim => }/bfin/c_ujump.s (100%) rename sim/testsuite/{sim => }/bfin/cc-alu.S (100%) rename sim/testsuite/{sim => }/bfin/cc-astat-bits.s (100%) rename sim/testsuite/{sim => }/bfin/cc0.s (100%) rename sim/testsuite/{sim => }/bfin/cc1.s (100%) rename sim/testsuite/{sim => }/bfin/cc5.S (100%) rename sim/testsuite/{sim => }/bfin/cec-exact-exception.S (100%) rename sim/testsuite/{sim => }/bfin/cec-ifetch.S (100%) rename sim/testsuite/{sim => }/bfin/cec-multi-pending.S (100%) rename sim/testsuite/{sim => }/bfin/cec-no-snen-reti.S (100%) rename sim/testsuite/{sim => }/bfin/cec-non-operating-env.s (100%) rename sim/testsuite/{sim => }/bfin/cec-raise-reti.S (100%) rename sim/testsuite/{sim => }/bfin/cec-snen-reti.S (100%) rename sim/testsuite/{sim => }/bfin/cec-syscfg-ssstep.S (100%) rename sim/testsuite/{sim => }/bfin/cec-system-call.S (100%) rename sim/testsuite/{sim => }/bfin/cir.s (100%) rename sim/testsuite/{sim => }/bfin/cir1.s (100%) rename sim/testsuite/{sim => }/bfin/cli-sti.s (100%) rename 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=> }/frv/bvlr.cgs (100%) create mode 100644 sim/testsuite/frv/cache.ms rename sim/testsuite/{sim => }/frv/cadd.cgs (100%) rename sim/testsuite/{sim => }/frv/caddcc.cgs (100%) rename sim/testsuite/{sim => }/frv/call.cgs (100%) rename sim/testsuite/{sim => }/frv/call.pcgs (100%) rename sim/testsuite/{sim => }/frv/callil.cgs (100%) rename sim/testsuite/{sim => }/frv/calll.cgs (100%) rename sim/testsuite/{sim => }/frv/cand.cgs (100%) rename sim/testsuite/{sim => }/frv/candcc.cgs (100%) rename sim/testsuite/{sim => }/frv/ccalll.cgs (100%) rename sim/testsuite/{sim => }/frv/cckc.cgs (100%) rename sim/testsuite/{sim => }/frv/cckeq.cgs (100%) rename sim/testsuite/{sim => }/frv/cckge.cgs (100%) rename sim/testsuite/{sim => }/frv/cckgt.cgs (100%) rename sim/testsuite/{sim => }/frv/cckhi.cgs (100%) rename sim/testsuite/{sim => }/frv/cckle.cgs (100%) rename sim/testsuite/{sim => }/frv/cckls.cgs (100%) rename sim/testsuite/{sim => }/frv/ccklt.cgs (100%) rename sim/testsuite/{sim => }/frv/cckn.cgs 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}/frv/cfstoi.cgs (100%) rename sim/testsuite/{sim => }/frv/cfsubs.cgs (100%) rename sim/testsuite/{sim => }/frv/cjmpl.cgs (100%) rename sim/testsuite/{sim => }/frv/ckc.cgs (100%) rename sim/testsuite/{sim => }/frv/ckeq.cgs (100%) rename sim/testsuite/{sim => }/frv/ckge.cgs (100%) rename sim/testsuite/{sim => }/frv/ckgt.cgs (100%) rename sim/testsuite/{sim => }/frv/ckhi.cgs (100%) rename sim/testsuite/{sim => }/frv/ckle.cgs (100%) rename sim/testsuite/{sim => }/frv/ckls.cgs (100%) rename sim/testsuite/{sim => }/frv/cklt.cgs (100%) rename sim/testsuite/{sim => }/frv/ckn.cgs (100%) rename sim/testsuite/{sim => }/frv/cknc.cgs (100%) rename sim/testsuite/{sim => }/frv/ckne.cgs (100%) rename sim/testsuite/{sim => }/frv/ckno.cgs (100%) rename sim/testsuite/{sim => }/frv/cknv.cgs (100%) rename sim/testsuite/{sim => }/frv/ckp.cgs (100%) rename sim/testsuite/{sim => }/frv/ckra.cgs (100%) rename sim/testsuite/{sim => }/frv/ckv.cgs (100%) rename sim/testsuite/{sim => }/frv/cld.cgs (100%) rename sim/testsuite/{sim => }/frv/cldbf.cgs (100%) rename sim/testsuite/{sim => }/frv/cldbfu.cgs (100%) rename sim/testsuite/{sim => }/frv/cldd.cgs (100%) rename sim/testsuite/{sim => }/frv/clddf.cgs (100%) rename sim/testsuite/{sim => }/frv/clddfu.cgs (100%) rename sim/testsuite/{sim => }/frv/clddu.cgs (100%) rename sim/testsuite/{sim => }/frv/cldf.cgs (100%) rename sim/testsuite/{sim => }/frv/cldfu.cgs (100%) rename sim/testsuite/{sim => }/frv/cldhf.cgs (100%) rename sim/testsuite/{sim => }/frv/cldhfu.cgs (100%) rename sim/testsuite/{sim => }/frv/cldq.cgs (100%) rename sim/testsuite/{sim => }/frv/cldqu.cgs (100%) rename sim/testsuite/{sim => }/frv/cldsb.cgs (100%) rename sim/testsuite/{sim => }/frv/cldsbu.cgs (100%) rename sim/testsuite/{sim => }/frv/cldsh.cgs (100%) rename sim/testsuite/{sim => }/frv/cldshu.cgs (100%) rename sim/testsuite/{sim => }/frv/cldu.cgs (100%) rename sim/testsuite/{sim => }/frv/cldub.cgs (100%) rename sim/testsuite/{sim => }/frv/cldubu.cgs (100%) rename sim/testsuite/{sim => }/frv/clduh.cgs (100%) rename sim/testsuite/{sim => }/frv/clduhu.cgs (100%) rename sim/testsuite/{sim => }/frv/clrfa.cgs (100%) rename sim/testsuite/{sim => }/frv/clrfr.cgs (100%) rename sim/testsuite/{sim => }/frv/clrga.cgs (100%) rename sim/testsuite/{sim => }/frv/clrgr.cgs (100%) rename sim/testsuite/{sim => }/frv/cmaddhss.cgs (100%) rename sim/testsuite/{sim => }/frv/cmaddhus.cgs (100%) rename sim/testsuite/{sim => }/frv/cmand.cgs (100%) rename sim/testsuite/{sim => }/frv/cmbtoh.cgs (100%) rename sim/testsuite/{sim => }/frv/cmbtohe.cgs (100%) rename sim/testsuite/{sim => }/frv/cmcpxis.cgs (100%) rename sim/testsuite/{sim => }/frv/cmcpxiu.cgs (100%) rename sim/testsuite/{sim => }/frv/cmcpxrs.cgs (100%) rename sim/testsuite/{sim => }/frv/cmcpxru.cgs (100%) rename sim/testsuite/{sim => }/frv/cmexpdhd.cgs (100%) rename sim/testsuite/{sim => }/frv/cmexpdhw.cgs (100%) rename sim/testsuite/{sim => }/frv/cmhtob.cgs (100%) rename sim/testsuite/{sim => }/frv/cmmachs.cgs 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}/frv/cmsubhss.cgs (100%) rename sim/testsuite/{sim => }/frv/cmsubhus.cgs (100%) rename sim/testsuite/{sim => }/frv/cmxor.cgs (100%) rename sim/testsuite/{sim => }/frv/cnot.cgs (100%) rename sim/testsuite/{sim => }/frv/commitfa.cgs (100%) rename sim/testsuite/{sim => }/frv/commitfr.cgs (100%) rename sim/testsuite/{sim => }/frv/commitga.cgs (100%) rename sim/testsuite/{sim => }/frv/commitgr.cgs (100%) rename sim/testsuite/{sim => }/frv/cop1.cgs (100%) rename sim/testsuite/{sim => }/frv/cop2.cgs (100%) rename sim/testsuite/{sim => }/frv/cor.cgs (100%) rename sim/testsuite/{sim => }/frv/corcc.cgs (100%) rename sim/testsuite/{sim => }/frv/cscan.cgs (100%) rename sim/testsuite/{sim => }/frv/csdiv.cgs (100%) rename sim/testsuite/{sim => }/frv/csll.cgs (100%) rename sim/testsuite/{sim => }/frv/csllcc.cgs (100%) rename sim/testsuite/{sim => }/frv/csmul.cgs (100%) rename sim/testsuite/{sim => }/frv/csmulcc.cgs (100%) rename sim/testsuite/{sim => }/frv/csra.cgs (100%) rename sim/testsuite/{sim => }/frv/csracc.cgs (100%) rename sim/testsuite/{sim => }/frv/csrl.cgs (100%) rename sim/testsuite/{sim => }/frv/csrlcc.cgs (100%) rename sim/testsuite/{sim => }/frv/cst.cgs (100%) rename sim/testsuite/{sim => }/frv/cstb.cgs (100%) rename sim/testsuite/{sim => }/frv/cstbf.cgs (100%) rename sim/testsuite/{sim => }/frv/cstbfu.cgs (100%) rename sim/testsuite/{sim => }/frv/cstbu.cgs (100%) rename sim/testsuite/{sim => }/frv/cstd.cgs (100%) rename sim/testsuite/{sim => }/frv/cstdf.cgs (100%) rename sim/testsuite/{sim => }/frv/cstdfu.cgs (100%) rename sim/testsuite/{sim => }/frv/cstdu.cgs (100%) rename sim/testsuite/{sim => }/frv/cstf.cgs (100%) rename sim/testsuite/{sim => }/frv/cstfu.cgs (100%) rename sim/testsuite/{sim => }/frv/csth.cgs (100%) rename sim/testsuite/{sim => }/frv/csthf.cgs (100%) rename sim/testsuite/{sim => }/frv/csthfu.cgs (100%) rename sim/testsuite/{sim => }/frv/csthu.cgs (100%) rename sim/testsuite/{sim => }/frv/cstq.cgs (100%) rename sim/testsuite/{sim => }/frv/cstu.cgs (100%) rename sim/testsuite/{sim => }/frv/csub.cgs (100%) rename sim/testsuite/{sim => }/frv/csubcc.cgs (100%) rename sim/testsuite/{sim => }/frv/cswap.cgs (100%) rename sim/testsuite/{sim => }/frv/cudiv.cgs (100%) rename sim/testsuite/{sim => }/frv/cxor.cgs (100%) rename sim/testsuite/{sim => }/frv/cxorcc.cgs (100%) rename sim/testsuite/{sim => }/frv/dcef.cgs (100%) rename sim/testsuite/{sim => }/frv/dcei.cgs (100%) rename sim/testsuite/{sim => }/frv/dcf.cgs (100%) rename sim/testsuite/{sim => }/frv/dci.cgs (100%) create mode 100644 sim/testsuite/frv/exit47.ms rename sim/testsuite/{sim => }/frv/fabsd.cgs (100%) rename sim/testsuite/{sim => }/frv/fabss.cgs (100%) rename sim/testsuite/{sim => }/frv/faddd.cgs (100%) rename sim/testsuite/{sim => }/frv/fadds.cgs (100%) rename sim/testsuite/{sim => }/frv/fbeq.cgs (100%) rename sim/testsuite/{sim => }/frv/fbeqlr.cgs (100%) rename sim/testsuite/{sim => }/frv/fbge.cgs (100%) rename sim/testsuite/{sim => }/frv/fbgelr.cgs (100%) rename sim/testsuite/{sim => }/frv/fbgt.cgs (100%) rename sim/testsuite/{sim => }/frv/fbgtlr.cgs (100%) rename sim/testsuite/{sim => }/frv/fble.cgs (100%) rename sim/testsuite/{sim => }/frv/fblelr.cgs (100%) rename sim/testsuite/{sim => }/frv/fblg.cgs (100%) rename sim/testsuite/{sim => }/frv/fblglr.cgs (100%) rename sim/testsuite/{sim => }/frv/fblt.cgs (100%) rename sim/testsuite/{sim => }/frv/fbltlr.cgs (100%) rename sim/testsuite/{sim => }/frv/fbne.cgs (100%) rename sim/testsuite/{sim => }/frv/fbnelr.cgs (100%) rename sim/testsuite/{sim => }/frv/fbno.cgs (100%) rename sim/testsuite/{sim => }/frv/fbnolr.cgs (100%) rename sim/testsuite/{sim => }/frv/fbo.cgs (100%) rename sim/testsuite/{sim => }/frv/fbolr.cgs (100%) rename sim/testsuite/{sim => }/frv/fbra.cgs (100%) rename sim/testsuite/{sim => }/frv/fbralr.cgs (100%) rename sim/testsuite/{sim => }/frv/fbu.cgs (100%) rename sim/testsuite/{sim => }/frv/fbue.cgs (100%) rename sim/testsuite/{sim => }/frv/fbuelr.cgs (100%) rename sim/testsuite/{sim => }/frv/fbug.cgs (100%) rename sim/testsuite/{sim => }/frv/fbuge.cgs (100%) rename sim/testsuite/{sim => }/frv/fbugelr.cgs (100%) rename sim/testsuite/{sim => }/frv/fbuglr.cgs (100%) rename sim/testsuite/{sim => }/frv/fbul.cgs (100%) rename sim/testsuite/{sim => }/frv/fbule.cgs (100%) rename sim/testsuite/{sim => }/frv/fbulelr.cgs (100%) rename sim/testsuite/{sim => }/frv/fbullr.cgs (100%) rename sim/testsuite/{sim => }/frv/fbulr.cgs (100%) rename sim/testsuite/{sim => }/frv/fcbeqlr.cgs (100%) rename sim/testsuite/{sim => }/frv/fcbgelr.cgs (100%) rename sim/testsuite/{sim => }/frv/fcbgtlr.cgs (100%) rename sim/testsuite/{sim => }/frv/fcblelr.cgs (100%) rename sim/testsuite/{sim => }/frv/fcblglr.cgs (100%) rename sim/testsuite/{sim => }/frv/fcbltlr.cgs (100%) rename sim/testsuite/{sim => }/frv/fcbnelr.cgs (100%) rename sim/testsuite/{sim => }/frv/fcbnolr.cgs (100%) rename sim/testsuite/{sim => }/frv/fcbolr.cgs (100%) rename sim/testsuite/{sim => }/frv/fcbralr.cgs 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}/frv/fdnegs.cgs (100%) rename sim/testsuite/{sim => }/frv/fdsads.cgs (100%) rename sim/testsuite/{sim => }/frv/fdsqrts.cgs (100%) rename sim/testsuite/{sim => }/frv/fdstoi.cgs (100%) rename sim/testsuite/{sim => }/frv/fdsubs.cgs (100%) rename sim/testsuite/{sim => }/frv/fdtoi.cgs (100%) rename sim/testsuite/{sim => }/frv/fitod.cgs (100%) rename sim/testsuite/{sim => }/frv/fitos.cgs (100%) rename sim/testsuite/{sim => }/frv/fmad.cgs (100%) rename sim/testsuite/{sim => }/frv/fmaddd.cgs (100%) rename sim/testsuite/{sim => }/frv/fmadds.cgs (100%) rename sim/testsuite/{sim => }/frv/fmas.cgs (100%) rename sim/testsuite/{sim => }/frv/fmovd.cgs (100%) rename sim/testsuite/{sim => }/frv/fmovs.cgs (100%) rename sim/testsuite/{sim => }/frv/fmsd.cgs (100%) rename sim/testsuite/{sim => }/frv/fmss.cgs (100%) rename sim/testsuite/{sim => }/frv/fmsubd.cgs (100%) rename sim/testsuite/{sim => }/frv/fmsubs.cgs (100%) rename sim/testsuite/{sim => }/frv/fmuld.cgs (100%) rename sim/testsuite/{sim => }/frv/fmuls.cgs (100%) rename sim/testsuite/{sim => }/frv/fnegd.cgs (100%) rename sim/testsuite/{sim => }/frv/fnegs.cgs (100%) rename sim/testsuite/{sim => }/frv/fnop.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/addss.cgs (100%) create mode 100644 sim/testsuite/frv/fr400/allinsn.exp rename sim/testsuite/{sim => }/frv/fr400/csdiv.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/maddaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/masaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/maveh.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mclracc.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mhdseth.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mhdsets.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mhsethih.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mhsethis.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mhsetloh.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/mhsetlos.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/movgs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/movsg.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/msubaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/scutss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/sdiv.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/sdivi.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/slass.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/smass.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/smsss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/smu.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/subss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/udiv.cgs (100%) rename sim/testsuite/{sim => }/frv/fr400/udivi.cgs (100%) create mode 100644 sim/testsuite/frv/fr500/allinsn.exp rename sim/testsuite/{sim => }/frv/fr500/cmqaddhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/cmqaddhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/cmqsubhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/cmqsubhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/dcpl.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/dcul.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/mclracc.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/mqaddhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/mqaddhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/mqsubhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr500/mqsubhus.cgs (100%) create mode 100644 sim/testsuite/frv/fr550/allinsn.exp rename sim/testsuite/{sim => }/frv/fr550/cmaddhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmaddhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmcpxiu.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmcpxru.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmmachu.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmqaddhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmqaddhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmqmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmqmachu.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmqsubhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmqsubhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmsubhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/cmsubhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/dcpl.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/dcul.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mabshs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/maddaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/maddhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/maddhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/masaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mdaddaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mdasaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mdsubaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mmachu.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mmrdhs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mmrdhu.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqaddhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqaddhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqmachu.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqmacxhs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqsubhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqsubhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqxmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mqxmacxhs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/msubaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/msubhss.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/msubhus.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/mtrap.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/udiv.cgs (100%) rename sim/testsuite/{sim => }/frv/fr550/udivi.cgs (100%) rename sim/testsuite/{sim => }/frv/fsqrtd.cgs (100%) rename sim/testsuite/{sim => }/frv/fsqrts.cgs (100%) rename sim/testsuite/{sim => }/frv/fstoi.cgs (100%) rename sim/testsuite/{sim => }/frv/fsubd.cgs (100%) rename sim/testsuite/{sim => }/frv/fsubs.cgs (100%) rename sim/testsuite/{sim => }/frv/fteq.cgs (100%) rename sim/testsuite/{sim => }/frv/ftge.cgs (100%) rename sim/testsuite/{sim => }/frv/ftgt.cgs (100%) rename sim/testsuite/{sim => }/frv/ftieq.cgs (100%) rename sim/testsuite/{sim => }/frv/ftige.cgs (100%) rename sim/testsuite/{sim => }/frv/ftigt.cgs (100%) rename sim/testsuite/{sim => }/frv/ftile.cgs (100%) rename sim/testsuite/{sim => }/frv/ftilg.cgs (100%) rename sim/testsuite/{sim => }/frv/ftilt.cgs (100%) rename sim/testsuite/{sim => }/frv/ftine.cgs (100%) rename sim/testsuite/{sim => }/frv/ftino.cgs (100%) rename sim/testsuite/{sim => }/frv/ftio.cgs (100%) rename sim/testsuite/{sim => }/frv/ftira.cgs (100%) rename sim/testsuite/{sim => }/frv/ftiu.cgs (100%) rename sim/testsuite/{sim => }/frv/ftiue.cgs (100%) rename sim/testsuite/{sim => }/frv/ftiug.cgs (100%) rename sim/testsuite/{sim => }/frv/ftiuge.cgs (100%) rename sim/testsuite/{sim => }/frv/ftiul.cgs (100%) rename sim/testsuite/{sim => }/frv/ftle.cgs (100%) rename sim/testsuite/{sim => }/frv/ftlg.cgs (100%) rename sim/testsuite/{sim => }/frv/ftlt.cgs (100%) rename sim/testsuite/{sim => }/frv/ftne.cgs (100%) rename sim/testsuite/{sim => }/frv/ftno.cgs (100%) rename sim/testsuite/{sim => }/frv/fto.cgs (100%) rename sim/testsuite/{sim => }/frv/ftra.cgs (100%) rename sim/testsuite/{sim => }/frv/ftu.cgs (100%) rename sim/testsuite/{sim => }/frv/ftue.cgs (100%) rename sim/testsuite/{sim => }/frv/ftug.cgs (100%) rename sim/testsuite/{sim => }/frv/ftuge.cgs (100%) rename sim/testsuite/{sim => }/frv/ftul.cgs (100%) rename sim/testsuite/{sim => }/frv/ftule.cgs (100%) create mode 100644 sim/testsuite/frv/grloop.ms create mode 100644 sim/testsuite/frv/hello.ms rename sim/testsuite/{sim => }/frv/icei.cgs (100%) rename sim/testsuite/{sim => }/frv/ici.cgs (100%) rename sim/testsuite/{sim => }/frv/icpl.cgs (100%) rename sim/testsuite/{sim => }/frv/icul.cgs (100%) create mode 100644 sim/testsuite/frv/interrupts.exp rename sim/testsuite/{sim => }/frv/interrupts/Ipipe-fr400.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/Ipipe-fr500.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/badalign-fr550.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/badalign.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/compound-fr550.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/compound.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/data_store_error-fr550.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/data_store_error.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/fp_exception-fr550.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/fp_exception.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/illinsn.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/insn_access_error-fr550.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/insn_access_error.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/mp_exception.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/privileged_instruction.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/regalign.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/reset.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/shadow_regs.cgs (100%) rename sim/testsuite/{sim => }/frv/interrupts/timer.cgs (100%) rename sim/testsuite/{sim => }/frv/jmpil.cgs (100%) rename sim/testsuite/{sim => }/frv/jmpl.cgs (100%) rename sim/testsuite/{sim => }/frv/jmpl.pcgs (100%) rename sim/testsuite/{sim => }/frv/ld.cgs (100%) rename sim/testsuite/{sim => }/frv/ldbf.cgs (100%) rename sim/testsuite/{sim => }/frv/ldbfi.cgs (100%) rename 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}/frv/ldqc.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqcu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqf.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqfi.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqfu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqi.cgs (100%) rename sim/testsuite/{sim => }/frv/ldqu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldsb.cgs (100%) rename sim/testsuite/{sim => }/frv/ldsbi.cgs (100%) rename sim/testsuite/{sim => }/frv/ldsbu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldsh.cgs (100%) rename sim/testsuite/{sim => }/frv/ldshi.cgs (100%) rename sim/testsuite/{sim => }/frv/ldshu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldu.cgs (100%) rename sim/testsuite/{sim => }/frv/ldub.cgs (100%) rename sim/testsuite/{sim => }/frv/ldubi.cgs (100%) rename sim/testsuite/{sim => }/frv/ldubu.cgs (100%) rename sim/testsuite/{sim => }/frv/lduh.cgs (100%) rename sim/testsuite/{sim => }/frv/lduhi.cgs (100%) rename sim/testsuite/{sim => }/frv/lduhu.cgs (100%) rename sim/testsuite/{sim => }/frv/lrbranch.pcgs (100%) rename sim/testsuite/{sim => }/frv/mabshs.cgs (100%) rename sim/testsuite/{sim => }/frv/maddhss.cgs (100%) rename sim/testsuite/{sim => }/frv/maddhus.cgs (100%) rename sim/testsuite/{sim => }/frv/mand.cgs (100%) rename sim/testsuite/{sim => }/frv/maveh.cgs (100%) rename sim/testsuite/{sim => }/frv/mbtoh.cgs (100%) rename sim/testsuite/{sim => }/frv/mbtohe.cgs (100%) rename sim/testsuite/{sim => }/frv/mclracc.cgs (100%) rename sim/testsuite/{sim => }/frv/mcmpsh.cgs (100%) rename sim/testsuite/{sim => }/frv/mcmpuh.cgs (100%) rename sim/testsuite/{sim => }/frv/mcop1.cgs (100%) rename sim/testsuite/{sim => }/frv/mcop2.cgs (100%) rename sim/testsuite/{sim => }/frv/mcplhi.cgs (100%) rename sim/testsuite/{sim => }/frv/mcpli.cgs (100%) rename sim/testsuite/{sim => }/frv/mcpxis.cgs (100%) rename sim/testsuite/{sim => }/frv/mcpxiu.cgs (100%) rename sim/testsuite/{sim => }/frv/mcpxrs.cgs (100%) rename sim/testsuite/{sim => }/frv/mcpxru.cgs (100%) rename sim/testsuite/{sim => }/frv/mcut.cgs (100%) rename sim/testsuite/{sim => }/frv/mcuti.cgs (100%) rename sim/testsuite/{sim => }/frv/mcutss.cgs (100%) rename sim/testsuite/{sim => }/frv/mcutssi.cgs (100%) rename sim/testsuite/{sim => }/frv/mdaddaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/mdasaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/mdcutssi.cgs (100%) rename sim/testsuite/{sim => }/frv/mdpackh.cgs (100%) rename sim/testsuite/{sim => }/frv/mdrotli.cgs (100%) rename sim/testsuite/{sim => }/frv/mdsubaccs.cgs (100%) rename sim/testsuite/{sim => }/frv/mdunpackh.cgs (100%) rename sim/testsuite/{sim => }/frv/membar.cgs (100%) rename sim/testsuite/{sim => }/frv/mexpdhd.cgs (100%) rename sim/testsuite/{sim => }/frv/mexpdhw.cgs (100%) rename sim/testsuite/{sim => }/frv/mhdseth.cgs (100%) rename sim/testsuite/{sim => }/frv/mhdsets.cgs (100%) rename sim/testsuite/{sim => }/frv/mhsethih.cgs (100%) rename sim/testsuite/{sim => }/frv/mhsethis.cgs (100%) rename sim/testsuite/{sim => }/frv/mhsetloh.cgs (100%) rename sim/testsuite/{sim => }/frv/mhsetlos.cgs (100%) rename sim/testsuite/{sim => }/frv/mhtob.cgs (100%) create mode 100644 sim/testsuite/frv/misc.exp rename sim/testsuite/{sim => }/frv/mmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/mmachu.cgs (100%) rename sim/testsuite/{sim => }/frv/mmrdhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mmrdhu.cgs (100%) rename sim/testsuite/{sim => }/frv/mmulhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mmulhu.cgs (100%) rename sim/testsuite/{sim => }/frv/mmulxhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mmulxhu.cgs (100%) rename sim/testsuite/{sim => }/frv/mnop.cgs (100%) rename sim/testsuite/{sim => }/frv/mnot.cgs (100%) rename sim/testsuite/{sim => }/frv/mor.cgs (100%) rename sim/testsuite/{sim => }/frv/mov.cgs (100%) rename sim/testsuite/{sim => }/frv/movfg.cgs (100%) rename sim/testsuite/{sim => }/frv/movfgd.cgs (100%) rename sim/testsuite/{sim => }/frv/movfgq.cgs (100%) rename sim/testsuite/{sim => }/frv/movgf.cgs (100%) rename sim/testsuite/{sim => }/frv/movgfd.cgs (100%) rename sim/testsuite/{sim => }/frv/movgfq.cgs (100%) rename sim/testsuite/{sim => }/frv/movgs.cgs (100%) rename sim/testsuite/{sim => }/frv/movsg.cgs (100%) rename sim/testsuite/{sim => }/frv/mpackh.cgs (100%) rename sim/testsuite/{sim => }/frv/mqcpxis.cgs (100%) rename sim/testsuite/{sim => }/frv/mqcpxiu.cgs (100%) rename sim/testsuite/{sim => }/frv/mqcpxrs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqcpxru.cgs (100%) rename sim/testsuite/{sim => }/frv/mqlclrhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqlmths.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmachu.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmacxhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmulhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmulhu.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmulxhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqmulxhu.cgs (100%) rename sim/testsuite/{sim => }/frv/mqsaths.cgs (100%) rename sim/testsuite/{sim => }/frv/mqsllhi.cgs (100%) rename sim/testsuite/{sim => }/frv/mqsrahi.cgs (100%) rename sim/testsuite/{sim => }/frv/mqxmachs.cgs (100%) rename sim/testsuite/{sim => }/frv/mqxmacxhs.cgs (100%) rename sim/testsuite/{sim => }/frv/mrdacc.cgs (100%) rename sim/testsuite/{sim => }/frv/mrdaccg.cgs (100%) rename sim/testsuite/{sim => }/frv/mrotli.cgs (100%) rename sim/testsuite/{sim => }/frv/mrotri.cgs (100%) rename sim/testsuite/{sim => }/frv/msaths.cgs (100%) rename sim/testsuite/{sim => }/frv/msathu.cgs (100%) rename sim/testsuite/{sim => }/frv/msllhi.cgs (100%) rename sim/testsuite/{sim => }/frv/msrahi.cgs (100%) rename sim/testsuite/{sim => }/frv/msrlhi.cgs (100%) rename sim/testsuite/{sim => }/frv/msubhss.cgs (100%) rename sim/testsuite/{sim => }/frv/msubhus.cgs (100%) rename sim/testsuite/{sim => }/frv/mtrap.cgs (100%) rename sim/testsuite/{sim => }/frv/munpackh.cgs (100%) rename sim/testsuite/{sim => }/frv/mwcut.cgs (100%) rename sim/testsuite/{sim => }/frv/mwcuti.cgs (100%) rename sim/testsuite/{sim => }/frv/mwtacc.cgs (100%) rename sim/testsuite/{sim => }/frv/mwtaccg.cgs (100%) rename sim/testsuite/{sim => }/frv/mxor.cgs (100%) rename sim/testsuite/{sim => }/frv/nandcr.cgs (100%) rename sim/testsuite/{sim => }/frv/nandncr.cgs (100%) rename sim/testsuite/{sim => }/frv/nfadds.cgs (100%) rename sim/testsuite/{sim => }/frv/nfdadds.cgs (100%) rename sim/testsuite/{sim => }/frv/nfdcmps.cgs (100%) rename sim/testsuite/{sim => }/frv/nfddivs.cgs (100%) rename sim/testsuite/{sim => }/frv/nfditos.cgs (100%) rename sim/testsuite/{sim => }/frv/nfdivs.cgs (100%) rename sim/testsuite/{sim => }/frv/nfdmadds.cgs (100%) rename sim/testsuite/{sim => }/frv/nfdmas.cgs (100%) rename sim/testsuite/{sim => }/frv/nfdmss.cgs (100%) rename sim/testsuite/{sim => }/frv/nfdmulcs.cgs (100%) rename sim/testsuite/{sim => }/frv/nfdmuls.cgs (100%) rename sim/testsuite/{sim => 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3 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_gnu_tk1/gnu-release-arm-spec2k6-O2_LTO updated (2b3c7132 -> 33472e17)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_gnu_tk1/gnu-release-arm-spec2k6-O2_LTO in repository toolchain/ci/base-artifacts. from 2b3c7132 10: reset: : 1 new 33472e17 11: update: binutils-linux-glibc: 1 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 232 +- 02-prepare_abe/console.log | 491 +- 03-build_abe-binutils/console.log | 10284 ++- 04-build_abe-stage1/console.log | 17714 ++--- 05-clean_sysroot/console.log | 16 +- 06-build_abe-linux/console.log | 2320 +- 07-build_abe-glibc/console.log | 36421 +++++----- 08-build_abe-stage2/console.log | 38142 +++++----- 10-benchmark/benchmark-start.log | 2 +- 10-benchmark/benchmark.log | 111 +- 10-benchmark/console.log | 241 +- 11-check_regression/console.log | 1187 +- 11-check_regression/extra-bisect-params | 2 +- 11-check_regression/results-0.csv | 196 +- 11-check_regression/results-1.csv | 196 +- 11-check_regression/results-brief.csv | 58 +- 11-check_regression/results-compare.csv | 39 +- 11-check_regression/results-full.csv | 198 +- 11-check_regression/results.csv | 70 +- 11-check_regression/results.log | 5908 +- 11-check_regression/results.regressions | 3 - 11-check_regression/trigger-build- | 3 - 12-update_baseline/console.log | 1214 +- 12-update_baseline/results-1.csv | 196 +- 12-update_baseline/results-brief.csv | 58 +- 12-update_baseline/results-compare.csv | 5 - 12-update_baseline/results-full.csv | 194 +- 12-update_baseline/results.csv | 70 +- 12-update_baseline/results.log | 3806 +- 12-update_baseline/results.regressions | 2 +- console.log | 108372 +++++++++++++++-------------- jenkins/manifest.sh | 18 +- reset-baseline | 0 results | 5 +- results_id | 2 +- 35 files changed, 114506 insertions(+), 113270 deletions(-) delete mode 100644 11-check_regression/results.regressions delete mode 100644 11-check_regression/trigger-build- delete mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/interesting-commits] branch linaro-local/ci/tcwg_gcc_check_bootstrap updated (3292f32 -> 33801b3)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check_bootstrap in repository toolchain/ci/interesting-commits. from 3292f32 Add last-good e63d76234d18cac731c4f3610d513bd8b39b5520 from h [...] new 33801b3 Add regression 2e96b5f14e4025691b57d2301d71aa6092ed44bc from [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc | 1 + 1 file changed, 1 insertion(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/interesting-commits] branch linaro-local/ci/tcwg_gcc_check_bootstrap updated (b859a16 -> 3292f32)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check_bootstrap in repository toolchain/ci/interesting-commits. discards b859a16 Add regression cd676dfa57e643a4f7d8445e6ebad0f21cf3fd84 from [...] discards 5475ae4 Add last-good eece52b53b75767593282d178bae12ceebb33f12 from h [...] new 3292f32 Add last-good e63d76234d18cac731c4f3610d513bd8b39b5520 from h [...] This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b859a16) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check_bootstrap (3292f32) You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[gcc] branch master updated (62e420293a2 -> e37ddb91a83)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 62e420293a2 libbacktrace: fix b2test_buildid test on non-english locales new e37ddb91a83 arm: Add check for arm_softfp_ok in pr98435.c. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/testsuite/gcc.target/arm/simd/pr98435.c | 1 + 1 file changed, 1 insertion(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/interesting-commits] branch linaro-local/ci/tcwg_kernel updated (d653bac -> c3f84f9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel in repository toolchain/ci/interesting-commits. from d653bac Add last-good 37c86c4a0bfc2faaf0ed959db9de814c85797f09 from h [...] new c3f84f9 Add regression 4a2b285e7e103d4d6c6ed3e5052a0ff74a5d7f15 from [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: linux | 1 + 1 file changed, 1 insertion(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/interesting-commits] branch linaro-local/ci/tcwg_kernel updated (0b8d0a1 -> d653bac)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel in repository toolchain/ci/interesting-commits. discards 0b8d0a1 Add regression 4a2b285e7e103d4d6c6ed3e5052a0ff74a5d7f15 from [...] discards 64da348 Add last-good 37c86c4a0bfc2faaf0ed959db9de814c85797f09 from h [...] new d653bac Add last-good 37c86c4a0bfc2faaf0ed959db9de814c85797f09 from h [...] This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (0b8d0a1) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel (d653bac) You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: linux | 1 - 1 file changed, 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[gcc] branch master updated (c5b21c3f4c1 -> 62e420293a2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from c5b21c3f4c1 libgo: update to Go1.17rc2 new 62e420293a2 libbacktrace: fix b2test_buildid test on non-english locales The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: libbacktrace/install-debuginfo-for-buildid.sh.in | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[binutils-gdb] branch master updated (af29a8abcf5 -> 1374be23274)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from af29a8abcf5 PR28217, Syntax error when memory region contains a hyphen new 1374be23274 PR28168: [CSKY] Fix stack overflow in disassembler The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gas/testsuite/gas/csky/pr28168.d | 12 ++++++++++++ gas/testsuite/gas/csky/pr28168.s | 1 + gas/testsuite/gas/csky/v2_float_part2.d | 16 ++++++++-------- opcodes/csky-dis.c | 8 ++++---- 4 files changed, 25 insertions(+), 12 deletions(-) create mode 100644 gas/testsuite/gas/csky/pr28168.d create mode 100644 gas/testsuite/gas/csky/pr28168.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/gcc-compare-results] branch master updated (73192e9 -> 3903e2b)

by tcwg-buildslave

This is an automated email from the git hooks/post-receive script. "tcwg-buildslave pushed a change to branch master in repository toolchain/gcc-compare-results. from 73192e9 From https://ci.linaro.org/job/tcwg_gnu_native_check_gdb-bise [...] new 3903e2b From https://ci.linaro.org/job/tcwg_gcc_check-bisect-master-arm/24/ The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: .../testsuite-management/flaky/tcwg_gcc_check-master-arm.xfail | 8 ++++++++ 1 file changed, 8 insertions(+) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

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Tcwg-commits August 2021