Tcwg-commits August 2021

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig updated (439bc4e3928 -> 484cc90311a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig in repository toolchain/ci/gcc. from 439bc4e3928 Daily bump. adds 42190825d56 Daily bump. adds 7ca388565af Update ChangeLog and version files for release adds 32e6acb3998 Update BASE-VER to 11.2.1 adds 6d9619f05be expmed: Fix store_integral_bit_field [PR101562] adds 117a880acb6 gimple-fold: Fix up __builtin_clear_padding on classes with [...] adds aa706e16180 d: Change in DotTemplateExp type semantics leading to regre [...] adds 89f0f83cdd1 d: Compile-time reflection for supported built-ins (PR101127) adds 9075f62ddc3 d: __FUNCTION__ doesn't work in core.stdc.stdio functions w [...] adds 45be6e80884 d: fix ICE at convert_expr(tree_node*, Type*, Type*) (PR101490) adds d3c268943c3 d: Wrong evaluation order of binary expressions (PR101640) adds 0b506dcf9f9 Fortran: reject FORMAT tag of unknown type. adds 1645998adcb Fortran: ICE, OOM while calculating sizes of derived type a [...] adds 35c7067f7b3 Fortran: extend check for array arguments and reject CLASS [...] adds b2d98d7311f Correct a mistake in a warnung for -Wnonnull. adds 6bcdcc522fe Daily bump. adds 22589586940 d: Ensure casting from bool results in either 0 or 1 (PR96435) adds 0a3f1c2402c d: Return the correct value for C++ constructor calls (PR101664) adds 868cb29b1dd rs6000: Add int128 target check to pr101129.c (PR101531) adds d185445c8d3 Update gcc .po files. adds cbd9dc32f8b Update gcc de.po. adds 2a47ee788c0 mips: add MSA vec_cmp and vec_cmpu expand pattern [PR101132] adds 7db1795abed mips: Fix up mips_atomic_assign_expand_fenv [PR94780] adds 396117287d9 Update gcc fr.po. adds 960135b264a Fix execution failure of parity_1.f90 on P10 [PR100952] adds 98e482761b0 Daily bump. adds f56873dfdbf Daily bump. adds 5b857c033e3 Daily bump. adds 91f8a7a34cf sanitizer: cherry pick 414482751452e54710f16bae58458c66298aaf69 adds 3c50d31dcf7 Daily bump. adds 129bf4f2efc c/101512 - fix missing address-taking in c_common_mark_addr [...] adds c891d268c44 tree-optimization/101505 - properly determine stmt precisio [...] new 32d307b851f aarch64: Turn sve_width tuning field into a bitmask new d0d9602e3cd aarch64: Add a simple fixed-point class for costing new 398305efe6a aarch64: Split out aarch64_adjust_body_cost_sve new b28c5f682bf aarch64: Add gather_load_xNN_cost tuning fields new 0c2e1ed84db aarch64: Tweak the cost of elementwise stores new 54c0d0dd9a8 aarch64: Tweak MLA vector costs new 65b5ab4744e aarch64: Restrict issue heuristics to inner vector loop new 484cc90311a aarch64: Add -mtune=neoverse-512tvb The 8 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: ChangeLog | 4 + c++tools/ChangeLog | 4 + config/ChangeLog | 4 + contrib/ChangeLog | 4 + contrib/header-tools/ChangeLog | 4 + contrib/reghunt/ChangeLog | 4 + contrib/regression/ChangeLog | 4 + fixincludes/ChangeLog | 4 + gcc/BASE-VER | 2 +- gcc/ChangeLog | 57 + gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 4 + gcc/analyzer/ChangeLog | 4 + gcc/brig/ChangeLog | 4 + gcc/c-family/ChangeLog | 4 + gcc/c-family/c-common.c | 11 +- gcc/c/ChangeLog | 4 + gcc/calls.c | 4 +- gcc/config/aarch64/aarch64-cores.def | 1 + gcc/config/aarch64/aarch64-protos.h | 17 +- gcc/config/aarch64/aarch64-tune.md | 2 +- gcc/config/aarch64/aarch64.c | 634 +- gcc/config/aarch64/fractional-cost.h | 236 + gcc/config/mips/mips-msa.md | 22 + gcc/config/mips/mips-protos.h | 1 + gcc/config/mips/mips.c | 23 +- gcc/config/rs6000/rs6000.md | 5 +- gcc/cp/ChangeLog | 4 + gcc/d/ChangeLog | 72 + gcc/d/d-builtins.cc | 15 + gcc/d/d-codegen.cc | 16 +- gcc/d/d-convert.cc | 51 +- gcc/d/d-lang.cc | 2 + gcc/d/d-tree.h | 2 + gcc/d/dmd/dcast.c | 15 +- gcc/d/dmd/expression.c | 16 +- gcc/d/dmd/expression.h | 2 + gcc/d/expr.cc | 28 +- gcc/doc/invoke.texi | 27 +- gcc/expmed.c | 5 +- gcc/fortran/ChangeLog | 32 + gcc/fortran/check.c | 3 +- gcc/fortran/io.c | 2 +- gcc/fortran/target-memory.c | 3 + gcc/fortran/trans-types.c | 4 +- gcc/gimple-fold.c | 4 + gcc/go/ChangeLog | 4 + gcc/jit/ChangeLog | 4 + gcc/lto/ChangeLog | 4 + gcc/objc/ChangeLog | 4 + gcc/objcp/ChangeLog | 4 + gcc/po/ChangeLog | 17 + gcc/po/be.po | 10328 +++++++++--------- gcc/po/da.po | 10339 +++++++++--------- gcc/po/de.po | 10357 ++++++++++--------- gcc/po/el.po | 10328 +++++++++--------- gcc/po/es.po | 10347 +++++++++--------- gcc/po/fi.po | 10336 +++++++++--------- gcc/po/fr.po | 10341 +++++++++--------- gcc/po/hr.po | 10328 +++++++++--------- gcc/po/id.po | 10333 +++++++++--------- gcc/po/ja.po | 10336 +++++++++--------- gcc/po/nl.po | 10332 +++++++++--------- gcc/po/ru.po | 10348 +++++++++--------- gcc/po/sr.po | 10334 +++++++++--------- gcc/po/sv.po | 10332 +++++++++--------- gcc/po/zh_CN.po | 10340 +++++++++--------- gcc/po/zh_TW.po | 10332 +++++++++--------- gcc/testsuite/ChangeLog | 131 + .../g++.dg/torture/builtin-clear-padding-4.C | 44 + gcc/testsuite/gcc.c-torture/compile/pr101562.c | 21 + gcc/testsuite/gcc.dg/Wnonnull-4.c | 36 +- gcc/testsuite/gcc.dg/torture/pr101512.c | 11 + gcc/testsuite/gcc.dg/vect/pr101505.c | 16 + gcc/testsuite/gcc.target/mips/pr101132.c | 14 + gcc/testsuite/gcc.target/powerpc/pr101129.c | 1 + gcc/testsuite/gdc.dg/extern-c++/extern-c++.exp | 39 + gcc/testsuite/gdc.dg/extern-c++/pr101664.d | 15 + gcc/testsuite/gdc.dg/extern-c++/pr101664_1.cc | 10 + gcc/testsuite/gdc.dg/pr101127a.d | 8 + gcc/testsuite/gdc.dg/pr101127b.d | 7 + gcc/testsuite/gdc.dg/pr101490.d | 21 + gcc/testsuite/gdc.dg/pr101640.d | 11 + gcc/testsuite/gdc.dg/pr96429.d | 2 +- gcc/testsuite/gdc.dg/torture/pr96435.d | 21 + gcc/testsuite/gdc.test/compilable/b19002.d | 12 + gcc/testsuite/gdc.test/compilable/test22133.d | 16 + .../gdc.test/fail_compilation/fail22133.d | 24 + .../gdc.test/fail_compilation/fail22144.d | 14 + .../gdc.test/fail_compilation/fail7424b.d | 2 +- .../gdc.test/fail_compilation/fail7424c.d | 2 +- .../gdc.test/fail_compilation/fail7424d.d | 2 +- .../gdc.test/fail_compilation/fail7424e.d | 2 +- .../gdc.test/fail_compilation/fail7424f.d | 2 +- .../gdc.test/fail_compilation/fail7424g.d | 2 +- .../gdc.test/fail_compilation/fail7424h.d | 2 +- .../gdc.test/fail_compilation/fail7424i.d | 2 +- gcc/testsuite/gfortran.dg/fmt_nonchar_3.f90 | 7 + gcc/testsuite/gfortran.dg/pr101514.f90 | 35 + gcc/testsuite/gfortran.dg/pr101536.f90 | 33 + gcc/tree-vect-patterns.c | 14 + gnattools/ChangeLog | 4 + gotools/ChangeLog | 4 + include/ChangeLog | 4 + intl/ChangeLog | 4 + libada/ChangeLog | 4 + libatomic/ChangeLog | 4 + libbacktrace/ChangeLog | 4 + libcc1/ChangeLog | 4 + libcody/ChangeLog | 4 + libcpp/ChangeLog | 4 + libcpp/po/ChangeLog | 4 + libdecnumber/ChangeLog | 4 + libffi/ChangeLog | 4 + libgcc/ChangeLog | 4 + libgcc/config/avr/libf7/ChangeLog | 4 + libgcc/config/libbid/ChangeLog | 4 + libgfortran/ChangeLog | 4 + libgomp/ChangeLog | 4 + libhsail-rt/ChangeLog | 4 + libiberty/ChangeLog | 4 + libitm/ChangeLog | 4 + libobjc/ChangeLog | 4 + liboffloadmic/ChangeLog | 4 + libphobos/ChangeLog | 4 + libquadmath/ChangeLog | 4 + libsanitizer/ChangeLog | 11 + .../sanitizer_common/sanitizer_posix_libcdep.cpp | 7 +- libssp/ChangeLog | 4 + libstdc++-v3/ChangeLog | 4 + libvtv/ChangeLog | 4 + lto-plugin/ChangeLog | 4 + maintainer-scripts/ChangeLog | 4 + zlib/ChangeLog | 4 + 134 files changed, 85048 insertions(+), 82473 deletions(-) create mode 100644 gcc/config/aarch64/fractional-cost.h create mode 100644 gcc/testsuite/g++.dg/torture/builtin-clear-padding-4.C create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr101562.c create mode 100644 gcc/testsuite/gcc.dg/torture/pr101512.c create mode 100644 gcc/testsuite/gcc.dg/vect/pr101505.c create mode 100644 gcc/testsuite/gcc.target/mips/pr101132.c create mode 100644 gcc/testsuite/gdc.dg/extern-c++/extern-c++.exp create mode 100644 gcc/testsuite/gdc.dg/extern-c++/pr101664.d create mode 100644 gcc/testsuite/gdc.dg/extern-c++/pr101664_1.cc create mode 100644 gcc/testsuite/gdc.dg/pr101127a.d create mode 100644 gcc/testsuite/gdc.dg/pr101127b.d create mode 100644 gcc/testsuite/gdc.dg/pr101490.d create mode 100644 gcc/testsuite/gdc.dg/pr101640.d create mode 100644 gcc/testsuite/gdc.dg/torture/pr96435.d create mode 100644 gcc/testsuite/gdc.test/compilable/b19002.d create mode 100644 gcc/testsuite/gdc.test/compilable/test22133.d create mode 100644 gcc/testsuite/gdc.test/fail_compilation/fail22133.d create mode 100644 gcc/testsuite/gdc.test/fail_compilation/fail22144.d create mode 100644 gcc/testsuite/gfortran.dg/fmt_nonchar_3.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr101514.f90 create mode 100644 gcc/testsuite/gfortran.dg/pr101536.f90 -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig updated (5df4b3a5c2 -> 1e6a1c8306)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig in repository toolchain/ci/binutils-gdb. from 5df4b3a5c2 Automatic date update in version.in adds 37ecc81173 Automatic date update in version.in adds d61e1cbd9e Automatic date update in version.in adds 2dad02b6d4 texi2pod.pl: add no-op --no-split option support [PR28144] adds 9d6d087078 Re: opcodes: constify & local meps macros adds 1c611b40e6 bfd: Close the file descriptor if there is no archive fd adds 0f71a70358 Automatic date update in version.in adds f448ce02de Automatic date update in version.in adds 351c55564d Automatic date update in version.in adds 511be4d5ee Automatic date update in version.in adds 5a9e3421a8 Automatic date update in version.in adds 038f80914f Automatic date update in version.in adds 2e8e5a93a1 PR28156, rename.c doesn't compile with MinGW adds 0c966828ce IBM Z: Remove lpswey parameter adds d2cb9c60a5 IBM Z: Add another arch14 instruction adds 28392428d0 Automatic date update in version.in adds 1e6a1c8306 Automatic date update in version.in No new revisions were added by this update. Summary of changes: bfd/plugin.c | 8 ++++++++ bfd/version.h | 2 +- binutils/rename.c | 2 ++ cpu/mep.opc | 10 +++++----- etc/texi2pod.pl | 2 ++ gas/testsuite/gas/s390/zarch-arch14.d | 3 ++- gas/testsuite/gas/s390/zarch-arch14.s | 3 ++- ld/testsuite/ld-plugin/lto.exp | 34 ++++++++++++++++++++++++++++++++++ ld/testsuite/ld-plugin/pr28138-1.c | 6 ++++++ ld/testsuite/ld-plugin/pr28138-2.c | 6 ++++++ ld/testsuite/ld-plugin/pr28138-3.c | 6 ++++++ ld/testsuite/ld-plugin/pr28138-4.c | 6 ++++++ ld/testsuite/ld-plugin/pr28138-5.c | 6 ++++++ ld/testsuite/ld-plugin/pr28138-6.c | 6 ++++++ ld/testsuite/ld-plugin/pr28138-7.c | 6 ++++++ ld/testsuite/ld-plugin/pr28138.c | 20 ++++++++++++++++++++ opcodes/s390-opc.c | 2 ++ opcodes/s390-opc.txt | 4 +++- 18 files changed, 123 insertions(+), 9 deletions(-) create mode 100644 ld/testsuite/ld-plugin/pr28138-1.c create mode 100644 ld/testsuite/ld-plugin/pr28138-2.c create mode 100644 ld/testsuite/ld-plugin/pr28138-3.c create mode 100644 ld/testsuite/ld-plugin/pr28138-4.c create mode 100644 ld/testsuite/ld-plugin/pr28138-5.c create mode 100644 ld/testsuite/ld-plugin/pr28138-6.c create mode 100644 ld/testsuite/ld-plugin/pr28138-7.c create mode 100644 ld/testsuite/ld-plugin/pr28138.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig updated (b05dbd9e -> 9a063d14)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/gnu-release-arm-lts-allnoconfig in repository toolchain/ci/base-artifacts. discards b05dbd9e 0: update: binutils-gcc-linux-qemu: all new 9a063d14 0: update: binutils-gcc-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (b05dbd9e) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/gnu-release-arm-l [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 78 +- 02-prepare_abe/console.log | 328 +- 03-build_abe-binutils/console.log | 10885 ++++----- 04-build_abe-stage1/console.log | 18287 +++++++-------- 05-build_abe-qemu/console.log | 6993 +++--- 06-build_linux/console.log | 618 +- 07-boot_linux/console.log | 6 +- 08-check_regression/console.log | 18 +- 08-check_regression/results.regressions | 11 +- 09-update_baseline/console.log | 16 +- 09-update_baseline/results.regressions | 11 +- console.log | 37387 +++++++++++++++--------------- jenkins/manifest.sh | 22 +- 13 files changed, 36220 insertions(+), 38440 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_gnu_cross_build/master-arm updated (3d9a539ee6 -> c87fcacc50)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/glibc. from 3d9a539ee6 rt: Set the correct message queue for tst-mqueue10 adds 505a964ae0 tst-mxfast: Don't run with mcheck adds fb89489636 Add INADDR_DUMMY from Linux 5.13 to netinet/in.h adds c87fcacc50 Linux: Fix fcntl, ioctl, prctl redirects for _TIME_BITS=64 ( [...] No new revisions were added by this update. Summary of changes: inet/netinet/in.h | 3 +++ io/fcntl.h | 8 ++++---- malloc/Makefile | 3 ++- misc/sys/ioctl.h | 4 ++-- sysdeps/unix/sysv/linux/sys/prctl.h | 2 +- 5 files changed, 12 insertions(+), 8 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_build/master-arm updated (ded2c2c068f -> f31da42e047)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/gcc. from ded2c2c068f analyzer: initial implementation of asm support [PR101570] adds 2697f8324fb Daily bump. adds 9a8c3fc2b2c Support cond_{smax,smin,umax,umin} for vector integer modes [...] adds f7aa81892eb Support cond_{smax,smin} for vector float/double modes unde [...] adds c16f21c7cf9 Support cond_{xor,ior,and} for vector integer mode under AVX512. adds ac8a2fbedf5 compiler: make escape analysis more robust about builtin functions adds 4e3129b0cac Fix oversight in handling of reverse SSO in SRA pass adds d0a5624bb40 cfgloop: Make loops_list support an optional loop_p root adds f0fc1e66238 Adjust gcc.dg/vect/bb-slp-pr101756.c adds 8cd27a3b255 aarch64: Don't include vec_select high-half in SIMD add cost adds 0c3aab7f2a3 aarch64: Don't include vec_select high-half in SIMD subtract cost adds 62e66c6a6cc arm: ensure the arch_name is always set for the build target adds 6a37d0331c2 arm: Don't reconfigure globals in arm_configure_build_target adds c1cdabe3aab arm: reorder assembler architecture directives [PR101723] adds 783d809f0bb vect: Move costing helpers from aarch64 code adds c04bb6d93f3 doc: Document cond_* shift optabs in md.texi adds 72264a63972 <x86gprintrin.h>: Add pragma GCC target("general-regs-only") adds 7b1de3eb9ed libstdc++: Move attributes that follow requires-clauses [PR101782] adds 03d47da7e1e testsuite: Fix warning introduced by nodiscard in libstdc++ adds 8dec72aeb54 libstdc++: Add [[nodiscard]] to <compare> adds 0bac793ed6b openmp: Implement omp_get_device_num routine adds 02e5ffd5db0 libgcc: Honor LDFLAGS_FOR_TARGET when linking libgcc_s adds 4805b92a326 libcpp: Fix makeucnid bug with combining values [PR100977] adds 4739344d36e libcpp: Regenerate ucnid.h using Unicode 13.0.0 files [PR100977] adds c8b024fa4b7 libstdc++: Move [[nodiscard]] attributes again [PR101782] adds 582c24e9fe8 runtime: extend internal atomics to comply with sync/atomic adds 8ebf4fb54ac Daily bump. adds a3d3e8c362c Adjust by-value function vec arguments to by-reference. adds 9124bbe1857 gcov: Add __gcov_info_to_gdca() adds fd351c76c23 Fixup gfortran.dg/vect/vect-8.f90 for aarch64 adds 318113a9612 rs6000: Fix restored rs6000_long_double_type_size adds a6075926947 aarch64: Use memcpy to copy structures in vst4[q]_lane intrinsics adds 344f879c66d aarch64: Use memcpy to copy structures in vst3[q]_lane intrinsics adds 1deb0818f4b aarch64: Use memcpy to copy structures in vst2[q]_lane intrinsics adds bc181adf26e aarch64: Use memcpy to copy structures in bfloat vst* intrinsics adds 3c94db20be9 gcov: Remove <stdint.h> from libgcov-driver.c adds 6b0bde7eef4 middle-end/AArch64: Fix bootstrap after vec changes adds 9d8eacc2ae8 Use CFN_BUILT_IN_CLRSB instead of BUILT_IN_CLRSB in switch. adds cd04e829c3a i386: Fix conditional move reg-to-reg move elimination peep [...] adds c2a984a3570 libstdc++: Also move the [[nodiscard]] attributes in <compare> adds f31da42e047 tree-optimization/101801 - remove vect_worthwhile_without_simd_p No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 300 ++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 36 + gcc/c/c-decl.c | 3 +- gcc/c/c-parser.c | 63 +- gcc/c/c-tree.h | 2 +- gcc/cfgloop.c | 66 + gcc/cfgloop.h | 100 +- gcc/config/aarch64/aarch64-sve-builtins.cc | 4 +- gcc/config/aarch64/aarch64.c | 155 +- gcc/config/aarch64/arm_neon.h | 1530 ++++++++++++++++---- gcc/config/arm/arm-c.c | 1 + gcc/config/arm/arm-cpus.in | 1 + gcc/config/arm/arm.c | 190 +-- gcc/config/i386/i386.c | 6 +- gcc/config/i386/i386.md | 4 +- gcc/config/i386/ia32intrin.h | 14 +- gcc/config/i386/serializeintrin.h | 7 +- gcc/config/i386/sse.md | 54 + gcc/config/i386/x86gprintrin.h | 11 + gcc/config/rs6000/rs6000.c | 2 + gcc/cp/ChangeLog | 6 + gcc/cp/cp-objcp-common.h | 2 +- gcc/cp/decl.c | 2 +- gcc/doc/invoke.texi | 80 +- gcc/doc/md.texi | 11 + gcc/dominance.c | 4 +- gcc/dominance.h | 2 +- gcc/gcov-io.c | 36 +- gcc/gcov-io.h | 1 + gcc/go/gofrontend/MERGE | 2 +- gcc/go/gofrontend/escape.cc | 56 +- gcc/go/gofrontend/expressions.cc | 48 +- gcc/ipa-prop.h | 8 +- gcc/langhooks-def.h | 2 +- gcc/langhooks.c | 3 +- gcc/langhooks.h | 2 +- gcc/testsuite/ChangeLog | 202 +++ gcc/testsuite/g++.old-deja/g++.other/inline7.C | 2 +- gcc/testsuite/gcc.dg/gcov-info-to-gcda.c | 60 + gcc/testsuite/gcc.dg/sso-15.c | 36 + gcc/testsuite/gcc.dg/vect/bb-slp-pr101756.c | 2 + gcc/testsuite/gcc.target/aarch64/vaddX_high_cost.c | 38 + .../aarch64/vector_structure_intrinsics.c | 76 +- gcc/testsuite/gcc.target/aarch64/vsubX_high_cost.c | 38 + gcc/testsuite/gcc.target/arm/attr-neon.c | 9 +- gcc/testsuite/gcc.target/arm/attr-neon2.c | 35 +- gcc/testsuite/gcc.target/arm/attr-neon3.c | 48 +- .../gcc.target/arm/cortex-m55-nofp-flag-hard.c | 2 +- .../gcc.target/arm/cortex-m55-nofp-flag-softfp.c | 2 +- .../arm/cortex-m55-nofp-nomve-flag-softfp.c | 2 +- .../gcc.target/arm/mve/intrinsics/mve_fpu1.c | 5 +- .../gcc.target/arm/mve/intrinsics/mve_fpu2.c | 5 +- gcc/testsuite/gcc.target/arm/pr69245.c | 6 +- gcc/testsuite/gcc.target/arm/pr98636.c | 3 +- .../gcc.target/arm/pragma_fpu_attribute.c | 7 +- .../gcc.target/arm/pragma_fpu_attribute_2.c | 7 +- .../gcc.target/i386/cond_op_anylogic_d-1.c | 38 + .../gcc.target/i386/cond_op_anylogic_d-2.c | 78 + .../gcc.target/i386/cond_op_anylogic_q-1.c | 10 + .../gcc.target/i386/cond_op_anylogic_q-2.c | 5 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_b-1.c | 8 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_b-2.c | 6 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_d-1.c | 41 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_d-2.c | 67 + .../gcc.target/i386/cond_op_maxmin_double-1.c | 39 + .../gcc.target/i386/cond_op_maxmin_double-2.c | 67 + .../gcc.target/i386/cond_op_maxmin_float-1.c | 8 + .../gcc.target/i386/cond_op_maxmin_float-2.c | 5 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_q-1.c | 8 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_q-2.c | 5 + .../gcc.target/i386/cond_op_maxmin_ub-1.c | 8 + .../gcc.target/i386/cond_op_maxmin_ub-2.c | 6 + .../gcc.target/i386/cond_op_maxmin_ud-1.c | 8 + .../gcc.target/i386/cond_op_maxmin_ud-2.c | 5 + .../gcc.target/i386/cond_op_maxmin_uq-1.c | 8 + .../gcc.target/i386/cond_op_maxmin_uq-2.c | 5 + .../gcc.target/i386/cond_op_maxmin_uw-1.c | 8 + .../gcc.target/i386/cond_op_maxmin_uw-2.c | 6 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_w-1.c | 8 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_w-2.c | 6 + gcc/testsuite/gcc.target/i386/pr101797.c | 15 + gcc/testsuite/gcc.target/i386/pr99744-3.c | 13 + gcc/testsuite/gcc.target/i386/pr99744-4.c | 357 +++++ gcc/testsuite/gcc.target/i386/pr99744-5.c | 25 + gcc/testsuite/gcc.target/i386/pr99744-6.c | 23 + gcc/testsuite/gcc.target/i386/pr99744-7.c | 12 + gcc/testsuite/gcc.target/i386/pr99744-8.c | 13 + gcc/testsuite/gcc.target/powerpc/pragma-optimize.c | 13 + gcc/testsuite/gfortran.dg/vect/vect-8.f90 | 3 +- gcc/tree-data-ref.c | 10 +- gcc/tree-data-ref.h | 4 +- gcc/tree-predcom.c | 13 +- gcc/tree-sra.c | 5 +- gcc/tree-ssa-phiopt.c | 6 +- gcc/tree-ssa-pre.c | 2 +- gcc/tree-ssa-threadbackward.c | 6 +- gcc/tree-vect-data-refs.c | 15 +- gcc/tree-vect-loop.c | 43 +- gcc/tree-vect-slp-patterns.c | 2 +- gcc/tree-vect-stmts.c | 28 +- gcc/tree-vectorizer.h | 110 +- gcc/vec.c | 47 +- gcc/vec.h | 66 +- libcpp/ChangeLog | 11 + libcpp/makeucnid.c | 2 +- libcpp/ucnid.h | 671 ++++----- libgcc/ChangeLog | 11 + libgcc/Makefile.in | 2 +- libgcc/config/t-slibgcc | 2 +- libgcc/config/t-slibgcc-darwin | 2 +- libgcc/config/t-slibgcc-fuchsia | 3 +- libgcc/config/t-slibgcc-vms | 2 +- libgcc/gcov.h | 19 + libgcc/libgcov-driver.c | 187 ++- libgcc/libgcov.h | 5 - libgo/go/runtime/internal/atomic/atomic.c | 80 + libgo/go/runtime/internal/atomic/stubs.go | 25 + libgomp/ChangeLog | 31 + libgomp/config/gcn/icv-device.c | 11 + libgomp/config/nvptx/icv-device.c | 11 + libgomp/fortran.c | 7 + libgomp/icv-device.c | 9 + libgomp/libgomp-plugin.h | 6 + libgomp/libgomp.map | 8 +- libgomp/libgomp.texi | 29 + libgomp/omp.h.in | 1 + libgomp/omp_lib.f90.in | 6 + libgomp/omp_lib.h.in | 3 + libgomp/plugin/plugin-gcn.c | 38 +- libgomp/plugin/plugin-nvptx.c | 25 +- libgomp/target.c | 36 +- libgomp/testsuite/lib/libgomp.exp | 5 + libgomp/testsuite/libgomp.c-c++-common/target-45.c | 30 + libgomp/testsuite/libgomp.fortran/target10.f90 | 20 + libstdc++-v3/ChangeLog | 174 +++ libstdc++-v3/include/bits/ranges_base.h | 24 +- libstdc++-v3/include/bits/stl_iterator.h | 20 +- libstdc++-v3/include/bits/stl_queue.h | 3 - libstdc++-v3/include/std/ranges | 42 +- libstdc++-v3/libsupc++/compare | 60 +- .../18_support/comparisons/categories/zero_neg.cc | 2 +- libstdc++-v3/testsuite/std/ranges/access/101782.cc | 9 + 143 files changed, 4971 insertions(+), 1346 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/gcov-info-to-gcda.c create mode 100644 gcc/testsuite/gcc.dg/sso-15.c create mode 100644 gcc/testsuite/gcc.target/aarch64/vaddX_high_cost.c create mode 100644 gcc/testsuite/gcc.target/aarch64/vsubX_high_cost.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_anylogic_d-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_anylogic_d-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_anylogic_q-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_anylogic_q-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_b-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_b-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_d-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_d-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_q-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_q-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_ub-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_ub-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_ud-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_ud-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_uq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_uq-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_uw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_uw-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_w-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_w-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr101797.c create mode 100644 gcc/testsuite/gcc.target/i386/pr99744-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr99744-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr99744-5.c create mode 100644 gcc/testsuite/gcc.target/i386/pr99744-6.c create mode 100644 gcc/testsuite/gcc.target/i386/pr99744-7.c create mode 100644 gcc/testsuite/gcc.target/i386/pr99744-8.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma-optimize.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/target-45.c create mode 100644 libgomp/testsuite/libgomp.fortran/target10.f90 create mode 100644 libstdc++-v3/testsuite/std/ranges/access/101782.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_build/master-arm updated (8085fa01a5 -> 7fc8d4f48b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/binutils-gdb. from 8085fa01a5 gdb: Use unwinder name in frame_info::to_string adds 12488b1767 Automatic date update in version.in adds 99ba4b64d3 gdb/testsuite: update test gdb.base/step-over-syscall.exp adds 5570ab7f44 Re: elf: Treat undefined version as hidden adds 4939c49d21 PR28165, buffer overflow in elf32-rx.c:rx_info_to_howto_rela adds 6ecfe4abfd PR28166, _bfd_elf_mips_get_relocated_section_contents adds ddbe6976d5 PR28167, vms-alpha build_module_list adds 0cc7872125 [PATCH 1/2] Enable Intel AVX512_FP16 instructions adds 17a089ffda [PATCH 2/2] Add tests for Intel AVX512_FP16 instructions adds 183657edcd Replace the symbol needs evaluator with a parser adds fb4cdecb7e Cleanup of the dwarf_expr_context constructor adds 62e37eac1c Move frame context info to dwarf_expr_context adds 6c7779b34b Remove get_frame_cfa from dwarf_expr_context adds a580d9604b Move compilation unit info to dwarf_expr_context adds b6d156edd8 Move dwarf_call to dwarf_expr_context adds 73e6b86330 Move get_object_address to dwarf_expr_context adds 3c7c57cdc0 Move read_mem to dwarf_expr_context adds 0a2b69d04b Move push_dwarf_reg_entry_value to expr.c adds 9e739f693f Inline get_reg_value method of dwarf_expr_context adds 14a62404c9 Remove empty frame and full evaluators adds f9e4ed8baa Merge evaluate_for_locexpr_baton evaluator adds f4091d2644 Move piece_closure and its support to expr.c adds efa86d3c26 Make value_copy also copy the stack data member adds ba5bc3e5a9 Make DWARF evaluator return a single struct value adds 0579205aec Simplify dwarf_expr_context class interface adds 70454ee70a Add as_lval argument to expression evaluator adds 17e971f729 gdb: use ptid_t::to_string in print_target_wait_results adds b765e92113 gdb: target_waitstatus_to_string: print extra info for FORKE [...] adds 52e0e32b34 gdb/testsuite: gdb.base/attach.exp: fix support check in tes [...] adds 4b0cf3d6d0 gdb/testsuite: gdb.base/attach.exp: expose bug when testing [...] adds bad23de354 [gdb] Handle .TOC. sections during gdb-compile for rs6000 target. adds c2bc854c8b [PATCH] GDB Testsuite, update compile-cplus.exp adds 8179e388b6 Automatic date update in version.in adds 352bd3aa1c PR28172, bfin_pcrel24_reloc heap-buffer-overflow adds a379e7588c PR28173, nds32_elf_howto_table index out of bounds adds e039f7ed86 PR28175, Segment fault in coff-tic30.c reloc_processing adds 856c1545ce bfd_reloc_offset_in_range overflow adds 7eb7e4cdcc chew ubsan warning adds 7fc8d4f48b Re: Add tests for Intel AVX512_FP16 instructions No new revisions were added by this update. Summary of changes: bfd/coff-tic30.c | 13 +- bfd/coff-z80.c | 13 +- bfd/coff-z8k.c | 13 +- bfd/doc/chew.c | 4 +- bfd/elf32-bfin.c | 16 +- bfd/elf32-nds32.c | 55 +- bfd/elf32-rx.c | 13 +- bfd/elf64-mips.c | 11 +- bfd/reloc.c | 2 +- bfd/version.h | 2 +- bfd/vms-alpha.c | 11 +- gas/NEWS | 2 + gas/config/tc-i386.c | 45 +- gas/doc/c-i386.texi | 4 +- gas/testsuite/gas/i386/avx512_fp16-intel.d | 1479 + gas/testsuite/gas/i386/avx512_fp16-inval-bcast.l | 27 + gas/testsuite/gas/i386/avx512_fp16-inval-bcast.s | 33 + gas/testsuite/gas/i386/avx512_fp16.d | 1479 + gas/testsuite/gas/i386/avx512_fp16.s | 1475 + gas/testsuite/gas/i386/avx512_fp16_pseudo_ops.d | 2035 + gas/testsuite/gas/i386/avx512_fp16_pseudo_ops.s | 2030 + gas/testsuite/gas/i386/avx512_fp16_vl-intel.d | 1437 + gas/testsuite/gas/i386/avx512_fp16_vl.d | 1437 + gas/testsuite/gas/i386/avx512_fp16_vl.s | 1433 + gas/testsuite/gas/i386/i386.exp | 14 + gas/testsuite/gas/i386/x86-64-avx512_fp16-bad.d | 17 + gas/testsuite/gas/i386/x86-64-avx512_fp16-bad.s | 36 + gas/testsuite/gas/i386/x86-64-avx512_fp16-intel.d | 1539 + .../gas/i386/x86-64-avx512_fp16-inval-bcast.l | 27 + .../gas/i386/x86-64-avx512_fp16-inval-bcast.s | 33 + .../gas/i386/x86-64-avx512_fp16-inval-register.l | 11 + .../gas/i386/x86-64-avx512_fp16-inval-register.s | 15 + gas/testsuite/gas/i386/x86-64-avx512_fp16.d | 1539 + gas/testsuite/gas/i386/x86-64-avx512_fp16.s | 1535 + .../gas/i386/x86-64-avx512_fp16_pseudo_ops.d | 2035 + .../gas/i386/x86-64-avx512_fp16_pseudo_ops.s | 2031 + .../gas/i386/x86-64-avx512_fp16_vl-intel.d | 1437 + gas/testsuite/gas/i386/x86-64-avx512_fp16_vl.d | 1437 + gas/testsuite/gas/i386/x86-64-avx512_fp16_vl.s | 1433 + gas/testsuite/gas/i386/x86-64-default-suffix-avx.d | 3 + gas/testsuite/gas/i386/x86-64-default-suffix.d | 3 + gas/testsuite/gas/i386/x86-64-default-suffix.s | 3 + gas/testsuite/gas/i386/xmmword.l | 10 + gas/testsuite/gas/i386/xmmword.s | 11 + gdb/compile/compile-object-load.c | 41 + gdb/dwarf2/expr.c | 1198 +- gdb/dwarf2/expr.h | 149 +- gdb/dwarf2/frame.c | 117 +- gdb/dwarf2/loc.c | 1694 +- gdb/dwarf2/loc.h | 35 +- gdb/infrun.c | 12 +- gdb/target/waitstatus.c | 25 +- gdb/testsuite/gdb.base/attach.exp | 46 +- gdb/testsuite/gdb.base/step-over-clone.c | 39 + gdb/testsuite/gdb.base/step-over-syscall.exp | 69 +- gdb/testsuite/gdb.compile/compile-cplus.exp | 9 +- .../symbol_needs_eval.c} | 37 +- .../gdb.dwarf2/symbol_needs_eval_fail.exp | 112 + .../gdb.dwarf2/symbol_needs_eval_timeout.exp | 131 + .../gdb.python/amd64-py-framefilter-invalidarg.S | 1 - gdb/testsuite/lib/dwarf.exp | 4 + gdb/value.c | 2 + ld/testsuite/ld-cris/libdso-15b.d | 6 +- ld/testsuite/ld-cris/libdso-1c.d | 4 +- opcodes/i386-dis-evex-prefix.h | 221 + opcodes/i386-dis-evex-w.h | 63 +- opcodes/i386-dis-evex.h | 608 +- opcodes/i386-dis.c | 252 +- opcodes/i386-gen.c | 10 +- opcodes/i386-init.h | 520 +- opcodes/i386-opc.h | 11 + opcodes/i386-opc.tbl | 366 + opcodes/i386-tbl.h | 39415 +++++++++++-------- 73 files changed, 53552 insertions(+), 17883 deletions(-) create mode 100644 gas/testsuite/gas/i386/avx512_fp16-intel.d create mode 100644 gas/testsuite/gas/i386/avx512_fp16-inval-bcast.l create mode 100644 gas/testsuite/gas/i386/avx512_fp16-inval-bcast.s create mode 100644 gas/testsuite/gas/i386/avx512_fp16.d create mode 100644 gas/testsuite/gas/i386/avx512_fp16.s create mode 100644 gas/testsuite/gas/i386/avx512_fp16_pseudo_ops.d create mode 100644 gas/testsuite/gas/i386/avx512_fp16_pseudo_ops.s create mode 100755 gas/testsuite/gas/i386/avx512_fp16_vl-intel.d create mode 100755 gas/testsuite/gas/i386/avx512_fp16_vl.d create mode 100644 gas/testsuite/gas/i386/avx512_fp16_vl.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-bad.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-bad.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-inval-bcast.l create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-inval-bcast.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-inval-register.l create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-inval-register.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16_pseudo_ops.d create mode 100755 gas/testsuite/gas/i386/x86-64-avx512_fp16_pseudo_ops.s create mode 100755 gas/testsuite/gas/i386/x86-64-avx512_fp16_vl-intel.d create mode 100755 gas/testsuite/gas/i386/x86-64-avx512_fp16_vl.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16_vl.s copy gdb/testsuite/{gdb.base/step-over-clone.c => gdb.dwarf2/symbol_needs_eval.c} (54%) create mode 100644 gdb/testsuite/gdb.dwarf2/symbol_needs_eval_fail.exp create mode 100644 gdb/testsuite/gdb.dwarf2/symbol_needs_eval_timeout.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_build/master-arm updated (ac8810b2 -> aed31a82)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/base-artifacts. discards ac8810b2 0: update: binutils-gcc-glibc-qemu: 6 new aed31a82 0: update: binutils-gcc-glibc-qemu: 6 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (ac8810b2) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_build/master-a [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log | 138 +- 02-prepare_abe/console.log | 314 +- 04-build_abe-binutils/console.log | 8776 ++-- 05-build_abe-stage1/console.log | 16956 +++--- 06-build_abe-linux/console.log | 2024 +- 07-build_abe-glibc/console.log | 28710 +++++------ 08-build_abe-stage2/console.log | 34269 +++++++------ 09-build_abe-qemu/console.log | 5718 +-- 10-check_regression/console.log | 2 +- 11-update_baseline/console.log | 2 +- console.log | 99547 ++++++++++++++++++------------------ jenkins/manifest.sh | 24 +- 12 files changed, 98157 insertions(+), 98323 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (3d9a539ee6 -> c87fcacc50)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/glibc. from 3d9a539ee6 rt: Set the correct message queue for tst-mqueue10 adds 505a964ae0 tst-mxfast: Don't run with mcheck adds fb89489636 Add INADDR_DUMMY from Linux 5.13 to netinet/in.h adds c87fcacc50 Linux: Fix fcntl, ioctl, prctl redirects for _TIME_BITS=64 ( [...] No new revisions were added by this update. Summary of changes: inet/netinet/in.h | 3 +++ io/fcntl.h | 8 ++++---- malloc/Makefile | 3 ++- misc/sys/ioctl.h | 4 ++-- sysdeps/unix/sysv/linux/sys/prctl.h | 2 +- 5 files changed, 12 insertions(+), 8 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (ded2c2c068f -> f31da42e047)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/gcc. from ded2c2c068f analyzer: initial implementation of asm support [PR101570] adds 2697f8324fb Daily bump. adds 9a8c3fc2b2c Support cond_{smax,smin,umax,umin} for vector integer modes [...] adds f7aa81892eb Support cond_{smax,smin} for vector float/double modes unde [...] adds c16f21c7cf9 Support cond_{xor,ior,and} for vector integer mode under AVX512. adds ac8a2fbedf5 compiler: make escape analysis more robust about builtin functions adds 4e3129b0cac Fix oversight in handling of reverse SSO in SRA pass adds d0a5624bb40 cfgloop: Make loops_list support an optional loop_p root adds f0fc1e66238 Adjust gcc.dg/vect/bb-slp-pr101756.c adds 8cd27a3b255 aarch64: Don't include vec_select high-half in SIMD add cost adds 0c3aab7f2a3 aarch64: Don't include vec_select high-half in SIMD subtract cost adds 62e66c6a6cc arm: ensure the arch_name is always set for the build target adds 6a37d0331c2 arm: Don't reconfigure globals in arm_configure_build_target adds c1cdabe3aab arm: reorder assembler architecture directives [PR101723] adds 783d809f0bb vect: Move costing helpers from aarch64 code adds c04bb6d93f3 doc: Document cond_* shift optabs in md.texi adds 72264a63972 <x86gprintrin.h>: Add pragma GCC target("general-regs-only") adds 7b1de3eb9ed libstdc++: Move attributes that follow requires-clauses [PR101782] adds 03d47da7e1e testsuite: Fix warning introduced by nodiscard in libstdc++ adds 8dec72aeb54 libstdc++: Add [[nodiscard]] to <compare> adds 0bac793ed6b openmp: Implement omp_get_device_num routine adds 02e5ffd5db0 libgcc: Honor LDFLAGS_FOR_TARGET when linking libgcc_s adds 4805b92a326 libcpp: Fix makeucnid bug with combining values [PR100977] adds 4739344d36e libcpp: Regenerate ucnid.h using Unicode 13.0.0 files [PR100977] adds c8b024fa4b7 libstdc++: Move [[nodiscard]] attributes again [PR101782] adds 582c24e9fe8 runtime: extend internal atomics to comply with sync/atomic adds 8ebf4fb54ac Daily bump. adds a3d3e8c362c Adjust by-value function vec arguments to by-reference. adds 9124bbe1857 gcov: Add __gcov_info_to_gdca() adds fd351c76c23 Fixup gfortran.dg/vect/vect-8.f90 for aarch64 adds 318113a9612 rs6000: Fix restored rs6000_long_double_type_size adds a6075926947 aarch64: Use memcpy to copy structures in vst4[q]_lane intrinsics adds 344f879c66d aarch64: Use memcpy to copy structures in vst3[q]_lane intrinsics adds 1deb0818f4b aarch64: Use memcpy to copy structures in vst2[q]_lane intrinsics adds bc181adf26e aarch64: Use memcpy to copy structures in bfloat vst* intrinsics adds 3c94db20be9 gcov: Remove <stdint.h> from libgcov-driver.c adds 6b0bde7eef4 middle-end/AArch64: Fix bootstrap after vec changes adds 9d8eacc2ae8 Use CFN_BUILT_IN_CLRSB instead of BUILT_IN_CLRSB in switch. new cd04e829c3a i386: Fix conditional move reg-to-reg move elimination peep [...] new c2a984a3570 libstdc++: Also move the [[nodiscard]] attributes in <compare> new f31da42e047 tree-optimization/101801 - remove vect_worthwhile_without_simd_p The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gcc/ChangeLog | 300 ++++ gcc/DATESTAMP | 2 +- gcc/analyzer/ChangeLog | 36 + gcc/c/c-decl.c | 3 +- gcc/c/c-parser.c | 63 +- gcc/c/c-tree.h | 2 +- gcc/cfgloop.c | 66 + gcc/cfgloop.h | 100 +- gcc/config/aarch64/aarch64-sve-builtins.cc | 4 +- gcc/config/aarch64/aarch64.c | 155 +- gcc/config/aarch64/arm_neon.h | 1530 ++++++++++++++++---- gcc/config/arm/arm-c.c | 1 + gcc/config/arm/arm-cpus.in | 1 + gcc/config/arm/arm.c | 190 +-- gcc/config/i386/i386.c | 6 +- gcc/config/i386/i386.md | 4 +- gcc/config/i386/ia32intrin.h | 14 +- gcc/config/i386/serializeintrin.h | 7 +- gcc/config/i386/sse.md | 54 + gcc/config/i386/x86gprintrin.h | 11 + gcc/config/rs6000/rs6000.c | 2 + gcc/cp/ChangeLog | 6 + gcc/cp/cp-objcp-common.h | 2 +- gcc/cp/decl.c | 2 +- gcc/doc/invoke.texi | 80 +- gcc/doc/md.texi | 11 + gcc/dominance.c | 4 +- gcc/dominance.h | 2 +- gcc/gcov-io.c | 36 +- gcc/gcov-io.h | 1 + gcc/go/gofrontend/MERGE | 2 +- gcc/go/gofrontend/escape.cc | 56 +- gcc/go/gofrontend/expressions.cc | 48 +- gcc/ipa-prop.h | 8 +- gcc/langhooks-def.h | 2 +- gcc/langhooks.c | 3 +- gcc/langhooks.h | 2 +- gcc/testsuite/ChangeLog | 202 +++ gcc/testsuite/g++.old-deja/g++.other/inline7.C | 2 +- gcc/testsuite/gcc.dg/gcov-info-to-gcda.c | 60 + gcc/testsuite/gcc.dg/sso-15.c | 36 + gcc/testsuite/gcc.dg/vect/bb-slp-pr101756.c | 2 + gcc/testsuite/gcc.target/aarch64/vaddX_high_cost.c | 38 + .../aarch64/vector_structure_intrinsics.c | 76 +- gcc/testsuite/gcc.target/aarch64/vsubX_high_cost.c | 38 + gcc/testsuite/gcc.target/arm/attr-neon.c | 9 +- gcc/testsuite/gcc.target/arm/attr-neon2.c | 35 +- gcc/testsuite/gcc.target/arm/attr-neon3.c | 48 +- .../gcc.target/arm/cortex-m55-nofp-flag-hard.c | 2 +- .../gcc.target/arm/cortex-m55-nofp-flag-softfp.c | 2 +- .../arm/cortex-m55-nofp-nomve-flag-softfp.c | 2 +- .../gcc.target/arm/mve/intrinsics/mve_fpu1.c | 5 +- .../gcc.target/arm/mve/intrinsics/mve_fpu2.c | 5 +- gcc/testsuite/gcc.target/arm/pr69245.c | 6 +- gcc/testsuite/gcc.target/arm/pr98636.c | 3 +- .../gcc.target/arm/pragma_fpu_attribute.c | 7 +- .../gcc.target/arm/pragma_fpu_attribute_2.c | 7 +- .../gcc.target/i386/cond_op_anylogic_d-1.c | 38 + .../gcc.target/i386/cond_op_anylogic_d-2.c | 78 + .../gcc.target/i386/cond_op_anylogic_q-1.c | 10 + .../gcc.target/i386/cond_op_anylogic_q-2.c | 5 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_b-1.c | 8 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_b-2.c | 6 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_d-1.c | 41 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_d-2.c | 67 + .../gcc.target/i386/cond_op_maxmin_double-1.c | 39 + .../gcc.target/i386/cond_op_maxmin_double-2.c | 67 + .../gcc.target/i386/cond_op_maxmin_float-1.c | 8 + .../gcc.target/i386/cond_op_maxmin_float-2.c | 5 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_q-1.c | 8 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_q-2.c | 5 + .../gcc.target/i386/cond_op_maxmin_ub-1.c | 8 + .../gcc.target/i386/cond_op_maxmin_ub-2.c | 6 + .../gcc.target/i386/cond_op_maxmin_ud-1.c | 8 + .../gcc.target/i386/cond_op_maxmin_ud-2.c | 5 + .../gcc.target/i386/cond_op_maxmin_uq-1.c | 8 + .../gcc.target/i386/cond_op_maxmin_uq-2.c | 5 + .../gcc.target/i386/cond_op_maxmin_uw-1.c | 8 + .../gcc.target/i386/cond_op_maxmin_uw-2.c | 6 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_w-1.c | 8 + gcc/testsuite/gcc.target/i386/cond_op_maxmin_w-2.c | 6 + gcc/testsuite/gcc.target/i386/pr101797.c | 15 + gcc/testsuite/gcc.target/i386/pr99744-3.c | 13 + gcc/testsuite/gcc.target/i386/pr99744-4.c | 357 +++++ gcc/testsuite/gcc.target/i386/pr99744-5.c | 25 + gcc/testsuite/gcc.target/i386/pr99744-6.c | 23 + gcc/testsuite/gcc.target/i386/pr99744-7.c | 12 + gcc/testsuite/gcc.target/i386/pr99744-8.c | 13 + gcc/testsuite/gcc.target/powerpc/pragma-optimize.c | 13 + gcc/testsuite/gfortran.dg/vect/vect-8.f90 | 3 +- gcc/tree-data-ref.c | 10 +- gcc/tree-data-ref.h | 4 +- gcc/tree-predcom.c | 13 +- gcc/tree-sra.c | 5 +- gcc/tree-ssa-phiopt.c | 6 +- gcc/tree-ssa-pre.c | 2 +- gcc/tree-ssa-threadbackward.c | 6 +- gcc/tree-vect-data-refs.c | 15 +- gcc/tree-vect-loop.c | 43 +- gcc/tree-vect-slp-patterns.c | 2 +- gcc/tree-vect-stmts.c | 28 +- gcc/tree-vectorizer.h | 110 +- gcc/vec.c | 47 +- gcc/vec.h | 66 +- libcpp/ChangeLog | 11 + libcpp/makeucnid.c | 2 +- libcpp/ucnid.h | 671 ++++----- libgcc/ChangeLog | 11 + libgcc/Makefile.in | 2 +- libgcc/config/t-slibgcc | 2 +- libgcc/config/t-slibgcc-darwin | 2 +- libgcc/config/t-slibgcc-fuchsia | 3 +- libgcc/config/t-slibgcc-vms | 2 +- libgcc/gcov.h | 19 + libgcc/libgcov-driver.c | 187 ++- libgcc/libgcov.h | 5 - libgo/go/runtime/internal/atomic/atomic.c | 80 + libgo/go/runtime/internal/atomic/stubs.go | 25 + libgomp/ChangeLog | 31 + libgomp/config/gcn/icv-device.c | 11 + libgomp/config/nvptx/icv-device.c | 11 + libgomp/fortran.c | 7 + libgomp/icv-device.c | 9 + libgomp/libgomp-plugin.h | 6 + libgomp/libgomp.map | 8 +- libgomp/libgomp.texi | 29 + libgomp/omp.h.in | 1 + libgomp/omp_lib.f90.in | 6 + libgomp/omp_lib.h.in | 3 + libgomp/plugin/plugin-gcn.c | 38 +- libgomp/plugin/plugin-nvptx.c | 25 +- libgomp/target.c | 36 +- libgomp/testsuite/lib/libgomp.exp | 5 + libgomp/testsuite/libgomp.c-c++-common/target-45.c | 30 + libgomp/testsuite/libgomp.fortran/target10.f90 | 20 + libstdc++-v3/ChangeLog | 174 +++ libstdc++-v3/include/bits/ranges_base.h | 24 +- libstdc++-v3/include/bits/stl_iterator.h | 20 +- libstdc++-v3/include/bits/stl_queue.h | 3 - libstdc++-v3/include/std/ranges | 42 +- libstdc++-v3/libsupc++/compare | 60 +- .../18_support/comparisons/categories/zero_neg.cc | 2 +- libstdc++-v3/testsuite/std/ranges/access/101782.cc | 9 + 143 files changed, 4971 insertions(+), 1346 deletions(-) create mode 100644 gcc/testsuite/gcc.dg/gcov-info-to-gcda.c create mode 100644 gcc/testsuite/gcc.dg/sso-15.c create mode 100644 gcc/testsuite/gcc.target/aarch64/vaddX_high_cost.c create mode 100644 gcc/testsuite/gcc.target/aarch64/vsubX_high_cost.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_anylogic_d-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_anylogic_d-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_anylogic_q-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_anylogic_q-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_b-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_b-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_d-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_d-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_double-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_float-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_q-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_q-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_ub-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_ub-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_ud-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_ud-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_uq-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_uq-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_uw-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_uw-2.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_w-1.c create mode 100644 gcc/testsuite/gcc.target/i386/cond_op_maxmin_w-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr101797.c create mode 100644 gcc/testsuite/gcc.target/i386/pr99744-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr99744-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr99744-5.c create mode 100644 gcc/testsuite/gcc.target/i386/pr99744-6.c create mode 100644 gcc/testsuite/gcc.target/i386/pr99744-7.c create mode 100644 gcc/testsuite/gcc.target/i386/pr99744-8.c create mode 100644 gcc/testsuite/gcc.target/powerpc/pragma-optimize.c create mode 100644 libgomp/testsuite/libgomp.c-c++-common/target-45.c create mode 100644 libgomp/testsuite/libgomp.fortran/target10.f90 create mode 100644 libstdc++-v3/testsuite/std/ranges/access/101782.cc -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 9 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (8085fa01a5 -> 7fc8d4f48b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/binutils-gdb. from 8085fa01a5 gdb: Use unwinder name in frame_info::to_string adds 12488b1767 Automatic date update in version.in adds 99ba4b64d3 gdb/testsuite: update test gdb.base/step-over-syscall.exp adds 5570ab7f44 Re: elf: Treat undefined version as hidden adds 4939c49d21 PR28165, buffer overflow in elf32-rx.c:rx_info_to_howto_rela adds 6ecfe4abfd PR28166, _bfd_elf_mips_get_relocated_section_contents adds ddbe6976d5 PR28167, vms-alpha build_module_list adds 0cc7872125 [PATCH 1/2] Enable Intel AVX512_FP16 instructions adds 17a089ffda [PATCH 2/2] Add tests for Intel AVX512_FP16 instructions adds 183657edcd Replace the symbol needs evaluator with a parser adds fb4cdecb7e Cleanup of the dwarf_expr_context constructor adds 62e37eac1c Move frame context info to dwarf_expr_context adds 6c7779b34b Remove get_frame_cfa from dwarf_expr_context adds a580d9604b Move compilation unit info to dwarf_expr_context adds b6d156edd8 Move dwarf_call to dwarf_expr_context adds 73e6b86330 Move get_object_address to dwarf_expr_context adds 3c7c57cdc0 Move read_mem to dwarf_expr_context adds 0a2b69d04b Move push_dwarf_reg_entry_value to expr.c adds 9e739f693f Inline get_reg_value method of dwarf_expr_context adds 14a62404c9 Remove empty frame and full evaluators adds f9e4ed8baa Merge evaluate_for_locexpr_baton evaluator adds f4091d2644 Move piece_closure and its support to expr.c adds efa86d3c26 Make value_copy also copy the stack data member adds ba5bc3e5a9 Make DWARF evaluator return a single struct value adds 0579205aec Simplify dwarf_expr_context class interface adds 70454ee70a Add as_lval argument to expression evaluator adds 17e971f729 gdb: use ptid_t::to_string in print_target_wait_results adds b765e92113 gdb: target_waitstatus_to_string: print extra info for FORKE [...] adds 52e0e32b34 gdb/testsuite: gdb.base/attach.exp: fix support check in tes [...] adds 4b0cf3d6d0 gdb/testsuite: gdb.base/attach.exp: expose bug when testing [...] adds bad23de354 [gdb] Handle .TOC. sections during gdb-compile for rs6000 target. adds c2bc854c8b [PATCH] GDB Testsuite, update compile-cplus.exp adds 8179e388b6 Automatic date update in version.in adds 352bd3aa1c PR28172, bfin_pcrel24_reloc heap-buffer-overflow adds a379e7588c PR28173, nds32_elf_howto_table index out of bounds adds e039f7ed86 PR28175, Segment fault in coff-tic30.c reloc_processing adds 856c1545ce bfd_reloc_offset_in_range overflow adds 7eb7e4cdcc chew ubsan warning adds 7fc8d4f48b Re: Add tests for Intel AVX512_FP16 instructions No new revisions were added by this update. Summary of changes: bfd/coff-tic30.c | 13 +- bfd/coff-z80.c | 13 +- bfd/coff-z8k.c | 13 +- bfd/doc/chew.c | 4 +- bfd/elf32-bfin.c | 16 +- bfd/elf32-nds32.c | 55 +- bfd/elf32-rx.c | 13 +- bfd/elf64-mips.c | 11 +- bfd/reloc.c | 2 +- bfd/version.h | 2 +- bfd/vms-alpha.c | 11 +- gas/NEWS | 2 + gas/config/tc-i386.c | 45 +- gas/doc/c-i386.texi | 4 +- gas/testsuite/gas/i386/avx512_fp16-intel.d | 1479 + gas/testsuite/gas/i386/avx512_fp16-inval-bcast.l | 27 + gas/testsuite/gas/i386/avx512_fp16-inval-bcast.s | 33 + gas/testsuite/gas/i386/avx512_fp16.d | 1479 + gas/testsuite/gas/i386/avx512_fp16.s | 1475 + gas/testsuite/gas/i386/avx512_fp16_pseudo_ops.d | 2035 + gas/testsuite/gas/i386/avx512_fp16_pseudo_ops.s | 2030 + gas/testsuite/gas/i386/avx512_fp16_vl-intel.d | 1437 + gas/testsuite/gas/i386/avx512_fp16_vl.d | 1437 + gas/testsuite/gas/i386/avx512_fp16_vl.s | 1433 + gas/testsuite/gas/i386/i386.exp | 14 + gas/testsuite/gas/i386/x86-64-avx512_fp16-bad.d | 17 + gas/testsuite/gas/i386/x86-64-avx512_fp16-bad.s | 36 + gas/testsuite/gas/i386/x86-64-avx512_fp16-intel.d | 1539 + .../gas/i386/x86-64-avx512_fp16-inval-bcast.l | 27 + .../gas/i386/x86-64-avx512_fp16-inval-bcast.s | 33 + .../gas/i386/x86-64-avx512_fp16-inval-register.l | 11 + .../gas/i386/x86-64-avx512_fp16-inval-register.s | 15 + gas/testsuite/gas/i386/x86-64-avx512_fp16.d | 1539 + gas/testsuite/gas/i386/x86-64-avx512_fp16.s | 1535 + .../gas/i386/x86-64-avx512_fp16_pseudo_ops.d | 2035 + .../gas/i386/x86-64-avx512_fp16_pseudo_ops.s | 2031 + .../gas/i386/x86-64-avx512_fp16_vl-intel.d | 1437 + gas/testsuite/gas/i386/x86-64-avx512_fp16_vl.d | 1437 + gas/testsuite/gas/i386/x86-64-avx512_fp16_vl.s | 1433 + gas/testsuite/gas/i386/x86-64-default-suffix-avx.d | 3 + gas/testsuite/gas/i386/x86-64-default-suffix.d | 3 + gas/testsuite/gas/i386/x86-64-default-suffix.s | 3 + gas/testsuite/gas/i386/xmmword.l | 10 + gas/testsuite/gas/i386/xmmword.s | 11 + gdb/compile/compile-object-load.c | 41 + gdb/dwarf2/expr.c | 1198 +- gdb/dwarf2/expr.h | 149 +- gdb/dwarf2/frame.c | 117 +- gdb/dwarf2/loc.c | 1694 +- gdb/dwarf2/loc.h | 35 +- gdb/infrun.c | 12 +- gdb/target/waitstatus.c | 25 +- gdb/testsuite/gdb.base/attach.exp | 46 +- gdb/testsuite/gdb.base/step-over-clone.c | 39 + gdb/testsuite/gdb.base/step-over-syscall.exp | 69 +- gdb/testsuite/gdb.compile/compile-cplus.exp | 9 +- .../symbol_needs_eval.c} | 37 +- .../gdb.dwarf2/symbol_needs_eval_fail.exp | 112 + .../gdb.dwarf2/symbol_needs_eval_timeout.exp | 131 + .../gdb.python/amd64-py-framefilter-invalidarg.S | 1 - gdb/testsuite/lib/dwarf.exp | 4 + gdb/value.c | 2 + ld/testsuite/ld-cris/libdso-15b.d | 6 +- ld/testsuite/ld-cris/libdso-1c.d | 4 +- opcodes/i386-dis-evex-prefix.h | 221 + opcodes/i386-dis-evex-w.h | 63 +- opcodes/i386-dis-evex.h | 608 +- opcodes/i386-dis.c | 252 +- opcodes/i386-gen.c | 10 +- opcodes/i386-init.h | 520 +- opcodes/i386-opc.h | 11 + opcodes/i386-opc.tbl | 366 + opcodes/i386-tbl.h | 39415 +++++++++++-------- 73 files changed, 53552 insertions(+), 17883 deletions(-) create mode 100644 gas/testsuite/gas/i386/avx512_fp16-intel.d create mode 100644 gas/testsuite/gas/i386/avx512_fp16-inval-bcast.l create mode 100644 gas/testsuite/gas/i386/avx512_fp16-inval-bcast.s create mode 100644 gas/testsuite/gas/i386/avx512_fp16.d create mode 100644 gas/testsuite/gas/i386/avx512_fp16.s create mode 100644 gas/testsuite/gas/i386/avx512_fp16_pseudo_ops.d create mode 100644 gas/testsuite/gas/i386/avx512_fp16_pseudo_ops.s create mode 100755 gas/testsuite/gas/i386/avx512_fp16_vl-intel.d create mode 100755 gas/testsuite/gas/i386/avx512_fp16_vl.d create mode 100644 gas/testsuite/gas/i386/avx512_fp16_vl.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-bad.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-bad.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-intel.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-inval-bcast.l create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-inval-bcast.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-inval-register.l create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16-inval-register.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16.s create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16_pseudo_ops.d create mode 100755 gas/testsuite/gas/i386/x86-64-avx512_fp16_pseudo_ops.s create mode 100755 gas/testsuite/gas/i386/x86-64-avx512_fp16_vl-intel.d create mode 100755 gas/testsuite/gas/i386/x86-64-avx512_fp16_vl.d create mode 100644 gas/testsuite/gas/i386/x86-64-avx512_fp16_vl.s copy gdb/testsuite/{gdb.base/step-over-clone.c => gdb.dwarf2/symbol_needs_eval.c} (54%) create mode 100644 gdb/testsuite/gdb.dwarf2/symbol_needs_eval_fail.exp create mode 100644 gdb/testsuite/gdb.dwarf2/symbol_needs_eval_timeout.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits August 2021