Tcwg-commits June 2022

tcwg-commits@lists.linaro.org

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14714 discussions

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 updated (39ec5d21 -> 789ae880)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/base-artifacts. discards 39ec5d21 0: update: binutils-gcc-linux-glibc-gdb-qemu: 7 new 789ae880 0: update: binutils-gcc-linux-glibc-gdb-qemu: 7 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (39ec5d21) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_build/master-a [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1576 -> 1564 bytes 02-prepare_abe/console.log.xz | Bin 2732 -> 2732 bytes 04-build_abe-binutils/console.log.xz | Bin 30620 -> 30568 bytes 05-build_abe-stage1/console.log.xz | Bin 72732 -> 73640 bytes 06-clean_sysroot/console.log.xz | Bin 328 -> 328 bytes 07-build_abe-linux/console.log.xz | Bin 9172 -> 9048 bytes 08-build_abe-glibc/console.log.xz | Bin 238804 -> 238832 bytes 09-build_abe-stage2/console.log.xz | Bin 202784 -> 204072 bytes 10-build_abe-gdb/console.log.xz | Bin 37884 -> 37888 bytes 11-build_abe-qemu/console.log.xz | Bin 32684 -> 32524 bytes 12-check_regression/console.log.xz | Bin 416 -> 416 bytes 13-update_baseline/console.log | 16 ++++++++-------- jenkins/manifest.sh | 18 +++++++++--------- 13 files changed, 17 insertions(+), 17 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (5a66d7dd2bf -> 2c7cfc7b418)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/gcc. from 5a66d7dd2bf Daily bump. adds 479b6f449ee xtensa: Defer storing integer constants into litpool until reload adds 9991d84d2a8 PR tree-optimization/105835: Two narrowing patterns for match.pd. adds ef662120177 varasm: Fix up ICE in narrowing_initializer_constant_valid_ [...] adds 2c7cfc7b418 ubsan: Add -fsanitize-trap= support No new revisions were added by this update. Summary of changes: gcc/c-family/c-ubsan.cc | 116 +++++++++++++-------- gcc/common.opt | 15 ++- gcc/config/xtensa/constraints.md | 6 +- gcc/config/xtensa/predicates.md | 5 +- gcc/config/xtensa/xtensa.cc | 3 +- gcc/cp/cp-ubsan.cc | 2 +- gcc/doc/invoke.texi | 35 ++++++- gcc/gcc.cc | 5 +- gcc/match.pd | 15 +++ gcc/opts.cc | 119 +++++++++++++++------- gcc/opts.h | 1 + gcc/sanopt.cc | 4 +- gcc/testsuite/c-c++-common/pr105998.c | 12 +++ gcc/testsuite/c-c++-common/ubsan/align-8.c | 2 +- gcc/testsuite/c-c++-common/ubsan/div-by-zero-4.c | 2 +- gcc/testsuite/c-c++-common/ubsan/nonnull-4.c | 2 +- gcc/testsuite/c-c++-common/ubsan/overflow-add-4.c | 2 +- gcc/testsuite/c-c++-common/ubsan/pr56956.c | 2 +- gcc/testsuite/c-c++-common/ubsan/pr68142.c | 2 +- gcc/testsuite/c-c++-common/ubsan/pr80932.c | 2 +- gcc/testsuite/gcc.dg/pr105835.c | 18 ++++ gcc/ubsan.cc | 24 +++-- gcc/varasm.cc | 10 +- 23 files changed, 288 insertions(+), 116 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/pr105998.c create mode 100644 gcc/testsuite/gcc.dg/pr105835.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (3f52a09075 -> fba1ac87dc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/binutils-gdb. from 3f52a09075 gdb/python: Export nibbles to python layer adds fba1ac87dc Fix the sorting algorithm for reloc entries No new revisions were added by this update. Summary of changes: bfd/elflink.c | 12 ++++++++++-- ld/testsuite/ld-elf/pr29259.d | 13 +++++++++++++ ld/testsuite/ld-elf/pr29259.s | 14 ++++++++++++++ ld/testsuite/ld-elf/pr29259.t | 4 ++++ 4 files changed, 41 insertions(+), 2 deletions(-) create mode 100644 ld/testsuite/ld-elf/pr29259.d create mode 100644 ld/testsuite/ld-elf/pr29259.s create mode 100644 ld/testsuite/ld-elf/pr29259.t -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (67c3b3b0 -> d012f02a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/base-artifacts. discards 67c3b3b0 0: update: binutils-gcc: 1 new d012f02a 0: update: binutils-gcc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (67c3b3b0) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check/master-aarch64 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1552 -> 1520 bytes 02-prepare_abe/console.log.xz | Bin 2724 -> 2720 bytes 03-build_abe-binutils/console.log.xz | Bin 38952 -> 38000 bytes 04-build_abe-gcc/console.log.xz | Bin 213000 -> 212940 bytes 05-build_abe-dejagnu/console.log.xz | Bin 3824 -> 3856 bytes 06-build_abe-check_gcc/console.log.xz | Bin 2392 -> 4004 bytes 07-check_regression/console.log.xz | Bin 2380 -> 3020 bytes 07-check_regression/extra-bisect-params | 1 + 07-check_regression/fails.sum | 7 + 07-check_regression/results.compare | 26 +- 07-check_regression/results.compare2 | 54 +- 07-check_regression/results.regressions | 27 + 08-update_baseline/console.log | 312 +- 08-update_baseline/extra-bisect-params | 1 + 08-update_baseline/fails.sum | 7 + 08-update_baseline/results.compare | 26 +- 08-update_baseline/results.compare2 | 54 +- 08-update_baseline/results.regressions | 27 + jenkins/manifest.sh | 12 +- sumfiles/g++.log.xz | Bin 3526308 -> 3552704 bytes sumfiles/g++.sum | 130 +- sumfiles/gcc.log.xz | Bin 3039340 -> 3041036 bytes sumfiles/gcc.sum | 4957 ++++++++++++++++--------------- sumfiles/gfortran.log.xz | Bin 1031792 -> 1033396 bytes sumfiles/gfortran.sum | 42 +- sumfiles/libatomic.log.xz | Bin 2188 -> 2180 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 204208 -> 204544 bytes sumfiles/libgomp.sum | 16 +- sumfiles/libitm.log.xz | Bin 2548 -> 2540 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 442584 -> 443964 bytes sumfiles/libstdc++.sum | 12 +- 33 files changed, 2980 insertions(+), 2741 deletions(-) create mode 100644 07-check_regression/extra-bisect-params create mode 100644 07-check_regression/fails.sum create mode 100644 07-check_regression/results.regressions create mode 100644 08-update_baseline/extra-bisect-params create mode 100644 08-update_baseline/fails.sum create mode 100644 08-update_baseline/results.regressions -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto updated (0f96ac43fa0 -> 2c7cfc7b418)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto in repository toolchain/ci/gcc. from 0f96ac43fa0 libstdc++: Add missing #include <string> to new test adds 040f8224617 arm: fix checking ICE in arm_print_operand [PR106004] adds d6b423882a0 RISC-V: Supress warning for comparison of integer expressio [...] adds 06a1b0418fb rs6000: Fix some error messages for invalid conversions adds 1d6044c250e i386: Fix VPMOV splitter [PR105993] adds 1f8278bfcfc i386: Fix assert in ix86_function_arg [PR105970] adds cc378e65574 alpha: Introduce target specific store_data_bypass_p functi [...] adds a284fadcce8 c++: Use fold_non_dependent_expr rather than maybe_constant [...] adds 7f195a22709 libgo: permit loff_t and off_t to be macros adds 5a66d7dd2bf Daily bump. adds 479b6f449ee xtensa: Defer storing integer constants into litpool until reload adds 9991d84d2a8 PR tree-optimization/105835: Two narrowing patterns for match.pd. adds ef662120177 varasm: Fix up ICE in narrowing_initializer_constant_valid_ [...] adds 2c7cfc7b418 ubsan: Add -fsanitize-trap= support No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 42 ++++++++ gcc/DATESTAMP | 2 +- gcc/c-family/c-ubsan.cc | 116 ++++++++++++-------- gcc/common.opt | 15 ++- gcc/config/alpha/alpha-protos.h | 2 + gcc/config/alpha/alpha.cc | 69 ++++++++++++ gcc/config/alpha/ev4.md | 15 +-- gcc/config/arm/arm.cc | 3 +- gcc/config/i386/i386.cc | 2 +- gcc/config/i386/sse.md | 30 +++--- gcc/config/riscv/bitmanip.md | 2 +- gcc/config/rs6000/rs6000.cc | 8 +- gcc/config/xtensa/constraints.md | 6 +- gcc/config/xtensa/predicates.md | 5 +- gcc/config/xtensa/xtensa.cc | 3 +- gcc/cp/ChangeLog | 6 ++ gcc/cp/cp-ubsan.cc | 2 +- gcc/cp/typeck.cc | 2 +- gcc/doc/invoke.texi | 35 +++++- gcc/gcc.cc | 5 +- gcc/go/gofrontend/MERGE | 2 +- gcc/match.pd | 15 +++ gcc/opts.cc | 119 ++++++++++++++------- gcc/opts.h | 1 + gcc/sanopt.cc | 4 +- gcc/testsuite/ChangeLog | 25 +++++ gcc/testsuite/c-c++-common/pr105998.c | 12 +++ gcc/testsuite/c-c++-common/ubsan/align-8.c | 2 +- gcc/testsuite/c-c++-common/ubsan/div-by-zero-4.c | 2 +- gcc/testsuite/c-c++-common/ubsan/nonnull-4.c | 2 +- gcc/testsuite/c-c++-common/ubsan/overflow-add-4.c | 2 +- gcc/testsuite/c-c++-common/ubsan/pr56956.c | 2 +- gcc/testsuite/c-c++-common/ubsan/pr68142.c | 2 +- gcc/testsuite/c-c++-common/ubsan/pr80932.c | 2 +- gcc/testsuite/g++.dg/ext/builtin-shufflevector-4.C | 18 ++++ gcc/testsuite/gcc.dg/pr105835.c | 18 ++++ gcc/testsuite/gcc.target/alpha/pr105209.c | 26 +++++ gcc/testsuite/gcc.target/i386/pr105970.c | 6 ++ gcc/testsuite/gcc.target/i386/pr105993.c | 18 ++++ gcc/ubsan.cc | 24 +++-- gcc/varasm.cc | 10 +- libgo/config.h.in | 3 + libgo/configure | 9 +- libgo/configure.ac | 8 +- libgo/go/syscall/libcall_linux.go | 16 +-- libgo/mksysinfo.sh | 6 +- libgo/sysinfo.c | 15 ++- libgomp/ChangeLog | 5 + libstdc++-v3/ChangeLog | 5 + 49 files changed, 580 insertions(+), 169 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/pr105998.c create mode 100644 gcc/testsuite/g++.dg/ext/builtin-shufflevector-4.C create mode 100644 gcc/testsuite/gcc.dg/pr105835.c create mode 100644 gcc/testsuite/gcc.target/alpha/pr105209.c create mode 100644 gcc/testsuite/gcc.target/i386/pr105970.c create mode 100644 gcc/testsuite/gcc.target/i386/pr105993.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto updated (1579743980 -> fba1ac87dc)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto in repository toolchain/ci/binutils-gdb. from 1579743980 PR29256, memory leak in obj_elf_section_name adds 02e85f7a83 gdb: NEWS: Move LoongArch gdbserver to the correct section adds 40d4cb8bcc Automatic date update in version.in adds 21a527dfc8 gdb: Add new 'print nibbles' feature adds 153b3c1117 gdb/doc: Documentation for the new print command adds 3f52a09075 gdb/python: Export nibbles to python layer adds fba1ac87dc Fix the sorting algorithm for reloc entries No new revisions were added by this update. Summary of changes: bfd/elflink.c | 12 ++++- bfd/version.h | 2 +- gdb/NEWS | 16 ++++-- gdb/c-lang.c | 4 ++ gdb/doc/gdb.texinfo | 35 +++++++++++-- gdb/doc/python.texi | 5 ++ gdb/language.h | 7 +++ gdb/printcmd.c | 2 +- gdb/python/py-value.c | 7 ++- gdb/rust-lang.h | 5 ++ gdb/testsuite/gdb.base/options.exp | 1 + gdb/testsuite/gdb.base/printcmds.exp | 43 ++++++++++++++++ gdb/testsuite/gdb.python/py-format-string.exp | 73 +++++++++++++++++++++++++++ gdb/valprint.c | 48 +++++++++++++++++- gdb/valprint.h | 6 ++- ld/testsuite/ld-elf/pr29259.d | 13 +++++ ld/testsuite/ld-elf/pr29259.s | 14 +++++ ld/testsuite/ld-elf/pr29259.t | 4 ++ 18 files changed, 283 insertions(+), 14 deletions(-) create mode 100644 ld/testsuite/ld-elf/pr29259.d create mode 100644 ld/testsuite/ld-elf/pr29259.s create mode 100644 ld/testsuite/ld-elf/pr29259.t -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto updated (5451fd4a -> c469e7e6)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto in repository toolchain/ci/base-artifacts. discards 5451fd4a 0: update: binutils-gcc: 2 new c469e7e6 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5451fd4a) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-arm [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1500 -> 1496 bytes 02-prepare_abe/console.log.xz | Bin 2720 -> 2704 bytes 04-build_abe-binutils/console.log.xz | Bin 51720 -> 51060 bytes 05-build_abe-bootstrap_lto/console.log.xz | Bin 471128 -> 471644 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 36 ------------------------------ jenkins/manifest.sh | 12 +++++----- 7 files changed, 6 insertions(+), 42 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_sq/llvm-master-aarch64-cpu2017-Os updated (1af4561ee5ed -> d417710c3af2)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_sq/llvm-master-aarch64-cpu2017-Os in repository toolchain/ci/llvm-project. from 1af4561ee5ed [lldb] Skip ScriptInterpreter/Python/exit.test on Windows adds 20d5a8613423 [CMake] Fix `FindGRPC.cmake` for setting up gRPC related l [...] adds 0eec7e2a89ab Reland "[lld-macho] Group undefined symbol diagnostics by [...] adds 0083a02839c3 [gn build] Slighly nicer `gn args --list` output for is_de [...] adds 52554f731514 [gn build] Allow use_ubsan=true on mac and unbreak use_asa [...] adds 99796d06dbe1 Revert "[ASan] Use debuginfo for symbolization." adds cfbde7149d86 [flang][runtime] Catch more (all?) negative unit number errors adds f3bc0fccd68a [mlir][spirv] Define spv.ISubBorrowOp adds 169417531578 [Clang][Modules] Merge availability attributes on imported decls adds 80aa41d9df3d Pass through even more LIBCXX_* variables to libfuzzer's c [...] adds 264c09b732ab [TableGen][DirectX] Add tableGen backend to generate map f [...] adds 401a425d205a [BOLT][NFCI] Remove redundant code adds bccf27d934b3 [mlir][python] Actually set UseLocalScope printing flag adds e30c493894c4 [lldb] Support non-pointer implicit this/self in GetValueF [...] adds e9349ef9e6d8 Fix `script -lpython` to handle control flow in one-line c [...] adds 70f2befaf7ad [LoongArch] Use register R0 (ZERO) for constant 0 adds 33d14e3cd3b3 [libc][aarch64] Set frame pointer of the new thread to the [...] adds 3aa6ec619fb3 [ValueTypes] Add types for nxv16bf16 and nxv32bf16. adds f8fae5b66068 [libc][Obvious] Include arm_acle.h only for aarch64 builds. adds f3e7e4d786fa [JITLink][AArch64][NFC] Suppress unused variable error. adds d9ef307e9bb3 [ARM] Add a pipeline test showing missing postinc generation. NFC adds 9dff14be9ed6 [AMDGPU] Add support for GFX11 hazards adds c5990d353e14 Revert "[ARM] Add a pipeline test showing missing postinc [...] adds 24b98520e2e8 Update FileCheck docs after D95849. NFCI adds 147f74b6ee90 [libc++] Test the size of basic_string adds 8e16c4db571a Reland "[RISCV] Testcase to show wrong register allocation [...] adds e9f7263b381e Reland "[SplitKit] Handle early clobber + tied to def correctly" adds 4a6929f81144 Revert "[libc] Apply no-builtin everywhere, remove unneces [...] adds 77851cc1cfb9 [AMDGPU] Change use null for dead sdst to be gfx1030+ adds 6f6fa5aa10d3 [AArch64][SME] Add SME cntsb/h/w/d intrinsics adds 5cfbfa035fc1 [sanitizer_common] Fix SanitizerCommon.ChainedOriginDepotS [...] adds e984e1cd6137 [clangd] Don't add inlay hints on std::move/forward adds 7e1a6c4cad54 [InstCombine] Add more tests for freeze of loop phi (NFC) adds b26afab9d13d [AMDGPU][MC][GFX11] Correct src0 for dpp variants of v_cvt_*_e64 adds 951b9dc42bb3 [AMDGPU] Remove duplicate RUN lines from a test adds e35096ae961e cmake: configure clang lit to use hmaptool from source directly adds a4c805600ef2 [libc++] Robust against C++20-hostile iterators adds 7236d49fd5f9 [SLP]Extend vectorization for scatter vectorize nodes. adds 949c13649cc7 [LV] Remove widenPHIInstruction dependence on underlying i [...] adds bf02ed240dfa Prevent crash when TurnSwitchRangeIntoICmp receives defaul [...] adds cd53e6b48b67 [CostModel][AArch64][NFC] Add cost model tests for fshl/fs [...] adds 2320a4ae907f [mlir][spirv] Workaround driver bug in math.ctlz conversion again adds 4a3e46115a7f [RISCV] Extend demanded field transform in InsertVSETVLI t [...] adds cdf17953ff27 Add braces to silence a gcc 9.4 -Wdangling-else warning [nfc] adds 1f331224fb17 [strictfp][IPSCCP] Precommit tests for D115737. adds b62e3a73e170 Replace to_hexString by touhexstr [NFC] adds b34e3f40e715 [RISCV] Use TAIL_UNDISTURBED_MASK_UNDISTURBED for riscv_sl [...] adds f4f6adc451a2 [clang] Don't emit IFUNC when targeting Fuchsia adds 37fa5850f1c0 [RISCV] Move getSEWLMULRatio out of VSETVLIInfo [nfc] adds 3d259a82da3e [PowerPC] Fix LQ-STQ instructions to use correct offset and base adds 27c61d033fbf [RISCV] Split DemandedField logic in advance of reuse in d [...] adds c5312fe3bec2 Revert "[libc++] Test the size of basic_string" adds 55311801f06d Allow bitwidth difference when checking for isOneOrOneSplat. adds 912a5172f8d8 [RISCV] Use TAIL_AGNOSTIC in riscv_fma_vl patterns. adds 7f24e574d434 [MLInliner] Don't inline call sites in unreachable basic blocks adds 40a55fff0517 [libc][NFC] Make explicit uint16_t casts in fenv adds 6ed81ec16417 [RISCV] Reorder function definitions to reduce upcoming di [...] adds 046ebeb60504 [mlir][linalg] Relax convolution vectorization to support [...] adds a70b39abffb4 [clang] Don't emit type test/assume for virtual classes th [...] adds f011d32c3a62 [mlir][vector] Fix contraction op lowering with mixed types adds 652ecb251ec9 [libc] add printf hex conversion adds 5bcda1d3a937 [libc] fix line buffered empty file writes adds 17853928a69b [flang] Correct implementation of WAIT with no ID adds 6716195cd71b [RISCV] Merge TIED_TU and TIED instructions for VWADD_W/VW [...] adds b67984d35627 [flang] Handle module subprogram with interface in same (s [...] adds 47bfc365fc84 [docs][OpaquePtr] Add detail to motivations behind opaque [...] adds 527b8ccde590 [AArch64] Regenerate 3 codegen test files. NFC adds 445a483b41a8 [AMDGPU] Add new GFX11 intrinsic llvm.amdgcn.exp.row adds c155a944fbf4 [AMDGPU] GFX11 CodeGen support for MIMG instructions adds 36ec1fcaac8e [AMDGPU] Add GFX11 llvm.amdgcn.ds.add.gs.reg.rtn / llvm.am [...] adds b91a9f48523d [RISCV] Fix a typo in an intrinsic name adds 3433f78c407b [libc++][doc] Update formatting status. adds 76782a65ee86 [SLP]Use original vector if need to shuffle truncated root. adds 2665fbe71e1d [flang] NINT(-.4999) is 0, not overflow adds 838a57e1a563 Fix a bug introduced by the move of AddressRanges.h into ADT. adds 1e6c819d6dbe [libc][obvious] fix address test on windows adds 77b00098f290 [PS5] Use same debug trap instruction as PS4 adds 89a11ebd8e10 [RISCV] Avoid reducing etype just to initialize lane 0 of [...] adds 814c9f4e0c4d [NFC] Precommited tests from D73000 adds ff0122dccea8 [PS5] Emit ud2 for ubsan trap adds 1a3f996972b1 [trace][intelpt] Support system-wide tracing [13] - Add co [...] adds a19fcc2bec81 [trace][intelpt] Support system-wide tracing [14] - Decode [...] adds ef9970759b5b [trace][intelpt] Support system-wide tracing [15] - Make t [...] adds ff15efc1a701 [trace][intelpt] Support system-wide tracing [16] - Create [...] adds 03cc58ff2a7a [trace][intelpt] Support system-wide tracing [17] - Some i [...] adds 593fa3ab30b7 [PS5] Set address sanitizer shadow offset adds 39fb84343ec5 [PS4/PS5][profiling] Go back to the old way of doing a run [...] adds ed72f40d0be7 Revert "[NFC] Precommited tests from D73000" adds cb111ef090c5 Reland "[NFC] Precommited tests from D73000" adds e0e2a1175195 [flang][runtime] Make ASSOCIATED() conform with standard adds d0e60b6d7ec9 Revert "[PS4/PS5][profiling] Go back to the old way of doi [...] adds 561a61fb261b [trace][intelpt] Support system-wide tracing [18] - some m [...] adds 67c240514501 [trace][intelpt] Support system-wide tracing [19] - Some o [...] adds 6a5355e8a159 [trace][intelpt] Support system-wide tracing [20] - Rename [...] adds 9f45f23d8602 [trace][intelpt] Support system-wide tracing [21] - Suppor [...] adds ea37cd52d147 [trace][intelpt] Support system-wide tracing [22] - Some f [...] adds 7e681ef35e09 [AMDGPU] Add GFX11 codegen for llvm.amdgcn.mov.dpp8 adds 2d43de13df03 [AMDGPU] gfx11 new dot instruction codegen support adds 8228c7035899 [BOLT][NFCI] Refactor interface for adding basic blocks adds dae2fafe056c Fix TraceGDBRemotePacketsTest adds 3f6030255d7a Reland "[PS4/PS5][profiling] Go back to the old way of doi [...] adds f22db1fabfa1 Fix StopInfoBreakpoint::ShouldNotify when a callback delet [...] adds eea1531ba4fd [libc++] Remove now-unused experimental/filesystem config file adds a9dccb0072af [TargetTransformInfo] Added an opt/llc option for cache line size adds 4c77d0276b83 [Delinearization] Refactoring of fixed-size array delinearization adds 6ff49af33d09 [lldb] Introduce the concept of a log handler (NFC) adds decb600b0213 [gn build] Port 6ff49af33d09 adds caa2a829cdf9 [MergeFunctions] Preserve symbols used llvm.used/llvm.comp [...] adds 46fcdf23640e [TableGen][DirectX] generate DXIL operation table with TableGen. adds 13e9c1d18e2e Reland "[ASan] Use debuginfo for symbolization." adds df6087ee3794 Move debug-only code inside LLVM_DEUG to prevent unused va [...] adds 911841f717eb Revert "[TableGen][DirectX] generate DXIL operation table [...] adds bbb73ade43a2 [mlir][complex] Add Python bindings for complex ops. adds d764aa7fc6b9 [RISCV] Add cost model for scalable scatter and gather adds 2fa2cee6a84b [RISCV] Start merging demanded reasoning - starting with l [...] adds 72c1effb34aa [libc] Add a status page for math functions. adds ed5a349b89e9 Make setSanitizerMetadata byval. adds 36c01876d79d [mlir][sparse] fix asan issue adds 011e0604ebc9 Add DWARF string debug to clang release notes. adds e6c7a3a54ffa [SelectionDAG] Don't apply MinRCSize constraint in InstrEm [...] adds 4191de262f19 [RISCV] Don't emit LUI/ADDI MachineSDNodes from getAddr adds 6e566bc5523f [clang-tidy] Organize check doc files into subdirectories (NFC) adds a9ddb7d54e34 [PowerPC] Fixing implicit castings in altivec for -fno-lax [...] adds ee28837a1fbd [NFCI] Whitespace in SemaDeclAttr.cpp adds 5afdceb82b92 [RISCV] Add RISCVISD opcode for PseudoLLA. adds 9d7b01dc9521 [RISCV] Implement RISCVTargetLowering::getTargetConstantFromLoad. adds 6ac608b3d897 [lldb] Add RotatingLogHandler adds 663612dfd8f6 [lldb] Remove references to epydoc from the documentation adds dba2ff500d5b fix x86 sanitizer failure due to use of or adds ff3989e6ae74 [libc++][ranges] Implement `ranges::sort`. adds ea690e7019c8 [RISCV] Rename VTy param of RISCVTTIImpl::getArithmeticRed [...] adds 61fac2c370b9 Incomplete attempt to pull DWARFTypePrinter into its own f [...] adds 8eefbd2a57cb [gn build] Port 61fac2c370b9 adds 21f557e13a2c [gn build] Port ff3989e6ae74 adds 2a2886160d80 [mlir][sparse] improved testing and codegen for semi-ring [...] adds af6ec9200b09 [lldb] Cleanup Python API reference files after building the docs adds fcd058acc95c [SVE][CodeGen] Restructure SVE fixed length tests to use u [...] adds 0e182469ee76 [sanitizer] Delete empty sanitizer_openbsd.cpp after D89759 adds 2e0c46044a5d [Object][COFF] Improve section name parsing adds 6b8bd0f72df8 llvm-reduce: Support replacing FP values with 1.0 adds eea11e7369ca llvm-reduce: Add reduction pass to simplify instructions adds 6f1a7eb9e79c [gn build] Port eea11e7369ca adds 6181c192837d [AMDGPU][NFC] Remove isConstantAddr adds bb83f8e70bd1 [OpenMP] Initial parsing and sema for 'parallel masked' construct adds febe4f650b87 [PowerPC][NFC] Undefine __XL_COMPAT_ALTIVEC__ in builtin lit test adds 711a71d1ab10 PowerPC] Emit warning for incompatible vector types that a [...] adds 32bd0c1714b4 llvm-reduce: Try to fix dynamic libraries build adds 232bd331cbaa [ORC-RT] Make the ORC runtime C API public. adds 5e16a781bada [RISCV][NFC][test] Correct a wrong test in vreductions-fp-vp.ll adds 16215eb9790a [LegalizeTypes][RISCV][NFC] Modify assert in PromoteIntRes [...] adds 287ade415eaf [mlir][doc] Avoid duplication with constraints and defs adds f2bcf330588b [LegalizeTypes][NFC] Merge promote SPLAT_VECTOR and promot [...] adds d30c0221cf5a [mlir] Split MLProgram global load and store to Graph variants adds 02b9ddb2f218 [mlir] Disable warning in test of deprecated feature (NFC) adds 8eeede973c69 [lld-macho][nfc] Tests for -force_load + regular archive l [...] adds de7475657156 [lldb] Remove LogHandler::Create functions (NFC) adds 04a3d5f3a119 Reland "Reland "Reland "[X86][RFC] Enable `_Float16` type [...] adds 46d45df4516e [MachineBlockPlacementStats] Add check for `-filter-print- [...] adds b7d09557f6ef Revert "[MachineBlockPlacementStats] Add check for `-filte [...] adds 1e67385d28a4 [MachineBlockPlacementStats] Added check for "-filter-prin [...] adds f4b7b66c4c75 [AArch64][test] Add --mattr=-{sve,sve2,sme} to SVE/SVE2/SM [...] adds 0d2dde20be14 [TableGen][DirectX] generate DXIL operation table with TableGen. adds c324c938becd [Driver] Pass -X to ld for riscv*-{elf,freebsd,linux} adds 880ac5189d63 [RISCV][NFC] Add load/store instructions in rv64*-invalid.s adds 5ea341d7c4f9 [clang] Fix trivially copyable for copy constructor and co [...] adds 1a20252978c7 Revert "Reland "Reland "Reland "[X86][RFC] Enable `_Float1 [...] adds 3fd9aebbb75a [LLDB] XFAIL TestLoadUnload fails on Arm/Ubuntu Jammy adds 5ae4a173ddc7 [InstCombine] Add tests for freeze of recurrence with invo [...] adds 2d9c891cd949 [OpenCL] Fix atomic_fetch_add/sub half overloads adds 7ab44b5c2155 [msan] Allow KMSAN to use -fsanitize-memory-param-retval adds 5ffbac340d6d [AArch64] NFC: Fix BFMLAL[BT] inst def names adds c26366979b6b [libc][bazel] Remove memcpy dependency in memmove adds 610139d2d9ce [mlir] replace 'emit_c_wrappers' func->llvm conversion opt [...] adds daf897d559fc [IR] Check for SignedMin/-1 division in canTrap() (PR56038) adds 32805e60c9de [clang] Dont print implicit forrange initializer adds b329156f4f14 [AArch64][LV] AArch64 does not prefer vectorized addressing adds 84519bc5f75c [LLVM][IR] Fix typo in DerivedTypes.h (NFC) adds 03a991032571 [AMDGPU] Use explicit -global-isel=0/1 in tests. NFC. adds b3ebe3beeda6 [mlir][bufferize] Bufferize after TensorCopyInsertion adds c80c57674e4d [Clang] Allow 'Complex float __attribute__((mode(HC)))' adds b55d55ecd9b2 [mlir][bufferize][NFC] Remove BufferizationState adds 13dfe0f0fc26 [lldb] [test] Update baseline test status for FreeBSD adds 0d16d9bff87b [gn build] (semi-manually) port 232bd331cbaa adds 0e21f1d56a50 [SelectionDAG] Extend WidenVecOp_INSERT_SUBVECTOR to cover [...] adds af5e64df728f [InstCombine] add tests for (pow2 >> X) >u C; NFC adds a5040860412f [InstCombine] add tests for FP casts; NFC adds 7aac15d5df6c Revert "[clang] Dont print implicit forrange initializer" adds c6b88cb9184f [InstCombine] Push freeze through recurrence phi adds 0b9dc7684fb6 [AMDGPU] More GFX11 test coverage adds 6d5d8b131300 [AMDGPU] gfx11 ldsdir intrinsics and ISel adds 655ba9c8a1d2 Reland "Reland "Reland "Reland "[X86][RFC] Enable `_Float1 [...] adds 6441bfb8867c [libc][Obvious] Fix hyperlink and typo in math status page. adds 20d20156f4ce [AMDGPU] gfx11 VINTERP intrinsics and ISel support adds 929d5de22c49 [libc++] Simplify __config a bit adds 6bb40552f235 [LoopVectorize] Add support for invariant stores of ordere [...] adds 2a683647455f [AMDGPU] gfx11 waitcnt support for VINTERP and LDSDIR inst [...] adds 6c89c5314476 [flang] Fix bug in character casting. Add missing sext/tru [...] adds 7b73f53790f3 [libc] Rely on __builtin_memcpy_inline for memcpy implementation adds 1a02c963e338 Revert "Revert "[clang] Dont print implicit forrange initi [...] adds bfde8619355a [InstCombine] convert mask and shift of power-of-2 to cmp+select adds 4a3a9a5fa0b2 [clang][deps] Sort submodules when calculating dependencies adds 755c84c62cda [RISCV] Avoid changing etype for splat of 0 or -1 adds deb7655209a7 [PowerPC] Fix PPCVSXSwapRemoval pass to include MTVSCR and [...] adds 90f96ec7a52e [NFC][Alignment] Remove assumeAligned from MachineFrameInfo ctor adds 51b925df941a [mlir][nvgpu] shared memory access optimization pass adds aef20f59a521 [mlir][sparse] move from by-value to by-reference for data types adds d089d68a2c74 [mlir][nvgpu] fix missing build dependency for NVGPUTransforms adds c2bb2e5973ac [gn build] (manually) port 7cca33b40f77c adds f000de8760c1 [LLDB][ExpressionParser] Fix indices inside format-strings [...] adds 48f4407c1aaf [mlir][linalg] Extend opdsl to support operations on compl [...] adds fc6b2281bfd7 [Static Analyzer][CFG] Introducing the source array in the [...] adds 5fb67e32f8fd [InstCombine] Fold memcmp of constant arrays and variable size adds fb3477a4dab0 [libc++] Unwrap reverse_iterator<reverse_iterator<Iter>> i [...] adds ad709a752daa [libc][obvious] fix sign warning in file_writer adds 92bf652d4074 [Static Analyzer] Small array binding policy adds 75378d432fda [AMDGPU] NFC. Change comment format on gfx11 interp and ld [...] adds e1f1407beb84 [RISCV] Delete dead elideCopy code in InsertVSETVLI [nfc] adds 971e9c80e966 [libc++] Implement std::boyer_moore{, _horspool}_searcher adds fd5a26e6107e [gn build] Port 971e9c80e966 adds 914b9eec04b5 [Flang] Fixes for XArrayCoorOp adds 2040b6df0a3f [Symbolize] Parser for log symbolizer markup. adds 527395bd1005 [gn build] (manually) port 2040b6df0a3f (DebugInfoSymboliz [...] adds b595cddea7fe [riscv] Extract isMaskRegOp helper [nfc] adds ba53906ceff1 [clang][dataflow] Add support for comma binary operator adds e77ac66b8c1c [Static Analyzer] Structured binding to data members adds 05704e785a83 [docs] Fix typo adds 0dd243fa8a4e wip adds 5b77a45c7fb1 [docs] Adding DirectX target usage doc adds e694b2234430 [mlir][nvgpu] Fix Bazel BUILD file adds f9e49644f487 Revert "wip" adds d5745d0015ac [docs] Adding table of object file formats adds db1978b67431 [libc++] Mark standard-mandated includes as such adds f12664386261 [AArch64] add tests for masked subtract; NFC adds e9cced27390b Recommit "[LAA] Initial support for runtime checks with po [...] adds 4d245f1bc2e2 [RISCV] Move store policy and mask reg ops into demanded h [...] adds fb8ecca06f6a [RISCV] Remove redundant code checking for exact VTYPE mat [...] adds 86d5d34c7223 [mlir][sparse] renable f16 tests adds 3420cd7caf8d [mlir][sparse] Add testing for bf16 and fallback for softw [...] adds feb8313fbfe0 [bazel] Add missing dependency after 455679413 adds 9d5e6ccd9bba [BOLT] Fix for missing entry offset adds d5c29b23e1d4 [mlir][sparse] Inline the definition of LLVM_ATTRIBUTE_WEAK adds cbf6737cc402 [RISCV] Use RVVBitsPerBlock instead of hardcoding multiple [...] adds 303c4c37ea49 [libc++] Don't force -O2 when building the benchmarks adds 4cc8f2a017c7 [lldb][tests] Automatically call compute_mydir (NFC) adds 8da8b6143098 [libc++] Make sure we install libc++abi headers on Apple adds 7bc00ce5cd41 [clang-repl] Remove memory leak of ASTContext/TargetMachine. adds 92c6ffa14cde [clang][driver] Ensure we don't accumulate entries in -MJ files adds 991663399792 [lldb] Fix modernize-use-override warnings (NFC) adds 91688716ba49 [lldb] Fix modernize-use-equals-default warnings (NFC) adds 829c84ec5b8b [mlir][nvgpu] fix MSVC warning regarding left shift adds 2538a411ff2a [test][RPOFuncAttrs] Update norecurse.ll adds e5e7e5147322 [mlir][sparse][taco] Support complex types. adds 28b1dcb12280 [BOLT] Allow function fragments to point to one jump table adds 121c6454141d [libc] add printf pointer conv adds 8fc3d719eee7 Stop wrapping GCCAsmStmts inside StmtExprs to destruct tem [...] adds 23d6f31a90a1 Add unit test coverage for cast<T> assertion failures on i [...] adds f0ca0a324fd5 [CodeGen] Init EmptyExpr before the first use adds c20381b22603 llvm-dwarf-dump: include type name for AT_containing_type adds c0320df9f5c0 [DirectX] Add MC Register and Frame stubs adds 3942f8e4762c [DirectX] Add DXILAsmPrinter adds 3adc908b2685 [DirectX][MC] Add MC support for DXContainer adds 7022e6d0f274 [gn build] Port 3adc908b2685 adds 2af61e620eea [DirectX] Add DirectX target object writer adds 0f6ab346fd36 bzero->memset - Fix Windows bots adds 0716b3ec09f4 [Bazel] Rename generated *_main.cpp to [tool-name]-driver. [...] adds dbfb00a9300e [MachineCopyPropagation][RISCV] Add test case showing fail [...] adds e29133629b3d [MachineCopyPropagation][RISCV] Fix D125335 accidentally c [...] adds be6af89f85eb [libc] Add TLS image initialization to aarch64 startup code. new 745a4caaebb9 [mlir] Fix an msvc warning new 99260e95833c [mlir][bufferization] Set emitAccessorPrefix dialect flag new d417710c3af2 [libc++][ranges][NFC] Fix a format error on the ranges sta [...] The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bolt/include/bolt/Core/BinaryBasicBlock.h | 13 +- bolt/include/bolt/Core/BinaryContext.h | 8 + bolt/include/bolt/Core/BinaryFunction.h | 82 +- bolt/lib/Core/BinaryBasicBlock.cpp | 2 +- bolt/lib/Core/BinaryContext.cpp | 21 +- bolt/lib/Core/BinaryFunction.cpp | 38 +- bolt/lib/Passes/BinaryPasses.cpp | 4 +- bolt/lib/Passes/IndirectCallPromotion.cpp | 4 +- bolt/lib/Passes/Inliner.cpp | 2 +- bolt/lib/Passes/Instrumentation.cpp | 3 +- bolt/lib/Passes/LongJmp.cpp | 2 +- bolt/lib/Passes/PatchEntries.cpp | 2 +- bolt/lib/Passes/RetpolineInsertion.cpp | 3 +- bolt/lib/Passes/TailDuplication.cpp | 2 +- bolt/lib/Passes/ValidateInternalCalls.cpp | 3 +- bolt/lib/Rewrite/RewriteInstance.cpp | 1 + .../split-func-jump-table-fragment-bidirection.s | 80 + bolt/unittests/Core/MCPlusBuilder.cpp | 2 +- .../clang-tidy/abseil/CleanupCtadCheck.h | 2 +- .../clang-tidy/abseil/DurationAdditionCheck.h | 2 +- .../clang-tidy/abseil/DurationComparisonCheck.h | 2 +- .../abseil/DurationConversionCastCheck.h | 2 +- .../clang-tidy/abseil/DurationDivisionCheck.h | 2 +- .../clang-tidy/abseil/DurationFactoryFloatCheck.h | 2 +- .../clang-tidy/abseil/DurationFactoryScaleCheck.h | 2 +- .../clang-tidy/abseil/DurationSubtractionCheck.h | 2 +- .../abseil/DurationUnnecessaryConversionCheck.h | 2 +- .../abseil/FasterStrsplitDelimiterCheck.h | 2 +- .../abseil/NoInternalDependenciesCheck.h | 2 +- .../clang-tidy/abseil/NoNamespaceCheck.h | 2 +- .../clang-tidy/abseil/RedundantStrcatCallsCheck.h | 2 +- .../clang-tidy/abseil/StrCatAppendCheck.h | 2 +- .../clang-tidy/abseil/StringFindStrContainsCheck.h | 2 +- .../clang-tidy/abseil/TimeComparisonCheck.h | 2 +- .../clang-tidy/abseil/TimeSubtractionCheck.h | 2 +- .../abseil/UpgradeDurationConversionsCheck.h | 2 +- clang-tools-extra/clang-tidy/add_new_check.py | 61 +- .../altera/IdDependentBackwardBranchCheck.h | 2 +- .../clang-tidy/altera/KernelNameRestrictionCheck.h | 2 +- .../clang-tidy/altera/SingleWorkItemBarrierCheck.h | 2 +- .../clang-tidy/altera/StructPackAlignCheck.h | 2 +- .../clang-tidy/altera/UnrollLoopsCheck.h | 2 +- .../clang-tidy/android/CloexecAccept4Check.h | 2 +- .../clang-tidy/android/CloexecAcceptCheck.h | 2 +- .../clang-tidy/android/CloexecCreatCheck.h | 2 +- .../clang-tidy/android/CloexecDupCheck.h | 2 +- .../clang-tidy/android/CloexecEpollCreate1Check.h | 2 +- .../clang-tidy/android/CloexecEpollCreateCheck.h | 2 +- .../clang-tidy/android/CloexecFopenCheck.h | 2 +- .../clang-tidy/android/CloexecInotifyInit1Check.h | 2 +- .../clang-tidy/android/CloexecInotifyInitCheck.h | 2 +- .../clang-tidy/android/CloexecMemfdCreateCheck.h | 2 +- .../clang-tidy/android/CloexecPipe2Check.h | 2 +- .../clang-tidy/android/CloexecPipeCheck.h | 2 +- .../clang-tidy/android/CloexecSocketCheck.h | 2 +- .../clang-tidy/boost/UseToStringCheck.h | 2 +- .../bugprone/BadSignalToKillThreadCheck.h | 2 +- .../clang-tidy/bugprone/BranchCloneCheck.h | 2 +- .../clang-tidy/bugprone/CopyConstructorInitCheck.h | 2 +- .../clang-tidy/bugprone/DanglingHandleCheck.h | 2 +- .../bugprone/EasilySwappableParametersCheck.h | 2 +- .../clang-tidy/bugprone/ExceptionEscapeCheck.h | 2 +- .../clang-tidy/bugprone/FoldInitTypeCheck.h | 2 +- .../bugprone/ForwardDeclarationNamespaceCheck.h | 2 +- .../bugprone/ForwardingReferenceOverloadCheck.h | 2 +- .../ImplicitWideningOfMultiplicationResultCheck.h | 2 +- .../clang-tidy/bugprone/InfiniteLoopCheck.h | 2 +- .../clang-tidy/bugprone/IntegerDivisionCheck.h | 2 +- .../clang-tidy/bugprone/LambdaFunctionNameCheck.h | 2 +- .../MisplacedOperatorInStrlenInAllocCheck.h | 2 +- .../MisplacedPointerArithmeticInAllocCheck.h | 2 +- .../bugprone/MisplacedWideningCastCheck.h | 2 +- .../bugprone/MoveForwardingReferenceCheck.h | 2 +- .../bugprone/MultipleStatementMacroCheck.h | 2 +- .../clang-tidy/bugprone/NoEscapeCheck.h | 2 +- .../bugprone/NotNullTerminatedResultCheck.h | 2 +- .../clang-tidy/bugprone/ParentVirtualCallCheck.h | 2 +- .../bugprone/RedundantBranchConditionCheck.h | 2 +- .../clang-tidy/bugprone/ReservedIdentifierCheck.h | 2 +- .../clang-tidy/bugprone/SignalHandlerCheck.h | 2 +- .../clang-tidy/bugprone/SignedCharMisuseCheck.h | 2 +- .../clang-tidy/bugprone/SizeofContainerCheck.h | 2 +- .../clang-tidy/bugprone/SizeofExpressionCheck.h | 2 +- .../bugprone/SpuriouslyWakeUpFunctionsCheck.h | 2 +- .../clang-tidy/bugprone/StringConstructorCheck.h | 2 +- .../bugprone/StringIntegerAssignmentCheck.h | 2 +- .../bugprone/StringLiteralWithEmbeddedNulCheck.h | 2 +- .../clang-tidy/bugprone/StringviewNullptrCheck.h | 2 +- .../clang-tidy/bugprone/SuspiciousEnumUsageCheck.h | 2 +- .../clang-tidy/bugprone/SuspiciousIncludeCheck.h | 2 +- .../bugprone/SuspiciousMemoryComparisonCheck.h | 2 +- .../bugprone/SuspiciousMemsetUsageCheck.h | 2 +- .../bugprone/SuspiciousMissingCommaCheck.h | 2 +- .../clang-tidy/bugprone/SuspiciousSemicolonCheck.h | 2 +- .../bugprone/SuspiciousStringCompareCheck.h | 2 +- .../clang-tidy/bugprone/TerminatingContinueCheck.h | 2 +- .../clang-tidy/bugprone/ThrowKeywordMissingCheck.h | 2 +- .../bugprone/TooSmallLoopVariableCheck.h | 2 +- .../bugprone/UncheckedOptionalAccessCheck.h | 2 +- .../bugprone/UndefinedMemoryManipulationCheck.h | 2 +- .../bugprone/UnhandledExceptionAtNewCheck.h | 2 +- .../bugprone/UnhandledSelfAssignmentCheck.h | 2 +- .../clang-tidy/bugprone/UnusedRaiiCheck.h | 2 +- .../clang-tidy/bugprone/UnusedReturnValueCheck.h | 2 +- .../clang-tidy/bugprone/UseAfterMoveCheck.h | 2 +- .../clang-tidy/bugprone/VirtualNearMissCheck.h | 2 +- .../clang-tidy/cert/CommandProcessorCheck.h | 2 +- .../cert/DefaultOperatorNewAlignmentCheck.h | 2 +- .../clang-tidy/cert/FloatLoopCounter.h | 2 +- .../clang-tidy/cert/LimitedRandomnessCheck.h | 2 +- .../clang-tidy/cert/MutatingCopyCheck.h | 2 +- .../cert/NonTrivialTypesLibcMemoryCallsCheck.h | 2 +- .../cert/ProperlySeededRandomGeneratorCheck.h | 2 +- .../clang-tidy/cert/SetLongJmpCheck.h | 2 +- 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llvm/lib/Object/COFFObjectFile.cpp | 10 +- llvm/lib/Support/ScopedPrinter.cpp | 9 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 21 + llvm/lib/Target/AArch64/AArch64ISelLowering.h | 3 + llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td | 5 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 8 +- .../Target/AArch64/AArch64TargetTransformInfo.cpp | 4 + .../Target/AArch64/AArch64TargetTransformInfo.h | 2 + llvm/lib/Target/AMDGPU/AMDGPUGISel.td | 12 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 41 + llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h | 7 + .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 1 + .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 63 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 13 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 117 +- llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp | 10 - llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 71 +- llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td | 2 + llvm/lib/Target/AMDGPU/DSInstructions.td | 28 + llvm/lib/Target/AMDGPU/EXPInstructions.td | 14 + llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 273 ++ llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h | 2 + llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 22 +- llvm/lib/Target/AMDGPU/LDSDIRInstructions.td | 10 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 66 +- llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 64 +- llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 42 +- llvm/lib/Target/AMDGPU/VINTERPInstructions.td | 45 + llvm/lib/Target/AMDGPU/VOP1Instructions.td | 14 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 4 +- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 6 +- .../ARM/MCTargetDesc/ARMMachObjectWriter.cpp | 4 +- llvm/lib/Target/DirectX/CMakeLists.txt | 5 + llvm/lib/Target/DirectX/DXILOpLowering.cpp | 60 +- llvm/lib/Target/DirectX/DXILStubs.td | 18 + llvm/lib/Target/DirectX/DirectX.td | 1 + llvm/lib/Target/DirectX/DirectXAsmPrinter.cpp | 57 + llvm/lib/Target/DirectX/DirectXFrameLowering.h | 35 + llvm/lib/Target/DirectX/DirectXInstrInfo.cpp | 20 + llvm/lib/Target/DirectX/DirectXInstrInfo.h | 30 + llvm/lib/Target/DirectX/DirectXRegisterInfo.cpp | 24 + llvm/lib/Target/DirectX/DirectXRegisterInfo.h | 28 + llvm/lib/Target/DirectX/DirectXSubtarget.cpp | 4 +- llvm/lib/Target/DirectX/DirectXSubtarget.h | 10 + llvm/lib/Target/DirectX/DirectXTargetMachine.cpp | 25 +- .../lib/Target/DirectX/MCTargetDesc/CMakeLists.txt | 1 + .../MCTargetDesc/DirectXContainerObjectWriter.cpp | 28 + .../MCTargetDesc/DirectXContainerObjectWriter.h | 24 + .../DirectX/MCTargetDesc/DirectXMCTargetDesc.cpp | 127 +- .../DirectX/MCTargetDesc/DirectXMCTargetDesc.h | 29 + .../lib/Target/LoongArch/LoongArchISelDAGToDAG.cpp | 7 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 27 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 9 - llvm/lib/Target/PowerPC/PPCVSXSwapRemoval.cpp | 2 + llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 67 +- llvm/lib/Target/RISCV/RISCVISelLowering.h | 11 + llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp | 750 ++-- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 6 + llvm/lib/Target/RISCV/RISCVInstrInfo.td | 25 + llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 31 +- llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td | 18 +- llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp | 46 +- llvm/lib/Target/X86/X86FastISel.cpp | 17 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 268 +- llvm/lib/Target/X86/X86ISelLowering.h | 2 + llvm/lib/Target/X86/X86InstrAVX512.td | 129 +- llvm/lib/Target/X86/X86InstrCompiler.td | 6 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 32 +- llvm/lib/Target/X86/X86InstrInfo.td | 4 +- llvm/lib/Target/X86/X86InstrSSE.td | 37 + llvm/lib/Target/X86/X86InstrSystem.td | 4 +- llvm/lib/Target/X86/X86InstrVecCompiler.td | 6 +- llvm/lib/Target/X86/X86InstructionSelector.cpp | 2 + llvm/lib/Target/X86/X86RegisterInfo.td | 4 +- llvm/lib/Target/X86/X86Subtarget.h | 2 +- llvm/lib/Transforms/IPO/MergeFunctions.cpp | 15 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 17 + .../Transforms/InstCombine/InstCombineInternal.h | 1 + .../InstCombine/InstructionCombining.cpp | 70 + .../Instrumentation/AddressSanitizer.cpp | 10 +- .../Transforms/Instrumentation/InstrProfiling.cpp | 2 +- llvm/lib/Transforms/Utils/LoopUtils.cpp | 10 + llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 7 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 72 +- .../Vectorize/LoopVectorizationLegality.cpp | 5 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 28 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 232 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 26 + .../Analysis/CostModel/AArch64/sve-intrinsics.ll | 81 +- .../Analysis/CostModel/RISCV/rvv-intrinsics.ll | 8 +- .../Analysis/CostModel/RISCV/scalable-gather.ll | 164 +- .../Analysis/CostModel/RISCV/scalable-scatter.ll | 164 +- llvm/test/Analysis/CostModel/X86/fptoi_sat.ll | 520 +-- .../Analysis/LoopAccessAnalysis/forked-pointers.ll | 24 +- .../Analysis/LoopCacheAnalysis/compute-cost.ll | 160 + llvm/test/CodeGen/AArch64/add-negative.ll | 7 +- llvm/test/CodeGen/AArch64/arm64-cse.ll | 42 +- llvm/test/CodeGen/AArch64/minmax.ll | 4 +- llvm/test/CodeGen/AArch64/regress-tblgen-chains.ll | 24 +- llvm/test/CodeGen/AArch64/sme-intrinsics-rdsvl.ll | 46 + llvm/test/CodeGen/AArch64/sub1.ll | 50 + .../AArch64/sve-fixed-length-bit-counting.ll | 1207 ++++--- .../CodeGen/AArch64/sve-fixed-length-bitcast.ll | 239 +- .../CodeGen/AArch64/sve-fixed-length-concat.ll | 755 ++-- .../CodeGen/AArch64/sve-fixed-length-ext-loads.ll | 587 +--- .../AArch64/sve-fixed-length-extract-subvector.ll | 533 +-- .../AArch64/sve-fixed-length-extract-vector-elt.ll | 232 +- .../AArch64/sve-fixed-length-float-compares.ll | 1031 ------ .../CodeGen/AArch64/sve-fixed-length-fp-arith.ll | 2124 +++++++----- .../AArch64/sve-fixed-length-fp-compares.ll | 774 +++++ .../AArch64/sve-fixed-length-fp-extend-trunc.ll | 609 +--- .../CodeGen/AArch64/sve-fixed-length-fp-fma.ll | 136 +- .../CodeGen/AArch64/sve-fixed-length-fp-minmax.ll | 1235 +++---- .../CodeGen/AArch64/sve-fixed-length-fp-reduce.ll | 1084 +++--- .../AArch64/sve-fixed-length-fp-rounding.ll | 1892 +++++----- .../CodeGen/AArch64/sve-fixed-length-fp-select.ll | 775 +---- .../CodeGen/AArch64/sve-fixed-length-fp-to-int.ll | 2061 +++++------ .../CodeGen/AArch64/sve-fixed-length-fp-vselect.ll | 400 +-- .../AArch64/sve-fixed-length-insert-vector-elt.ll | 403 ++- .../CodeGen/AArch64/sve-fixed-length-int-arith.ll | 1526 ++++---- .../AArch64/sve-fixed-length-int-compares.ll | 628 ++-- .../CodeGen/AArch64/sve-fixed-length-int-div.ll | 2125 ++++++------ .../AArch64/sve-fixed-length-int-extends.ll | 975 ++++-- .../CodeGen/AArch64/sve-fixed-length-int-log.ll | 1162 ++++--- .../CodeGen/AArch64/sve-fixed-length-int-minmax.ll | 1670 ++++----- .../CodeGen/AArch64/sve-fixed-length-int-mulh.ll | 3636 ++++---------------- .../CodeGen/AArch64/sve-fixed-length-int-reduce.ll | 1834 +++++----- .../CodeGen/AArch64/sve-fixed-length-int-rem.ll | 2382 ++++++------- .../CodeGen/AArch64/sve-fixed-length-int-select.ll | 603 ++-- .../CodeGen/AArch64/sve-fixed-length-int-shifts.ll | 1267 +++---- .../CodeGen/AArch64/sve-fixed-length-int-to-fp.ll | 2106 +++--------- .../AArch64/sve-fixed-length-int-vselect.ll | 2462 ++----------- .../test/CodeGen/AArch64/sve-fixed-length-loads.ll | 222 +- .../CodeGen/AArch64/sve-fixed-length-log-reduce.ll | 1178 ++++--- .../CodeGen/AArch64/sve-fixed-length-mask-opt.ll | 307 +- .../AArch64/sve-fixed-length-masked-gather.ll | 2377 ++----------- .../AArch64/sve-fixed-length-masked-loads.ll | 945 ++++- .../AArch64/sve-fixed-length-masked-scatter.ll | 890 ++--- .../AArch64/sve-fixed-length-masked-stores.ll | 141 +- .../AArch64/sve-fixed-length-permute-rev.ll | 36 +- llvm/test/CodeGen/AArch64/sve-fixed-length-rev.ll | 677 ++-- .../CodeGen/AArch64/sve-fixed-length-sdiv-pow2.ll | 390 +-- .../CodeGen/AArch64/sve-fixed-length-shuffles.ll | 8 +- .../AArch64/sve-fixed-length-splat-vector.ll | 686 +--- .../CodeGen/AArch64/sve-fixed-length-stores.ll | 206 +- .../CodeGen/AArch64/sve-fixed-length-subvector.ll | 403 +-- .../AArch64/sve-fixed-length-trunc-stores.ll | 299 +- .../test/CodeGen/AArch64/sve-fixed-length-trunc.ll | 457 ++- .../AArch64/sve-fixed-length-vector-shuffle.ll | 945 +---- llvm/test/CodeGen/AArch64/sve-insert-vector.ll | 11 + llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll | 48 +- .../AMDGPU/GlobalISel/constant-bus-restriction.ll | 4 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f32.ll | 48 +- llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f64.ll | 36 +- .../legalize-llvm.amdgcn.image.sample.a16.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll | 48 +- .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.fdot2.ll | 115 +- .../GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll | 1 + .../GlobalISel/llvm.amdgcn.image.atomic.dim.ll | 1 + .../llvm.amdgcn.image.gather4.a16.dim.ll | 1 + .../GlobalISel/llvm.amdgcn.image.gather4.dim.ll | 1 + .../GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll | 1 + .../GlobalISel/llvm.amdgcn.image.getresinfo.ll | 1 + .../GlobalISel/llvm.amdgcn.image.load.1d.d16.ll | 386 ++- .../AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll | 85 +- .../llvm.amdgcn.image.load.2darraymsaa.a16.ll | 97 +- .../llvm.amdgcn.image.load.2darraymsaa.ll | 89 +- .../GlobalISel/llvm.amdgcn.image.load.3d.a16.ll | 97 +- .../AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll | 87 +- .../GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll | 134 + .../GlobalISel/llvm.amdgcn.image.sample.g16.ll | 129 +- .../GlobalISel/llvm.amdgcn.image.store.2d.ll | 1 + .../AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll | 139 + .../AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll | 379 +- .../AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp8.ll | 1 - .../AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll | 102 + .../AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll | 102 + llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll | 36 +- .../regbankselect-amdgcn.lds.direct.load.mir | 36 + .../regbankselect-amdgcn.lds.param.load.mir | 36 + llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll | 28 +- llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll | 36 +- .../CodeGen/AMDGPU/atomic_optimizations_buffer.ll | 4 +- .../AMDGPU/atomic_optimizations_global_pointer.ll | 30 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 41 +- .../AMDGPU/atomic_optimizations_raw_buffer.ll | 4 +- .../AMDGPU/atomic_optimizations_struct_buffer.ll | 4 +- .../attr-amdgpu-flat-work-group-size-vgpr-limit.ll | 18 +- llvm/test/CodeGen/AMDGPU/carryout-selection.ll | 57 +- llvm/test/CodeGen/AMDGPU/frem.ll | 20 +- llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll | 2 +- llvm/test/CodeGen/AMDGPU/global-saddr-load.ll | 38 +- llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll | 145 + .../AMDGPU/llvm.amdgcn.ds.add.gs.reg.rtn.ll | 70 + .../AMDGPU/llvm.amdgcn.ds.sub.gs.reg.rtn.ll | 71 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll | 102 + .../CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll | 31 + .../CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll | 31 + .../CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll | 60 + .../CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll | 1 + .../CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll | 262 ++ .../CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll | 1 + .../CodeGen/AMDGPU/llvm.amdgcn.image.d16.dim.ll | 1 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll | 1322 ++++--- .../AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll | 1 + .../AMDGPU/llvm.amdgcn.image.gather4.d16.dim.ll | 1 + .../AMDGPU/llvm.amdgcn.image.gather4.dim.ll | 1 + .../CodeGen/AMDGPU/llvm.amdgcn.image.getlod.dim.ll | 1 + .../AMDGPU/llvm.amdgcn.image.load.a16.d16.ll | 1 + .../CodeGen/AMDGPU/llvm.amdgcn.image.load.a16.ll | 1 + .../CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll | 133 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.nsa.ll | 54 +- .../AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll | 206 +- .../AMDGPU/llvm.amdgcn.image.sample.cd.a16.dim.ll | 212 ++ .../AMDGPU/llvm.amdgcn.image.sample.cd.dim.ll | 178 + .../llvm.amdgcn.image.sample.cd.g16.encode.ll | 121 + .../AMDGPU/llvm.amdgcn.image.sample.cd.g16.ll | 121 + .../AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll | 151 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll | 1247 +++---- .../AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll | 222 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll | 116 +- .../AMDGPU/llvm.amdgcn.image.store.a16.d16.ll | 1 + .../CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.ll | 1 + .../CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll | 139 + .../CodeGen/AMDGPU/llvm.amdgcn.intersect_ray.ll | 246 +- .../CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll | 41 + .../CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll | 40 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mov.dpp8.ll | 21 +- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll | 102 + llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot8.ll | 102 + llvm/test/CodeGen/AMDGPU/llvm.mulo.ll | 16 +- llvm/test/CodeGen/AMDGPU/mad_u64_u32.ll | 4 +- .../AMDGPU/memory-legalizer-flat-nontemporal.ll | 12 +- .../AMDGPU/memory-legalizer-flat-volatile.ll | 8 +- .../test/CodeGen/AMDGPU/merge-image-load-gfx11.mir | 490 +++ .../CodeGen/AMDGPU/merge-image-sample-gfx11.mir | 1013 ++++++ llvm/test/CodeGen/AMDGPU/offset-split-global.ll | 22 +- .../CodeGen/AMDGPU/partial-forwarding-hazards.mir | 399 +++ .../CodeGen/AMDGPU/promote-constOffset-to-imm.ll | 18 +- llvm/test/CodeGen/AMDGPU/saddo.ll | 2 +- .../stack-pointer-offset-relative-frameindex.ll | 4 +- .../CodeGen/AMDGPU/trans-forwarding-hazards.mir | 334 ++ llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll | 2 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 20 +- llvm/test/CodeGen/DirectX/embed-dxil.ll | 34 +- llvm/test/CodeGen/LoongArch/imm.ll | 8 + llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir | 8 +- llvm/test/CodeGen/PowerPC/LQ-STQ-32bit-offset.ll | 78 + llvm/test/CodeGen/PowerPC/LQ-STQ.ll | 40 + .../PowerPC/mtvsrc-mfvscr-PPCVSXSwapRemoval.ll | 37 + .../CodeGen/PowerPC/ppc64-get-cache-line-size.ll | 6 +- .../early-clobber-tied-def-subreg-liveness.ll | 118 + .../early-clobber-tied-def-subreg-liveness.mir | 224 ++ llvm/test/CodeGen/RISCV/machine-cp.mir | 34 + llvm/test/CodeGen/RISCV/rv64zbp-intrinsic.ll | 3 - llvm/test/CodeGen/RISCV/rv64zbp.ll | 21 +- .../CodeGen/RISCV/rvv/constant-folding-crash.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll | 84 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 3 - llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 3 - .../RISCV/rvv/fixed-vectors-calling-conv.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll | 6 +- .../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 129 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 13 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 42 +- .../RISCV/rvv/fixed-vectors-fp-interleave.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 48 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 40 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 82 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 78 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 27 +- .../RISCV/rvv/fixed-vectors-int-interleave.ll | 16 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 58 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 2 - llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 43 +- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 4 - .../RISCV/rvv/fixed-vectors-reduction-fp.ll | 15 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 48 +- .../CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll | 12 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll | 76 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vfwadd.ll | 51 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vfwsub.ll | 51 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll | 6 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll | 6 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll | 27 +- .../CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll | 18 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll | 24 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/implicit-def-copy.ll | 23 + llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 13 +- llvm/test/CodeGen/RISCV/rvv/vfma-vp.ll | 122 +- llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll | 5 +- llvm/test/CodeGen/RISCV/rvv/vsetvli-insert.mir | 3 +- llvm/test/CodeGen/X86/atomic-non-integer.ll | 99 +- llvm/test/CodeGen/X86/avx512-insert-extract.ll | 46 +- llvm/test/CodeGen/X86/avx512-masked_memop-16-8.ll | 284 +- llvm/test/CodeGen/X86/avx512fp16-fp-logic.ll | 12 +- llvm/test/CodeGen/X86/callbr-asm-bb-exports.ll | 2 +- llvm/test/CodeGen/X86/cvt16-2.ll | 42 +- llvm/test/CodeGen/X86/cvt16.ll | 38 +- .../CodeGen/X86/fastmath-float-half-conversion.ll | 56 +- llvm/test/CodeGen/X86/fmf-flags.ll | 8 +- llvm/test/CodeGen/X86/fp-round.ll | 14 +- llvm/test/CodeGen/X86/fp-roundeven.ll | 14 +- llvm/test/CodeGen/X86/fp128-cast-strict.ll | 10 +- llvm/test/CodeGen/X86/fpclamptosat.ll | 120 +- llvm/test/CodeGen/X86/fpclamptosat_vec.ll | 1096 +++--- llvm/test/CodeGen/X86/fptosi-sat-scalar.ll | 264 +- llvm/test/CodeGen/X86/fptosi-sat-vector-128.ll | 846 +++-- llvm/test/CodeGen/X86/fptoui-sat-scalar.ll | 236 +- llvm/test/CodeGen/X86/fptoui-sat-vector-128.ll | 746 ++-- llvm/test/CodeGen/X86/freeze.ll | 10 +- llvm/test/CodeGen/X86/frem.ll | 1520 ++++---- llvm/test/CodeGen/X86/half-constrained.ll | 82 +- llvm/test/CodeGen/X86/half.ll | 1091 +++--- llvm/test/CodeGen/X86/pr31088.ll | 273 +- llvm/test/CodeGen/X86/pr38533.ll | 68 +- llvm/test/CodeGen/X86/pr47000.ll | 217 +- llvm/test/CodeGen/X86/scheduler-asm-moves.mir | 4 +- llvm/test/CodeGen/X86/shuffle-extract-subvector.ll | 31 +- .../CodeGen/X86/stack-folding-fp-avx512fp16-fma.ll | 48 +- .../CodeGen/X86/stack-folding-fp-avx512fp16.ll | 24 +- .../X86/statepoint-invoke-ra-enter-at-end.mir | 4 +- llvm/test/CodeGen/X86/trap.ll | 1 + llvm/test/CodeGen/X86/ubsantrap.ll | 1 + llvm/test/CodeGen/X86/vec_fp_to_int.ll | 56 +- llvm/test/CodeGen/X86/vector-half-conversions.ll | 1039 +++--- llvm/test/CodeGen/X86/vector-reduce-fmax-nnan.ll | 75 +- llvm/test/CodeGen/X86/vector-reduce-fmin-nnan.ll | 75 +- .../DebugInfo/Generic/containing-type-extension.ll | 2 +- llvm/test/DebugInfo/Generic/tu-composite.ll | 4 +- .../X86/containing-type-extension-rust.ll | 2 +- llvm/test/Instrumentation/AddressSanitizer/ps4.ll | 3 +- .../Instrumentation/InstrProfiling/profiling.ll | 12 +- llvm/test/MC/AArch64/SME/addha-u32.s | 2 +- llvm/test/MC/AArch64/SME/addha-u64.s | 2 +- llvm/test/MC/AArch64/SME/addspl.s | 2 +- llvm/test/MC/AArch64/SME/addsvl.s | 2 +- llvm/test/MC/AArch64/SME/addva-u32.s | 2 +- llvm/test/MC/AArch64/SME/addva-u64.s | 2 +- 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llvm/test/MC/AArch64/SVE/ld1rw.s | 2 +- llvm/test/MC/AArch64/SVE/ld1sb-sve-only.s | 2 +- llvm/test/MC/AArch64/SVE/ld1sb.s | 2 +- llvm/test/MC/AArch64/SVE/ld1sh-sve-only.s | 2 +- llvm/test/MC/AArch64/SVE/ld1sh.s | 2 +- llvm/test/MC/AArch64/SVE/ld1sw-sve-only.s | 2 +- llvm/test/MC/AArch64/SVE/ld1sw.s | 2 +- llvm/test/MC/AArch64/SVE/ld1w-sve-only.s | 2 +- llvm/test/MC/AArch64/SVE/ld1w.s | 2 +- llvm/test/MC/AArch64/SVE/ld2b.s | 2 +- llvm/test/MC/AArch64/SVE/ld2d.s | 2 +- llvm/test/MC/AArch64/SVE/ld2h.s | 2 +- llvm/test/MC/AArch64/SVE/ld2w.s | 2 +- llvm/test/MC/AArch64/SVE/ld3b.s | 2 +- llvm/test/MC/AArch64/SVE/ld3d.s | 2 +- llvm/test/MC/AArch64/SVE/ld3h.s | 2 +- llvm/test/MC/AArch64/SVE/ld3w.s | 2 +- llvm/test/MC/AArch64/SVE/ld4b.s | 2 +- llvm/test/MC/AArch64/SVE/ld4d.s | 2 +- llvm/test/MC/AArch64/SVE/ld4h.s | 2 +- llvm/test/MC/AArch64/SVE/ld4w.s | 2 +- llvm/test/MC/AArch64/SVE/ldff1b.s | 2 +- llvm/test/MC/AArch64/SVE/ldff1d.s | 2 +- llvm/test/MC/AArch64/SVE/ldff1h.s | 2 +- llvm/test/MC/AArch64/SVE/ldff1sb.s | 2 +- llvm/test/MC/AArch64/SVE/ldff1sh.s | 2 +- llvm/test/MC/AArch64/SVE/ldff1sw.s | 2 +- llvm/test/MC/AArch64/SVE/ldff1w.s | 2 +- llvm/test/MC/AArch64/SVE/ldnf1b.s | 2 +- llvm/test/MC/AArch64/SVE/ldnf1d.s | 2 +- llvm/test/MC/AArch64/SVE/ldnf1h.s | 2 +- llvm/test/MC/AArch64/SVE/ldnf1sb.s | 2 +- llvm/test/MC/AArch64/SVE/ldnf1sh.s | 2 +- llvm/test/MC/AArch64/SVE/ldnf1sw.s | 2 +- llvm/test/MC/AArch64/SVE/ldnf1w.s | 2 +- llvm/test/MC/AArch64/SVE/ldnt1b.s | 2 +- llvm/test/MC/AArch64/SVE/ldnt1d.s | 2 +- llvm/test/MC/AArch64/SVE/ldnt1h.s | 2 +- llvm/test/MC/AArch64/SVE/ldnt1w.s | 2 +- llvm/test/MC/AArch64/SVE/ldr.s | 2 +- llvm/test/MC/AArch64/SVE/lsl.s | 2 +- llvm/test/MC/AArch64/SVE/lslr.s | 2 +- llvm/test/MC/AArch64/SVE/lsr.s | 2 +- llvm/test/MC/AArch64/SVE/lsrr.s | 2 +- llvm/test/MC/AArch64/SVE/mad.s | 2 +- llvm/test/MC/AArch64/SVE/matrix-multiply-fp32.s | 2 +- llvm/test/MC/AArch64/SVE/matrix-multiply-fp64.s | 2 +- llvm/test/MC/AArch64/SVE/matrix-multiply-int8.s | 2 +- llvm/test/MC/AArch64/SVE/mla.s | 2 +- llvm/test/MC/AArch64/SVE/mls.s | 2 +- llvm/test/MC/AArch64/SVE/mov.s | 2 +- llvm/test/MC/AArch64/SVE/movprfx.s | 2 +- llvm/test/MC/AArch64/SVE/movs.s | 2 +- llvm/test/MC/AArch64/SVE/msb.s | 2 +- llvm/test/MC/AArch64/SVE/mul.s | 2 +- llvm/test/MC/AArch64/SVE/nand.s | 2 +- llvm/test/MC/AArch64/SVE/nands.s | 2 +- llvm/test/MC/AArch64/SVE/neg.s | 2 +- llvm/test/MC/AArch64/SVE/nor.s | 2 +- llvm/test/MC/AArch64/SVE/nors.s | 2 +- llvm/test/MC/AArch64/SVE/not.s | 2 +- llvm/test/MC/AArch64/SVE/nots.s | 2 +- llvm/test/MC/AArch64/SVE/orn.s | 2 +- llvm/test/MC/AArch64/SVE/orns.s | 2 +- llvm/test/MC/AArch64/SVE/orr.s | 2 +- llvm/test/MC/AArch64/SVE/orrs.s | 2 +- llvm/test/MC/AArch64/SVE/orv.s | 2 +- llvm/test/MC/AArch64/SVE/pfalse.s | 2 +- llvm/test/MC/AArch64/SVE/pfirst.s | 2 +- llvm/test/MC/AArch64/SVE/pnext.s | 2 +- llvm/test/MC/AArch64/SVE/prfb-sve-only.s | 2 +- llvm/test/MC/AArch64/SVE/prfb.s | 2 +- llvm/test/MC/AArch64/SVE/prfd-sve-only.s | 2 +- llvm/test/MC/AArch64/SVE/prfd.s | 2 +- llvm/test/MC/AArch64/SVE/prfh-sve-only.s | 2 +- llvm/test/MC/AArch64/SVE/prfh.s | 2 +- llvm/test/MC/AArch64/SVE/prfw-sve-only.s | 2 +- llvm/test/MC/AArch64/SVE/prfw.s | 2 +- llvm/test/MC/AArch64/SVE/ptest.s | 2 +- llvm/test/MC/AArch64/SVE/ptrue.s | 2 +- llvm/test/MC/AArch64/SVE/ptrues.s | 2 +- llvm/test/MC/AArch64/SVE/punpkhi.s | 2 +- llvm/test/MC/AArch64/SVE/punpklo.s | 2 +- llvm/test/MC/AArch64/SVE/rbit.s | 2 +- llvm/test/MC/AArch64/SVE/rdffr.s | 2 +- llvm/test/MC/AArch64/SVE/rdffrs.s | 2 +- llvm/test/MC/AArch64/SVE/rdvl.s | 2 +- llvm/test/MC/AArch64/SVE/rev.s | 2 +- llvm/test/MC/AArch64/SVE/revb.s | 2 +- llvm/test/MC/AArch64/SVE/revh.s | 2 +- llvm/test/MC/AArch64/SVE/revw.s | 2 +- llvm/test/MC/AArch64/SVE/sabd.s | 2 +- llvm/test/MC/AArch64/SVE/saddv.s | 2 +- llvm/test/MC/AArch64/SVE/scvtf.s | 2 +- llvm/test/MC/AArch64/SVE/sdiv.s | 2 +- llvm/test/MC/AArch64/SVE/sdivr.s | 2 +- llvm/test/MC/AArch64/SVE/sdot.s | 2 +- llvm/test/MC/AArch64/SVE/sel.s | 2 +- llvm/test/MC/AArch64/SVE/setffr.s | 2 +- llvm/test/MC/AArch64/SVE/smax.s | 2 +- llvm/test/MC/AArch64/SVE/smaxv.s | 2 +- llvm/test/MC/AArch64/SVE/smin.s | 2 +- llvm/test/MC/AArch64/SVE/sminv.s | 2 +- llvm/test/MC/AArch64/SVE/smulh.s | 2 +- llvm/test/MC/AArch64/SVE/splice.s | 2 +- llvm/test/MC/AArch64/SVE/sqadd.s | 2 +- llvm/test/MC/AArch64/SVE/sqdecb.s | 2 +- llvm/test/MC/AArch64/SVE/sqdecd.s | 2 +- llvm/test/MC/AArch64/SVE/sqdech.s | 2 +- llvm/test/MC/AArch64/SVE/sqdecp.s | 2 +- llvm/test/MC/AArch64/SVE/sqdecw.s | 2 +- llvm/test/MC/AArch64/SVE/sqincb.s | 2 +- llvm/test/MC/AArch64/SVE/sqincd.s | 2 +- llvm/test/MC/AArch64/SVE/sqinch.s | 2 +- llvm/test/MC/AArch64/SVE/sqincp.s | 2 +- llvm/test/MC/AArch64/SVE/sqincw.s | 2 +- llvm/test/MC/AArch64/SVE/sqsub.s | 2 +- llvm/test/MC/AArch64/SVE/st1b-sve-only.s | 2 +- llvm/test/MC/AArch64/SVE/st1b.s | 2 +- llvm/test/MC/AArch64/SVE/st1d-sve-only.s | 2 +- llvm/test/MC/AArch64/SVE/st1d.s | 2 +- llvm/test/MC/AArch64/SVE/st1h-sve-only.s | 2 +- llvm/test/MC/AArch64/SVE/st1h.s | 2 +- llvm/test/MC/AArch64/SVE/st1w-sve-only.s | 2 +- llvm/test/MC/AArch64/SVE/st1w.s | 2 +- llvm/test/MC/AArch64/SVE/st2b.s | 2 +- llvm/test/MC/AArch64/SVE/st2d.s | 2 +- llvm/test/MC/AArch64/SVE/st2h.s | 2 +- llvm/test/MC/AArch64/SVE/st2w.s | 2 +- llvm/test/MC/AArch64/SVE/st3b.s | 2 +- llvm/test/MC/AArch64/SVE/st3d.s | 2 +- llvm/test/MC/AArch64/SVE/st3h.s | 2 +- llvm/test/MC/AArch64/SVE/st3w.s | 2 +- llvm/test/MC/AArch64/SVE/st4b.s | 2 +- llvm/test/MC/AArch64/SVE/st4d.s | 2 +- llvm/test/MC/AArch64/SVE/st4h.s | 2 +- llvm/test/MC/AArch64/SVE/st4w.s | 2 +- llvm/test/MC/AArch64/SVE/stnt1b.s | 2 +- llvm/test/MC/AArch64/SVE/stnt1d.s | 2 +- llvm/test/MC/AArch64/SVE/stnt1h.s | 2 +- llvm/test/MC/AArch64/SVE/stnt1w.s | 2 +- llvm/test/MC/AArch64/SVE/str.s | 2 +- llvm/test/MC/AArch64/SVE/sub.s | 2 +- llvm/test/MC/AArch64/SVE/subr.s | 2 +- llvm/test/MC/AArch64/SVE/sunpkhi.s | 2 +- llvm/test/MC/AArch64/SVE/sunpklo.s | 2 +- llvm/test/MC/AArch64/SVE/sxtb.s | 2 +- llvm/test/MC/AArch64/SVE/sxth.s | 2 +- llvm/test/MC/AArch64/SVE/sxtw.s | 2 +- llvm/test/MC/AArch64/SVE/system-regs.s | 2 +- llvm/test/MC/AArch64/SVE/tbl.s | 2 +- llvm/test/MC/AArch64/SVE/trn1.s | 2 +- llvm/test/MC/AArch64/SVE/trn2.s | 2 +- llvm/test/MC/AArch64/SVE/uabd.s | 2 +- llvm/test/MC/AArch64/SVE/uaddv.s | 2 +- llvm/test/MC/AArch64/SVE/ucvtf.s | 2 +- llvm/test/MC/AArch64/SVE/udiv.s | 2 +- llvm/test/MC/AArch64/SVE/udivr.s | 2 +- llvm/test/MC/AArch64/SVE/udot.s | 2 +- llvm/test/MC/AArch64/SVE/umax.s | 2 +- llvm/test/MC/AArch64/SVE/umaxv.s | 2 +- llvm/test/MC/AArch64/SVE/umin.s | 2 +- llvm/test/MC/AArch64/SVE/uminv.s | 2 +- llvm/test/MC/AArch64/SVE/umulh.s | 2 +- llvm/test/MC/AArch64/SVE/uqadd.s | 2 +- llvm/test/MC/AArch64/SVE/uqdecb.s | 2 +- llvm/test/MC/AArch64/SVE/uqdecd.s | 2 +- llvm/test/MC/AArch64/SVE/uqdech.s | 2 +- llvm/test/MC/AArch64/SVE/uqdecp.s | 2 +- llvm/test/MC/AArch64/SVE/uqdecw.s | 2 +- llvm/test/MC/AArch64/SVE/uqincb.s | 2 +- llvm/test/MC/AArch64/SVE/uqincd.s | 2 +- llvm/test/MC/AArch64/SVE/uqinch.s | 2 +- llvm/test/MC/AArch64/SVE/uqincp.s | 2 +- llvm/test/MC/AArch64/SVE/uqincw.s | 2 +- llvm/test/MC/AArch64/SVE/uqsub.s | 2 +- llvm/test/MC/AArch64/SVE/uunpkhi.s | 2 +- llvm/test/MC/AArch64/SVE/uunpklo.s | 2 +- llvm/test/MC/AArch64/SVE/uxtb.s | 2 +- llvm/test/MC/AArch64/SVE/uxth.s | 2 +- llvm/test/MC/AArch64/SVE/uxtw.s | 2 +- llvm/test/MC/AArch64/SVE/uzp1.s | 2 +- llvm/test/MC/AArch64/SVE/uzp2.s | 2 +- llvm/test/MC/AArch64/SVE/whilele.s | 2 +- llvm/test/MC/AArch64/SVE/whilelo.s | 2 +- llvm/test/MC/AArch64/SVE/whilels.s | 2 +- llvm/test/MC/AArch64/SVE/whilelt.s | 2 +- llvm/test/MC/AArch64/SVE/wrffr.s | 2 +- llvm/test/MC/AArch64/SVE/zip1.s | 2 +- llvm/test/MC/AArch64/SVE/zip2.s | 2 +- llvm/test/MC/AArch64/SVE2/adclb.s | 2 +- llvm/test/MC/AArch64/SVE2/adclt.s | 2 +- llvm/test/MC/AArch64/SVE2/addhnb.s | 2 +- llvm/test/MC/AArch64/SVE2/addhnt.s | 2 +- llvm/test/MC/AArch64/SVE2/addp.s | 2 +- llvm/test/MC/AArch64/SVE2/aesd.s | 2 +- llvm/test/MC/AArch64/SVE2/aese.s | 2 +- llvm/test/MC/AArch64/SVE2/aesimc.s | 2 +- llvm/test/MC/AArch64/SVE2/aesmc.s | 2 +- llvm/test/MC/AArch64/SVE2/bcax.s | 2 +- llvm/test/MC/AArch64/SVE2/bdep.s | 2 +- llvm/test/MC/AArch64/SVE2/bext.s | 2 +- llvm/test/MC/AArch64/SVE2/bgrp.s | 2 +- llvm/test/MC/AArch64/SVE2/bsl.s | 2 +- llvm/test/MC/AArch64/SVE2/bsl1n.s | 2 +- llvm/test/MC/AArch64/SVE2/bsl2n.s | 2 +- llvm/test/MC/AArch64/SVE2/cadd.s | 2 +- llvm/test/MC/AArch64/SVE2/cdot.s | 2 +- llvm/test/MC/AArch64/SVE2/cmla.s | 2 +- llvm/test/MC/AArch64/SVE2/eor3.s | 2 +- llvm/test/MC/AArch64/SVE2/eorbt.s | 2 +- llvm/test/MC/AArch64/SVE2/eortb.s | 2 +- llvm/test/MC/AArch64/SVE2/ext.s | 2 +- llvm/test/MC/AArch64/SVE2/faddp.s | 2 +- llvm/test/MC/AArch64/SVE2/fcvtlt.s | 2 +- llvm/test/MC/AArch64/SVE2/fcvtnt.s | 2 +- llvm/test/MC/AArch64/SVE2/fcvtx.s | 2 +- llvm/test/MC/AArch64/SVE2/fcvtxnt.s | 2 +- llvm/test/MC/AArch64/SVE2/flogb.s | 2 +- llvm/test/MC/AArch64/SVE2/fmaxnmp.s | 2 +- llvm/test/MC/AArch64/SVE2/fmaxp.s | 2 +- llvm/test/MC/AArch64/SVE2/fminnmp.s | 2 +- llvm/test/MC/AArch64/SVE2/fminp.s | 2 +- llvm/test/MC/AArch64/SVE2/fmlalb.s | 2 +- llvm/test/MC/AArch64/SVE2/fmlalt.s | 2 +- llvm/test/MC/AArch64/SVE2/fmlslb.s | 2 +- llvm/test/MC/AArch64/SVE2/fmlslt.s | 2 +- llvm/test/MC/AArch64/SVE2/histcnt.s | 2 +- llvm/test/MC/AArch64/SVE2/histseg.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1b.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1d.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1h.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1sb.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1sh.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1sw.s | 2 +- llvm/test/MC/AArch64/SVE2/ldnt1w.s | 2 +- llvm/test/MC/AArch64/SVE2/match.s | 2 +- llvm/test/MC/AArch64/SVE2/mla.s | 2 +- llvm/test/MC/AArch64/SVE2/mls.s | 2 +- llvm/test/MC/AArch64/SVE2/mul.s | 2 +- llvm/test/MC/AArch64/SVE2/nbsl.s | 2 +- llvm/test/MC/AArch64/SVE2/nmatch.s | 2 +- llvm/test/MC/AArch64/SVE2/pmul.s | 2 +- llvm/test/MC/AArch64/SVE2/pmullb-128.s | 2 +- llvm/test/MC/AArch64/SVE2/pmullb.s | 2 +- llvm/test/MC/AArch64/SVE2/pmullt-128.s | 2 +- llvm/test/MC/AArch64/SVE2/pmullt.s | 2 +- llvm/test/MC/AArch64/SVE2/raddhnb.s | 2 +- llvm/test/MC/AArch64/SVE2/raddhnt.s | 2 +- llvm/test/MC/AArch64/SVE2/rax1.s | 2 +- llvm/test/MC/AArch64/SVE2/rshrnb.s | 2 +- llvm/test/MC/AArch64/SVE2/rshrnt.s | 2 +- llvm/test/MC/AArch64/SVE2/rsubhnb.s | 2 +- llvm/test/MC/AArch64/SVE2/rsubhnt.s | 2 +- llvm/test/MC/AArch64/SVE2/saba.s | 2 +- llvm/test/MC/AArch64/SVE2/sabalb.s | 2 +- llvm/test/MC/AArch64/SVE2/sabalt.s | 2 +- llvm/test/MC/AArch64/SVE2/sabdlb.s | 2 +- llvm/test/MC/AArch64/SVE2/sabdlt.s | 2 +- llvm/test/MC/AArch64/SVE2/sadalp.s | 2 +- llvm/test/MC/AArch64/SVE2/saddlb.s | 2 +- llvm/test/MC/AArch64/SVE2/saddlbt.s | 2 +- llvm/test/MC/AArch64/SVE2/saddlt.s | 2 +- llvm/test/MC/AArch64/SVE2/saddwb.s | 2 +- llvm/test/MC/AArch64/SVE2/saddwt.s | 2 +- llvm/test/MC/AArch64/SVE2/sbclb.s | 2 +- llvm/test/MC/AArch64/SVE2/sbclt.s | 2 +- llvm/test/MC/AArch64/SVE2/shadd.s | 2 +- llvm/test/MC/AArch64/SVE2/shrnb.s | 2 +- llvm/test/MC/AArch64/SVE2/shrnt.s | 2 +- llvm/test/MC/AArch64/SVE2/shsub.s | 2 +- llvm/test/MC/AArch64/SVE2/shsubr.s | 2 +- llvm/test/MC/AArch64/SVE2/sli.s | 2 +- llvm/test/MC/AArch64/SVE2/sm4e.s | 2 +- llvm/test/MC/AArch64/SVE2/sm4ekey.s | 2 +- llvm/test/MC/AArch64/SVE2/smaxp.s | 2 +- llvm/test/MC/AArch64/SVE2/sminp.s | 2 +- llvm/test/MC/AArch64/SVE2/smlalb.s | 2 +- llvm/test/MC/AArch64/SVE2/smlalt.s | 2 +- llvm/test/MC/AArch64/SVE2/smlslb.s | 2 +- llvm/test/MC/AArch64/SVE2/smlslt.s | 2 +- llvm/test/MC/AArch64/SVE2/smulh.s | 2 +- llvm/test/MC/AArch64/SVE2/smullb.s | 2 +- llvm/test/MC/AArch64/SVE2/smullt.s | 2 +- llvm/test/MC/AArch64/SVE2/splice.s | 2 +- llvm/test/MC/AArch64/SVE2/sqabs.s | 2 +- llvm/test/MC/AArch64/SVE2/sqadd.s | 2 +- llvm/test/MC/AArch64/SVE2/sqcadd.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmlalb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmlalbt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmlalt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmlslb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmlslbt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmlslt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmulh.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmullb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqdmullt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqneg.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrdcmlah.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrdmlah.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrdmlsh.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrdmulh.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrshl.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrshlr.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrshrnb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrshrnt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrshrunb.s | 2 +- llvm/test/MC/AArch64/SVE2/sqrshrunt.s | 2 +- llvm/test/MC/AArch64/SVE2/sqshl.s | 2 +- llvm/test/MC/AArch64/SVE2/sqshlr.s | 2 +- llvm/test/MC/AArch64/SVE2/sqshlu.s | 2 +- llvm/test/MC/AArch64/SVE2/sqshrnb.s | 2 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[...] create mode 100644 clang-tools-extra/docs/clang-tidy/checks/readability/convert-me [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-delete-null-pointer.r [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-duplicate-include.rst [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-else-after-return.rst [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-function-cognitive-co [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-function-size.rst => [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-identifier-length.rst [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-identifier-naming.rst [...] create mode 100644 clang-tools-extra/docs/clang-tidy/checks/readability/implicit-b [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-implicit-bool-convers [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-inconsistent-declarat [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-isolate-declaration.r [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-magic-numbers.rst => [...] create mode 100644 clang-tools-extra/docs/clang-tidy/checks/readability/make-membe [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-misleading-indentatio [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-misplaced-array-index [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-named-parameter.rst = [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-non-const-parameter.r [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-qualified-auto.rst => [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-redundant-access-spec [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-redundant-control-flo [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-redundant-declaration [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-redundant-function-pt [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-redundant-member-init [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-redundant-preprocesso [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-redundant-smartptr-ge [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-redundant-string-cstr [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-redundant-string-init [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-simplify-boolean-expr [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-simplify-subscript-ex [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-static-accessed-throu [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-static-definition-in- [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-string-compare.rst => [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-suspicious-call-argum [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-uniqueptr-delete-rele [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-uppercase-literal-suf [...] rename clang-tools-extra/docs/clang-tidy/checks/{readability-use-anyofallof.rst => [...] rename clang-tools-extra/docs/clang-tidy/checks/{zircon-temporary-objects.rst => z [...] create mode 100644 clang/test/Analysis/uninit-structured-binding-struct.cpp create mode 100644 clang/test/ClangScanDeps/submodule-order.c create mode 100644 clang/test/CodeGen/PowerPC/builtins-ppc-quadword-char.c create mode 100644 clang/test/CodeGen/aarch64-attr-mode-complex.c create mode 100644 clang/test/CodeGen/aarch64-attr-mode-float.c create mode 100644 clang/test/CodeGen/kmsan-param-retval.c create mode 100644 clang/test/CodeGenObjC/asm.m create mode 100644 clang/test/CodeGenOpenCL/builtins-amdgcn-dl-insts-gfx11.cl create mode 100644 clang/test/Modules/decl-attr-merge.mm create mode 100644 clang/test/OpenMP/parallel_masked_ast_print.cpp create mode 100644 clang/test/OpenMP/parallel_masked_copyin_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_default_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_firstprivate_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_if_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_message.cpp create mode 100644 clang/test/OpenMP/parallel_masked_num_threads_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_private_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_proc_bind_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_reduction_messages.cpp create mode 100644 clang/test/OpenMP/parallel_masked_shared_messages.cpp rename compiler-rt/{lib => include}/orc/c_api.h (100%) delete mode 100644 compiler-rt/lib/sanitizer_common/sanitizer_openbsd.cpp create mode 100644 compiler-rt/test/asan/TestCases/global-location-nodebug.cpp create mode 100644 flang/test/Fir/embox-write.fir create mode 100644 libc/docs/math.rst create mode 100644 libc/src/stdio/printf_core/converter_utils.h create mode 100644 libc/src/stdio/printf_core/hex_converter.h create mode 100644 libc/src/stdio/printf_core/ptr_converter.h create mode 100644 libcxx/benchmarks/algorithms/ranges_sort.bench.cpp create mode 100644 libcxx/include/__algorithm/make_projected.h create mode 100644 libcxx/include/__algorithm/ranges_sort.h create mode 100644 libcxx/include/__functional/boyer_moore_searcher.h create mode 100644 libcxx/test/libcxx/algorithms/robust_against_cpp20_hostile_iter [...] create mode 100644 libcxx/test/libcxx/iterators/unwrap_iter.pass.cpp create mode 100644 libcxx/test/std/algorithms/alg.sorting/alg.sort/sort/ranges.sor [...] delete mode 100644 libcxx/test/std/experimental/filesystem/lit.local.cfg create mode 100644 lld/test/MachO/invalid/undef-multi.s delete mode 100644 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[...] create mode 100644 lldb/test/API/commands/trace/intelpt-multi-core-trace/modules/m.out create mode 100644 lldb/test/API/commands/trace/intelpt-multi-core-trace/multi_thread.cpp create mode 100644 lldb/test/API/commands/trace/intelpt-multi-core-trace/trace.json create mode 100644 lldb/test/API/commands/trace/intelpt-multi-core-trace/trace_mis [...] create mode 100644 lldb/test/API/commands/trace/intelpt-multi-core-trace/trace_wit [...] delete mode 100644 lldb/unittests/Core/StreamCallbackTest.cpp create mode 100644 llvm/docs/DirectXUsage.rst create mode 100644 llvm/include/llvm/DebugInfo/DWARF/DWARFTypePrinter.h create mode 100644 llvm/include/llvm/DebugInfo/Symbolize/Markup.h create mode 100644 llvm/include/llvm/MC/MCDXContainerStreamer.h create mode 100644 llvm/include/llvm/MC/MCDXContainerWriter.h create mode 100644 llvm/include/llvm/MC/MCSectionDXContainer.h create mode 100644 llvm/lib/DebugInfo/DWARF/DWARFTypePrinter.cpp create mode 100644 llvm/lib/DebugInfo/Symbolize/Markup.cpp create mode 100644 llvm/lib/MC/MCDXContainerStreamer.cpp create mode 100644 llvm/lib/MC/MCDXContainerWriter.cpp create mode 100644 llvm/lib/MC/MCSectionDXContainer.cpp create mode 100644 llvm/lib/Target/DirectX/DXILStubs.td create mode 100644 llvm/lib/Target/DirectX/DirectXAsmPrinter.cpp create mode 100644 llvm/lib/Target/DirectX/DirectXFrameLowering.h create mode 100644 llvm/lib/Target/DirectX/DirectXInstrInfo.cpp create mode 100644 llvm/lib/Target/DirectX/DirectXInstrInfo.h create mode 100644 llvm/lib/Target/DirectX/DirectXRegisterInfo.cpp create mode 100644 llvm/lib/Target/DirectX/DirectXRegisterInfo.h create mode 100644 llvm/lib/Target/DirectX/MCTargetDesc/DirectXContainerObjectWriter.cpp create mode 100644 llvm/lib/Target/DirectX/MCTargetDesc/DirectXContainerObjectWriter.h create mode 100644 llvm/lib/Target/DirectX/MCTargetDesc/DirectXMCTargetDesc.h create mode 100644 llvm/test/Analysis/LoopCacheAnalysis/compute-cost.ll create mode 100644 llvm/test/CodeGen/AArch64/sme-intrinsics-rdsvl.ll delete mode 100644 llvm/test/CodeGen/AArch64/sve-fixed-length-float-compares.ll create mode 100644 llvm/test/CodeGen/AArch64/sve-fixed-length-fp-compares.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.cd.g16.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.inreg.ll delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot4.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sudot8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.di [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.lds.pa [...] create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.add.gs.reg.rtn.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.sub.gs.reg.rtn.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.row.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.a16.dim.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.dim.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.encode.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.cd.g16.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.interp.inreg.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.direct.load.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.lds.param.load.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot4.ll create mode 100644 llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sudot8.ll create mode 100644 llvm/test/CodeGen/AMDGPU/merge-image-load-gfx11.mir create mode 100644 llvm/test/CodeGen/AMDGPU/merge-image-sample-gfx11.mir create mode 100644 llvm/test/CodeGen/AMDGPU/partial-forwarding-hazards.mir create mode 100644 llvm/test/CodeGen/AMDGPU/trans-forwarding-hazards.mir create mode 100644 llvm/test/CodeGen/PowerPC/LQ-STQ-32bit-offset.ll create mode 100644 llvm/test/CodeGen/PowerPC/LQ-STQ.ll create mode 100644 llvm/test/CodeGen/PowerPC/mtvsrc-mfvscr-PPCVSXSwapRemoval.ll create mode 100644 llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.ll create mode 100644 llvm/test/CodeGen/RISCV/early-clobber-tied-def-subreg-liveness.mir create mode 100644 llvm/test/CodeGen/RISCV/machine-cp.mir create mode 100644 llvm/test/CodeGen/RISCV/rvv/implicit-def-copy.ll create mode 100644 llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16.s create mode 100644 llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8.s create mode 100644 llvm/test/MC/Disassembler/AMDGPU/gfx11_asm_vop3_dpp16.txt create mode 100644 llvm/test/MC/Disassembler/AMDGPU/gfx11_asm_vop3_dpp8.txt create mode 100644 llvm/test/Transforms/Inline/ML/skip-unreachable.ll create mode 100644 llvm/test/Transforms/InstCombine/memchr-7.ll create mode 100644 llvm/test/Transforms/InstCombine/memcmp-5.ll create mode 100644 llvm/test/Transforms/InstCombine/memcmp-6.ll create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/gather-do-not-vector [...] create mode 100644 llvm/test/Transforms/MergeFunc/merge-used.ll create mode 100644 llvm/test/Transforms/SCCP/strictfp-phis-fcmp.ll create mode 100644 llvm/test/Transforms/SCCP/strictfp-phis-fcmps.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/root-trunc-extract-reuse.ll create mode 100644 llvm/test/tools/llvm-reduce/remove-operands-fp.ll create mode 100644 llvm/test/tools/llvm-reduce/simplify-instructions.ll create mode 100644 llvm/tools/llvm-reduce/deltas/SimplifyInstructions.cpp create mode 100644 llvm/tools/llvm-reduce/deltas/SimplifyInstructions.h create mode 100644 llvm/unittests/DebugInfo/Symbolizer/CMakeLists.txt create mode 100644 llvm/unittests/DebugInfo/Symbolizer/MarkupTest.cpp create mode 100644 llvm/utils/gn/secondary/llvm/unittests/DebugInfo/Symbolizer/BUILD.gn create mode 100644 mlir/include/mlir/Dialect/LLVMIR/Transforms/RequestCWrappers.h create mode 100644 mlir/include/mlir/Dialect/NVGPU/IR/CMakeLists.txt rename mlir/include/mlir/Dialect/NVGPU/{ => IR}/NVGPU.td (100%) create mode 100644 mlir/include/mlir/Dialect/NVGPU/IR/NVGPUDialect.h delete mode 100644 mlir/include/mlir/Dialect/NVGPU/NVGPUDialect.h create mode 100644 mlir/include/mlir/Dialect/NVGPU/Passes.h create mode 100644 mlir/include/mlir/Dialect/NVGPU/Passes.td create mode 100644 mlir/include/mlir/Dialect/NVGPU/Transforms/Transforms.h create mode 100644 mlir/lib/Dialect/LLVMIR/Transforms/RequestCWrappers.cpp create mode 100644 mlir/lib/Dialect/NVGPU/Transforms/CMakeLists.txt create mode 100644 mlir/lib/Dialect/NVGPU/Transforms/OptimizeSharedMemory.cpp create mode 100644 mlir/lib/Dialect/NVGPU/Transforms/PassDetail.h create mode 100644 mlir/python/mlir/dialects/ComplexOps.td create mode 100644 mlir/python/mlir/dialects/complex.py create mode 100644 mlir/test/Conversion/FuncToLLVM/emit-c-wrappers-for-external-ca [...] create mode 100644 mlir/test/Conversion/FuncToLLVM/emit-c-wrappers-for-external-fu [...] delete mode 100644 mlir/test/Conversion/StandardToLLVM/emit-c-wrappers-for-externa [...] delete mode 100644 mlir/test/Conversion/StandardToLLVM/emit-c-wrappers-for-externa [...] create mode 100644 mlir/test/Dialect/LLVMIR/request-c-wrappers.mlir create mode 100644 mlir/test/Dialect/NVGPU/optimize-shared-memory.mlir create mode 100644 mlir/test/Integration/Dialect/SparseTensor/CPU/dense_output_bf16.mlir create mode 100644 mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_sum_bf16.mlir create mode 100644 mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_triangula [...] create mode 100644 mlir/test/Integration/Dialect/SparseTensor/taco/test_tensor_complex.py create mode 100644 mlir/test/python/dialects/complex_dialect.py -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/glibc] branch linaro-local/ci/tcwg_bmk_llvm_sq/llvm-master-aarch64-cpu2017-Os updated (89a25c6f64 -> e5446dfea1)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_sq/llvm-master-aarch64-cpu2017-Os in repository toolchain/ci/glibc. from 89a25c6f64 x86: Cleanup bounds checking in large memcpy case adds 57919813e7 riscv: Change the relocations handled for RTLD_BOOTSTRAP adds e89913d0aa aarch64: Handle fewer relocations for RTLD_BOOTSTRAP adds 4ef05df5ef x86-64: Handle fewer relocation types for RTLD_BOOTSTRAP adds 8da9f346cb x86: Add BMI1/BMI2 checks for ISA_V3 check adds c22eb807b0 x86: Rename generic functions with unique postfix for clarity adds 33ead02758 elf: Silence GCC 11/12 false positive warning adds e5446dfea1 i386: Fix include paths for strspn, strcspn, and strpbrk No new revisions were added by this update. Summary of changes: elf/dl-load.c | 10 +++++++ sysdeps/aarch64/dl-machine.h | 33 ++++++++++------------ sysdeps/i386/i686/multiarch/strcspn-c.c | 4 +-- sysdeps/i386/i686/multiarch/strpbrk-c.c | 4 +-- sysdeps/i386/i686/multiarch/strspn-c.c | 4 +-- sysdeps/riscv/dl-machine.h | 23 +++++++-------- sysdeps/x86/isa-level.c | 3 +- sysdeps/x86_64/dl-machine.h | 32 ++++----------------- sysdeps/x86_64/multiarch/Makefile | 33 +++++++++++----------- sysdeps/x86_64/multiarch/ifunc-avx2.h | 8 ++++-- sysdeps/x86_64/multiarch/ifunc-impl-list.c | 18 ++++++------ sysdeps/x86_64/multiarch/ifunc-sse4_2.h | 4 +-- sysdeps/x86_64/multiarch/ifunc-strcpy.h | 8 ++++-- sysdeps/x86_64/multiarch/ifunc-wcslen.h | 8 ++++-- sysdeps/x86_64/multiarch/stpncpy-c.c | 7 ----- .../multiarch/{strpbrk-c.c => stpncpy-generic.c} | 14 +++++---- sysdeps/x86_64/multiarch/stpncpy.c | 1 + .../{strcspn-sse2.c => strcspn-generic.c} | 2 +- .../multiarch/{strcspn-c.c => strcspn-sse4.c} | 8 +++--- sysdeps/x86_64/multiarch/strncat-c.c | 2 -- .../multiarch/{strpbrk-c.c => strncat-generic.c} | 9 +++--- sysdeps/x86_64/multiarch/strncat.c | 1 + sysdeps/x86_64/multiarch/strncpy-c.c | 5 ---- .../multiarch/{strpbrk-c.c => strncpy-generic.c} | 12 ++++---- sysdeps/x86_64/multiarch/strncpy.c | 1 + .../{strpbrk-sse2.c => strpbrk-generic.c} | 2 +- .../multiarch/{strpbrk-c.c => strpbrk-sse4.c} | 4 +-- .../multiarch/{strspn-sse2.c => strspn-generic.c} | 2 +- .../x86_64/multiarch/{strspn-c.c => strspn-sse4.c} | 4 +-- sysdeps/x86_64/multiarch/wcscpy-c.c | 5 ---- .../multiarch/{strpbrk-c.c => wcscpy-generic.c} | 12 ++++---- sysdeps/x86_64/multiarch/wcscpy.c | 4 +-- .../{wcsncmp-sse2.c => wcsncmp-generic.c} | 4 +-- sysdeps/x86_64/multiarch/wcsncmp.c | 2 ++ sysdeps/x86_64/multiarch/wcsnlen-c.c | 9 ------ .../multiarch/{strpbrk-c.c => wcsnlen-generic.c} | 16 +++++++---- sysdeps/x86_64/multiarch/wcsnlen.c | 1 + 37 files changed, 154 insertions(+), 165 deletions(-) delete mode 100644 sysdeps/x86_64/multiarch/stpncpy-c.c copy sysdeps/x86_64/multiarch/{strpbrk-c.c => stpncpy-generic.c} (80%) rename sysdeps/x86_64/multiarch/{strcspn-sse2.c => strcspn-generic.c} (96%) rename sysdeps/x86_64/multiarch/{strcspn-c.c => strcspn-sse4.c} (96%) delete mode 100644 sysdeps/x86_64/multiarch/strncat-c.c copy sysdeps/x86_64/multiarch/{strpbrk-c.c => strncat-generic.c} (83%) delete mode 100644 sysdeps/x86_64/multiarch/strncpy-c.c copy sysdeps/x86_64/multiarch/{strpbrk-c.c => strncpy-generic.c} (83%) rename sysdeps/x86_64/multiarch/{strpbrk-sse2.c => strpbrk-generic.c} (96%) copy sysdeps/x86_64/multiarch/{strpbrk-c.c => strpbrk-sse4.c} (92%) rename sysdeps/x86_64/multiarch/{strspn-sse2.c => strspn-generic.c} (96%) rename sysdeps/x86_64/multiarch/{strspn-c.c => strspn-sse4.c} (97%) delete mode 100644 sysdeps/x86_64/multiarch/wcscpy-c.c copy sysdeps/x86_64/multiarch/{strpbrk-c.c => wcscpy-generic.c} (83%) rename sysdeps/x86_64/multiarch/{wcsncmp-sse2.c => wcsncmp-generic.c} (92%) delete mode 100644 sysdeps/x86_64/multiarch/wcsnlen-c.c rename sysdeps/x86_64/multiarch/{strpbrk-c.c => wcsnlen-generic.c} (82%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

2 years, 10 months

[toolchain/ci/linux] branch linaro-local/ci/tcwg_bmk_llvm_sq/llvm-master-aarch64-cpu2017-Os updated (b9e4d8bc160d -> ea0b109ca823)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_sq/llvm-master-aarch64-cpu2017-Os in repository toolchain/ci/linux. from b9e4d8bc160d Merge v5.18.4 adds 2a00e432ef05 Documentation: Add documentation for Processor MMIO Stale Data adds d88769c6dd78 x86/speculation/mmio: Enumerate Processor MMIO Stale Data bug adds 647afa778f7a x86/speculation: Add a common function for MD_CLEAR mitiga [...] adds bc4d37b2338a x86/speculation/mmio: Add mitigation for Processor MMIO St [...] adds e3718d0753ff x86/bugs: Group MDS, TAA & Processor MMIO Stale Data mitigations adds 8547d4ae6a95 x86/speculation/mmio: Enable CPU Fill buffer clearing on idle adds 1baf738f30ee x86/speculation/mmio: Add sysfs reporting for Processor MM [...] adds bafc2b2727b4 x86/speculation/srbds: Update SRBDS mitigation selection adds dce28a791e96 x86/speculation/mmio: Reuse SRBDS mitigation for SBDS adds 0b4bd3f44c67 KVM: x86/speculation: Disable Fill buffer clear within guests adds 4064fc1ce85e x86/speculation/mmio: Print SMT warning adds 71563d69a8ec Linux 5.18.5 adds ea0b109ca823 Merge v5.18.5 No new revisions were added by this update. Summary of changes: Documentation/ABI/testing/sysfs-devices-system-cpu | 1 + Documentation/admin-guide/hw-vuln/index.rst | 1 + .../hw-vuln/processor_mmio_stale_data.rst | 246 +++++++++++++++++++++ Documentation/admin-guide/kernel-parameters.txt | 36 +++ Makefile | 2 +- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/include/asm/msr-index.h | 25 +++ arch/x86/include/asm/nospec-branch.h | 2 + arch/x86/kernel/cpu/bugs.c | 235 +++++++++++++++++--- arch/x86/kernel/cpu/common.c | 52 ++++- arch/x86/kvm/vmx/vmx.c | 72 ++++++ arch/x86/kvm/vmx/vmx.h | 2 + arch/x86/kvm/x86.c | 3 + drivers/base/cpu.c | 8 + include/linux/cpu.h | 3 + tools/arch/x86/include/asm/cpufeatures.h | 1 + tools/arch/x86/include/asm/msr-index.h | 25 +++ 17 files changed, 675 insertions(+), 40 deletions(-) create mode 100644 Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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Tcwg-commits June 2022