July 2022 - Tcwg-commits - lists.linaro.org

[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_build/master-arm updated (3118e828 -> 1cb5ff93)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-arm in repository toolchain/ci/base-artifacts. discards 3118e828 2: update: binutils-gcc-linux-glibc-gdb-qemu: 4 new 1cb5ff93 2: update: binutils-a2a176c46bcb739db47c88b5641a23c1129accf0: 4 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (3118e828) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_build/master-a [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1804 -> 1580 bytes 02-prepare_abe/console.log.xz | Bin 2732 -> 2712 bytes 04-build_abe-binutils/console.log.xz | Bin 30628 -> 31168 bytes 05-build_abe-stage1/console.log.xz | Bin 91276 -> 93620 bytes 06-clean_sysroot/console.log.xz | Bin 332 -> 332 bytes 07-build_abe-linux/console.log.xz | Bin 9256 -> 11380 bytes 08-build_abe-glibc/console.log.xz | Bin 235816 -> 232516 bytes 09-build_abe-stage2/console.log.xz | Bin 193024 -> 193596 bytes 12-check_regression/console.log.xz | Bin 416 -> 416 bytes 13-update_baseline/console.log | 110 +++++++++++++++++------------------ jenkins/manifest.sh | 15 ++--- 11 files changed, 60 insertions(+), 65 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk_gnu_fx/gnu-master-aarch64-cpu2017-O3 updated (366490c8 -> 5e5ba512)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_gnu_fx/gnu-master-aarch64-cpu2017-O3 in repository toolchain/ci/base-artifacts. discards 366490c8 0: update: : 1 new 5e5ba512 0: update: : 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (366490c8) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_bmk_gnu_fx/gnu-master-aa [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1644 -> 1612 bytes 02-prepare_abe/console.log.xz | Bin 2740 -> 2736 bytes 03-build_abe-binutils/console.log.xz | Bin 30276 -> 30884 bytes 04-build_abe-stage1/console.log.xz | Bin 74752 -> 76748 bytes 05-clean_sysroot/console.log.xz | Bin 332 -> 332 bytes 06-build_abe-linux/console.log.xz | Bin 11296 -> 11080 bytes 07-build_abe-glibc/console.log.xz | Bin 237460 -> 239664 bytes 08-build_abe-stage2/console.log.xz | Bin 178004 -> 184688 bytes 09-benchmark/benchmark-build.log | 78 +- 09-benchmark/benchmark.log | 76 +- 09-benchmark/console.log.xz | Bin 3668 -> 3680 bytes 10-check_regression/console.log.xz | Bin 2924 -> 2920 bytes 10-check_regression/csv-results-0/md5sum.csv | 70 +- 10-check_regression/csv-results-0/perf.csv | 283 +- 10-check_regression/csv-results-0/results.csv | 3865 +-- 10-check_regression/csv-results-0/size.csv | 42550 +++++++++++------------- 10-check_regression/csv-results-0/vect.csv | 20 +- 10-check_regression/csv-results-1/md5sum.csv | 70 +- 10-check_regression/csv-results-1/perf.csv | 293 +- 10-check_regression/csv-results-1/results.csv | 315 +- 10-check_regression/csv-results-1/size.csv | 39030 +++++++++++----------- 10-check_regression/csv-results-1/vect.csv | 20 +- 10-check_regression/results-brief.csv | 8 +- 10-check_regression/results-full.csv | 317 +- 10-check_regression/results-internal.csv | 32 +- 10-check_regression/results.log | 620 +- 11-update_baseline/console.log | 1736 +- 11-update_baseline/csv-results-0/md5sum.csv | 70 +- 11-update_baseline/csv-results-0/perf.csv | 283 +- 11-update_baseline/csv-results-0/results.csv | 3865 +-- 11-update_baseline/csv-results-0/size.csv | 42550 +++++++++++------------- 11-update_baseline/csv-results-0/vect.csv | 20 +- 11-update_baseline/csv-results-1/md5sum.csv | 70 +- 11-update_baseline/csv-results-1/perf.csv | 293 +- 11-update_baseline/csv-results-1/results.csv | 315 +- 11-update_baseline/csv-results-1/size.csv | 39030 +++++++++++----------- 11-update_baseline/csv-results-1/vect.csv | 20 +- 11-update_baseline/results-brief.csv | 8 +- 11-update_baseline/results-full.csv | 317 +- 11-update_baseline/results-internal.csv | 32 +- 11-update_baseline/results.log | 604 +- jenkins/manifest.sh | 4 +- results | 2 +- results_id | 2 +- 44 files changed, 81473 insertions(+), 95395 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[binutils-gdb] branch master updated (a2a176c46bc -> c0abbd96b4d)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository binutils-gdb. from a2a176c46bc Fix pedantically invalid DWARF in gdb.trace/unavailable-dwa [...] new c0abbd96b4d gdb: fix {rs6000_nat_target,aix_thread_target}::wait to not [...] The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: gdb/aix-thread.c | 59 +++++++++++++++++++++++++--------------------------- gdb/rs6000-aix-nat.c | 7 +++---- 2 files changed, 31 insertions(+), 35 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/qemu] branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 updated (8e9398e3b1 -> a74c66b1b9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/qemu. from 8e9398e3b1 Merge tag 'pull-ppc-20220706' of https://gitlab.com/danielhb [...] adds c06fc7ce14 io_uring: fix short read slow path adds be6a166fde block/io_uring: clarify that short reads can happen adds a74c66b1b9 Merge tag 'block-pull-request' of https://gitlab.com/stefanh [...] No new revisions were added by this update. Summary of changes: block/io_uring.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 updated (1bb1f55d64 -> a2a176c46b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/gdb. from 1bb1f55d64 gprofng: adjust GPROFNG_VARIANT adds 045f385d9a RISC-V: Added Zfhmin and Zhinxmin. adds 88de583569 gdb: LoongArch: Implement the push_dummy_call gdbarch method adds 309e147fbd GDB/testsuite: Add coverage for `print -elements' command adds 83f477f25a gdb: LoongArch: Fix typos in code comments adds a2a176c46b Fix pedantically invalid DWARF in gdb.trace/unavailable-dwar [...] No new revisions were added by this update. Summary of changes: bfd/elfxx-riscv.c | 97 ++-- .../gas/riscv/zfhmin-d-insn-class-fail-1.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-1.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-2.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-2.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-3.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-3.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-4.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-4.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-5.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-5.l | 2 + gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s | 4 + .../gas/riscv/{fp-zhinx-insns.d => zhinx.d} | 35 +- .../gas/riscv/{fp-zhinx-insns.s => zhinx.s} | 32 +- gdb/loongarch-tdep.c | 596 +++++++++++++++++++++ gdb/loongarch-tdep.h | 2 + gdb/testsuite/gdb.base/printcmds.exp | 9 + .../gdb.trace/unavailable-dwarf-piece.exp | 4 +- include/opcode/riscv.h | 7 +- opcodes/riscv-opc.c | 126 ++--- 20 files changed, 792 insertions(+), 145 deletions(-) create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s rename gas/testsuite/gas/riscv/{fp-zhinx-insns.d => zhinx.d} (82%) rename gas/testsuite/gas/riscv/{fp-zhinx-insns.s => zhinx.s} (85%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 updated (7922f5ee649 -> 9fc61fc8da9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/gcc. from 7922f5ee649 Mips: Fix the ASAN shadow offset hook for the n32 ABI adds e5a9d603178 Speed up LC SSA rewrite adds 1e1fdb729d9 Speed up LC SSA rewrite more adds c1b1c4e58bd testsuite: Fix incorrect -mfloat128-type option adds 8bc24394376 target/106219 - proprly mark builtins pure via ix86_add_new [...] adds 99831ceb872 Adjust 'libgomp.c-c++-common/requires-3.c' adds 5647e2c3853 Enhance 'libgomp.c-c++-common/requires-4.c', 'libgomp.c-c++ [...] adds 9ef714539cb Fix Intel MIC 'mkoffload' for OpenMP 'requires' adds 9fc61fc8da9 Speedup update-ssa some more No new revisions were added by this update. Summary of changes: gcc/config/i386/i386-builtins.cc | 2 + gcc/config/i386/intelmic-mkoffload.cc | 56 +++++++--- gcc/testsuite/g++.dg/pr106219.C | 31 ++++++ .../gcc.target/powerpc/ppc-fortran/pr80108-1.f90 | 2 +- gcc/tree-into-ssa.cc | 36 ++++--- gcc/tree-ssa-loop-manip.cc | 119 +++++++++++++-------- libgomp/target.c | 4 + libgomp/testsuite/lib/libgomp.exp | 5 + .../testsuite/libgomp.c-c++-common/requires-1.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-3.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-4.c | 21 +++- .../testsuite/libgomp.c-c++-common/requires-5.c | 22 ++-- .../testsuite/libgomp.c-c++-common/requires-7.c | 2 +- libgomp/testsuite/libgomp.fortran/requires-1.f90 | 2 +- 14 files changed, 216 insertions(+), 90 deletions(-) create mode 100644 gcc/testsuite/g++.dg/pr106219.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 updated (1bb1f55d64 -> a2a176c46b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/binutils-gdb. from 1bb1f55d64 gprofng: adjust GPROFNG_VARIANT adds 045f385d9a RISC-V: Added Zfhmin and Zhinxmin. adds 88de583569 gdb: LoongArch: Implement the push_dummy_call gdbarch method adds 309e147fbd GDB/testsuite: Add coverage for `print -elements' command adds 83f477f25a gdb: LoongArch: Fix typos in code comments adds a2a176c46b Fix pedantically invalid DWARF in gdb.trace/unavailable-dwar [...] No new revisions were added by this update. Summary of changes: bfd/elfxx-riscv.c | 97 ++-- .../gas/riscv/zfhmin-d-insn-class-fail-1.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-1.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-2.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-2.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-3.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-3.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-4.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-4.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-5.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-5.l | 2 + gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s | 4 + .../gas/riscv/{fp-zhinx-insns.d => zhinx.d} | 35 +- .../gas/riscv/{fp-zhinx-insns.s => zhinx.s} | 32 +- gdb/loongarch-tdep.c | 596 +++++++++++++++++++++ gdb/loongarch-tdep.h | 2 + gdb/testsuite/gdb.base/printcmds.exp | 9 + .../gdb.trace/unavailable-dwarf-piece.exp | 4 +- include/opcode/riscv.h | 7 +- opcodes/riscv-opc.c | 126 ++--- 20 files changed, 792 insertions(+), 145 deletions(-) create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s rename gas/testsuite/gas/riscv/{fp-zhinx-insns.d => zhinx.d} (82%) rename gas/testsuite/gas/riscv/{fp-zhinx-insns.s => zhinx.s} (85%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 updated (7b67e521 -> 222756e9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_build/master-aarch64 in repository toolchain/ci/base-artifacts. discards 7b67e521 2: update: binutils-gcc-linux-glibc-gdb-qemu: 4 new 222756e9 2: update: binutils-gcc-linux-glibc-gdb-qemu: 4 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (7b67e521) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gnu_cross_build/master-a [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1644 -> 1684 bytes 02-prepare_abe/console.log.xz | Bin 2752 -> 2748 bytes 04-build_abe-binutils/console.log.xz | Bin 31172 -> 30896 bytes 05-build_abe-stage1/console.log.xz | Bin 73456 -> 72828 bytes 07-build_abe-linux/console.log.xz | Bin 8952 -> 8996 bytes 08-build_abe-glibc/console.log.xz | Bin 240048 -> 239924 bytes 09-build_abe-stage2/console.log.xz | Bin 160800 -> 160908 bytes 12-check_regression/console.log.xz | Bin 416 -> 416 bytes 13-update_baseline/console.log | 82 +++++++++++++++++------------------ jenkins/manifest.sh | 18 ++++---- 10 files changed, 50 insertions(+), 50 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-norov-defconfig updated (b2e9684fe4d1 -> dc969061c68e)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-norov-defconfig in repository toolchain/ci/llvm-project. from b2e9684fe4d1 [RISCV] isel (shl (and X, C2), C) -> (slli (srliw X, C3), C3+C). adds 7fc4518f4a70 [MLIR] Rename FusePadOpWithLinalgConsumer -> FusePadOpWith [...] adds 23ee84f43201 [globalisel] Add test case for regbank selection. adds b0da3c6fa44b [VPlan] Move setDebugLocFromInst to VPTransformState (NFC). adds 5d787689b145 [RISCV] Match RISCVISD::ADD_LO in SelectAddrRegImm. adds 5148c685e3bb [mlir][complex] Inverse canonicalization between exp and log adds 7788b0c09754 [lsan] malloc_usable_size returns 0 for nullptr adds 7e4ab9d5b8b8 [RISCV] Add more SHXADD isel patterns. adds 1ecfc12b0c67 [Bazel] Make `builtin_headers_gen` as subset of CMake's `c [...] adds f7819ce166bc [FPEnv] Allow CompoundStmt to keep FP options adds 8679cbc29fb7 Reland "[NFC] Add a missing test for for clang-repl" adds 022bd92c78ed [LowerMatrixMultiplication] Switch dummy values from undef [...] adds 6956840b5c00 Revert "Reland "[NFC] Add a missing test for for clang-repl"" adds 0f45eaf0da1f [RISCV] Add a scavenge spill slot when use ADDI to compute [...] adds 53dc0f107877 [NFC] Switch a few uses of undef to poison as placeholders [...] adds d100a30a5406 [AArch64] Regenerate more tests. NFC adds d71a8bb157ea [MLIR][Affine] Allow affine-expr on RHS in IntegerSet adds 13d58ff9f373 [RISCV] Replace call to APInt::countTrailingZeros with uin [...] adds 2aea8af25136 [libc++] Make _LIBCPP_DEBUG_RANDOMIZE_RANGE a function adds e1f61d864214 [gn build] Port 2aea8af25136 adds c1c3134ac422 [InstCombine] add tests for and-of-negated-lowbitmask; NFC adds f9f40aa10d98 [InstCombine] fold negated low-bit-mask to cmp+select adds b1f0efc06acc [clang-format] Tweak help text a bit adds 134363208b92 [clang] Fix gcc-6 compilation error. (NFC) adds a65a3bffd31f [clang-tidy] Don't treat invalid branches as identical adds f7a80c3d08d4 [clang-tidy] Properly forward clang-tidy output when runni [...] adds 2c3784cff859 [SCEV] recognize llvm.annotation intrinsic adds e98e13ac8f38 [mlir][Vector] Fold ShuffleOp(SplatOp(X), SplatOp(X)) to S [...] adds d2a35e4d39fe [AIX] Handling the label alignment of a global variable wi [...] adds 93d6fdfc232c [Driver] Ignore the clang modules validation-related flags [...] adds 8eb4dcb73747 [RISCV] Move some SHXADD matching cases into a ComplexPatt [...] adds d36e09cfe591 [RISCV] Add more SHXADD patterns. adds 1063dfc02853 [mlir][openmp] Added omp.taskloop adds 7283f48a05de [IR] Remove support for insertvalue constant expression adds b4694229aa9d [LV] Simplify setDebugLocFromInst by using early exit (NFC). adds f0089fae1d7e [AArch64] Add additional tests for D120481. adds 7fbf55c927f2 [mlir][Tensor] Move ParallelInsertSlice to the tensor dialect adds 9604601c9394 [SimplifyCFG] Remove redundant checks for hoisting (NFCI) adds 4887d047a31f [libc++][NFC] Replace enable_if with __enable_if_t in a fe [...] adds 04f6bf482b86 Revise outdated parts of the developer policy. adds 5f0a054f8954 [pseudo] Remove duplicated code in ClangPseudo.cpp adds c9fb3c6ea6cc [mlir][Tensor] Update ParallelInsertSlicOp semantics to ma [...] adds f4dd977537dc [AST] Use canonical constraint declaration for ASTContext: [...] adds 42f5b0509ded [mlir][NFC] Fix various warnings generated by GCC 9 adds cce64e7a9cba [DAG] visitTRUNCATE - move GetDemandedBits AFTER SimplifyD [...] adds f90f0e8fe7f5 [AMDGPU][GFX10][DOC][NFC] Update assembler syntax description adds bf89d24f5319 [AArch64] NFC: Move safe predicate casting to a separate f [...] adds 740633ff08ff [flang] Add TODO for derived types with final procedure adds 4905bcac00e6 [ConstantFolding] Check return value of ConstantFoldInstOp [...] adds 8e70258b18ba [AMDGPUCodeGenPrepare] Check result of ConstantFoldBinaryO [...] adds 19a1e20b8a0f [VectorCombine] Improve shuffle select shuffle-of-shuffles adds 25607d143d1d [libc++] Implement `std::ranges::merge` adds 3912928aa891 [gn build] Port 25607d143d1d adds 32a76fc292d9 [SCEVExpander] Avoid ConstantExpr::get() (NFCI) adds 93cbdaef0455 [Reassociate] Avoid ConstantExpr::get() adds 2de05afc192d [SLP] Peek into loads when hitting the RecursionMaxDepth adds 2ab260eecfab [llvm-ar][test] Add additional MRI script testing adds 4e6c30c8354f [libc] Add a separate algorithm_test. adds d7697c175db9 [flang] Avoid segfault when defining op is not a fir::Convert adds f93cd56262d1 [BPI] Avoid ConstantExpr::get() adds aa78c5298ea3 Fix MLIR Python CMake bug causing duplicate sources target. adds 644a965c1efe [LV] Vectorize cases with larger number of RT checks, exec [...] adds c06d0b4d02ea [RISCV] Add ADDI instr for computing FrameIndex address adds c146af3f469a [LoopVectorize][NFC] Reinstate TTICapture workaround for gcc-6 adds 8471c6861992 [LTO] Update remark test after 644a965c1efef6. adds 89cb8cae606b [Bitcode] Use bitcode input for test (NFC) adds abbd684c02c7 [InstCombine] Avoid ConstantExpr::get() in phi binop fold adds 10ebaf76860e [SLP] add test for load combining + shuffling; NFC adds fdf505f3f223 [mlir][OpenMP] omp.task translation to LLVM IR adds 2bfca3561466 [X86] Disable combineVectorSizedSetCCEquality for soft float. adds 5785717e18d5 [AArch64] Add support for insert/extract for nxv1i1 types. adds 2fde26dfcabe [mlir][Linalg][NFC] Make getReassociationMapForFoldingUnit [...] adds 9eb657278611 [LV] Add back CantReorderMemOps remark. adds c3839c0b46a9 CombineContractBroadcast should not create dims unused in LHS+RHS adds bc70ba814dc1 Use add_llvm_install_targets for install-llvmlibc adds b37dafd5dc83 [pseudo] Store shift and goto actions in a compact structu [...] adds 12d26ce9b0ec [flang] Make code more homogenous in CodeGen adds 47bdf53a5dba [clang-format] Break on AfterColon only if not followed by [...] adds 1ab37d996ce3 [clang-format] Update documentation adds 2a82c15f63d4 [LV] Consider runtime checks profitable if scalar cost is zero. adds 623250b51139 [X86] Regenerate fold-tied-op.ll test checks adds a4e2c1f76295 [Orc][LLJIT] Use JITLink on RISC-V adds b6178ccfe852 [OffloadPackager] Use appropriate kind for LTO bitcode adds 4276d00b1253 [InstCombine] add helper function for sub-of-min/max folds; NFC adds 8ef053273abf [InstCombine] add tests for sub of smin/smax; NFC adds 142aca7741d5 [InstCombine] fold sub of min/max of sub with common operand adds b2b4c8721db0 [InstCombine] Make use of low zero bits to determine exact [...] adds 063500afc0b8 [RISCV][NFC] Merge the isolated decleration into foreach. adds 98c6a3c0c220 [NFC][ASTImporter] remove the unnecessary condition checks [...] adds 85318d328102 [NFC] Remove unused test inputs adds 939352b6ec31 [RISCV][Clang] Teach RISCVEmitter to generate BitCast for [...] adds 5b4851ed9113 [LoongArch] Add codegen support for load/store operations adds b940fe6fe2af [LoongArch] Add codegen support for conditional branches adds 3610d5f5d4c2 [LoongArch] Add initial support for function calls adds 0c01f42fad41 [llvm-objcopy] -O binary: align sh_offset for section chan [...] adds 3e01af093f92 [mlir] Add InferIntRangeInterface to gpu.launch adds 2028fe6fbca6 [lld-macho] Handle LOH_ARM64_ADRP_LDR_GOT optimization hints adds 4996e3f68315 [test] Check for more -fsanitize=array-bounds behavior adds 66790b70ea14 [RISCV] Rename some variables for clarity. NFC adds f27672924e36 [RISCV] Replace an explicit check with an assert. adds 7a550212e8ff [clang-tidy] Fix confusable identifiers interaction with D [...] adds b094c737cd85 [flang] Avoid opaque pointer issue with character array su [...] adds b69c75d53f8d Revert "[VectorCombine] Improve shuffle select shuffle-of- [...] adds 00927334df9a [libc++] Use __is_exactly_{input, forward}_iterator adds 0d0bd17fcfbd [libc++] Fix __split_buffer::__construct_at_end definition [...] adds 4de0680fbf4e Fix use of pointer arithmetic instead of iterators. adds df5c981be35a [mlir][Linalg] Add DropUnitDims support for tensor::Parall [...] adds 774fc6349093 [LV] Consider minimum vscale assmuption for RT check cost. adds dfb77f2e99a1 [LLD][ELF] Add FORCE_LLD_DIAGNOSTICS_CRASH to force LLD to crash adds 77b13a57a930 [AArch64][SME] Add SME addha/va intrinsics adds 00cb1c33ee2e [InstCombine] add negtive tests for (%x & C) == 0 -> %x u< [...] adds dc46ae6df5f7 [lldb] Add support to load object files from thin archives adds b6ad8cbb3575 [gn build] (manually) port dfb77f2e99a1 adds b66220f25aea [InstCombine] [NFC] use C.isNegatedPowerOf2() instead of ( [...] adds 220366d5b545 [gn build] (manually) port 6b3956e123db adds b43dd2f6c4a3 [InstCombine] improve fold for icmp_eq_and to icmp_ult adds 271b470f3f1a [IndVars] Precommit test with redundant FPToSI. adds f8e658ec9ff5 [OpenCL] Remove fast_ half geometric builtins adds f6fa9985900e Fix tests with non-default CLANG_DEFAULT_LINKER adds 1666f09933ee [ARM] Add Support for Cortex-M85 adds ba14e4d65cdd [LLDB] Disable TestGdbRemoteFork* for Arm/AArch64 Linux adds f03b876e7e95 Reland "Reland "[NFC] Add a missing test for for clang-repl"" adds 98e52e8bff52 [VE] Restructure eliminateFrameIndex adds 9ad38e5288a1 Revert "[VE] Restructure eliminateFrameIndex" adds 3897d3cf71ef [clang-tidy] By-pass portability issues in confusable-iden [...] adds bc366183a592 Correct XFAIL according to bot owner's advice adds da5a6b2bf574 [VE] Restructure eliminateFrameIndex adds 3b2496e8faae [LLDB] Skip TestTwoHitsOneActual.py on Arm/AArch64 Linux adds 989270628226 Updating office hours adds 3c043ab007a1 [MLIR][Affine] Allow `<=` in IntegerSet constraints adds b7b11091efd2 [LLDB] Fix decorator import in TestTwoHitsOneActual.py adds 04c5fed5e0c6 [NFC] Fix wrong comment. adds e6ff553979e8 [clang-extdef-mapping] Directly process .ast files adds 02ab87f54305 [SimplifyCFG] Add additional jump threading test (NFC) adds ebb78a95cede [LV] Remove stray dbgs() call after 774fc63490939. adds dc969061c68e [SimplifyCFG] Thread all predecessors with same value at once No new revisions were added by this update. Summary of changes: .../clang-tidy/bugprone/BranchCloneCheck.cpp | 11 + .../clang-tidy/misc/ConfusableIdentifierCheck.cpp | 70 +- clang-tools-extra/docs/ReleaseNotes.rst | 4 + .../pseudo/include/clang-pseudo/grammar/LRTable.h | 120 ++- clang-tools-extra/pseudo/lib/GLR.cpp | 16 +- clang-tools-extra/pseudo/lib/grammar/LRTable.cpp | 65 +- .../pseudo/lib/grammar/LRTableBuild.cpp | 61 +- clang-tools-extra/pseudo/tool/ClangPseudo.cpp | 48 +- clang-tools-extra/pseudo/unittests/LRTableTest.cpp | 2 +- .../test/clang-tidy/check_clang_tidy.py | 10 +- .../bugprone/branch-clone-unknown-expr.cpp | 9 + .../checkers/misc/confusable-identifiers.cpp | 96 ++- clang/docs/ClangFormat.rst | 84 ++- clang/docs/ReleaseNotes.rst | 11 + clang/include/clang/AST/ASTImportError.h | 1 - clang/include/clang/AST/JSONNodeDumper.h | 2 + clang/include/clang/AST/Stmt.h | 38 +- clang/include/clang/AST/TextNodeDumper.h | 1 + clang/include/clang/Basic/LangOptions.h | 13 + clang/include/clang/Basic/riscv_vector.td | 99 +-- clang/include/clang/Sema/ScopeInfo.h | 7 +- clang/include/clang/Support/RISCVVIntrinsicUtils.h | 2 + clang/lib/AST/ASTContext.cpp | 3 + clang/lib/AST/ASTImporter.cpp | 17 +- clang/lib/AST/Interp/ByteCodeExprGen.cpp | 2 +- clang/lib/AST/JSONNodeDumper.cpp | 15 + clang/lib/AST/Stmt.cpp | 24 +- clang/lib/AST/StmtPrinter.cpp | 62 ++ clang/lib/AST/TextNodeDumper.cpp | 6 + clang/lib/Analysis/BodyFarm.cpp | 3 +- clang/lib/Basic/LangOptions.cpp | 9 + clang/lib/CodeGen/CGCoroutine.cpp | 4 +- clang/lib/Driver/ToolChains/Clang.cpp | 63 +- clang/lib/Format/ContinuationIndenter.cpp | 4 +- clang/lib/Format/Format.cpp | 25 +- clang/lib/Format/TokenAnnotator.cpp | 8 +- clang/lib/Format/UnwrappedLineParser.cpp | 16 +- clang/lib/Headers/opencl-c.h | 18 - clang/lib/Sema/Sema.cpp | 3 +- clang/lib/Sema/SemaDeclCXX.cpp | 8 +- clang/lib/Sema/SemaExprCXX.cpp | 5 +- clang/lib/Sema/SemaOpenMP.cpp | 9 +- clang/lib/Sema/SemaStmt.cpp | 11 +- clang/lib/Serialization/ASTReaderStmt.cpp | 8 +- clang/lib/Serialization/ASTWriterStmt.cpp | 3 + clang/test/AST/ast-dump-fpfeatures.cpp | 46 ++ clang/test/AST/ast-dump-pragma-json.c | 485 +++++++++++++ clang/test/AST/ast-print-fp-pragmas.c | 69 ++ clang/test/Analysis/func-mapping-test.cpp | 2 + clang/test/CodeGen/arm-target-features.c | 3 + clang/test/CodeGen/bounds-checking-fam.c | 45 +- clang/test/Driver/arm-cortex-cpus-2.c | 3 + clang/test/Driver/arm-nofp-disabled-features.c | 2 + clang/test/Driver/arm-nopacbti-disabled-features.c | 7 + clang/test/Driver/instrprof-ld.c | 4 +- clang/test/Driver/modules.m | 30 +- clang/test/Frontend/optimization-remark-options.c | 2 +- clang/test/Interpreter/execute.cpp | 5 + clang/test/Misc/target-invalid-cpu-note.c | 2 +- clang/test/Modules/Inputs/concept/A.cppm | 3 - clang/test/Modules/Inputs/concept/foo.h | 13 - clang/test/Modules/concept.cppm | 50 +- .../clang-extdef-mapping/ClangExtDefMapGen.cpp | 101 ++- clang/tools/clang-format/ClangFormat.cpp | 10 +- clang/tools/clang-offload-packager/CMakeLists.txt | 1 + .../ClangOffloadPackager.cpp | 9 +- clang/unittests/Format/FormatTest.cpp | 19 + clang/utils/TableGen/RISCVVEmitter.cpp | 10 + compiler-rt/lib/lsan/lsan_allocator.cpp | 2 + .../TestCases/Linux/malloc_usable_size.c | 21 + flang/lib/Lower/ConvertType.cpp | 4 + flang/lib/Optimizer/Builder/FIRBuilder.cpp | 5 +- flang/lib/Optimizer/CodeGen/CodeGen.cpp | 77 +- flang/test/Fir/embox.fir | 2 +- flang/test/Lower/extent_triplets.f90 | 11 + libc/lib/CMakeLists.txt | 9 +- libc/test/src/string/memory_utils/CMakeLists.txt | 17 +- libcxx/docs/Status/RangesAlgorithms.csv | 10 +- libcxx/include/CMakeLists.txt | 2 + libcxx/include/__algorithm/nth_element.h | 11 +- libcxx/include/__algorithm/partial_sort.h | 9 +- libcxx/include/__algorithm/ranges_merge.h | 142 ++++ libcxx/include/__algorithm/sort.h | 7 +- libcxx/include/__debug | 16 - libcxx/include/__debug_utils/randomize_range.h | 42 ++ libcxx/include/__hash_table | 16 +- libcxx/include/__iterator/iterator_traits.h | 6 + libcxx/include/__mutex_base | 12 +- libcxx/include/__split_buffer | 26 +- libcxx/include/__tree | 32 +- libcxx/include/__tuple | 6 +- libcxx/include/algorithm | 18 + libcxx/include/array | 7 +- libcxx/include/deque | 18 +- libcxx/include/exception | 4 +- libcxx/include/forward_list | 42 +- libcxx/include/list | 16 +- libcxx/include/map | 52 +- libcxx/include/module.modulemap.in | 6 + libcxx/include/regex | 7 +- libcxx/include/tuple | 16 +- libcxx/include/unordered_map | 12 +- libcxx/include/vector | 64 +- ...ges_robust_against_copying_comparators.pass.cpp | 6 +- ...ges_robust_against_copying_projections.pass.cpp | 6 +- libcxx/test/libcxx/private_headers.verify.cpp | 2 + .../alg.sorting/alg.merge/ranges_merge.pass.cpp | 613 ++++++++++++++++ .../deque/deque.cons/assign_iter_iter.pass.cpp | 34 +- .../niebloid.compile.pass.cpp | 2 +- lld/MachO/Arch/ARM64.cpp | 16 +- lld/docs/ReleaseNotes.rst | 2 + lld/test/ELF/crash-report.test | 10 + lld/test/MachO/loh-adrp-ldr-got.s | 35 + lld/test/lit.cfg.py | 3 + lld/test/lit.site.cfg.py.in | 1 + lld/tools/lld/lld.cpp | 6 + .../BSD-Archive/ObjectContainerBSDArchive.cpp | 208 +++++- .../BSD-Archive/ObjectContainerBSDArchive.h | 22 +- lldb/test/API/functionalities/archives/Makefile | 11 +- .../functionalities/archives/TestBSDArchives.py | 7 + lldb/test/API/functionalities/archives/c.c | 11 + .../two_hits_one_actual/TestTwoHitsOneActual.py | 2 + lldb/test/API/lit.cfg.py | 4 + .../API/tools/lldb-server/TestGdbRemoteFork.py | 5 + .../tools/lldb-server/TestGdbRemoteForkNonStop.py | 5 + lldb/test/CMakeLists.txt | 1 + llvm/bindings/go/llvm/ir.go | 10 - llvm/bindings/ocaml/llvm/llvm.ml | 2 - llvm/bindings/ocaml/llvm/llvm.mli | 5 - llvm/bindings/ocaml/llvm/llvm_ocaml.c | 17 - llvm/docs/AMDGPU/AMDGPUAsmGFX10.rst | 764 +++++++++---------- llvm/docs/AMDGPU/gfx10_hwreg.rst | 42 +- .../AMDGPU/{gfx10_opt.rst => gfx10_opt_0d447d.rst} | 4 +- .../AMDGPU/{gfx10_opt.rst => gfx10_opt_847aed.rst} | 2 +- ...soffset_c40a5a.rst => gfx10_soffset_73dae7.rst} | 6 +- ...soffset_59fade.rst => gfx10_soffset_d01a5c.rst} | 6 +- ...x10_vdata_c61803.rst => gfx10_vdata_0aba12.rst} | 4 +- ...x10_vdata_b2a787.rst => gfx10_vdata_16d321.rst} | 4 +- ...x10_vdata_325b78.rst => gfx10_vdata_35851e.rst} | 6 +- ...x10_vdata_87fb90.rst => gfx10_vdata_890652.rst} | 4 +- ...x10_vdata_4d8ecf.rst => gfx10_vdata_a9ff5a.rst} | 6 +- ...gfx10_vdst_48d3a8.rst => gfx10_vdst_2ea017.rst} | 6 +- ...gfx10_vdst_5d50a1.rst => gfx10_vdst_322561.rst} | 6 +- ...gfx10_vdst_5d50a1.rst => gfx10_vdst_709347.rst} | 4 +- llvm/docs/AMDGPU/gfx10_vdst_719833.rst | 21 - ...gfx10_vdst_a49b76.rst => gfx10_vdst_81a6ed.rst} | 4 +- ...gfx10_vdst_f47754.rst => gfx10_vdst_d71f1c.rst} | 4 +- ...gfx10_vdst_d7c57e.rst => gfx10_vdst_dd8a32.rst} | 4 +- llvm/docs/DeveloperPolicy.rst | 38 +- llvm/docs/GettingInvolved.rst | 5 + llvm/docs/LangRef.rst | 16 +- llvm/docs/ReleaseNotes.rst | 3 + llvm/include/llvm-c/Core.h | 3 - llvm/include/llvm/CodeGen/AsmPrinter.h | 7 +- llvm/include/llvm/IR/Constants.h | 11 - llvm/include/llvm/IR/IntrinsicsAArch64.td | 10 + llvm/include/llvm/Support/ARMTargetParser.def | 3 + .../Vectorize/LoopVectorizationLegality.h | 7 - llvm/lib/Analysis/BranchProbabilityInfo.cpp | 6 +- llvm/lib/Analysis/ConstantFolding.cpp | 8 +- llvm/lib/Analysis/MemoryBuiltins.cpp | 6 +- llvm/lib/Analysis/ScalarEvolution.cpp | 8 +- llvm/lib/AsmParser/LLParser.cpp | 28 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 3 - llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 91 ++- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 24 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 9 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 2 +- llvm/lib/ExecutionEngine/Orc/LLJIT.cpp | 5 +- llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp | 8 +- llvm/lib/IR/AsmWriter.cpp | 4 - llvm/lib/IR/Constants.cpp | 44 +- llvm/lib/IR/ConstantsContext.h | 60 +- llvm/lib/IR/Core.cpp | 12 - llvm/lib/ObjCopy/ELF/ELFObject.cpp | 7 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 113 ++- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 8 + llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 59 +- llvm/lib/Target/AArch64/SMEInstrFormats.td | 34 + llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 4 +- llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 2 +- llvm/lib/Target/ARM/ARM.td | 7 + llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h | 4 + .../Target/LoongArch/LoongArchFloat32InstrInfo.td | 8 + .../Target/LoongArch/LoongArchFloat64InstrInfo.td | 8 + llvm/lib/Target/LoongArch/LoongArchFrameLowering.h | 6 + .../lib/Target/LoongArch/LoongArchISelLowering.cpp | 154 ++++ llvm/lib/Target/LoongArch/LoongArchISelLowering.h | 4 + llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp | 70 +- llvm/lib/Target/LoongArch/LoongArchInstrInfo.h | 10 + llvm/lib/Target/LoongArch/LoongArchInstrInfo.td | 143 +++- llvm/lib/Target/LoongArch/LoongArchMCInstLower.cpp | 24 +- .../lib/Target/LoongArch/LoongArchRegisterInfo.cpp | 24 +- llvm/lib/Target/NVPTX/NVPTXGenericToNVVM.cpp | 4 - llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 45 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 65 +- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 175 +++-- llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h | 12 +- llvm/lib/Target/RISCV/RISCVInstrInfo.cpp | 6 +- llvm/lib/Target/RISCV/RISCVInstrInfo.h | 5 +- llvm/lib/Target/RISCV/RISCVInstrInfo.td | 1 - llvm/lib/Target/RISCV/RISCVInstrInfoV.td | 9 +- llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td | 36 +- llvm/lib/Target/RISCV/RISCVInstrInfoZb.td | 16 +- llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 2 +- llvm/lib/Target/VE/VERegisterInfo.cpp | 203 ++++-- llvm/lib/Target/X86/X86ISelLowering.cpp | 10 +- llvm/lib/Transforms/IPO/MergeFunctions.cpp | 2 +- llvm/lib/Transforms/IPO/PruneEH.cpp | 2 +- llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp | 2 +- .../Transforms/InstCombine/InstCombineAddSub.cpp | 78 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 10 + .../Transforms/InstCombine/InstCombineCalls.cpp | 2 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 9 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 11 +- .../InstCombine/InstructionCombining.cpp | 8 +- llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopDistribute.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp | 2 +- .../Transforms/Scalar/LowerMatrixIntrinsics.cpp | 28 +- llvm/lib/Transforms/Scalar/Reassociate.cpp | 21 +- .../Transforms/Scalar/TailRecursionElimination.cpp | 4 +- .../Transforms/Utils/ScalarEvolutionExpander.cpp | 3 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 70 +- .../Vectorize/LoopVectorizationLegality.cpp | 1 - .../Vectorize/LoopVectorizationPlanner.h | 10 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 314 +++++--- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 14 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 24 + llvm/lib/Transforms/Vectorize/VPlan.h | 3 + .../ScalarEvolution/annotation-intrinsics.ll | 4 +- llvm/test/Assembler/insertextractvalue.ll | 28 - llvm/test/Assembler/insertvalue-invalid-type-1.ll | 7 - llvm/test/Assembler/unsupported-constexprs.ll | 17 +- .../Inputs/bitcode-parseconstant-delay-select.bc | Bin 0 -> 1420 bytes .../Bitcode/bitcode-parseconstant-delay-select.ll | 2 +- .../CodeGen/AArch64/global-merge-group-by-use.ll | 68 +- llvm/test/CodeGen/AArch64/sme-intrinsics-add.ll | 43 ++ .../CodeGen/AArch64/sve-extract-scalable-vector.ll | 336 +++++++++ .../AArch64/sve-fix-length-and-combine-512.ll | 36 +- llvm/test/CodeGen/AArch64/sve-fp-reduce.ll | 323 ++++---- llvm/test/CodeGen/AArch64/sve-insert-vector.ll | 668 +++++++++++++++++ llvm/test/CodeGen/AArch64/vector-gep.ll | 17 +- llvm/test/CodeGen/AArch64/vselect-ext.ll | 241 +++++- llvm/test/CodeGen/AArch64/win64_vararg.ll | 357 +++++---- llvm/test/CodeGen/AArch64/win64_vararg_float.ll | 197 +++-- llvm/test/CodeGen/AArch64/win64_vararg_float_cc.ll | 221 ++++-- llvm/test/CodeGen/ARM/build-attributes.ll | 19 + llvm/test/CodeGen/LoongArch/ir-instruction/br.ll | 358 +++++++++ llvm/test/CodeGen/LoongArch/ir-instruction/call.ll | 79 ++ .../CodeGen/LoongArch/ir-instruction/indirectbr.ll | 30 + .../CodeGen/LoongArch/ir-instruction/load-store.ll | 368 ++++++++++ llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll | 79 ++ llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll | 74 ++ llvm/test/CodeGen/PowerPC/aix-alias.ll | 16 +- llvm/test/CodeGen/RISCV/rv64zba.ll | 88 ++- .../RISCV/rvv/access-fixed-objects-by-rvv.ll | 16 +- .../CodeGen/RISCV/rvv/addi-rvv-stack-object.mir | 60 ++ llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll | 98 +-- llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll | 62 +- llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll | 162 ++--- llvm/test/CodeGen/RISCV/rvv/calling-conv.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 24 - llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 12 - llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 24 - .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 16 +- .../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 111 ++- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 301 ++++---- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 148 ++-- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 36 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 5 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 10 +- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 24 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 112 +-- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 122 ++-- .../RISCV/rvv/fixed-vectors-reduction-int-vp.ll | 32 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 24 +- .../RISCV/rvv/fixed-vectors-setcc-int-vp.ll | 36 +- .../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 16 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll | 8 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll | 8 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 16 +- .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/frameindex-addr.ll | 3 +- llvm/test/CodeGen/RISCV/rvv/localvar.ll | 68 +- llvm/test/CodeGen/RISCV/rvv/masked-tama.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/memory-args.ll | 2 +- llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll | 19 +- llvm/test/CodeGen/RISCV/rvv/rvv-out-arguments.ll | 60 +- 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llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmul.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmulh.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmulhu.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vmv.v.x-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vrsub.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll | 16 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll | 8 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llvm/test/CodeGen/X86/pr56351.ll | 18 + llvm/test/DebugInfo/AArch64/debug-reg-bank.ll | 43 ++ llvm/test/DebugInfo/X86/debug-reg-bank.ll | 43 ++ llvm/test/LTO/X86/diagnostic-handler-remarks.ll | 4 +- .../dfa-jump-threading-transform.ll | 4 +- .../DFAJumpThreading/dfa-unfold-select.ll | 6 +- .../Transforms/IndVarSimplify/floating-point-iv.ll | 34 + llvm/test/Transforms/InstCombine/and.ll | 60 ++ .../InstCombine/lshr-and-negC-icmpeq-zero.ll | 52 +- .../Transforms/InstCombine/sadd-with-overflow.ll | 2 +- llvm/test/Transforms/InstCombine/sitofp.ll | 31 +- .../Transforms/InstCombine/ssub-with-overflow.ll | 2 +- llvm/test/Transforms/InstCombine/sub-minmax.ll | 145 +++- .../Transforms/InstCombine/uadd-with-overflow.ll | 2 +- llvm/test/Transforms/InstCombine/with_overflow.ll | 30 +- .../AArch64/runtime-check-size-based-threshold.ll | 18 +- .../AArch64/sve-tail-folding-forced.ll | 2 +- .../AArch64/sve-tail-folding-unroll.ll | 4 +- .../LoopVectorize/AArch64/sve-tail-folding.ll | 22 +- .../Transforms/LoopVectorize/X86/gather_scatter.ll | 2 +- .../X86/pointer-runtime-checks-unprofitable.ll | 60 +- llvm/test/Transforms/LoopVectorize/X86/pr23997.ll | 2 +- llvm/test/Transforms/LoopVectorize/X86/pr35432.ll | 2 +- llvm/test/Transforms/LoopVectorize/X86/pr54634.ll | 2 +- .../Transforms/LoopVectorize/X86/runtime-limit.ll | 22 +- .../bigger-expressions-double.ll | 12 +- .../multiply-right-transpose.ll | 4 +- .../LowerMatrixIntrinsics/propagate-backward.ll | 12 +- .../propagate-backwards-unsupported.ll | 18 +- .../LowerMatrixIntrinsics/propagate-forward.ll | 16 +- .../LowerMatrixIntrinsics/propagate-mixed-users.ll | 8 +- .../propagate-multiple-iterations.ll | 8 +- .../transpose-double-row-major.ll | 18 +- .../LowerMatrixIntrinsics/transpose-double.ll | 26 +- .../transpose-float-row-major.ll | 18 +- .../LowerMatrixIntrinsics/transpose-float.ll | 26 +- .../transpose-i32-row-major.ll | 18 +- .../LowerMatrixIntrinsics/transpose-i32.ll | 26 +- .../transpose-opts-iterator-invalidation.ll | 4 +- .../LowerMatrixIntrinsics/transpose-opts.ll | 12 +- .../MergeFunc/mergefunc-struct-return.ll | 2 +- .../Transforms/SLPVectorizer/AArch64/loadorder.ll | 151 ++-- .../X86/load-partial-vector-shuffle.ll | 73 ++ llvm/test/Transforms/SimplifyCFG/jump-threading.ll | 96 +++ llvm/test/Transforms/SimplifyCFG/pr55765.ll | 21 +- .../2010-06-26-MultipleReturnValues.ll | 6 +- .../Transforms/TailCallElim/accum_recursion.ll | 2 +- llvm/test/Transforms/TailCallElim/basic.ll | 2 +- .../Transforms/WholeProgramDevirt/expand-check.ll | 2 +- llvm/test/tools/llvm-ar/Inputs/mri-crlf.mri | 2 + llvm/test/tools/llvm-ar/mri-crlf.test | 9 +- llvm/test/tools/llvm-ar/mri-delete.test | 188 ++++- llvm/test/tools/llvm-ar/mri-end.test | 140 ++-- llvm/test/tools/llvm-ar/mri-nonascii.test | 37 +- .../tools/llvm-objcopy/ELF/binary-no-paddr.test | 22 +- llvm/test/tools/llvm-objcopy/ELF/binary-paddr.test | 40 + llvm/unittests/Support/TargetParserTest.cpp | 8 +- llvm/utils/UpdateTestChecks/asm.py | 3 +- llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 2 + llvm/utils/gn/secondary/lld/test/BUILD.gn | 1 + .../gn/secondary/llvm/tools/llvm-reduce/BUILD.gn | 1 + mlir/cmake/modules/AddMLIRPython.cmake | 2 +- mlir/docs/Dialects/Affine.md | 5 +- mlir/include/mlir/Dialect/Complex/IR/ComplexOps.td | 4 + mlir/include/mlir/Dialect/GPU/IR/GPUDialect.h | 1 + mlir/include/mlir/Dialect/GPU/IR/GPUOps.td | 21 +- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 9 + mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td | 180 ++++- .../mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td | 2 +- mlir/include/mlir/Dialect/SCF/IR/SCFOps.td | 109 --- mlir/include/mlir/Dialect/Tensor/IR/Tensor.h | 1 + mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td | 149 ++++ mlir/include/mlir/Dialect/Vector/IR/VectorOps.td | 1 + mlir/include/mlir/IR/AffineMap.h | 6 + mlir/lib/Dialect/Affine/IR/AffineOps.cpp | 2 +- mlir/lib/Dialect/Complex/IR/ComplexOps.cpp | 28 + mlir/lib/Dialect/GPU/CMakeLists.txt | 2 + .../Dialect/GPU/IR/InferIntRangeInterfaceImpls.cpp | 97 +++ mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt | 2 +- .../lib/Dialect/Linalg/Transforms/DropUnitDims.cpp | 75 +- ...onsumer.cpp => FusePadOpWithLinalgProducer.cpp} | 2 +- mlir/lib/Dialect/Linalg/Utils/Utils.cpp | 28 + mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp | 55 +- mlir/lib/Dialect/SCF/IR/CMakeLists.txt | 1 - mlir/lib/Dialect/SCF/IR/SCF.cpp | 143 +--- .../SCF/Transforms/BufferizableOpInterfaceImpl.cpp | 246 +------ mlir/lib/Dialect/Tensor/IR/CMakeLists.txt | 1 + mlir/lib/Dialect/Tensor/IR/TensorOps.cpp | 256 +++++-- .../Transforms/BufferizableOpInterfaceImpl.cpp | 244 +++++++ mlir/lib/Dialect/Vector/IR/VectorOps.cpp | 37 +- .../Dialect/Vector/Transforms/VectorTransforms.cpp | 21 +- mlir/lib/ExecutionEngine/OptUtils.cpp | 2 +- mlir/lib/ExecutionEngine/SparseTensorUtils.cpp | 2 +- mlir/lib/IR/AffineMap.cpp | 19 +- mlir/lib/Parser/AffineParser.cpp | 54 +- .../Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp | 27 + mlir/test/Dialect/Complex/canonicalize.mlir | 20 + mlir/test/Dialect/GPU/int-range-interface.mlir | 128 ++++ .../test/Dialect/Linalg/drop-unit-extent-dims.mlir | 20 + mlir/test/Dialect/OpenMP/invalid.mlir | 125 ++++ mlir/test/Dialect/OpenMP/ops.mlir | 142 +++- mlir/test/Dialect/SCF/canonicalize.mlir | 25 - .../SCF/foreach-thread-canonicalization.mlir | 50 +- mlir/test/Dialect/SCF/invalid.mlir | 8 +- .../one-shot-bufferize-tensor-copy-insertion.mlir | 4 +- mlir/test/Dialect/SCF/one-shot-bufferize.mlir | 6 +- mlir/test/Dialect/SCF/ops.mlir | 4 +- mlir/test/Dialect/Tensor/canonicalize.mlir | 27 + mlir/test/Dialect/Vector/canonicalize.mlir | 14 + mlir/test/Dialect/Vector/invalid.mlir | 2 +- .../Dialect/Vector/vector-reduce-to-contract.mlir | 35 + mlir/test/IR/affine-set.mlir | 113 +++ mlir/test/IR/invalid.mlir | 24 +- mlir/test/Target/LLVMIR/openmp-llvm.mlir | 88 +++ utils/bazel/llvm-project-overlay/clang/BUILD.bazel | 6 +- utils/bazel/llvm-project-overlay/mlir/BUILD.bazel | 4 + 515 files changed, 14616 insertions(+), 5385 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone/branch-clon [...] create mode 100644 clang/test/AST/ast-dump-pragma-json.c create mode 100644 clang/test/AST/ast-print-fp-pragmas.c create mode 100644 clang/test/Driver/arm-nopacbti-disabled-features.c delete mode 100644 clang/test/Modules/Inputs/concept/A.cppm delete mode 100644 clang/test/Modules/Inputs/concept/foo.h create mode 100644 compiler-rt/test/sanitizer_common/TestCases/Linux/malloc_usable_size.c create mode 100644 flang/test/Lower/extent_triplets.f90 create mode 100644 libcxx/include/__algorithm/ranges_merge.h create mode 100644 libcxx/include/__debug_utils/randomize_range.h create mode 100644 libcxx/test/std/algorithms/alg.sorting/alg.merge/ranges_merge.pass.cpp create mode 100644 lld/test/ELF/crash-report.test create mode 100644 lld/test/MachO/loh-adrp-ldr-got.s create mode 100644 lldb/test/API/functionalities/archives/c.c copy llvm/docs/AMDGPU/{gfx10_opt.rst => gfx10_opt_0d447d.rst} (83%) rename llvm/docs/AMDGPU/{gfx10_opt.rst => gfx10_opt_847aed.rst} (91%) rename llvm/docs/AMDGPU/{gfx10_soffset_c40a5a.rst => gfx10_soffset_73dae7.rst} (72%) rename llvm/docs/AMDGPU/{gfx10_soffset_59fade.rst => gfx10_soffset_d01a5c.rst} (61%) rename llvm/docs/AMDGPU/{gfx10_vdata_c61803.rst => gfx10_vdata_0aba12.rst} (80%) rename llvm/docs/AMDGPU/{gfx10_vdata_b2a787.rst => gfx10_vdata_16d321.rst} (80%) rename llvm/docs/AMDGPU/{gfx10_vdata_325b78.rst => gfx10_vdata_35851e.rst} (81%) rename llvm/docs/AMDGPU/{gfx10_vdata_87fb90.rst => gfx10_vdata_890652.rst} (80%) rename llvm/docs/AMDGPU/{gfx10_vdata_4d8ecf.rst => gfx10_vdata_a9ff5a.rst} (81%) rename llvm/docs/AMDGPU/{gfx10_vdst_48d3a8.rst => gfx10_vdst_2ea017.rst} (76%) copy llvm/docs/AMDGPU/{gfx10_vdst_5d50a1.rst => gfx10_vdst_322561.rst} (71%) rename llvm/docs/AMDGPU/{gfx10_vdst_5d50a1.rst => gfx10_vdst_709347.rst} (76%) delete mode 100644 llvm/docs/AMDGPU/gfx10_vdst_719833.rst rename llvm/docs/AMDGPU/{gfx10_vdst_a49b76.rst => gfx10_vdst_81a6ed.rst} (75%) rename llvm/docs/AMDGPU/{gfx10_vdst_f47754.rst => gfx10_vdst_d71f1c.rst} (75%) rename llvm/docs/AMDGPU/{gfx10_vdst_d7c57e.rst => gfx10_vdst_dd8a32.rst} (75%) delete mode 100644 llvm/test/Assembler/insertvalue-invalid-type-1.ll create mode 100644 llvm/test/Bitcode/Inputs/bitcode-parseconstant-delay-select.bc create mode 100644 llvm/test/CodeGen/AArch64/sme-intrinsics-add.ll create mode 100644 llvm/test/CodeGen/LoongArch/ir-instruction/br.ll create mode 100644 llvm/test/CodeGen/LoongArch/ir-instruction/call.ll create mode 100644 llvm/test/CodeGen/LoongArch/ir-instruction/indirectbr.ll create mode 100644 llvm/test/CodeGen/LoongArch/ir-instruction/load-store.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-alias-alignment-2.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/addi-rvv-stack-object.mir create mode 100644 llvm/test/CodeGen/VE/Scalar/load_stk.ll create mode 100644 llvm/test/CodeGen/VE/Scalar/store_stk.ll delete mode 100644 llvm/test/CodeGen/X86/nonconst-static-iv.ll create mode 100644 llvm/test/CodeGen/X86/pr56351.ll create mode 100644 llvm/test/DebugInfo/AArch64/debug-reg-bank.ll create mode 100644 llvm/test/DebugInfo/X86/debug-reg-bank.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/load-partial-vector-shuffle.ll create mode 100644 mlir/lib/Dialect/GPU/IR/InferIntRangeInterfaceImpls.cpp rename mlir/lib/Dialect/Linalg/Transforms/{FusePadOpWithLinalgConsumer.cpp => Fuse [...] create mode 100644 mlir/test/Dialect/GPU/int-range-interface.mlir create mode 100644 mlir/test/IR/affine-set.mlir -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-norov-defconfig updated (87410259 -> bb5f78b6)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-norov-defconfig in repository toolchain/ci/base-artifacts. from 87410259 0: update: qemu-180c2f24d5e8eada41e012a3899d29bb695aae06: boot new bb5f78b6 1: reset: llvm-dc969061c68e62328607d68215ed8b9ef4a1e4b1: 7318 The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1680 -> 1616 bytes 02-prepare_abe/console.log.xz | Bin 2744 -> 2748 bytes 03-build_abe-binutils/console.log.xz | Bin 30176 -> 30420 bytes 04-build_kernel_llvm/console.log.xz | Bin 65824 -> 64200 bytes 05-build_abe-qemu/console.log.xz | Bin 32216 -> 33688 bytes 06-build_linux/console.log.xz | Bin 5472 -> 15620 bytes 07-boot_linux/console.log.xz | Bin 6232 -> 0 bytes 08-check_regression/console.log.xz | Bin 412 -> 1320 bytes 08-check_regression/jira-body.txt | 2 ++ 08-check_regression/mail-body.txt | 41 ++++++++++++++++++++++ 08-check_regression/mail-subject.txt | 1 + 08-check_regression/results.regressions | 11 ++++++ 08-check_regression/trigger-bisect | 2 ++ 09-update_baseline/console.log | 59 ++++++++++++++++++++++++-------- 09-update_baseline/results.regressions | 2 ++ jenkins/manifest.sh | 10 +++--- mail/jira-body.txt | 5 +++ mail/mail-body.txt | 44 ++++++++++++++++++++++++ mail/mail-subject.txt | 1 + reset-baseline | 0 results | 17 ++++++--- 21 files changed, 170 insertions(+), 25 deletions(-) delete mode 100644 07-boot_linux/console.log.xz create mode 100644 08-check_regression/jira-body.txt create mode 100644 08-check_regression/mail-body.txt create mode 100644 08-check_regression/mail-subject.txt create mode 100644 08-check_regression/results.regressions create mode 100644 08-check_regression/trigger-bisect create mode 100644 09-update_baseline/results.regressions create mode 100644 mail/jira-body.txt create mode 100644 mail/mail-body.txt create mode 100644 mail/mail-subject.txt create mode 100644 reset-baseline -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_ubsan updated (656c0212909 -> 9ef714539cb)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_ubsan in repository toolchain/ci/gcc. from 656c0212909 c++: dependent conversion operator lookup [PR106179] adds b33dd787452 analyzer: fix uninit false positive with -ftrivial-auto-var [...] adds c061e99b7de [Ada] Fix spurious error for aggregate with box component choice adds 3fdb556c838 [Ada] Restore accidentally removed part of a comment about [...] adds 405ebd743d3 [Ada] Remove explicit call to Make_Unchecked_Type_Conversion adds 614c45555a1 [Ada] Incorrect emptying of CUDA global subprograms adds 56311a3c9f2 [Ada] Remove old vxworks from Makefile.rtl - e500 port. adds baa3015d8ef [Ada] Fix incorrect itype sharing for case expression in li [...] adds 35e0aa2df74 [Ada] Vxworks7* - Makefile.rtl rtp vs rtp-smp cleanup adds b65a875a7c1 [Ada] Cleanup use of local scalars in GNAT.Socket.Get_Address_Info adds 3202e9f88fd [Ada] Handle secondary stack memory allocations alignment adds 28add0a4c82 [Ada] Missing error on tagged type conversion adds be3bdaa1a53 [Ada] Support ghost generic formal parameters adds 0d7fbcf10f0 [Ada] Spurious non-callable warning on prefixed call in cla [...] adds 870518bfe25 [Ada] Indexing error when calling GNAT.Regpat.Match adds e5802d60130 [Ada] Deferred constant considered as not preelaborable adds cd7d1f448a4 [Ada] Document the various function return mechanisms adds 889db59e6e7 [Ada] Do not give warnings for compiler-generated entities [...] adds 940bbc4363b [Ada] Small tweak to gnat_to_gnu_subprog_type adds 40242ebb71e [Ada] Fix crash on aliased renaming of unconstrained array adds 1141fbd71ea [Ada] Improve code generated for aggregates of VFA type adds fc84bb8c167 [Ada] Update comment after recent changes wrt. secondary st [...] adds 9e0d5db3e04 [Ada] Simplify regular expression that matches 8 consecutiv [...] adds 71c05bb8e2b analyzer: show close event for use_after_close diagnostic adds 3a6de2b2db5 analyzer: reorder initialization of state m_invalid in sm-f [...] adds acb696b792e analyzer: add testcase of using closed fd without warning. adds c785204735b d: Build the D sources in the front-end with -fno-exceptions adds 208fbc779c7 d: Merge upstream dmd 56589f0f4, druntime 651389b5, phobos [...] adds e46f4d7430c diagnostics: Honor #pragma GCC diagnostic in the preprocess [...] adds 2f0d819a81e Define 'OMP_REQUIRES_[...]', 'GOMP_REQUIRES_[...]' in a sin [...] adds 3f05e03d6cf Restore 'GOMP_offload_unregister_ver' functionality adds 4bc92c3bfab Daily bump. adds ee915c72da2 libsanitizer: Cherry-pick 5d8077565e41 from upstream adds 7922f5ee649 Mips: Fix the ASAN shadow offset hook for the n32 ABI adds e5a9d603178 Speed up LC SSA rewrite adds 1e1fdb729d9 Speed up LC SSA rewrite more adds c1b1c4e58bd testsuite: Fix incorrect -mfloat128-type option adds 8bc24394376 target/106219 - proprly mark builtins pure via ix86_add_new [...] adds 99831ceb872 Adjust 'libgomp.c-c++-common/requires-3.c' adds 5647e2c3853 Enhance 'libgomp.c-c++-common/requires-4.c', 'libgomp.c-c++ [...] adds 9ef714539cb Fix Intel MIC 'mkoffload' for OpenMP 'requires' No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 10 + gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 171 ++++++ gcc/ada/Makefile.rtl | 74 +-- gcc/ada/exp_aggr.adb | 11 +- gcc/ada/exp_ch3.adb | 148 ++--- gcc/ada/exp_ch6.adb | 47 +- gcc/ada/freeze.adb | 75 --- gcc/ada/freeze.ads | 9 - gcc/ada/gcc-interface/Make-lang.in | 2 +- gcc/ada/gcc-interface/decl.cc | 38 +- gcc/ada/gcc-interface/gigi.h | 4 + gcc/ada/gcc-interface/trans.cc | 24 +- gcc/ada/gcc-interface/utils2.cc | 10 +- gcc/ada/ghost.adb | 142 ++++- gcc/ada/ghost.ads | 27 + gcc/ada/gnat_cuda.adb | 9 +- gcc/ada/libgnat/g-socket.adb | 8 +- gcc/ada/libgnat/s-imageu.ads | 21 +- gcc/ada/libgnat/s-regpat.adb | 33 +- gcc/ada/libgnat/s-regpat.ads | 29 +- gcc/ada/libgnat/s-secsta.adb | 73 ++- gcc/ada/libgnat/s-secsta.ads | 26 +- gcc/ada/libgnat/s-valuei.ads | 21 +- gcc/ada/libgnat/s-valuti.ads | 27 +- gcc/ada/libgnat/system-vxworks7-e500-kernel.ads | 160 ----- gcc/ada/libgnat/system-vxworks7-e500-rtp-smp.ads | 165 ------ gcc/ada/libgnat/system-vxworks7-e500-rtp.ads | 164 ------ gcc/ada/sem_aggr.adb | 82 +++ gcc/ada/sem_ch12.adb | 113 +++- gcc/ada/sem_ch4.adb | 23 +- gcc/ada/sem_prag.adb | 3 + gcc/ada/sem_res.adb | 137 +++-- gcc/ada/sem_util.adb | 50 +- gcc/ada/sem_util.ads | 11 + gcc/ada/tbuild.adb | 4 +- gcc/analyzer/ChangeLog | 22 + gcc/analyzer/region-model.cc | 69 ++- gcc/analyzer/sm-fd.cc | 20 +- gcc/c-family/ChangeLog | 40 ++ gcc/c-family/c-common.cc | 14 + gcc/c-family/c-common.h | 2 + gcc/c-family/c-ppoutput.cc | 78 ++- gcc/c-family/c-pragma.cc | 425 +++++++++++--- gcc/c-family/c-pragma.h | 13 +- gcc/config/gcn/mkoffload.cc | 8 +- gcc/config/i386/i386-builtins.cc | 2 + gcc/config/i386/intelmic-mkoffload.cc | 56 +- gcc/config/mips/mips.cc | 7 +- gcc/config/mips/mips.h | 7 - gcc/config/nvptx/mkoffload.cc | 8 +- gcc/cp/ChangeLog | 15 + gcc/cp/parser.cc | 89 ++- gcc/d/ChangeLog | 9 + gcc/d/Make-lang.in | 6 +- gcc/d/dmd/MERGE | 2 +- gcc/d/dmd/cparse.d | 118 +++- gcc/d/dmd/dmodule.d | 2 +- gcc/d/dmd/expressionsem.d | 8 + gcc/d/dmd/globals.d | 2 +- gcc/d/dmd/globals.h | 2 +- gcc/d/dmd/hdrgen.d | 17 +- gcc/d/dmd/mtype.d | 15 +- gcc/d/dmd/tokens.d | 5 +- gcc/d/dmd/tokens.h | 1 + gcc/d/dmd/typesem.d | 9 +- gcc/omp-general.h | 8 +- gcc/testsuite/ChangeLog | 32 + gcc/testsuite/c-c++-common/pragma-diag-11.c | 13 + gcc/testsuite/c-c++-common/pragma-diag-12.c | 10 + gcc/testsuite/c-c++-common/pragma-diag-13.c | 4 + gcc/testsuite/g++.dg/pr106219.C | 31 + gcc/testsuite/gcc.dg/analyzer/fd-4.c | 14 +- .../gcc.dg/analyzer/torture/uninit-pr106204.c | 13 + gcc/testsuite/gcc.dg/analyzer/uninit-pr106204.c | 17 + .../gcc.target/powerpc/ppc-fortran/pr80108-1.f90 | 2 +- gcc/testsuite/gdc.test/compilable/test3004.d | 4 +- gcc/testsuite/gdc.test/compilable/vcg-ast.d | 3 + .../gdc.test/fail_compilation/diag_in_array.d | 20 + gcc/tree-ssa-loop-manip.cc | 119 ++-- include/ChangeLog | 4 + include/gomp-constants.h | 3 +- libgomp/ChangeLog | 6 + libgomp/target.c | 34 +- libgomp/testsuite/lib/libgomp.exp | 5 + .../testsuite/libgomp.c-c++-common/requires-1.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-3.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-4.c | 21 +- .../testsuite/libgomp.c-c++-common/requires-5.c | 22 +- .../testsuite/libgomp.c-c++-common/requires-7.c | 2 +- libgomp/testsuite/libgomp.fortran/requires-1.f90 | 2 +- libphobos/ChangeLog | 5 + libphobos/libdruntime/MERGE | 2 +- libphobos/libdruntime/core/internal/parseoptions.d | 17 + libphobos/libdruntime/core/thread/osthread.d | 9 + libphobos/libdruntime/rt/aApply.d | 108 +++- libphobos/libdruntime/rt/aApplyR.d | 71 ++- libphobos/libdruntime/rt/aaA.d | 39 +- libphobos/libdruntime/rt/arrayassign.d | 83 ++- libphobos/libdruntime/rt/lifetime.d | 378 ++++++++---- libphobos/src/MERGE | 2 +- libphobos/src/std/complex.d | 4 +- libphobos/src/std/file.d | 35 +- libphobos/src/std/math/exponential.d | 648 ++++++++++++--------- libsanitizer/sanitizer_common/sanitizer_linux.cpp | 17 +- libsanitizer/sanitizer_common/sanitizer_platform.h | 2 +- 106 files changed, 3182 insertions(+), 1655 deletions(-) delete mode 100644 gcc/ada/libgnat/system-vxworks7-e500-kernel.ads delete mode 100644 gcc/ada/libgnat/system-vxworks7-e500-rtp-smp.ads delete mode 100644 gcc/ada/libgnat/system-vxworks7-e500-rtp.ads create mode 100644 gcc/testsuite/c-c++-common/pragma-diag-11.c create mode 100644 gcc/testsuite/c-c++-common/pragma-diag-12.c create mode 100644 gcc/testsuite/c-c++-common/pragma-diag-13.c create mode 100644 gcc/testsuite/g++.dg/pr106219.C create mode 100644 gcc/testsuite/gcc.dg/analyzer/torture/uninit-pr106204.c create mode 100644 gcc/testsuite/gcc.dg/analyzer/uninit-pr106204.c create mode 100644 gcc/testsuite/gdc.test/fail_compilation/diag_in_array.d -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_ubsan updated (ad349f2493 -> 83f477f25a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_ubsan in repository toolchain/ci/binutils-gdb. from ad349f2493 Descriptive DWARF operations dump support for DW_AT_rank adds c975cec5ff x86: fix 3-operand insn reverse-matching adds 3d0738af2a x86: fold two switch() statements in match_template() adds 8bd915b770 x86: make D attribute usable for XOP and FMA4 insns adds fb5a4a581d elf: Copy p_align of PT_GNU_STACK for stack alignment adds 41bbac64c3 gprofng: implement a functional gp-display-html adds 2025522ac7 Automatic date update in version.in adds 9b5ebf652b PR29320, 'struct obstack' declared inside parameter list adds 37cf60c6a6 RISC-V: Fix requirement handling on Zhinx+{D,Q} adds 3d5d6bd554 RISC-V: Fix disassembling Zfinx with -M numeric adds 1bb1f55d64 gprofng: adjust GPROFNG_VARIANT adds 045f385d9a RISC-V: Added Zfhmin and Zhinxmin. adds 88de583569 gdb: LoongArch: Implement the push_dummy_call gdbarch method adds 309e147fbd GDB/testsuite: Add coverage for `print -elements' command adds 83f477f25a gdb: LoongArch: Fix typos in code comments No new revisions were added by this update. Summary of changes: bfd/elf.c | 4 +- bfd/elfxx-riscv.c | 77 +- bfd/version.h | 2 +- gas/as.h | 2 + gas/config/tc-i386.c | 67 +- gas/frags.h | 2 - gas/testsuite/gas/i386/inval-avx.l | 25 +- gas/testsuite/gas/i386/inval-avx.s | 6 + .../gas/riscv/zfhmin-d-insn-class-fail-1.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-1.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-2.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-2.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-3.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-3.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-4.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-4.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-5.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-5.l | 2 + gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s | 4 + gas/testsuite/gas/riscv/zfinx-dis-numeric.d | 10 + gas/testsuite/gas/riscv/zfinx-dis-numeric.s | 2 + .../gas/riscv/{fp-zhinx-insns.d => zhinx.d} | 37 +- .../gas/riscv/{fp-zhinx-insns.s => zhinx.s} | 32 +- gdb/loongarch-tdep.c | 596 + gdb/loongarch-tdep.h | 2 + gdb/testsuite/gdb.base/printcmds.exp | 9 + gprofng/gp-display-html/gp-display-html.in | 14631 ++++++++++++++++++- gprofng/libcollector/configure | 23 +- gprofng/libcollector/configure.ac | 23 +- include/opcode/riscv.h | 7 +- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 75 +- opcodes/i386-tbl.h | 700 +- opcodes/riscv-dis.c | 2 +- opcodes/riscv-opc.c | 126 +- 35 files changed, 15428 insertions(+), 1064 deletions(-) create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s create mode 100644 gas/testsuite/gas/riscv/zfinx-dis-numeric.d create mode 100644 gas/testsuite/gas/riscv/zfinx-dis-numeric.s rename gas/testsuite/gas/riscv/{fp-zhinx-insns.d => zhinx.d} (81%) rename gas/testsuite/gas/riscv/{fp-zhinx-insns.s => zhinx.s} (85%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_ubsan updated (5110263c -> 3b21741a)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_ubsan in repository toolchain/ci/base-artifacts. discards 5110263c 0: update: binutils-gcc: 2 new 3b21741a 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (5110263c) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-aar [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1744 -> 1616 bytes 02-prepare_abe/console.log.xz | Bin 2736 -> 2732 bytes 04-build_abe-binutils/console.log.xz | Bin 38268 -> 38640 bytes 05-build_abe-bootstrap_ubsan/console.log.xz | Bin 328420 -> 328648 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 2 +- jenkins/manifest.sh | 12 ++++++------ 7 files changed, 7 insertions(+), 7 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (7922f5ee649 -> 9fc61fc8da9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/gcc. from 7922f5ee649 Mips: Fix the ASAN shadow offset hook for the n32 ABI adds e5a9d603178 Speed up LC SSA rewrite adds 1e1fdb729d9 Speed up LC SSA rewrite more adds c1b1c4e58bd testsuite: Fix incorrect -mfloat128-type option adds 8bc24394376 target/106219 - proprly mark builtins pure via ix86_add_new [...] adds 99831ceb872 Adjust 'libgomp.c-c++-common/requires-3.c' adds 5647e2c3853 Enhance 'libgomp.c-c++-common/requires-4.c', 'libgomp.c-c++ [...] adds 9ef714539cb Fix Intel MIC 'mkoffload' for OpenMP 'requires' adds 9fc61fc8da9 Speedup update-ssa some more No new revisions were added by this update. Summary of changes: gcc/config/i386/i386-builtins.cc | 2 + gcc/config/i386/intelmic-mkoffload.cc | 56 +++++++--- gcc/testsuite/g++.dg/pr106219.C | 31 ++++++ .../gcc.target/powerpc/ppc-fortran/pr80108-1.f90 | 2 +- gcc/tree-into-ssa.cc | 36 ++++--- gcc/tree-ssa-loop-manip.cc | 119 +++++++++++++-------- libgomp/target.c | 4 + libgomp/testsuite/lib/libgomp.exp | 5 + .../testsuite/libgomp.c-c++-common/requires-1.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-3.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-4.c | 21 +++- .../testsuite/libgomp.c-c++-common/requires-5.c | 22 ++-- .../testsuite/libgomp.c-c++-common/requires-7.c | 2 +- libgomp/testsuite/libgomp.fortran/requires-1.f90 | 2 +- 14 files changed, 216 insertions(+), 90 deletions(-) create mode 100644 gcc/testsuite/g++.dg/pr106219.C -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/qemu] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (e8e86b484e -> a74c66b1b9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/qemu. from e8e86b484e Merge tag 'pull-riscv-to-apply-20220703-1' of github.com:ali [...] adds 8e72ceee5c Rename docs/specs/fw_cfg.txt to .rst adds 701caa3d6a Convert fw_cfg.rst to reStructuredText syntax adds 839a482695 ui/console: allow display device to be labeled with given id adds 8c0d80245f ui/cocoa: Fix clipboard text release adds ada270cd18 hw/usb/canokey: Fix CCID ZLP adds 1042563027 hw/usb/canokey: fix compatibility of qemu-xhci adds 8607b5149e docs/system/devices/usb/canokey: remove limitations on qemu-xhci adds 927b968d1b hw: canokey: Remove HS support as not compliant to the spec adds dfe2382f06 Merge tag 'kraxel-20220704-pull-request' of https://gitlab.c [...] adds 070f735333 linux-user: Add LoongArch generic header files adds 9d5cd6587a linux-user: Add LoongArch signal support adds 3418fe25fa linux-user: Add LoongArch elf support adds 1f63019632 linux-user: Add LoongArch syscall support adds da8c70ea82 linux-user: Add LoongArch cpu_loop support adds 0caebb9160 scripts: add loongarch64 binfmt config adds fffca8f227 target/loongarch: remove badaddr from CPULoongArch adds 7d552f0e0a target/loongarch: Fix missing update CSR_BADV adds 7fe7eea6ff target/loongarch: Fix helper_asrtle_d/asrtgt_d raise wrong e [...] adds 9bc92b5013 target/loongarch: remove unused include hw/loader.h adds 0093b9a5ee target/loongarch: Adjust functions and structure to support [...] adds d32688ecdb default-configs: Add loongarch linux-user support adds 227e73c986 target/loongarch: Update README adds 490c03ab11 hw/intc/loongarch_pch_msi: Fix msi vector convertion adds 4f2c65877c hw/rtc/ls7a_rtc: Fix uninitialied bugs and toymatch writing [...] adds df11f3ea69 hw/rtc/ls7a_rtc: Fix timer call back function adds 53a5eb2e7a hw/rtc/ls7a_rtc: Remove unimplemented device in realized function adds e5c0367e2b hw/rtc/ls7a_rtc: Add reset function adds 6935f132e5 hw/rtc/ls7a_rtc: Fix rtc enable and disable function adds 582788c3fb hw/rtc/ls7a_rtc: Use tm struct pointer as arguments in toy_t [...] adds 59e52dcff7 hw/rtc/ls7a_rtc: Fix 'calculate' spelling errors adds 4623367697 target/loongarch: Fix the meaning of ECFG reg's VS field adds eb1e9ff8bb target/loongarch: Add lock when writing timer clear reg adds 1437479e5e Merge tag 'pull-la-20220704' of https://gitlab.com/rth7680/q [...] adds c1ca312a6f hw/rtc/ls7a_rtc: Drop unused inline functions adds 3517fb7267 target/loongarch: Clean up tlb when cpu reset adds f8d1ae8262 scripts/qemu-binfmt-conf: Add LoongArch to qemu_get_family() adds 0df0a66555 tcg/tci: Remove CONFIG_DEBUG_TCG_INTERPRETER adds ddf9326184 hw/intc/loongarch_ipi: Fix ipi device access of 64bits adds bf7ce37f8f hw/intc/loongarch_ipi: Fix mail send and any send function adds 19361471b5 Merge tag 'pull-la-20220705' of https://gitlab.com/rth7680/q [...] adds 9323af2e81 tests: fix test-cutils leaks adds e0a2602070 tests/fp: Do not build softfloat3 tests if TCG is disabled adds 94b731874a gitlab: normalize indentation in edk2/opensbi rules adds 37a2b95231 gitlab: tweak comments in edk2/opensbi jobs adds 6e131bf69b gitlab: honour QEMU_CI variable in edk2/opensbi jobs adds 3a751770ee gitlab-ci: Extend timeout for ubuntu-20.04-s390x-all to 75m adds 276dfd03f0 tests: wait max 120 seconds for migration test status changes adds 8d4e897a99 tests: wait for migration completion before looking for STOP event adds 6843ad8c03 tests: increase migration test converge downtime to 30 seconds adds 886dfe9db3 tests: use consistent bandwidth/downtime limits in migration tests adds 2116650254 disas: Remove libvixl disassembler adds 6d17020a80 po: add ukrainian translation adds 1ec8c2c01e meson.build: Require a recent version of libpng adds 7a890b7566 include/qemu/host-utils: Remove unused code in the *_overflo [...] adds d82423a697 Merge tag 'pull-request-2022-07-05' of https://gitlab.com/th [...] adds be9c61da9f xen/pass-through: merge emulated bits correctly adds c0e86b7624 xen/pass-through: don't create needless register group adds 39e19f5f67 Merge tag 'pull-xen-20220705' of https://xenbits.xen.org/git [...] adds 034d00d485 e1000: set RX descriptor status in a separate operation adds a495eba03c ebpf: replace deprecated bpf_program__set_socket_filter adds 180c2f24d5 Merge tag 'net-pull-request' of https://github.com/jasowang/ [...] adds 23f0a6c80d m68k: use correct variable name in boot info string macro adds a988465d0e m68k: virt: pass RNG seed via bootinfo block adds 0e3723005b Merge tag 'm68k-for-7.1-pull-request' of https://github.com/ [...] adds 1c69cb4e75 ppc/pnv: move root port attach to pnv_phb4_realize() adds 8625164a38 ppc/pnv: attach phb3/phb4 root ports in QOM tree adds 792e8bb629 ppc/pnv: assign pnv-phb-root-port chassis/slot earlier adds da6be50136 ppc/pnv: make pnv_ics_get() use the chip8->phbs[] array adds ca45948991 ppc/pnv: make pnv_ics_resend() use chip8->phbs[] adds 8a69bca77a ppc/pnv: make pnv_chip_power8_pic_print_info() use chip8->phbs[] adds 71cd3e5ecb ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb3 root bus adds 21870aab36 ppc/pnv: remove 'INTERFACE_PCIE_DEVICE' from phb4 root bus adds 59f11543e2 target/ppc: Change FPSCR_* to follow POWER ISA numbering convention adds 31cc81f728 spapr/ddw: Reset DMA when the last non-default window is removed adds c0e765dafb spapr/ddw: Implement 64bit query extension adds e82ca8acdd target/ppc: use int128.h methods in vpmsumd adds 7ca0428687 target/ppc: use int128.h methods in vadduqm adds 896d92c81d target/ppc: use int128.h methods in vaddecuq and vaddeuqm adds 8290ea509f target/ppc: use int128.h methods in vaddcuq adds b132be53a4 target/ppc: use int128.h methods in vsubuqm adds e6a5ad43de target/ppc: use int128.h methods in vsubecuq and vsubeuqm adds b7d30fae5b target/ppc: use int128.h methods in vsubcuq adds 95444afcab ppc: Define SETFIELD for the ppc target adds 81b205cecf ppc/spapr: Implement H_WATCHDOG adds bbecdb22ae target/ppc: Fix insn32.decode style issues adds bf8adfd88b target/ppc: Move mffscrn[i] to decodetree adds 394c2e2fda target/ppc: Move mffsce to decodetree adds 3e5bce70ef target/ppc: Move mffsl to decodetree adds f80d04d548 target/ppc: Move mffs[.] to decodetree adds 6cef305fe7 target/ppc: Implement mffscdrn[i] instructions adds 7141a173c8 tests/tcg/ppc64: Add mffsce test adds 4dc5f8abdc target/ppc: Add flag for ISA v2.06 BCDA instructions adds 6addef4d27 target/ppc: implement addg6s adds 38d3690bda target/ppc: implement cbcdtd adds 6b924d4afc target/ppc: implement cdtbcd adds c7e89de132 target/ppc: Return default CPU for max CPU adds 7886605961 target/ppc/cpu-models: Remove the "default" CPU alias adds 0b83377f46 target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 adds 8e9398e3b1 Merge tag 'pull-ppc-20220706' of https://gitlab.com/danielhb [...] adds c06fc7ce14 io_uring: fix short read slow path adds be6a166fde block/io_uring: clarify that short reads can happen adds a74c66b1b9 Merge tag 'block-pull-request' of https://gitlab.com/stefanh [...] No new revisions were added by this update. Summary of changes: .gitlab-ci.d/custom-runners/ubuntu-20.04-s390x.yml | 1 + .gitlab-ci.d/edk2.yml | 133 +- .gitlab-ci.d/opensbi.yml | 134 +- MAINTAINERS | 4 - block/io_uring.c | 12 +- configs/targets/loongarch64-linux-user.mak | 3 + disas.c | 3 - disas/arm-a64.cc | 101 - disas/libvixl/LICENCE | 30 - disas/libvixl/README | 11 - disas/libvixl/meson.build | 7 - disas/libvixl/vixl/a64/assembler-a64.h | 4624 -------------------- disas/libvixl/vixl/a64/constants-a64.h | 2116 --------- disas/libvixl/vixl/a64/cpu-a64.h | 83 - disas/libvixl/vixl/a64/decoder-a64.cc | 877 ---- disas/libvixl/vixl/a64/decoder-a64.h | 275 -- disas/libvixl/vixl/a64/disasm-a64.cc | 3495 --------------- disas/libvixl/vixl/a64/disasm-a64.h | 177 - disas/libvixl/vixl/a64/instructions-a64.cc | 622 --- disas/libvixl/vixl/a64/instructions-a64.h | 757 ---- disas/libvixl/vixl/code-buffer.h | 113 - disas/libvixl/vixl/compiler-intrinsics.cc | 144 - disas/libvixl/vixl/compiler-intrinsics.h | 155 - disas/libvixl/vixl/globals.h | 155 - disas/libvixl/vixl/invalset.h | 775 ---- disas/libvixl/vixl/platform.h | 39 - disas/libvixl/vixl/utils.cc | 142 - disas/libvixl/vixl/utils.h | 286 -- disas/meson.build | 5 - docs/specs/{fw_cfg.txt => fw_cfg.rst} | 211 +- docs/specs/index.rst | 1 + docs/system/devices/canokey.rst | 10 - ebpf/ebpf_rss.c | 2 +- hw/intc/loongarch_ipi.c | 92 +- hw/intc/loongarch_pch_msi.c | 22 +- hw/intc/pnv_xive.c | 20 - hw/intc/pnv_xive2.c | 20 - hw/loongarch/loongson3.c | 6 +- hw/m68k/bootinfo.h | 18 +- hw/m68k/virt.c | 7 + hw/net/e1000.c | 5 +- hw/pci-host/pnv_phb3.c | 22 +- hw/pci-host/pnv_phb4.c | 40 +- hw/pci-host/pnv_phb4_pec.c | 3 - hw/ppc/pnv.c | 102 +- hw/ppc/spapr.c | 4 + hw/ppc/spapr_iommu.c | 3 +- hw/ppc/spapr_pci.c | 6 +- hw/ppc/spapr_rtas_ddw.c | 34 +- hw/rtc/ls7a_rtc.c | 154 +- hw/usb/canokey.c | 31 +- hw/watchdog/meson.build | 1 + hw/watchdog/spapr_watchdog.c | 274 ++ hw/watchdog/trace-events | 7 + hw/xen/xen_pt_config_init.c | 25 +- include/exec/poison.h | 2 - include/hw/intc/loongarch_ipi.h | 7 +- include/hw/intc/loongarch_pch_msi.h | 2 + include/hw/pci-host/pnv_phb3_regs.h | 16 - include/hw/ppc/pnv.h | 3 +- include/hw/ppc/spapr.h | 26 +- include/qemu/host-utils.h | 65 - include/standard-headers/asm-m68k/bootinfo-virt.h | 1 + include/ui/console.h | 1 + linux-user/elfload.c | 91 + linux-user/loongarch64/cpu_loop.c | 96 + linux-user/loongarch64/signal.c | 335 ++ linux-user/loongarch64/sockbits.h | 11 + linux-user/loongarch64/syscall_nr.h | 312 ++ linux-user/loongarch64/target_cpu.h | 34 + linux-user/loongarch64/target_elf.h | 12 + linux-user/loongarch64/target_errno_defs.h | 12 + linux-user/loongarch64/target_fcntl.h | 11 + linux-user/{arm => loongarch64}/target_prctl.h | 0 linux-user/loongarch64/target_resource.h | 11 + linux-user/loongarch64/target_signal.h | 13 + linux-user/loongarch64/target_structs.h | 11 + linux-user/loongarch64/target_syscall.h | 48 + linux-user/loongarch64/termbits.h | 11 + linux-user/syscall_defs.h | 6 +- meson.build | 6 +- po/LINGUAS | 1 + po/uk.po | 75 + scripts/clean-header-guards.pl | 4 +- scripts/clean-includes | 2 +- scripts/coverity-scan/COMPONENTS.md | 3 - scripts/gensyscalls.sh | 2 + scripts/qemu-binfmt-conf.sh | 9 +- target/arm/cpu.c | 7 - target/loongarch/README | 39 +- target/loongarch/cpu.c | 39 +- target/loongarch/cpu.h | 8 +- target/loongarch/csr_helper.c | 2 + target/loongarch/gdbstub.c | 2 +- target/loongarch/helper.h | 2 + target/loongarch/insn_trans/trans_privileged.c.inc | 36 + target/loongarch/internals.h | 2 + target/loongarch/op_helper.c | 10 +- target/ppc/cpu-models.c | 17 +- target/ppc/cpu-models.h | 14 +- target/ppc/cpu.h | 89 +- target/ppc/cpu_init.c | 29 +- target/ppc/dfp_helper.c | 65 + target/ppc/helper.h | 20 +- target/ppc/insn32.decode | 71 +- target/ppc/int_helper.c | 229 +- target/ppc/internal.h | 3 - target/ppc/translate/fixedpoint-impl.c.inc | 51 + target/ppc/translate/fp-impl.c.inc | 203 +- target/ppc/translate/fp-ops.c.inc | 9 - target/ppc/translate/vmx-impl.c.inc | 32 +- target/ppc/translate/vmx-ops.c.inc | 9 +- tcg/tci/tcg-target.c.inc | 7 - tcg/tci/tcg-target.h | 5 - tests/fp/meson.build | 3 + tests/qtest/migration-helpers.c | 14 + tests/qtest/migration-test.c | 59 +- tests/tcg/ppc64/Makefile.target | 1 + tests/tcg/ppc64le/Makefile.target | 1 + tests/tcg/ppc64le/mffsce.c | 37 + tests/unit/test-cutils.c | 42 +- ui/cocoa.m | 4 +- ui/console.c | 41 +- 123 files changed, 2740 insertions(+), 16100 deletions(-) create mode 100644 configs/targets/loongarch64-linux-user.mak delete mode 100644 disas/arm-a64.cc delete mode 100644 disas/libvixl/LICENCE delete mode 100644 disas/libvixl/README delete mode 100644 disas/libvixl/meson.build delete mode 100644 disas/libvixl/vixl/a64/assembler-a64.h delete mode 100644 disas/libvixl/vixl/a64/constants-a64.h delete mode 100644 disas/libvixl/vixl/a64/cpu-a64.h delete mode 100644 disas/libvixl/vixl/a64/decoder-a64.cc delete mode 100644 disas/libvixl/vixl/a64/decoder-a64.h delete mode 100644 disas/libvixl/vixl/a64/disasm-a64.cc delete mode 100644 disas/libvixl/vixl/a64/disasm-a64.h delete mode 100644 disas/libvixl/vixl/a64/instructions-a64.cc delete mode 100644 disas/libvixl/vixl/a64/instructions-a64.h delete mode 100644 disas/libvixl/vixl/code-buffer.h delete mode 100644 disas/libvixl/vixl/compiler-intrinsics.cc delete mode 100644 disas/libvixl/vixl/compiler-intrinsics.h delete mode 100644 disas/libvixl/vixl/globals.h delete mode 100644 disas/libvixl/vixl/invalset.h delete mode 100644 disas/libvixl/vixl/platform.h delete mode 100644 disas/libvixl/vixl/utils.cc delete mode 100644 disas/libvixl/vixl/utils.h rename docs/specs/{fw_cfg.txt => fw_cfg.rst} (58%) create mode 100644 hw/watchdog/spapr_watchdog.c create mode 100644 linux-user/loongarch64/cpu_loop.c create mode 100644 linux-user/loongarch64/signal.c create mode 100644 linux-user/loongarch64/sockbits.h create mode 100644 linux-user/loongarch64/syscall_nr.h create mode 100644 linux-user/loongarch64/target_cpu.h create mode 100644 linux-user/loongarch64/target_elf.h create mode 100644 linux-user/loongarch64/target_errno_defs.h create mode 100644 linux-user/loongarch64/target_fcntl.h copy linux-user/{arm => loongarch64}/target_prctl.h (100%) create mode 100644 linux-user/loongarch64/target_resource.h create mode 100644 linux-user/loongarch64/target_signal.h create mode 100644 linux-user/loongarch64/target_structs.h create mode 100644 linux-user/loongarch64/target_syscall.h create mode 100644 linux-user/loongarch64/termbits.h create mode 100644 po/uk.po create mode 100644 tests/tcg/ppc64le/mffsce.c -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (1bb1f55d64 -> 83f477f25a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/binutils-gdb. from 1bb1f55d64 gprofng: adjust GPROFNG_VARIANT adds 045f385d9a RISC-V: Added Zfhmin and Zhinxmin. adds 88de583569 gdb: LoongArch: Implement the push_dummy_call gdbarch method adds 309e147fbd GDB/testsuite: Add coverage for `print -elements' command adds 83f477f25a gdb: LoongArch: Fix typos in code comments No new revisions were added by this update. Summary of changes: bfd/elfxx-riscv.c | 97 ++-- .../gas/riscv/zfhmin-d-insn-class-fail-1.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-1.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-2.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-2.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-3.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-3.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-4.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-4.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-5.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-5.l | 2 + gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s | 4 + .../gas/riscv/{fp-zhinx-insns.d => zhinx.d} | 35 +- .../gas/riscv/{fp-zhinx-insns.s => zhinx.s} | 32 +- gdb/loongarch-tdep.c | 596 +++++++++++++++++++++ gdb/loongarch-tdep.h | 2 + gdb/testsuite/gdb.base/printcmds.exp | 9 + include/opcode/riscv.h | 7 +- opcodes/riscv-opc.c | 126 ++--- 19 files changed, 790 insertions(+), 143 deletions(-) create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s rename gas/testsuite/gas/riscv/{fp-zhinx-insns.d => zhinx.d} (82%) rename gas/testsuite/gas/riscv/{fp-zhinx-insns.s => zhinx.s} (85%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check/master-aarch64 updated (e16ebb56 -> 8ac74eb2)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check/master-aarch64 in repository toolchain/ci/base-artifacts. discards e16ebb56 0: update: binutils-gcc: 1 new 8ac74eb2 0: update: binutils-gcc: 1 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (e16ebb56) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check/master-aarch64 [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1588 -> 1604 bytes 02-prepare_abe/console.log.xz | Bin 2724 -> 2720 bytes 03-build_abe-binutils/console.log.xz | Bin 38796 -> 38324 bytes 04-build_abe-gcc/console.log.xz | Bin 213992 -> 211984 bytes 05-build_abe-dejagnu/console.log.xz | Bin 3852 -> 3924 bytes 06-build_abe-check_gcc/console.log.xz | Bin 2548 -> 2740 bytes 07-check_regression/console.log.xz | Bin 2344 -> 3420 bytes 07-check_regression/extra-bisect-params | 1 + 07-check_regression/fails.sum | 16 + 07-check_regression/results.compare | 35 +- 07-check_regression/results.compare2 | 89 +- 07-check_regression/results.regressions | 36 + 08-update_baseline/console.log | 242 +- 08-update_baseline/extra-bisect-params | 1 + 08-update_baseline/fails.sum | 16 + 08-update_baseline/results.compare | 35 +- 08-update_baseline/results.compare2 | 89 +- 08-update_baseline/results.regressions | 36 + jenkins/manifest.sh | 12 +- sumfiles/g++.log.xz | Bin 3557684 -> 3529676 bytes sumfiles/g++.sum | 123 +- sumfiles/gcc.log.xz | Bin 3046080 -> 3048620 bytes sumfiles/gcc.sum | 5102 +++++++++++++++---------------- sumfiles/gfortran.log.xz | Bin 1037840 -> 1040048 bytes sumfiles/gfortran.sum | 51 +- sumfiles/libatomic.log.xz | Bin 2188 -> 2184 bytes sumfiles/libatomic.sum | 4 +- sumfiles/libgomp.log.xz | Bin 204744 -> 205260 bytes sumfiles/libgomp.sum | 32 +- sumfiles/libitm.log.xz | Bin 2548 -> 2540 bytes sumfiles/libitm.sum | 6 +- sumfiles/libstdc++.log.xz | Bin 445664 -> 441428 bytes sumfiles/libstdc++.sum | 12 +- 33 files changed, 3171 insertions(+), 2767 deletions(-) create mode 100644 07-check_regression/extra-bisect-params create mode 100644 07-check_regression/fails.sum create mode 100644 07-check_regression/results.regressions create mode 100644 08-update_baseline/extra-bisect-params create mode 100644 08-update_baseline/fails.sum create mode 100644 08-update_baseline/results.regressions -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (6956840b5c00 -> fe62019387c9)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-project. from 6956840b5c00 Revert "Reland "[NFC] Add a missing test for for clang-repl"" adds 0f45eaf0da1f [RISCV] Add a scavenge spill slot when use ADDI to compute [...] adds 53dc0f107877 [NFC] Switch a few uses of undef to poison as placeholders [...] adds d100a30a5406 [AArch64] Regenerate more tests. NFC adds d71a8bb157ea [MLIR][Affine] Allow affine-expr on RHS in IntegerSet adds 13d58ff9f373 [RISCV] Replace call to APInt::countTrailingZeros with uin [...] adds 2aea8af25136 [libc++] Make _LIBCPP_DEBUG_RANDOMIZE_RANGE a function adds e1f61d864214 [gn build] Port 2aea8af25136 adds c1c3134ac422 [InstCombine] add tests for and-of-negated-lowbitmask; NFC adds f9f40aa10d98 [InstCombine] fold negated low-bit-mask to cmp+select adds b1f0efc06acc [clang-format] Tweak help text a bit adds 134363208b92 [clang] Fix gcc-6 compilation error. (NFC) adds a65a3bffd31f [clang-tidy] Don't treat invalid branches as identical adds f7a80c3d08d4 [clang-tidy] Properly forward clang-tidy output when runni [...] adds 2c3784cff859 [SCEV] recognize llvm.annotation intrinsic adds e98e13ac8f38 [mlir][Vector] Fold ShuffleOp(SplatOp(X), SplatOp(X)) to S [...] adds d2a35e4d39fe [AIX] Handling the label alignment of a global variable wi [...] adds 93d6fdfc232c [Driver] Ignore the clang modules validation-related flags [...] adds 8eb4dcb73747 [RISCV] Move some SHXADD matching cases into a ComplexPatt [...] adds d36e09cfe591 [RISCV] Add more SHXADD patterns. adds 1063dfc02853 [mlir][openmp] Added omp.taskloop adds 7283f48a05de [IR] Remove support for insertvalue constant expression adds b4694229aa9d [LV] Simplify setDebugLocFromInst by using early exit (NFC). adds f0089fae1d7e [AArch64] Add additional tests for D120481. adds 7fbf55c927f2 [mlir][Tensor] Move ParallelInsertSlice to the tensor dialect adds 9604601c9394 [SimplifyCFG] Remove redundant checks for hoisting (NFCI) adds 4887d047a31f [libc++][NFC] Replace enable_if with __enable_if_t in a fe [...] adds 04f6bf482b86 Revise outdated parts of the developer policy. adds 5f0a054f8954 [pseudo] Remove duplicated code in ClangPseudo.cpp adds c9fb3c6ea6cc [mlir][Tensor] Update ParallelInsertSlicOp semantics to ma [...] adds f4dd977537dc [AST] Use canonical constraint declaration for ASTContext: [...] adds 42f5b0509ded [mlir][NFC] Fix various warnings generated by GCC 9 adds cce64e7a9cba [DAG] visitTRUNCATE - move GetDemandedBits AFTER SimplifyD [...] adds f90f0e8fe7f5 [AMDGPU][GFX10][DOC][NFC] Update assembler syntax description adds bf89d24f5319 [AArch64] NFC: Move safe predicate casting to a separate f [...] adds 740633ff08ff [flang] Add TODO for derived types with final procedure adds 4905bcac00e6 [ConstantFolding] Check return value of ConstantFoldInstOp [...] adds 8e70258b18ba [AMDGPUCodeGenPrepare] Check result of ConstantFoldBinaryO [...] adds 19a1e20b8a0f [VectorCombine] Improve shuffle select shuffle-of-shuffles adds 25607d143d1d [libc++] Implement `std::ranges::merge` adds 3912928aa891 [gn build] Port 25607d143d1d adds 32a76fc292d9 [SCEVExpander] Avoid ConstantExpr::get() (NFCI) adds 93cbdaef0455 [Reassociate] Avoid ConstantExpr::get() adds 2de05afc192d [SLP] Peek into loads when hitting the RecursionMaxDepth adds 2ab260eecfab [llvm-ar][test] Add additional MRI script testing adds 4e6c30c8354f [libc] Add a separate algorithm_test. adds d7697c175db9 [flang] Avoid segfault when defining op is not a fir::Convert adds f93cd56262d1 [BPI] Avoid ConstantExpr::get() adds aa78c5298ea3 Fix MLIR Python CMake bug causing duplicate sources target. adds 644a965c1efe [LV] Vectorize cases with larger number of RT checks, exec [...] adds c06d0b4d02ea [RISCV] Add ADDI instr for computing FrameIndex address adds c146af3f469a [LoopVectorize][NFC] Reinstate TTICapture workaround for gcc-6 adds 8471c6861992 [LTO] Update remark test after 644a965c1efef6. adds 89cb8cae606b [Bitcode] Use bitcode input for test (NFC) adds abbd684c02c7 [InstCombine] Avoid ConstantExpr::get() in phi binop fold adds 10ebaf76860e [SLP] add test for load combining + shuffling; NFC adds fdf505f3f223 [mlir][OpenMP] omp.task translation to LLVM IR adds 2bfca3561466 [X86] Disable combineVectorSizedSetCCEquality for soft float. adds 5785717e18d5 [AArch64] Add support for insert/extract for nxv1i1 types. adds 2fde26dfcabe [mlir][Linalg][NFC] Make getReassociationMapForFoldingUnit [...] adds 9eb657278611 [LV] Add back CantReorderMemOps remark. adds c3839c0b46a9 CombineContractBroadcast should not create dims unused in LHS+RHS adds bc70ba814dc1 Use add_llvm_install_targets for install-llvmlibc adds b37dafd5dc83 [pseudo] Store shift and goto actions in a compact structu [...] adds 12d26ce9b0ec [flang] Make code more homogenous in CodeGen adds 47bdf53a5dba [clang-format] Break on AfterColon only if not followed by [...] adds 1ab37d996ce3 [clang-format] Update documentation adds 2a82c15f63d4 [LV] Consider runtime checks profitable if scalar cost is zero. adds 623250b51139 [X86] Regenerate fold-tied-op.ll test checks adds a4e2c1f76295 [Orc][LLJIT] Use JITLink on RISC-V adds b6178ccfe852 [OffloadPackager] Use appropriate kind for LTO bitcode adds 4276d00b1253 [InstCombine] add helper function for sub-of-min/max folds; NFC adds 8ef053273abf [InstCombine] add tests for sub of smin/smax; NFC adds 142aca7741d5 [InstCombine] fold sub of min/max of sub with common operand adds b2b4c8721db0 [InstCombine] Make use of low zero bits to determine exact [...] adds 063500afc0b8 [RISCV][NFC] Merge the isolated decleration into foreach. adds 98c6a3c0c220 [NFC][ASTImporter] remove the unnecessary condition checks [...] adds 85318d328102 [NFC] Remove unused test inputs adds 939352b6ec31 [RISCV][Clang] Teach RISCVEmitter to generate BitCast for [...] adds 5b4851ed9113 [LoongArch] Add codegen support for load/store operations adds b940fe6fe2af [LoongArch] Add codegen support for conditional branches adds 3610d5f5d4c2 [LoongArch] Add initial support for function calls adds 0c01f42fad41 [llvm-objcopy] -O binary: align sh_offset for section chan [...] adds 3e01af093f92 [mlir] Add InferIntRangeInterface to gpu.launch adds 2028fe6fbca6 [lld-macho] Handle LOH_ARM64_ADRP_LDR_GOT optimization hints adds 4996e3f68315 [test] Check for more -fsanitize=array-bounds behavior adds 66790b70ea14 [RISCV] Rename some variables for clarity. NFC adds f27672924e36 [RISCV] Replace an explicit check with an assert. adds 7a550212e8ff [clang-tidy] Fix confusable identifiers interaction with D [...] adds b094c737cd85 [flang] Avoid opaque pointer issue with character array su [...] adds b69c75d53f8d Revert "[VectorCombine] Improve shuffle select shuffle-of- [...] adds 00927334df9a [libc++] Use __is_exactly_{input, forward}_iterator adds 0d0bd17fcfbd [libc++] Fix __split_buffer::__construct_at_end definition [...] adds 4de0680fbf4e Fix use of pointer arithmetic instead of iterators. adds df5c981be35a [mlir][Linalg] Add DropUnitDims support for tensor::Parall [...] adds 774fc6349093 [LV] Consider minimum vscale assmuption for RT check cost. adds dfb77f2e99a1 [LLD][ELF] Add FORCE_LLD_DIAGNOSTICS_CRASH to force LLD to crash adds 77b13a57a930 [AArch64][SME] Add SME addha/va intrinsics adds 00cb1c33ee2e [InstCombine] add negtive tests for (%x & C) == 0 -> %x u< [...] adds dc46ae6df5f7 [lldb] Add support to load object files from thin archives adds b6ad8cbb3575 [gn build] (manually) port dfb77f2e99a1 adds b66220f25aea [InstCombine] [NFC] use C.isNegatedPowerOf2() instead of ( [...] adds 220366d5b545 [gn build] (manually) port 6b3956e123db adds b43dd2f6c4a3 [InstCombine] improve fold for icmp_eq_and to icmp_ult adds 271b470f3f1a [IndVars] Precommit test with redundant FPToSI. adds f8e658ec9ff5 [OpenCL] Remove fast_ half geometric builtins adds f6fa9985900e Fix tests with non-default CLANG_DEFAULT_LINKER adds 1666f09933ee [ARM] Add Support for Cortex-M85 adds ba14e4d65cdd [LLDB] Disable TestGdbRemoteFork* for Arm/AArch64 Linux adds f03b876e7e95 Reland "Reland "[NFC] Add a missing test for for clang-repl"" adds 98e52e8bff52 [VE] Restructure eliminateFrameIndex adds 9ad38e5288a1 Revert "[VE] Restructure eliminateFrameIndex" adds 3897d3cf71ef [clang-tidy] By-pass portability issues in confusable-iden [...] adds bc366183a592 Correct XFAIL according to bot owner's advice adds da5a6b2bf574 [VE] Restructure eliminateFrameIndex adds 3b2496e8faae [LLDB] Skip TestTwoHitsOneActual.py on Arm/AArch64 Linux adds 989270628226 Updating office hours adds 3c043ab007a1 [MLIR][Affine] Allow `<=` in IntegerSet constraints adds b7b11091efd2 [LLDB] Fix decorator import in TestTwoHitsOneActual.py adds 04c5fed5e0c6 [NFC] Fix wrong comment. adds e6ff553979e8 [clang-extdef-mapping] Directly process .ast files adds 02ab87f54305 [SimplifyCFG] Add additional jump threading test (NFC) adds ebb78a95cede [LV] Remove stray dbgs() call after 774fc63490939. adds dc969061c68e [SimplifyCFG] Thread all predecessors with same value at once adds 9fbf1107cc76 [pseudo] Eliminate LRTable::Action. NFC adds 8cd79bc12c36 [AMDGPU][GlobalISel] Support register offsets for SMRDs. adds 4696a33dfaef [AMDGPU][NFC] Refine matching SMRD offsets. adds 70c0d92930b2 [pseudo] Use the prebuilt cxx grammar for the lit tests, NFC. adds 6e2058e58832 [Compiler-RT] Remove FlushViewOfFile call when unmapping [...] adds e4d1d0cc2c9c [SCEV] Fix isImpliedViaMerge() with values from previous i [...] adds b27d6ffe4e4a [RuntimeDyld] Fix R_AARCH64_TSTBR14 relocation adds d26344731128 [pseudo] Fix the build for the benchmark tool. adds d1af09ad9617 [AMDGPU] gfx11 Generate VOPD Instructions adds f10d271ae27f [clang][dataflow] Handle null pointers of type std::nullptr_t adds 935570b2ad80 [ConstExpr] Don't create div/rem expressions adds 9ab67cc8bfe7 [pseudo] Implement guard extension. adds cccc03df3c17 [gn build] Port d1af09ad9617 adds cc6462a475e2 [mlir][tensor][bufferize][NFC] Clean up test case adds 0483c91eee9e [AMDGPU] gfx11 CodeGen for new DPP instructions adds 6c3c5f8069d9 [mlir][memref] Improve type inference for rank-reducing subviews adds a4772cbaf0dc Revert "[SimplifyCFG] Thread branches on same condition in [...] adds fb0654ced388 [mlir][interfaces][NFC] Remove ViewLikeInterface::expandToRank adds 58809a1eb1af [mlir][memref][NFC] Silence compiler warnings adds c35a6454b1af [BUILD] Add missed CMakeLists.txt change from dfb77f2 adds 12fd00ee1777 [AMDGPU] Add patterns for GFX11 v_minmax and v_maxmin inst [...] adds ed3b040b54f4 [MLIR][Presburger] Rename attachments to identifiers in Pr [...] adds e7a0fa4df00c [DAG] foldAddSubOfSignBit - don't bother creating the new [...] adds 7068c843d254 [DAG] visitREM - use isAllOnesOrAllOnesSplat instead of is [...] adds 988d4f576fdf Revert "[mlir][sparse] add more unittest cases to sparse d [...] adds e70ea18e2fde [Assembler] Name globals in test (NFC) adds 5493f8fc59ca [VectorCombine] Improve shuffle select shuffle-of-shuffles adds 07b185ed8157 [Thumb2] Remove unneeded IR from MIR test (NFC) adds 4dbc2876cff2 [AMDGPU] GFX11 trivial NFC tweaks adds a2158374ba1a [mlir][LLVMIR] Apply CallOp/CallableInterface on suitable [...] adds b8dbc6ffea93 [HLSL] Add ExternalSemaSource & vector alias adds dbf6ab5ef9ae [LSR] Fix bug for optimizing unused IVs to final values adds 7b1ff859feaa [gn build] Port b8dbc6ffea93 adds 5d7fa481cf4d [analyzer] Do not emit redundant SymbolCasts adds 2df120784af4 [analyzer] Fix assertion in simplifySymbolCast adds f51c47d98791 Revert "[lldb/test] Don't use preexec_fn for launching inferiors" adds 3f58177d7ffa [llvm-lib] Ignore /NODEFAULTLIB flag adds 0bb1bf1b1761 [LinkerWrapper] Add AMDGPU specific options to the LLD invocation adds f2beca908d4e [mlir][tblgen] Consistently use `$_ctxt` instead of `$_ctx` adds b170d856a3a3 [SimplifyCFG] Skip hoisting common instructions that retur [...] adds a0468a56f09b [InstCombine] add tests for sqrt libcalls; NFC adds 1562b1dcb978 [InstCombine] avoid conflict between CHECK prefix and valu [...] adds 312116748890 [pseudo] Add error-recovery framework & brace-based recovery adds d27d0a673c64 [Libomptarget][NFC] Make Libomptarget use the LLVM naming [...] adds 1d27faa5fec0 [AMDGPU] NFC. Add a test of the error message for assembli [...] adds 3ff319c69047 [PowerPC] PPCTLSDynamicCall does not preserve LiveIntervals adds c15bcad2f9c3 [RISCV] Update PreprocessISelDAG to use RemoveDeadNodes. adds a1cd3f49b680 [RISCV] Use a switch statement in PreprocessISelDAG. NFC adds ac3e26bcffa2 [RISCV] Add more SHXADD tests. NFC adds 05130a6ba7d9 new clang-tidy checker for assignments within condition cl [...] adds 6bb17d7fac6d [gn build] Port 05130a6ba7d9 adds 40af95d80bcb [clang-tools-extra] Fix a link in ReleaseNotes.rst adds 5cca2ef3c35a [LLDB] Remove TestLoadUnload.py Arm/Linux Xfail decorator adds a6e63e35ede4 [NFC][HLSL] Add tests for vector alias. Remove dead code. adds bb9b30ffbe7c [LLDB] Remove TestLoadUnload.py Arm/Linux Xfail decorator adds f553287b5889 [RISCV][Driver] Add libm linking to `RISCVToolchain` for C++ adds 9b1cf2e2b2a8 Fix running orc-rt tests with LLVM_BUILD_EXTERNAL_COMPILER [...] adds b97013fd6097 [AArch64][GlobalISel] Add support for sret demotion. adds 43d5c4d5394e [OpenMP] add 4 custom APIs supporting MSVC OMP codegen adds ab9cdf09f4f0 [mlir:Parser] Don't use strings for the "ugly" form of Att [...] adds 088bb8a328e0 [RISCV] Add more SHXADD patterns where the input is (and ( [...] adds ea8b811bf800 [lldb/Core] Fix finite progress event reporting adds 18e4674ea6fe [Sanitizer][Darwin] Fix log-path_test.cpp adds 92edd74b37c7 Allow non-variadic functions to be attributed with `__attr [...] adds db3013d684dd [mlir] Silence warnings when building with Clang ToT adds 18f230a89aa2 [Clang] Silence warning when building with MSVC 2022 adds 0880b9d52620 [Clang][unittests] Silence trucation warning with MSVC 2022 adds cf74b7ec80a8 [mlir][Vector] Fold InsertOp(SplatOp(X), SplatOp(X)) to Sp [...] adds 8ccc7e0aa461 [WebAssembly][NFC] Refactor table handling in WebAssembly: [...] adds 4dc46a174bf7 Revert "[WebAssembly][NFC] Refactor table handling in WebA [...] adds 484b4f357980 [WebAssembly][NFC] Refactor table handling in WebAssembly: [...] adds 35155a071678 [BOLT] Change mutex implementation adds 8bc5e7ac519f [AMDGPU] Additional liveness tests for si-optimize-exec-ma [...] adds e0612c91cd16 [ELF] Optimize getInputSections. NFC adds 3decc2f04d63 [mlir][Bazel] Fix Bazel build after a2158374ba1a6f81f4cce3 [...] adds 5b1ec705904a [LoongArch] Support lowering FrameIndex adds 9936d732cd17 [PowerPC] Simplify test for PR33636 (NFC) adds c2d1d9f942a4 [LoongArch] Implement prologue/epilogue insertion adds 02b38ba8aa6e [ConstFold] Salvage some div/rem folding test (NFC) adds 11950efe0682 [ConstExpr] Remove div/rem constant expressions adds 8ee913d83b17 [IR] Remove Constant::canTrap() (NFC) adds 20741c74c501 [llvm][AArch64] Fix "+all" feature for sysreg aliases adds 1ed8b2930248 [LoopVectorizationLegality] Drop unused variable (NFC) adds bb84e5eeffd1 [SelectionDAGISel] Drop unused variable (NFC) adds 86bd7e2065c9 [NFC][AMDGPU] Cleanup the SIOptimizeExecMasking pass. adds 851447cb3254 [InstCombine] remove useless insertelement adds e0af05574175 [Docs] Add release note for ARM's new -mframe-chain option adds f96cb66d1931 [ValueTracking] Accept Instruction in isSafeToSpeculativel [...] adds 4270c9cd44f2 [lldb] Stop passing both i386 and i686 in parallel as arch [...] adds 53d5aceb7078 [LoongArch] Add LoongArch support to update_llc_test_checks adds cfb2b2292f73 [AMDGPU] Add a MIR test for D127781 adds d29215790f0f [LoongArch] Add codegen support for division operations adds 1ee533afd0a6 [AMDGPU] Move all -global-isel RUN lines into main test file adds 73440ca9f878 [mlir] Define proper DenseMapInfo for Interfaces adds 9f492a9ae5cf [MIPS] Fix the ASAN shadow offset hook for the N32 ABI adds 5d8077565e41 [MIPS] Resolve issues in building ASAN for N32 ABI adds 30b6c51f515e [ORC][ORC_RT][AArch64] Implement TLS descriptor in ELFNixP [...] adds 2040fde9097a [libc++] Prefer __has_builtin for detecting compiler-provi [...] adds d5a559d906b5 [libc++] default-construct moved-from test-iterators adds e5fdcfac1bbe [lldb][AArch64] Use "+all" feature for the disassembler adds 2c915e3b2627 [mlir][OpenMP] Add if clause to OpenMP simd construct adds 5b3247bf9f71 [tbaa] Handle base classes in struct tbaa adds 0a9eb870f5f8 [WebAssembly][NFC] Reuse the regClassToValType helper in W [...] adds ed0e20d5e8c5 [clangd] Support external throttler for preamble builds adds 7d8e2742d958 [pseudo] Define recovery strategy as grammar extension. adds 923b56e7ca96 [NFC] Add a TODO comment to apply nounwind attribute in al [...] adds 511a7eef937e [clangd] Fix tests after ed0e20d5e8c5d6c679d2c adds 20962c124069 [SimplifyCFG] Don't split predecessors of callbr terminator adds beec3e8cb1be [WebAssembly][NFC] Consolidate TargetRegisterClass=>COPY o [...] adds 2044e4c53ee8 [AMDGPU][GFX1030][DOC][NFC] Update assembler syntax description adds 10f6d61bf191 [Clang][NFC] fix typo adds 08e4fe6c6196 [X86] Add RDPRU instruction adds cf7502a1ebe6 [LICM] Check opt output in test (NFC) adds f8e026457e51 [gn build] Port 08e4fe6c6196 adds 1023ddaf7790 [LLVM] Add the support for fmax and fmin in atomicrmw instruction adds b5b6d3a41b4e [Debugify] Port verify-debuginfo-preserve to NewPM adds a18f843f075f [MLIR][Presburger] Support lexicographic max/min union of [...] adds b484cbbc682c [IndVars] Regenerate test checks (NFC) adds e7db82d701d0 [AArch64] NFC: Fix name mangling in sve-insert-vector.ll adds 95e08824faba [AArch64] Add support for various operations on nxv1i1 types. adds e3dc56805f10 [Clang] Add a warning on invalid UTF-8 in comments. adds ed8ef65f3d93 [stackmaps] Start legalizing live variable operands adds 0f49d9e8d0dd [RISCV] Add test coverage for vectorizer tailfolding adds e4613d8e1bda [LV] Remove unnecessary memory checks from recurrence test adds f5b5398ebf7d [JITLink][RISCV] Ignore R_RISCV_RELAX and check R_RISCV_ALIGN adds 5d4f6ce22990 [AArch64][SVE] Zero other lanes when doing OR reduction on [...] adds e7fa272bc6a6 [clangd] Fix missing key function in PreambleThrottler adds b9513a70e16a [RISCV] Autogen a vectorizer test for ease of update adds f8cbe3cdf024 [libc++] Implement ranges::remove{, _if} adds fbb51ac0ba10 [X86] LowerShift - lower some shuffles directly to X86ISD: [...] adds 83837a61981c [Clang][OpenMP] Enable floating-point operation for `atomi [...] adds 65001f5777db [LTO][ELF] Add selective --save-temps= option adds d34ce04f98c3 [CMake][Fuchsia] Install static libuwind adds ff87ee4dee9c [Metadata] Utilize the resizing capability of MDNodes in M [...] adds 23c2bedfd93c [flang] Establish a single source of target information fo [...] adds fb06dd3e8ca1 Revert "[Clang] Add a warning on invalid UTF-8 in comments." adds 8a668671a08f [gn build] Port f8cbe3cdf024 adds ea2182fedd9d [BOLT] Add runtime functions required by freestanding environment adds e0b520865026 [NFC] [DirectX] Prefix for intrinsics should be dx adds 548f3f906148 Update the status & add tests for some more C99 DRs adds 484b1aa611ca [llvm] [Debuginfod] Add cpp-httplib optional dependency. adds 96515df816eb [PowerPC] Fix the check for scalar MASS conversion adds 8cb5c82ad23b [libc++] Improves pragma system_header test. adds 8366e21ef176 [llvm] [Debuginfod] Add HTTP Server to Debuginfod library. adds 4722b5d1330a [clang] Correct the macOS version that supports aligned al [...] adds 4174f0ca618b [Clang] Add a warning on invalid UTF-8 in comments. adds 67d82b50cff5 [gn build] (manually) port e0b520865026 adds 8f83f8f999fb [gn build] (manually) port 484b1aa611ca adds 9ee97ce3b830 [libc++] Use ABI tags instead of internal linkage to provi [...] adds 6148c79a64ff [gn build] (manually) port 9ee97ce3b8305c5 adds d1c33c60f365 [gn build] Port 8366e21ef176 adds d34315e71adf Removing this test temporarily beacuse of a failure in x86_64 adds 696f53665dc5 [AsmPrinter] Fix bit pattern for i1 vectors. adds babef908cc13 [llvm] [Debuginfod] DebuginfodCollection and DebuginfodSer [...] adds fe06b9f02ccd Bringing back the test with the required target related to [...] adds 39ed08f8d452 try to fix build after babef908cc1 adds bf45e27a676d [Clang] Fix invalid utf-8 detection adds a60360f99a6c [clang][NFC] Re-generate CommandLineReference.rst adds a638648fef76 [clangd] add inlay hints for std::forward-ed parameter packs adds e9fe20dab39e Revert "[Clang] Add a warning on invalid UTF-8 in comments." adds 66ae1d60bb27 [mlir][sparse] fix windows build error adds 9ad64cf02031 [flang] Add semantics test for coshape function adds 6d8e2f1e5177 [mlir][sparse] implement simple reshaping (expand/collapse) adds 6f4773f06428 [RISCV] Add codegen coverage for get.active.lane.mask adds 71c9757474c3 [Bazel] Fixup to llvmorg-15-init-15618-ge0b520865026, s/dxil/dx/ adds 682604738122 [LV] Remove redundant checks from recurrence test. adds 3703f5132718 [Debuginfod] Try to fix shared library build after babef90 [...] adds a3ac6891f8c4 [libc++] Fix a few things in RangesAlgorithms.csv adds aeaca854d123 [LoongArch] Add codegen support for handling floating poin [...] adds 0508fd5935d9 [flang][runtime] Make ENDFILE work after non-advancing READ adds 715283aa1792 [flang] Cope with overflow in real MOD/MODULO adds 061df07389f3 [flang][runtime] Fix directed UP/DOWN rounding edge case f [...] adds 89a99ec900d5 [GVN] Bug fix to reportMayClobberedLoad remark adds 21007259dc95 [AArch64][GlobalISel] update the test case with update_mir [...] adds c0db2b75ac1c [mlir][tblgen] Reverting fatality of assemblyFormat with s [...] adds 6052025b5813 [flang] Add IsElementalProcedure() predicate adds 121798fdb556 [sanitizer] Fix dn_expand test adds ac77649951db [flang] Avoid spurious warnings in pedantic mode from FORM [...] adds 7c708adb4a14 [flang][runtime] Trim FORMATs echoed to error messages adds 7c23138f1b9a [libc][NFC] Make explicit casts adds 362240e09e9e [mlir][Math] Support fold PowFOp with constant dense. adds c45ec53e7b85 [SystemZ] [z/OS] Use assignCalleeSavedSpillSlots() to mark [...] adds 7137ebc4cef2 [Debug] [Coroutine] Adjust the scope and name for coroutine frame adds e3b4452e078c [Debug] [Coroutines] Get rid of DW_ATE_address adds 17d48c316956 [VPlan] Move remove dead recipes before merging regions. adds b45829dcdf47 [AArch64][GlobalISel] update the gisel test case adds 819a7f98cd6d [Debuginfod] Try to fix clang-ppc64le-rhel build adds 9a04710b57fe [NFC][sanitizer] Format dn_expand interceptor adds 9cb00e7133ea [AArch64] Clean up vselect-ext.ll test, add tests with ne/ [...] adds 0826a5617885 [NFC] make ASTContext:isSame* methods const adds 152d92229580 [libc++][format] Improve floating-point formatters. adds 207e7e4a70f4 [libc++[format][NFC] Removes dead code. adds 011d2bf86487 [clang-tidy] Fix confusable identifier interaction with un [...] adds 66e15d4c01a9 [NFC] [Coroutines] Update the comments for lowering coro.save adds 40a4078e14c2 [BasicBlockUtils] Allow splitting predecessors with callbr [...] adds f066a0cd211f [llvm][Debuginfod][Bazel] Match dependencies in CMakeLists.txt. adds b6eeef071290 [LSR] Regenerate test checks (NFC) adds 15c3ba8a44ab [AArc64] Legalisation of compares and truncates of nxv1i1 types. adds 6106a767b723 [AArch64][SME] Update load/store intrinsics to take predic [...] adds a28ce1a42b39 [mlir][vector][bufferize] Fix transfer_write dropping mask [...] adds 14c30c70c459 [clang-format] Avoid crash in LevelIndentTracker. adds 4a579abd9f95 [GlobalsModRef] Don't override getModRefBehavior() for CallBase adds f45a3f7f9bf9 [VectorCombine] NFC: rename test extract-cmp-binop.ll to e [...] adds 519d7876cbee [VectorCombine] Avoid creating shuffle for extract-extract [...] new 60d6be5dd3f4 [LegalizeTypes] Replace vecreduce_xor/or/and with vecreduc [...] new 9f186bb125d6 [mlir][ods] Make Type- and AttrInterfaces also `Type`s and [...] new 1a92dbcfa88a [mlir][ods] Replace redundant `Type` instances for interfaces new 2db2a4e11240 [doc][ReleaseNotes] Document AArch64 SVE ABI fix from D127209 new 1d9086bf054c Fix use of uninitialized member in constructor new ff6e5508d686 [mlir] Structured transforms: introduce op splitting new 8e03bfc368f7 [mlir] Transform dialect: introduce merge_handles op new bd301a418bf2 [BOLT] Fix concurrent hash table modification in the instr [...] new 8d9dc83f35a3 X86: add newline to end of FMA instruction comments. new 606f7c8f7a77 [mlir][bufferization][NFC] Move more unknown type conversi [...] new fe62019387c9 lld: fix test after x86 instruction comments now end in newline The 11 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: bolt/runtime/common.h | 67 +- bolt/runtime/hugify.cpp | 4 +- bolt/runtime/instr.cpp | 8 +- .../bugprone/AssignmentInIfConditionCheck.cpp | 49 + .../bugprone/AssignmentInIfConditionCheck.h | 34 + .../clang-tidy/bugprone/BranchCloneCheck.cpp | 11 + .../clang-tidy/bugprone/BugproneTidyModule.cpp | 21 +- .../clang-tidy/bugprone/CMakeLists.txt | 1 + .../clang-tidy/misc/ConfusableIdentifierCheck.cpp | 72 +- clang-tools-extra/clangd/AST.cpp | 299 + clang-tools-extra/clangd/AST.h | 12 + clang-tools-extra/clangd/ClangdServer.cpp | 1 + clang-tools-extra/clangd/ClangdServer.h | 3 + clang-tools-extra/clangd/InlayHints.cpp | 131 +- clang-tools-extra/clangd/TUScheduler.cpp | 64 +- clang-tools-extra/clangd/TUScheduler.h | 34 +- .../clangd/unittests/InlayHintTests.cpp | 518 +- .../clangd/unittests/TUSchedulerTests.cpp | 144 + clang-tools-extra/docs/ReleaseNotes.rst | 9 + .../checks/bugprone/assignment-in-if-condition.rst | 23 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + clang-tools-extra/pseudo/benchmarks/Benchmark.cpp | 9 +- clang-tools-extra/pseudo/fuzzer/Fuzzer.cpp | 5 +- clang-tools-extra/pseudo/gen/Main.cpp | 18 + .../pseudo/include/clang-pseudo/GLR.h | 37 +- .../pseudo/include/clang-pseudo/Language.h | 29 + .../pseudo/include/clang-pseudo/cxx/CXX.h | 6 + .../pseudo/include/clang-pseudo/grammar/Grammar.h | 12 +- .../pseudo/include/clang-pseudo/grammar/LRGraph.h | 17 +- .../pseudo/include/clang-pseudo/grammar/LRTable.h | 230 +- clang-tools-extra/pseudo/lib/GLR.cpp | 311 +- clang-tools-extra/pseudo/lib/cli/CLI.cpp | 8 +- clang-tools-extra/pseudo/lib/cxx/CMakeLists.txt | 1 + clang-tools-extra/pseudo/lib/cxx/CXX.cpp | 42 + clang-tools-extra/pseudo/lib/cxx/cxx.bnf | 12 +- clang-tools-extra/pseudo/lib/grammar/Grammar.cpp | 7 +- .../pseudo/lib/grammar/GrammarBNF.cpp | 17 +- clang-tools-extra/pseudo/lib/grammar/LRGraph.cpp | 36 +- clang-tools-extra/pseudo/lib/grammar/LRTable.cpp | 78 +- .../pseudo/lib/grammar/LRTableBuild.cpp | 181 +- clang-tools-extra/pseudo/test/cxx/capture-list.cpp | 2 +- .../pseudo/test/cxx/contextual-keywords.cpp | 9 + .../pseudo/test/cxx/declarator-function.cpp | 2 +- .../pseudo/test/cxx/declarator-var.cpp | 2 +- .../pseudo/test/cxx/empty-member-spec.cpp | 4 +- clang-tools-extra/pseudo/test/cxx/keyword.cpp | 2 +- .../pseudo/test/cxx/mixed-designator.cpp | 2 +- .../pseudo/test/cxx/parameter-decl-clause.cpp | 2 +- .../pseudo/test/cxx/predefined-identifier.cpp | 2 +- .../pseudo/test/cxx/recovery-init-list.cpp | 13 + .../test/cxx/template-empty-type-parameter.cpp | 2 +- .../pseudo/test/cxx/unsized-array.cpp | 2 +- clang-tools-extra/pseudo/tool/ClangPseudo.cpp | 53 +- clang-tools-extra/pseudo/unittests/GLRTest.cpp | 329 +- clang-tools-extra/pseudo/unittests/LRTableTest.cpp | 22 +- .../test/clang-tidy/check_clang_tidy.py | 10 +- .../bugprone-assignment-in-if-condition.cpp | 103 + .../bugprone/branch-clone-unknown-expr.cpp | 9 + .../checkers/misc/confusable-identifiers.cpp | 96 +- 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.../FlowSensitive/DataflowAnalysisContext.cpp | 8 +- clang/lib/Basic/Targets/X86.cpp | 6 + clang/lib/Basic/Targets/X86.h | 1 + clang/lib/CodeGen/BackendUtil.cpp | 12 + clang/lib/CodeGen/CGCall.cpp | 3 + clang/lib/CodeGen/CGStmtOpenMP.cpp | 28 +- clang/lib/CodeGen/CodeGenTBAA.cpp | 37 +- clang/lib/Driver/ToolChains/Clang.cpp | 63 +- clang/lib/Driver/ToolChains/RISCVToolchain.cpp | 7 +- clang/lib/Format/ContinuationIndenter.cpp | 4 +- clang/lib/Format/Format.cpp | 25 +- clang/lib/Format/TokenAnnotator.cpp | 8 +- clang/lib/Format/UnwrappedLineFormatter.cpp | 2 +- clang/lib/Format/UnwrappedLineParser.cpp | 16 +- clang/lib/Frontend/FrontendAction.cpp | 8 + clang/lib/Headers/CMakeLists.txt | 1 + clang/lib/Headers/hlsl/hlsl_basic_types.h | 54 +- clang/lib/Headers/opencl-c.h | 18 - clang/lib/Headers/rdpruintrin.h | 57 + clang/lib/Headers/x86intrin.h | 4 + clang/lib/Sema/CMakeLists.txt | 1 + clang/lib/Sema/HLSLExternalSemaSource.cpp | 96 + clang/lib/Sema/SemaChecking.cpp | 335 +- clang/lib/Sema/SemaDeclAttr.cpp | 8 +- clang/lib/Sema/SemaOpenMP.cpp | 7 +- clang/lib/StaticAnalyzer/Core/SValBuilder.cpp | 6 + clang/runtime/CMakeLists.txt | 2 +- clang/test/AST/HLSL/vector-alias.hlsl | 53 + clang/test/Analysis/func-mapping-test.cpp | 2 + clang/test/Analysis/produce-symbolcast_x86.cpp | 9 + clang/test/Analysis/symbolcast-floatingpoint.cpp | 24 + clang/test/C/drs/dr253.c | 27 + clang/test/C/drs/dr2xx.c | 108 + clang/test/CodeGen/arm-target-features.c | 3 + clang/test/CodeGen/bounds-checking-fam.c | 45 +- clang/test/CodeGen/lower-mass-end-to-end.c | 148 + clang/test/CodeGen/rdpru-builtins.c | 37 + clang/test/CodeGen/tbaa-class.cpp | 59 +- clang/test/CodeGenCUDA/managed-var.cu | 6 +- clang/test/CodeGenObjC/exceptions.m | 15 +- clang/test/CodeGenObjCXX/exceptions-legacy.mm | 11 +- clang/test/Driver/arm-cortex-cpus-2.c | 3 + clang/test/Driver/arm-nofp-disabled-features.c | 2 + clang/test/Driver/arm-nopacbti-disabled-features.c | 7 + clang/test/Driver/instrprof-ld.c | 4 +- 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.../AMDGPU/memory-legalizer-global-wavefront.ll | 504 +- .../AMDGPU/memory-legalizer-global-workgroup.ll | 504 +- .../CodeGen/AMDGPU/memory-legalizer-local-agent.ll | 552 +- .../AMDGPU/memory-legalizer-local-nontemporal.ll | 12 +- .../AMDGPU/memory-legalizer-local-singlethread.ll | 552 +- .../AMDGPU/memory-legalizer-local-system.ll | 552 +- .../AMDGPU/memory-legalizer-local-volatile.ll | 24 +- .../AMDGPU/memory-legalizer-local-wavefront.ll | 552 +- .../AMDGPU/memory-legalizer-local-workgroup.ll | 552 +- .../AMDGPU/memory-legalizer-private-nontemporal.ll | 12 +- .../AMDGPU/memory-legalizer-private-volatile.ll | 12 +- llvm/test/CodeGen/AMDGPU/minmax.ll | 422 + .../opt-exec-masking-pre-ra-update-liveness.mir | 215 +- llvm/test/CodeGen/AMDGPU/verify-vopd.mir | 11 + llvm/test/CodeGen/AMDGPU/vopc_dpp.mir | 68 + llvm/test/CodeGen/AMDGPU/vopd-combine.mir | 543 + llvm/test/CodeGen/AMDGPU/waitcnt-vinterp.mir | 28 + llvm/test/CodeGen/AMDGPU/wqm-gfx11.ll | 8 +- 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74 +- .../test/CodeGen/RISCV/urem-seteq-illegal-types.ll | 4 +- .../CodeGen/Thumb2/constant-islands-cbzundef.mir | 30 +- llvm/test/CodeGen/VE/Scalar/load_stk.ll | 795 ++ llvm/test/CodeGen/VE/Scalar/store_stk.ll | 808 ++ llvm/test/CodeGen/X86/critical-edge-split-2.ll | 40 - llvm/test/CodeGen/X86/fold-tied-op.ll | 119 +- llvm/test/CodeGen/X86/nonconst-static-div.ll | 12 - llvm/test/CodeGen/X86/nonconst-static-iv.ll | 8 - llvm/test/CodeGen/X86/pr33396.ll | 27 - .../test/CodeGen/X86/pr49839-trapping-aggregate.ll | 33 - llvm/test/CodeGen/X86/pr56351.ll | 18 + llvm/test/CodeGen/X86/rdpru.ll | 85 + llvm/test/CodeGen/X86/selectiondag-dominator.ll | 30 - .../CodeGen/X86/selectiondag-stackmap-legalize.ll | 152 + .../DebugInfo/debugify-original-no-dbg-info.ll | 2 +- llvm/test/DebugInfo/verify-di-preserve.ll | 52 + .../RuntimeDyld/AArch64/ELF_ARM64_TSTBR14.s | 14 + llvm/test/Instrumentation/cgprofile.ll | 2 +- llvm/test/LTO/X86/diagnostic-handler-remarks.ll | 4 +- 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llvm/test/tools/UpdateTestChecks/update_llc_test_checks/loongar [...] create mode 100644 llvm/unittests/Debuginfod/HTTPServerTests.cpp create mode 100644 mlir/include/mlir/Dialect/OpenMP/OpenMPTypeInterfaces.td create mode 100644 mlir/lib/Dialect/GPU/IR/InferIntRangeInterfaceImpls.cpp create mode 100644 mlir/lib/Dialect/Linalg/Transforms/Split.cpp create mode 100644 mlir/test/Dialect/GPU/int-range-interface.mlir create mode 100644 mlir/test/Dialect/LLVMIR/callgraph.mlir create mode 100644 mlir/test/Dialect/Linalg/transform-op-split.mlir create mode 100644 mlir/test/Dialect/SparseTensor/rewriting.mlir create mode 100644 mlir/test/IR/affine-set.mlir create mode 100644 mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_reshape.mlir create mode 100644 mlir/test/mlir-tblgen/interfaces-as-constraints.td create mode 100644 mlir/unittests/IR/InterfaceTest.cpp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/gcc] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto updated (b33dd787452 -> 9fc61fc8da9)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto in repository toolchain/ci/gcc. from b33dd787452 analyzer: fix uninit false positive with -ftrivial-auto-var [...] adds c061e99b7de [Ada] Fix spurious error for aggregate with box component choice adds 3fdb556c838 [Ada] Restore accidentally removed part of a comment about [...] adds 405ebd743d3 [Ada] Remove explicit call to Make_Unchecked_Type_Conversion adds 614c45555a1 [Ada] Incorrect emptying of CUDA global subprograms adds 56311a3c9f2 [Ada] Remove old vxworks from Makefile.rtl - e500 port. adds baa3015d8ef [Ada] Fix incorrect itype sharing for case expression in li [...] adds 35e0aa2df74 [Ada] Vxworks7* - Makefile.rtl rtp vs rtp-smp cleanup adds b65a875a7c1 [Ada] Cleanup use of local scalars in GNAT.Socket.Get_Address_Info adds 3202e9f88fd [Ada] Handle secondary stack memory allocations alignment adds 28add0a4c82 [Ada] Missing error on tagged type conversion adds be3bdaa1a53 [Ada] Support ghost generic formal parameters adds 0d7fbcf10f0 [Ada] Spurious non-callable warning on prefixed call in cla [...] adds 870518bfe25 [Ada] Indexing error when calling GNAT.Regpat.Match adds e5802d60130 [Ada] Deferred constant considered as not preelaborable adds cd7d1f448a4 [Ada] Document the various function return mechanisms adds 889db59e6e7 [Ada] Do not give warnings for compiler-generated entities [...] adds 940bbc4363b [Ada] Small tweak to gnat_to_gnu_subprog_type adds 40242ebb71e [Ada] Fix crash on aliased renaming of unconstrained array adds 1141fbd71ea [Ada] Improve code generated for aggregates of VFA type adds fc84bb8c167 [Ada] Update comment after recent changes wrt. secondary st [...] adds 9e0d5db3e04 [Ada] Simplify regular expression that matches 8 consecutiv [...] adds 71c05bb8e2b analyzer: show close event for use_after_close diagnostic adds 3a6de2b2db5 analyzer: reorder initialization of state m_invalid in sm-f [...] adds acb696b792e analyzer: add testcase of using closed fd without warning. adds c785204735b d: Build the D sources in the front-end with -fno-exceptions adds 208fbc779c7 d: Merge upstream dmd 56589f0f4, druntime 651389b5, phobos [...] adds e46f4d7430c diagnostics: Honor #pragma GCC diagnostic in the preprocess [...] adds 2f0d819a81e Define 'OMP_REQUIRES_[...]', 'GOMP_REQUIRES_[...]' in a sin [...] adds 3f05e03d6cf Restore 'GOMP_offload_unregister_ver' functionality adds 4bc92c3bfab Daily bump. adds ee915c72da2 libsanitizer: Cherry-pick 5d8077565e41 from upstream adds 7922f5ee649 Mips: Fix the ASAN shadow offset hook for the n32 ABI adds e5a9d603178 Speed up LC SSA rewrite adds 1e1fdb729d9 Speed up LC SSA rewrite more adds c1b1c4e58bd testsuite: Fix incorrect -mfloat128-type option adds 8bc24394376 target/106219 - proprly mark builtins pure via ix86_add_new [...] adds 99831ceb872 Adjust 'libgomp.c-c++-common/requires-3.c' adds 5647e2c3853 Enhance 'libgomp.c-c++-common/requires-4.c', 'libgomp.c-c++ [...] adds 9ef714539cb Fix Intel MIC 'mkoffload' for OpenMP 'requires' adds 9fc61fc8da9 Speedup update-ssa some more No new revisions were added by this update. Summary of changes: gcc/ChangeLog | 10 + gcc/DATESTAMP | 2 +- gcc/ada/ChangeLog | 171 ++++++ gcc/ada/Makefile.rtl | 74 +-- gcc/ada/exp_aggr.adb | 11 +- gcc/ada/exp_ch3.adb | 148 ++--- gcc/ada/exp_ch6.adb | 47 +- gcc/ada/freeze.adb | 75 --- gcc/ada/freeze.ads | 9 - gcc/ada/gcc-interface/Make-lang.in | 2 +- gcc/ada/gcc-interface/decl.cc | 38 +- gcc/ada/gcc-interface/gigi.h | 4 + gcc/ada/gcc-interface/trans.cc | 24 +- gcc/ada/gcc-interface/utils2.cc | 10 +- gcc/ada/ghost.adb | 142 ++++- gcc/ada/ghost.ads | 27 + gcc/ada/gnat_cuda.adb | 9 +- gcc/ada/libgnat/g-socket.adb | 8 +- gcc/ada/libgnat/s-imageu.ads | 21 +- gcc/ada/libgnat/s-regpat.adb | 33 +- gcc/ada/libgnat/s-regpat.ads | 29 +- gcc/ada/libgnat/s-secsta.adb | 73 ++- gcc/ada/libgnat/s-secsta.ads | 26 +- gcc/ada/libgnat/s-valuei.ads | 21 +- gcc/ada/libgnat/s-valuti.ads | 27 +- gcc/ada/libgnat/system-vxworks7-e500-kernel.ads | 160 ----- gcc/ada/libgnat/system-vxworks7-e500-rtp-smp.ads | 165 ------ gcc/ada/libgnat/system-vxworks7-e500-rtp.ads | 164 ------ gcc/ada/sem_aggr.adb | 82 +++ gcc/ada/sem_ch12.adb | 113 +++- gcc/ada/sem_ch4.adb | 23 +- gcc/ada/sem_prag.adb | 3 + gcc/ada/sem_res.adb | 137 +++-- gcc/ada/sem_util.adb | 50 +- gcc/ada/sem_util.ads | 11 + gcc/ada/tbuild.adb | 4 +- gcc/analyzer/ChangeLog | 22 + gcc/analyzer/sm-fd.cc | 20 +- gcc/c-family/ChangeLog | 40 ++ gcc/c-family/c-common.cc | 14 + gcc/c-family/c-common.h | 2 + gcc/c-family/c-ppoutput.cc | 78 ++- gcc/c-family/c-pragma.cc | 425 +++++++++++--- gcc/c-family/c-pragma.h | 13 +- gcc/config/gcn/mkoffload.cc | 8 +- gcc/config/i386/i386-builtins.cc | 2 + gcc/config/i386/intelmic-mkoffload.cc | 56 +- gcc/config/mips/mips.cc | 7 +- gcc/config/mips/mips.h | 7 - gcc/config/nvptx/mkoffload.cc | 8 +- gcc/cp/ChangeLog | 15 + gcc/cp/parser.cc | 89 ++- gcc/d/ChangeLog | 9 + gcc/d/Make-lang.in | 6 +- gcc/d/dmd/MERGE | 2 +- gcc/d/dmd/cparse.d | 118 +++- gcc/d/dmd/dmodule.d | 2 +- gcc/d/dmd/expressionsem.d | 8 + gcc/d/dmd/globals.d | 2 +- gcc/d/dmd/globals.h | 2 +- gcc/d/dmd/hdrgen.d | 17 +- gcc/d/dmd/mtype.d | 15 +- gcc/d/dmd/tokens.d | 5 +- gcc/d/dmd/tokens.h | 1 + gcc/d/dmd/typesem.d | 9 +- gcc/omp-general.h | 8 +- gcc/testsuite/ChangeLog | 32 + gcc/testsuite/c-c++-common/pragma-diag-11.c | 13 + gcc/testsuite/c-c++-common/pragma-diag-12.c | 10 + gcc/testsuite/c-c++-common/pragma-diag-13.c | 4 + gcc/testsuite/g++.dg/pr106219.C | 31 + gcc/testsuite/gcc.dg/analyzer/fd-4.c | 14 +- .../gcc.target/powerpc/ppc-fortran/pr80108-1.f90 | 2 +- gcc/testsuite/gdc.test/compilable/test3004.d | 4 +- gcc/testsuite/gdc.test/compilable/vcg-ast.d | 3 + .../gdc.test/fail_compilation/diag_in_array.d | 20 + gcc/tree-into-ssa.cc | 36 +- gcc/tree-ssa-loop-manip.cc | 119 ++-- include/ChangeLog | 4 + include/gomp-constants.h | 3 +- libgomp/ChangeLog | 6 + libgomp/target.c | 34 +- libgomp/testsuite/lib/libgomp.exp | 5 + .../testsuite/libgomp.c-c++-common/requires-1.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-3.c | 2 +- .../testsuite/libgomp.c-c++-common/requires-4.c | 21 +- .../testsuite/libgomp.c-c++-common/requires-5.c | 22 +- .../testsuite/libgomp.c-c++-common/requires-7.c | 2 +- libgomp/testsuite/libgomp.fortran/requires-1.f90 | 2 +- libphobos/ChangeLog | 5 + libphobos/libdruntime/MERGE | 2 +- libphobos/libdruntime/core/internal/parseoptions.d | 17 + libphobos/libdruntime/core/thread/osthread.d | 9 + libphobos/libdruntime/rt/aApply.d | 108 +++- libphobos/libdruntime/rt/aApplyR.d | 71 ++- libphobos/libdruntime/rt/aaA.d | 39 +- libphobos/libdruntime/rt/arrayassign.d | 83 ++- libphobos/libdruntime/rt/lifetime.d | 378 ++++++++---- libphobos/src/MERGE | 2 +- libphobos/src/std/complex.d | 4 +- libphobos/src/std/file.d | 35 +- libphobos/src/std/math/exponential.d | 648 ++++++++++++--------- libsanitizer/sanitizer_common/sanitizer_linux.cpp | 17 +- libsanitizer/sanitizer_common/sanitizer_platform.h | 2 +- 104 files changed, 3116 insertions(+), 1658 deletions(-) delete mode 100644 gcc/ada/libgnat/system-vxworks7-e500-kernel.ads delete mode 100644 gcc/ada/libgnat/system-vxworks7-e500-rtp-smp.ads delete mode 100644 gcc/ada/libgnat/system-vxworks7-e500-rtp.ads create mode 100644 gcc/testsuite/c-c++-common/pragma-diag-11.c create mode 100644 gcc/testsuite/c-c++-common/pragma-diag-12.c create mode 100644 gcc/testsuite/c-c++-common/pragma-diag-13.c create mode 100644 gcc/testsuite/g++.dg/pr106219.C create mode 100644 gcc/testsuite/gdc.test/fail_compilation/diag_in_array.d -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto updated (ad349f2493 -> a2a176c46b)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto in repository toolchain/ci/binutils-gdb. from ad349f2493 Descriptive DWARF operations dump support for DW_AT_rank adds c975cec5ff x86: fix 3-operand insn reverse-matching adds 3d0738af2a x86: fold two switch() statements in match_template() adds 8bd915b770 x86: make D attribute usable for XOP and FMA4 insns adds fb5a4a581d elf: Copy p_align of PT_GNU_STACK for stack alignment adds 41bbac64c3 gprofng: implement a functional gp-display-html adds 2025522ac7 Automatic date update in version.in adds 9b5ebf652b PR29320, 'struct obstack' declared inside parameter list adds 37cf60c6a6 RISC-V: Fix requirement handling on Zhinx+{D,Q} adds 3d5d6bd554 RISC-V: Fix disassembling Zfinx with -M numeric adds 1bb1f55d64 gprofng: adjust GPROFNG_VARIANT adds 045f385d9a RISC-V: Added Zfhmin and Zhinxmin. adds 88de583569 gdb: LoongArch: Implement the push_dummy_call gdbarch method adds 309e147fbd GDB/testsuite: Add coverage for `print -elements' command adds 83f477f25a gdb: LoongArch: Fix typos in code comments adds a2a176c46b Fix pedantically invalid DWARF in gdb.trace/unavailable-dwar [...] No new revisions were added by this update. Summary of changes: bfd/elf.c | 4 +- bfd/elfxx-riscv.c | 77 +- bfd/version.h | 2 +- gas/as.h | 2 + gas/config/tc-i386.c | 67 +- gas/frags.h | 2 - gas/testsuite/gas/i386/inval-avx.l | 25 +- gas/testsuite/gas/i386/inval-avx.s | 6 + .../gas/riscv/zfhmin-d-insn-class-fail-1.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-1.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-2.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-2.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-3.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-3.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-4.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-4.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-5.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-5.l | 2 + gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s | 4 + gas/testsuite/gas/riscv/zfinx-dis-numeric.d | 10 + gas/testsuite/gas/riscv/zfinx-dis-numeric.s | 2 + .../gas/riscv/{fp-zhinx-insns.d => zhinx.d} | 37 +- .../gas/riscv/{fp-zhinx-insns.s => zhinx.s} | 32 +- gdb/loongarch-tdep.c | 596 + gdb/loongarch-tdep.h | 2 + gdb/testsuite/gdb.base/printcmds.exp | 9 + .../gdb.trace/unavailable-dwarf-piece.exp | 4 +- gprofng/gp-display-html/gp-display-html.in | 14631 ++++++++++++++++++- gprofng/libcollector/configure | 23 +- gprofng/libcollector/configure.ac | 23 +- include/opcode/riscv.h | 7 +- opcodes/i386-opc.h | 3 + opcodes/i386-opc.tbl | 75 +- opcodes/i386-tbl.h | 700 +- opcodes/riscv-dis.c | 2 +- opcodes/riscv-opc.c | 126 +- 36 files changed, 15430 insertions(+), 1066 deletions(-) create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s create mode 100644 gas/testsuite/gas/riscv/zfinx-dis-numeric.d create mode 100644 gas/testsuite/gas/riscv/zfinx-dis-numeric.s rename gas/testsuite/gas/riscv/{fp-zhinx-insns.d => zhinx.d} (81%) rename gas/testsuite/gas/riscv/{fp-zhinx-insns.s => zhinx.s} (85%) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto updated (cdd252e2 -> 9718c56a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_lto in repository toolchain/ci/base-artifacts. discards cdd252e2 0: update: binutils-gcc: 2 new 9718c56a 0: update: binutils-gcc: 2 This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (cdd252e2) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-arm [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1608 -> 1600 bytes 02-prepare_abe/console.log.xz | Bin 2748 -> 2712 bytes 04-build_abe-binutils/console.log.xz | Bin 51716 -> 52060 bytes 05-build_abe-bootstrap_lto/console.log.xz | Bin 473100 -> 470888 bytes 06-check_regression/console.log.xz | Bin 416 -> 416 bytes 07-update_baseline/console.log | 18 +++++++++--------- jenkins/manifest.sh | 12 ++++++------ 7 files changed, 15 insertions(+), 15 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

3 years, 2 months

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[toolchain/ci/binutils-gdb] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (dcc9b683dc -> 83f477f25a)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/binutils-gdb. from dcc9b683dc Automatic date update in version.in adds 1e3a4f12e7 Automatic date update in version.in adds 0f2f2e7019 RISC-V: Update Zihintpause extension version adds 9386188e95 x86-64: improve handling of branches to absolute addresses adds 02b83698ef x86: restore masking of displacement kinds adds a775efc84d x86: fold Disp32S and Disp32 adds 58098fd779 gas/testsuite: properly exclude aout in all/weakref1u adds 2c474c4694 [gdb/symtab] Add get/set functions for per_cu->lang/unit_type adds a0f3a4c646 opcodes/avr: Implement style support in the disassembler adds 407115429b Modified changes for split-dwarf and dwarf-5. adds d8efadbdd9 Synchronize libbierty sources with gcc. adds 0772daccb3 objcopy: bfd_alloc orelocation adds eeeaf705fe alloc gas seginfo on notes obstack adds 96c33f79de Fix snafu in rust demangler recursion limit code adds 10e52570b8 Automatic date update in version.in adds 8180707f90 x86: de-duplicate sub-architecture strings accumulation adds 6ceeed2506 x86: macro-ize cpu_arch[] entries adds c368d2a802 x86: introduce fake processor type to mark sub-arch entries [...] adds 4694a0e5fe Support for location and range lists for split-dwarf and dwarf-5. adds 736918239b gdb: LoongArch: add orig_a0 into register set adds 3acd9a692d Make 'import gdb.events' work adds 99298c958c Add gdb.Objfile.is_file attribute adds 22f8e2e726 [gdb/exp] Fix internal error when printing C++ pointer-to-member adds 8df9766816 Automatic date update in version.in adds d92c7521f9 x86: don't leak sub-architecture accumulated strings adds 3ce2ebcf88 x86: permit "default" with .arch adds ae89daecb1 x86: generalize disabling of sub-architectures adds f68697e823 x86: introduce a state stack for .arch adds ad349f2493 Descriptive DWARF operations dump support for DW_AT_rank adds c975cec5ff x86: fix 3-operand insn reverse-matching adds 3d0738af2a x86: fold two switch() statements in match_template() adds 8bd915b770 x86: make D attribute usable for XOP and FMA4 insns adds fb5a4a581d elf: Copy p_align of PT_GNU_STACK for stack alignment adds 41bbac64c3 gprofng: implement a functional gp-display-html adds 2025522ac7 Automatic date update in version.in adds 9b5ebf652b PR29320, 'struct obstack' declared inside parameter list adds 37cf60c6a6 RISC-V: Fix requirement handling on Zhinx+{D,Q} adds 3d5d6bd554 RISC-V: Fix disassembling Zfinx with -M numeric adds 1bb1f55d64 gprofng: adjust GPROFNG_VARIANT adds 045f385d9a RISC-V: Added Zfhmin and Zhinxmin. adds 88de583569 gdb: LoongArch: Implement the push_dummy_call gdbarch method adds 309e147fbd GDB/testsuite: Add coverage for `print -elements' command adds 83f477f25a gdb: LoongArch: Fix typos in code comments No new revisions were added by this update. Summary of changes: ChangeLog | 13 + bfd/elf.c | 4 +- bfd/elfxx-riscv.c | 79 +- bfd/version.h | 2 +- binutils/bucomm.c | 13 + binutils/bucomm.h | 2 + binutils/dwarf.c | 54 +- binutils/dwarf.h | 2 + binutils/objcopy.c | 37 +- gas/as.h | 3 + gas/config/tc-i386-intel.c | 9 +- gas/config/tc-i386.c | 996 +- gas/config/tc-i386.h | 8 +- gas/doc/c-i386.texi | 3 +- gas/frags.h | 2 - gas/output-file.c | 42 +- gas/subsegs.c | 37 +- gas/testsuite/gas/all/weakref1u.d | 2 +- gas/testsuite/gas/i386/arch-dflt.l | 19 + gas/testsuite/gas/i386/arch-dflt.s | 14 + gas/testsuite/gas/i386/arch-stk.l | 43 + gas/testsuite/gas/i386/arch-stk.s | 34 + gas/testsuite/gas/i386/i386.exp | 3 + gas/testsuite/gas/i386/inval-avx.l | 25 +- gas/testsuite/gas/i386/inval-avx.s | 6 + gas/testsuite/gas/i386/x86-64-branch-6.d | 21 + gas/testsuite/gas/i386/x86-64-branch-6.e | 7 + gas/testsuite/gas/i386/x86-64-branch-6.s | 18 + .../gas/riscv/zfhmin-d-insn-class-fail-1.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-1.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-2.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-2.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-3.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-3.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-4.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-4.l | 2 + .../gas/riscv/zfhmin-d-insn-class-fail-5.d | 3 + .../gas/riscv/zfhmin-d-insn-class-fail-5.l | 2 + gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s | 4 + gas/testsuite/gas/riscv/zfinx-dis-numeric.d | 10 + gas/testsuite/gas/riscv/zfinx-dis-numeric.s | 2 + .../gas/riscv/{fp-zhinx-insns.d => zhinx.d} | 37 +- .../gas/riscv/{fp-zhinx-insns.s => zhinx.s} | 32 +- gdb/NEWS | 3 + gdb/cp-valprint.c | 5 +- gdb/doc/python.texi | 7 + gdb/dwarf2/cooked-index.c | 10 +- gdb/dwarf2/cu.c | 2 +- gdb/dwarf2/index-write.c | 2 +- gdb/dwarf2/read.c | 223 +- gdb/dwarf2/read.h | 41 +- gdb/features/loongarch/base32.c | 1 + gdb/features/loongarch/base32.xml | 1 + gdb/features/loongarch/base64.c | 1 + gdb/features/loongarch/base64.xml | 1 + gdb/loongarch-linux-nat.c | 2 + gdb/loongarch-linux-tdep.c | 8 + gdb/loongarch-tdep.c | 597 + gdb/loongarch-tdep.h | 9 +- gdb/python/lib/gdb/__init__.py | 5 + gdb/python/py-evtregistry.c | 4 +- gdb/python/py-evts.c | 28 +- gdb/python/py-objfile.c | 14 + gdb/python/python-internal.h | 4 +- gdb/python/python.c | 16 +- gdb/testsuite/gdb.base/jit-reader.exp | 12 + gdb/testsuite/gdb.base/printcmds.exp | 9 + gdb/testsuite/gdb.cp/pointer-to-member.cc | 34 + gdb/testsuite/gdb.cp/pointer-to-member.exp | 28 + gdb/testsuite/gdb.python/py-events.exp | 2 + gprofng/gp-display-html/gp-display-html.in | 14631 ++++++++++- gprofng/libcollector/configure | 23 +- gprofng/libcollector/configure.ac | 23 +- include/opcode/riscv.h | 7 +- libiberty/ChangeLog | 146 +- libiberty/configure | 1 + libiberty/configure.ac | 1 + libiberty/rust-demangle.c | 47 +- opcodes/ChangeLog | 9 + opcodes/avr-dis.c | 51 +- opcodes/disassemble.c | 5 + opcodes/i386-gen.c | 10 +- opcodes/i386-init.h | 132 +- opcodes/i386-opc.h | 8 +- opcodes/i386-opc.tbl | 90 +- opcodes/i386-tbl.h | 25959 +++++++++---------- opcodes/riscv-dis.c | 2 +- opcodes/riscv-opc.c | 126 +- 88 files changed, 29411 insertions(+), 14537 deletions(-) create mode 100644 gas/testsuite/gas/i386/arch-dflt.l create mode 100644 gas/testsuite/gas/i386/arch-dflt.s create mode 100644 gas/testsuite/gas/i386/arch-stk.l create mode 100644 gas/testsuite/gas/i386/arch-stk.s create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.d create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.e create mode 100644 gas/testsuite/gas/i386/x86-64-branch-6.s create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-1.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-2.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-3.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-4.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.d create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail-5.l create mode 100644 gas/testsuite/gas/riscv/zfhmin-d-insn-class-fail.s create mode 100644 gas/testsuite/gas/riscv/zfinx-dis-numeric.d create mode 100644 gas/testsuite/gas/riscv/zfinx-dis-numeric.s rename gas/testsuite/gas/riscv/{fp-zhinx-insns.d => zhinx.d} (81%) rename gas/testsuite/gas/riscv/{fp-zhinx-insns.s => zhinx.s} (85%) create mode 100644 gdb/testsuite/gdb.cp/pointer-to-member.cc create mode 100644 gdb/testsuite/gdb.cp/pointer-to-member.exp -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig updated (0692dd78 -> ef97d68e)

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This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/base-artifacts. discards 0692dd78 0: update: binutils-llvm-linux-qemu: all new ef97d68e 0: update: binutils-llvm-linux-qemu: all This update added new revisions after undoing existing revisions. That is to say, some revisions that were in the old version of the branch are not in the new version. This situation occurs when a user --force pushes a change and generates a repository containing something like this: * -- * -- B -- O -- O -- O (0692dd78) \ N -- N -- N refs/heads/linaro-local/ci/tcwg_kernel/llvm-master-aarch [...] You should already have received notification emails for all of the O revisions, and so the following emails describe only the N revisions from the common base, B. Any revisions marked "omits" are not gone; other references still refer to them. Any revisions marked "discards" are gone forever. The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: 01-reset_artifacts/console.log.xz | Bin 1652 -> 1644 bytes 02-prepare_abe/console.log.xz | Bin 2740 -> 2724 bytes 03-build_abe-binutils/console.log.xz | Bin 30472 -> 30628 bytes 04-build_kernel_llvm/console.log.xz | Bin 63512 -> 63408 bytes 05-build_abe-qemu/console.log.xz | Bin 32892 -> 32300 bytes 06-build_linux/console.log.xz | Bin 4172 -> 3924 bytes 07-boot_linux/console.log.xz | Bin 576 -> 576 bytes 08-check_regression/console.log.xz | Bin 412 -> 416 bytes 09-update_baseline/console.log | 12 ++++++------ jenkins/manifest.sh | 18 +++++++++--------- 10 files changed, 15 insertions(+), 15 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[gcc] branch master updated (9fc61fc8da9 -> d89fa97ff31)

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This is an automated email from the git hooks/post-receive script. unknown user pushed a change to branch master in repository gcc. from 9fc61fc8da9 Speedup update-ssa some more new d89fa97ff31 lto-plugin: use locking only for selected targets The 1 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference. Summary of changes: lto-plugin/config.h.in | 4 ++-- lto-plugin/configure | 21 +++++++++++++++++---- lto-plugin/configure.ac | 17 +++++++++++++++-- lto-plugin/lto-plugin.c | 29 +++++++++++++++++++---------- 4 files changed, 53 insertions(+), 18 deletions(-) -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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[toolchain/ci/gdb] branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm updated (8bd915b770 -> 1bb1f55d64)

by git＠git.linaro.org

This is an automated email from the git hooks/post-receive script. tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-arm in repository toolchain/ci/gdb. from 8bd915b770 x86: make D attribute usable for XOP and FMA4 insns adds fb5a4a581d elf: Copy p_align of PT_GNU_STACK for stack alignment adds 41bbac64c3 gprofng: implement a functional gp-display-html adds 2025522ac7 Automatic date update in version.in adds 9b5ebf652b PR29320, 'struct obstack' declared inside parameter list adds 37cf60c6a6 RISC-V: Fix requirement handling on Zhinx+{D,Q} adds 3d5d6bd554 RISC-V: Fix disassembling Zfinx with -M numeric adds 1bb1f55d64 gprofng: adjust GPROFNG_VARIANT No new revisions were added by this update. Summary of changes: bfd/elf.c | 4 +- bfd/elfxx-riscv.c | 30 +- bfd/version.h | 2 +- gas/as.h | 2 + gas/frags.h | 2 - gas/testsuite/gas/riscv/fp-zhinx-insns.d | 2 +- gas/testsuite/gas/riscv/zfinx-dis-numeric.d | 10 + gas/testsuite/gas/riscv/zfinx-dis-numeric.s | 2 + gprofng/gp-display-html/gp-display-html.in | 14631 +++++++++++++++++++++++++- gprofng/libcollector/configure | 23 +- gprofng/libcollector/configure.ac | 23 +- opcodes/riscv-dis.c | 2 +- 12 files changed, 14539 insertions(+), 194 deletions(-) create mode 100644 gas/testsuite/gas/riscv/zfinx-dis-numeric.d create mode 100644 gas/testsuite/gas/riscv/zfinx-dis-numeric.s -- To stop receiving notification emails like this one, please contact the administrator of this repository.

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