[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk-code_speed-cpu2017rate/llvm-arm-master-O2 updated (61a3cef65c -> e9ab0556b3)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk-code_speed-cpu2017rate/llvm-arm-master-O2
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from 61a3cef65c 4: onsuccess: #13: 1: [TCWG CI] Success after llvm: 3270 commits
new e9ab0556b3 5: onsuccess: #14: 1: [TCWG CI] Success after llvm: 212 commits
The 1 revisions listed above as "new" are entirely new to this
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listed as "adds" were already present in the repository and have only
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 1868 -> 2052 bytes
02-build_bmk_llvm/console.log.xz | Bin 230832 -> 231320 bytes
03-benchmark/benchmark-build.log | 223 +-
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03-benchmark/console.log.xz | Bin 4204 -> 4240 bytes
04-check_regression/console.log.xz | Bin 7096 -> 7316 bytes
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results-vs-prev/csv-results-1/results.csv | 665 ++--
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save-temps/500.perlbench_r.tar.xz | Bin 2559480 -> 2561640 bytes
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save-temps/523.xalancbmk_r.tar.xz | Bin 12835976 -> 12901140 bytes
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56 files changed, 9487 insertions(+), 9245 deletions(-)
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk-code_size-spec2k6/gnu-arm-master-Os updated (69ed5de25a -> a2e4c04a8b)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk-code_size-spec2k6/gnu-arm-master-Os
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from 69ed5de25a 65: onsuccess: #15: 1: [TCWG CI] Success after gcc: 114 commits
new a2e4c04a8b 66: onsuccess: #16: 1: [TCWG CI] Success after binutils/gcc/ [...]
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 2060 -> 2272 bytes
02-prepare_abe/console.log.xz | Bin 2516 -> 2532 bytes
03-build_abe-binutils/console.log.xz | Bin 26876 -> 27564 bytes
04-build_abe-stage1/console.log.xz | Bin 89432 -> 89480 bytes
05-clean_sysroot/console.log.xz | Bin 336 -> 336 bytes
06-build_abe-linux/console.log.xz | Bin 8400 -> 8376 bytes
07-build_abe-glibc/console.log.xz | Bin 233456 -> 233924 bytes
08-build_abe-stage2/console.log.xz | Bin 210716 -> 211336 bytes
09-benchmark/benchmark-build.log | 124 +-
09-benchmark/benchmark.log | 122 +-
09-benchmark/console.log.xz | Bin 4188 -> 4196 bytes
10-check_regression/bmk-specific-variability.csv | 159 +-
10-check_regression/console.log.xz | Bin 16512 -> 18324 bytes
.../output-bmk-results/exe.improvement | 5 +-
.../output-bmk-results/exe.improvement.diff | 2 +-
.../output-bmk-results/exe.regression | 6 +-
.../output-bmk-results/exe.regression.diff | 2 +-
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git/binutils_rev | 2 +-
git/gcc_rev | 2 +-
git/glibc_rev | 2 +-
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manifest.sh | 35 +-
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results-vs-first/csv-results-1/size.csv | 439844 +++++-----
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results_id | 2 +-
66 files changed, 858139 insertions(+), 858140 deletions(-)
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (96ecdc8b1b -> 5e15284c69)
by git＠git.linaro.org
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig
in repository toolchain/ci/base-artifacts.
from 96ecdc8b1b 82: onsuccess: #15: boot: [TCWG CI] Success after v6.1.23-44 [...]
new 5e15284c69 83: onsuccess: #16: boot: [TCWG CI] Success after binutils: [...]
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 2000 -> 2024 bytes
02-prepare_abe/console.log.xz | Bin 2504 -> 2500 bytes
03-build_abe-binutils/console.log.xz | Bin 27548 -> 26896 bytes
04-build_kernel_llvm/console.log.xz | Bin 64716 -> 64632 bytes
05-build_abe-qemu/console.log.xz | Bin 31156 -> 30456 bytes
06-build_linux/console.log.xz | Bin 3168 -> 3312 bytes
07-boot_linux/console.log.xz | Bin 480 -> 480 bytes
08-check_regression/console.log.xz | Bin 2580 -> 2700 bytes
dashboard/dashboard-generate.sh | 2 +-
git/binutils_rev | 2 +-
mail/changes-list-long.txt | 12 +++++++-----
mail/changes-list-short.txt | 2 +-
mail/last_good.sh | 25 +++++++++++--------------
manifest.sh | 12 ++++++------
14 files changed, 27 insertions(+), 28 deletions(-)
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check_bootstrap/master-aarch64-check_bootstrap updated (51f2459245 -> 4e2d92b212)
by git＠git.linaro.org
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check_bootstrap/master-aarch64-check_bootstrap
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discards 51f2459245 224: onsuccess: #45: 1: [TCWG CI] Success after binutils/gcc [...]
discards e71223f822 223: onsuccess: #44: 1: [TCWG CI] Success after binutils/gcc [...]
discards 6912209890 222: onsuccess: #43: 1: [TCWG CI] Success after binutils/gcc [...]
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new f3ea3ca303 212: onsuccess: #32: 1: [TCWG CI] Success after binutils/gcc [...]
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new 7b0d690f35 214: onsuccess: #35: 1: [TCWG CI] Success after binutils/gcc [...]
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new e25c7a96e2 216: onsuccess: #37: 1: [TCWG CI] Success after binutils/gcc [...]
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new f0deefa09d 219: onsuccess: #40: 1: [TCWG CI] Success after binutils/gcc [...]
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new f58818e7fe 223: onsuccess: #44: 1: [TCWG CI] Success after binutils/gcc [...]
new 0658d9ffc6 224: onsuccess: #45: 1: [TCWG CI] Success after binutils/gcc [...]
new 4e2d92b212 225: onsuccess: #46: 1: [TCWG CI] Success after binutils/gcc [...]
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N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_check_bootstrap/mast [...]
You should already have received notification emails for all of the O
revisions, and so the following emails describe only the N revisions
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Any revisions marked "omits" are not gone; other references still
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37 files changed, 7292 insertions(+), 9675 deletions(-)
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_aosp-code_size-dalvikvm/oriole-master updated (942f91bbcb -> 36e3ebc4bf)
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from 942f91bbcb 18: onsuccess: #41: 2: [TCWG CI] Success after llvm: 35 commits
new 36e3ebc4bf 19: onsuccess: #42: 2: [TCWG CI] Success after aosp_superpro [...]
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 1916 -> 1972 bytes
02-build_aosp_toolchain/console.log.xz | Bin 1772 -> 216356 bytes
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19 files changed, 63 insertions(+), 40 deletions(-)
create mode 100644 06-check_regression/aosp.improvements
create mode 100644 06-check_regression/binary.improvements
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-arm-mainline-allnoconfig updated (6a1082137c -> 2108828b1e)
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from 6a1082137c 53: onsuccess: #10: all: [TCWG CI] Success after binutils/gc [...]
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gnu_native_fast_check_gcc/master-aarch64 updated (2e1d38a7ab -> 53a2d2bee9)
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from 2e1d38a7ab 34: onsuccess: #50: 1: [TCWG CI] Success after binutils/gcc/ [...]
new 53a2d2bee9 35: onsuccess: #51: 1: [TCWG CI] Success after binutils/gcc/ [...]
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44 files changed, 390 insertions(+), 515 deletions(-)
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk-code_size-spec2k6/gnu-aarch64-master-O2 updated (d79b2ac21c -> 2237af5332)
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from d79b2ac21c 3: onsuccess: #5: 1: [TCWG CI] Success after binutils/gcc/gl [...]
new 2237af5332 4: onsuccess: #6: 1: [TCWG CI] Success after binutils/gcc/li [...]
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results_id | 2 +-
74 files changed, 3956780 insertions(+), 3956875 deletions(-)
delete mode 100644 10-check_regression/exe.improvement
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap updated (4aac61bfee -> 9c34d6c0d2)
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discards 4aac61bfee 640: onsuccess: #92: 2: [TCWG CI] Success after gdb-13-branc [...]
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discards cad92e110a 631: onsuccess: #82: 2: [TCWG CI] Success after binutils/gcc [...]
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discards b05ca7ef67 629: onsuccess: #80: 2: [TCWG CI] Success after binutils/gcc [...]
discards fe3fe7bb16 628: onsuccess: #79: 2: [TCWG CI] Success after binutils/gcc [...]
discards 395579e717 627: onsuccess: #78: 2: [TCWG CI] Success after binutils/gcc [...]
discards 93e224642a 626: onsuccess: #77: 2: [TCWG CI] Success after binutils/gcc [...]
discards 3668971d4a 625: onsuccess: #76: 2: [TCWG CI] Success after binutils/gcc [...]
discards f28d211fc0 624: onsuccess: #75: 2: [TCWG CI] Success after binutils/gcc [...]
discards 0bd179c8c9 623: onsuccess: #74: 2: [TCWG CI] Success after binutils/gcc [...]
discards c9d440f069 622: onsuccess: #73: 2: [TCWG CI] Success after binutils/gcc [...]
discards 6442bfdab9 621: onsuccess: #72: 2: [TCWG CI] Success after binutils/gcc [...]
discards eb731cea25 620: onsuccess: #71: 2: [TCWG CI] Success after binutils/gcc [...]
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discards 9bb311e07a 616: onsuccess: #67: 2: [TCWG CI] Success after binutils/gcc [...]
discards 26db22a194 615: onsuccess: #66: 2: [TCWG CI] Success after binutils/gcc [...]
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discards 1e935dd179 610: onsuccess: #59: 2: Success after binutils/gcc: 20 commits
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discards d480c71dbb 608: onsuccess: #57: 2: Success after binutils/gcc: 19 commits
discards 2d11fa92dd 607: onsuccess: #56: 2: Success after binutils/gcc: 14 commits
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02-prepare_abe/console.log.xz | Bin 2500 -> 2532 bytes
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_bmk-code_size-coremark/gnu_eabi-arm_eabi-master-Os updated (b96dcb4174 -> 9fe86e244b)
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01-reset_artifacts/console.log.xz | Bin 1964 -> 2156 bytes
02-prepare_abe/console.log.xz | Bin 2552 -> 2524 bytes
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[binutils-gdb] branch master updated (f7c3b037c0b -> 7594741ebc2)
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-allmodconfig updated (a7b0c671e9 -> 96ecdc8b1b)
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01-reset_artifacts/console.log.xz | Bin 2188 -> 2000 bytes
02-prepare_abe/console.log.xz | Bin 2516 -> 2504 bytes
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05-build_abe-qemu/console.log.xz | Bin 29292 -> 31156 bytes
06-build_linux/console.log.xz | Bin 3300 -> 3168 bytes
07-boot_linux/console.log.xz | Bin 480 -> 480 bytes
08-check_regression/console.log.xz | Bin 3780 -> 2580 bytes
dashboard/dashboard-generate.sh | 2 +-
git/linux_rev | 2 +-
mail/changes-list-long.txt | 24 +++++-------------------
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mail/last_good.sh | 28 ++++++++++++++--------------
manifest.sh | 25 +++++++++++--------------
results | 2 +-
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[gcc] branch master updated (cb06a507073 -> b8e32978e3d)
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/gnu-master-aarch64-lts-allyesconfig updated (8a2eebaa17 -> 3b16141b60)
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01-reset_artifacts/console.log.xz | Bin 2004 -> 2196 bytes
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05-build_abe-qemu/console.log.xz | Bin 30940 -> 32328 bytes
06-build_linux/console.log.xz | Bin 4768 -> 4744 bytes
08-check_regression/console.log.xz | Bin 3844 -> 4216 bytes
dashboard/dashboard-generate.sh | 2 +-
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig updated (0f8d07db2d -> 9a60a4a062)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allmodconfig
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from 0f8d07db2d 68: onsuccess: #10: all: [TCWG CI] Success after binutils/ll [...]
new 9a60a4a062 69: onsuccess: #11: all: [TCWG CI] Success after binutils/ll [...]
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 2008 -> 2204 bytes
02-prepare_abe/console.log.xz | Bin 2504 -> 2524 bytes
03-build_abe-binutils/console.log.xz | Bin 27788 -> 27200 bytes
04-build_kernel_llvm/console.log.xz | Bin 65124 -> 65000 bytes
05-build_abe-qemu/console.log.xz | Bin 29676 -> 30364 bytes
06-build_linux/console.log.xz | Bin 3096 -> 3116 bytes
08-check_regression/console.log.xz | Bin 3796 -> 4160 bytes
dashboard/dashboard-generate.sh | 2 +-
git/binutils_rev | 2 +-
git/linux_rev | 2 +-
git/llvm_rev | 2 +-
git/qemu_rev | 2 +-
mail/changes-list-long.txt | 44 ++++++++++++++++++++---------------
mail/changes-list-short.txt | 2 +-
mail/last_good.sh | 28 +++++++++++-----------
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results | 2 +-
17 files changed, 62 insertions(+), 56 deletions(-)
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[binutils-gdb] branch master updated (6abf2eeffa3 -> 07c1c91de38)
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unknown user pushed a change to branch master
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from 6abf2eeffa3 gdb/riscv: Support c.li in prologue unwinder
new 07c1c91de38 gdb: warn when converting h/w watchpoints to s/w
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Summary of changes:
gdb/breakpoint.c | 19 +++++-
.../amd64-watchpoint-downgrade.c} | 11 ++--
.../gdb.arch/amd64-watchpoint-downgrade.exp | 67 ++++++++++++++++++++++
gdb/testsuite/gdb.base/watchpoint.exp | 34 +++++++----
4 files changed, 112 insertions(+), 19 deletions(-)
copy gdb/testsuite/{gdb.multi/bp-thread-specific.c => gdb.arch/amd64-watchpoint-do [...]
create mode 100644 gdb/testsuite/gdb.arch/amd64-watchpoint-downgrade.exp
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap updated (97f92093b5 -> 9f9efd28c4)
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discards 97f92093b5 663: onsuccess: #91: 2: [TCWG CI] Success after gdb-13-branc [...]
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01-reset_artifacts/console.log.xz | Bin 1908 -> 1944 bytes
02-prepare_abe/console.log.xz | Bin 2512 -> 2524 bytes
04-build_abe-binutils/console.log.xz | Bin 35288 -> 35340 bytes
05-build_abe-bootstrap/console.log.xz | Bin 263188 -> 263080 bytes
06-check_regression/console.log.xz | Bin 2416 -> 2640 bytes
07-update_baseline/console.log | 42 +++++++++++++++++-----------------
dashboard/dashboard-generate.sh | 2 +-
git/binutils_rev | 2 +-
git/gcc_rev | 2 +-
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check_bootstrap/master-arm-check_bootstrap_lto updated (4c374e21d7 -> 76fd92b3c8)
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This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check_bootstrap/master-arm-check_bootstrap_lto
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discards 4c374e21d7 224: onsuccess: #46: 1: [TCWG CI] Success after binutils/gcc [...]
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adds 7411eca498b Rust: Don't depend on unused 'target-libffi', 'target-libba [...]
new 1dcdf61f9e9 Merge commit '7411eca498beb13729cc2acec77e68250940aa81' into HEAD
adds 320dc51c2d9 Add '-Wno-complain-wrong-lang', and use it in 'gcc/testsuit [...]
new 58b047a8de5 Merge commit '320dc51c2d9969f644885cc1afa0d8a924f0ab87' int [...]
adds 334f23d8326 Rust: Move void_list_node init to common code
new 3ccb746bbe2 Merge commit '334f23d83261997ca89d8919b94b97aa22003a65' into HEAD
adds fb536590731 cgraph: Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNRE [...]
adds a0abd652e38 RISC-V: Adjust vsetvl testcase.
adds c57fbdd6f11 RISC-V: Make the test condition more strict for gcc.target/ [...]
adds dc244cdc05a RISC-V: Add floating-point RVV C/C++ api
adds c878c6586de RISC-V: Add RVV reduction C/C++ intrinsics support
adds 3da77f217c8 vect: inbranch SIMD clones
new 6ee85b3255d Merge commit 'aee5ee35602e0098c2ae16fa2fc9c8845caf92ed~1' i [...]
adds aee5ee35602 Rust: In 'type_for_mode' langhook also consider all 'int_n' [...]
new 353f5e8f00a Merge commit 'aee5ee35602e0098c2ae16fa2fc9c8845caf92ed' into HEAD
adds 937692f20d4 [libstdc++] [testsuite] intro/names.cc: undef func on vxw7krn
adds 2ff710857fd [libstdc++] xfail noreplace tests on vxworks
adds d70f49e9824 [libstdc++] do not destruct mutex_pool mutexes
adds 1a45573d3d7 testsuite: Accept pmf-vbit-in-delta extra warning
adds ac113b5aa9c [arm] [testsuite] asm-flag-4.c: match quotes in expected message
adds 2d6a0fd3bdd xfail fp-uint64-convert-double-* on all arm targets
adds c20ab9bcf06 Drop need for constant I in ctf test
adds 1a684dca0e8 [arm] avoid aes-1742098 mitigation in combine tests
adds 5344482c4d3 testsuite: Skip module_cmi_p and related unsupported module test
adds 31303c9b5ba Fortran: reject invalid CHARACTER length of derived type co [...]
adds 1370014f2ea c-family: avoid compile-time-hog in c_genericize [PR108880]
adds b6f98991b14 Daily bump.
adds ddf6fe375d9 docs: Reorder @opindex before corresponding options
adds 4c3191de2a8 Revert "gcc: xtensa: fix PR target/108876"
adds 782e442e4f3 xtensa: fix PR target/108876
adds 4f609c6f762 xtensa: Fix missing mode warnings in machine description
adds 31cc5821223 tree-optimization/108888 - call if-conversion
adds af46073dbe8 Fix memory leak in if-conversion
adds 2e29e2fbeb8 libstdc++: Simplify three helper functions into one
adds 92c47b15d5a libstdc++: Fix simd build failure on clang
adds fa37ac2b59e libstdc++: Add missing constexpr on simd shift implementation
adds ffa39f7120f libstdc++: Fix -Wsign-compare issue
adds 8fda668e091 libstdc++: Test that integral simd reductions are precise
adds 68e7489b6c1 ipa-prop: Fix another case of missing BUILT_IN_UNREACHABLE_ [...]
adds 9f9a7095d91 c++: Fix up -fcontracts option description [PR108890]
adds 426b0ae1038 Fix memory leak in PTA
adds 5592679df78 testsuite: Fix up modules.exp [PR108899]
adds 7423f5b56ad xtensa: Fix up fatal_error message strings in xtensa-dyncon [...]
adds 33e4559305e xtensa: Eliminate the use of callee-saved register that sav [...]
adds f83e76c3f99 xtensa: Eliminate unnecessary general-purpose reg-reg moves
adds f33d7a88d06 **/*.texi: Reorder index entries
adds 84d340f958f gcc: xtensa: rename xtensa-dynconfig.c and update its build rule
adds 34fca8f3e05 gcc: xtensa: update include style in xtensa-dynconfig.cc
adds e2b20ed3efd Daily bump.
adds a3a45f0b145 Hazard barrier return support
adds 19aa3900bca MIPS: Add pattern for clo
adds 35a067020e4 RTEMS: Tune multilib selection
adds cab2636174f libsanitizer: cherry-pick commit 8f5962b1ccb5fcd4d4544121d4 [...]
adds 0ccfa3884f6 i386: Fix up builtins used in avx512bf16vlintrin.h [PR108881]
adds 2f1691be517 cgraphclones: Don't share DECL_ARGUMENTS between thunk and [...]
adds b580721f034 aarch64: Update FLAGS field documentation comment in aarch6 [...]
adds 05a3fc910c3 i386: Update i386-builtin.def file comment description of B [...]
adds f30421fa72f libstdc++: Reorder dg-options before dg-do
adds ae390479340 libstdc++: Suppress warnings about use of deprecated std::a [...]
adds 363f0ef50bd libstdc++: Optimize net::ip::address_v4::to_string()
adds 36ecfb75e05 libstdc++: Fix conversion to/from net::ip::address_v4::bytes_type
adds 80e9bac232f libstdc++: Fix members of net::ip::network_v4
adds 97111dccf97 libstdc++: Make net::ip::basic_endpoint comparisons constexpr
adds 8520132bc36 libstdc++: Constrain net::executor constructors
adds 3d1d3ece9bc [PR105224] C++ modules and AAPCS/ARM EABI clash on inline k [...]
adds 94c9b1bb79f asan: adjust module name for global variables
adds ef22c3e90b5 Change vec<,,vl_embed>::m_vecdata refrences into address ()
adds 2dd68cddbc7 Avoid default-initializing auto_vec<T, N> storage, fix vec< [...]
adds 6ce55180d49 libstdc++: More efficient masked inc-/decrement implementation
adds e37b04328ae libstdc++: Always-inline most of non-cmath fixed_size imple [...]
adds b31186e589c libstdc++: Fix formatting
adds 45f406c4f62 Fortran: frontend passes do_subscript leaks gmp memory [PR108924]
adds 24c9edfa736 fortran: Plug leak of associated_dummy memory. [PR108923]
adds bcbeebc4981 Fortran: Add support for WEAK attribute for variables
adds c8373dc8bf1 Update .po files
adds 4341106354c Daily bump.
adds d3e427f684b Fortran: Skip bound conv in gfc_conv_gfc_desc_to_cfi_desc w [...]
adds 461d3c84a0e gcc: xtensa: fix PR target/108919
adds 05652ac4e8b modula-2 module registration process seems to fail with sha [...]
adds 03c60e525be Fortran: fix memory leak with real to integer conversion warning
adds a24b2720de5 testsuite: Don't include multiline patterns in the the pass [...]
adds 5c638095e7e fortran: Reuse associated_dummy memory if previously alloca [...]
adds a553fc879f9 Disable tower socket runtest
adds 3dd348d0530 Disable tower socket runtest (gm2-simple-execute).
adds 94341f0baac Daily bump.
adds f2f4aead9ba Adjust example of compiler options for ACATS
adds e6d39f68d03 Respect GNATMAKE Makefile variable
adds 2cd665b1a93 Daily bump.
adds 529e03b9882 LoongArch: Change the value of macro TRY_EMPTY_VM_SPACE fro [...]
adds 16cfd803db8 aarch64: Fix typo in comment for aarch64_abs<mode>
adds 999b7aab21c gcc: xtensa: add XCHAL_HAVE_{CLAMPS,DEPBITS,EXCLUSIVE,XEA3} [...]
adds ce83c3e492c xtensa: Make use of CLAMPS instruction if configured
adds dfa85beebfb libstdc++: Add Doxygen comment for string::resize_and_overwite
adds b800f80b9c8 don't declare header-defined functions both static and inli [...]
adds e5fcf084e38 libgm2/libm2pim/sckt.cc:254:3: warning: memset() called to [...]
adds ab76d71179b Fix RTL simplifications of FFS, POPCOUNT and PARITY.
adds 8020c9c4234 i386: Do not constrain fmod and remainder patterns with fla [...]
adds 6cce953ebec Fortran: fix corner case of IBITS intrinsic [PR108937]
adds bf0e0fc0ea4 Daily bump.
adds 8c58f4b7981 testsuite: Add -fno-ivopts to gcc.dg/Wuse-after-free-2.c, PR108828
adds 2f2c0bc57be testsuite: Add CRIS to targets not xfailing gcc.dg/attr-all [...]
adds be0ea4af0cc Update cpplib sr.po, sv.po
adds 5c70121c57c testsuite: Remove xfail gcc.dg/tree-ssa/pr91091-2.c RHS ! n [...]
adds cdbcd46c1b5 testsuite: Shorten multiline pattern message to the same fo [...]
adds cf2ba92481d testsuite: No xfail infoleak-vfio_iommu_type1.c bogus for d [...]
adds c1375d975d9 Fortran: Eliminate nuisance warnings by initializing.
adds a41a56dee5c libstdc++: Add likely/unlikely attributes to <codecvt> impl [...]
adds 822a11a1e64 libstdc++: Do not use memmove for 1-element ranges [PR108846]
adds 8e342c04550 libstdc++: Fix uses_allocator_construction_args for pair<T& [...]
adds 41c02eeb309 testsuite/108942 - use sizetype in GIMPLE FE testcase
adds c7728805a71 ubsan: Honor -fstrict-flex-arrays= in -fsanitize=bounds [PR108894]
adds ea718febab2 c++: ICE with constexpr variable template [PR107938]
adds d918c3a2214 c++: variable template and targ deduction [PR108550]
adds 62ed1066196 Fix build warnings noreturn M2RTS and fix calls to Register [...]
adds afe6cea4489 Fixing PR107411
adds d3d205ab440 c++: non-dependent variable template-id [PR108848]
adds 6f9e2f144ec Daily bump.
adds 6622f7e8b89 testsuite: Fix analyzer errors for newlib-fd
adds 392f399ae05 rs6000: Allow powerpc64 to be unset for implicit 64 bit [PR108240]
adds e3837b6f6c2 tree-optimization/108950 - widen-sum reduction ICE
adds 9b4f7004a77 lto: Fix up lto_fixup_prevailing_type [PR108910]
adds 85203d52bfa tree-optimization/108970 - ICE with vectorizer peeling
adds b222e725f53 c++: Don't recurse on DECL_INITIAL for DECL_EXPR on non-VAR [...]
adds 520403f324a cfgexpand: Handle WIDEN_{PLUS,MINUS}_EXPR and VEC_WIDEN_{PL [...]
adds f72c8918416 ubsan: Add another testcase for [0] array in the middle of [...]
adds 96ff97ff657 OpenMP/Fortran: Fix handling of optional is_device_ptr + bi [...]
adds 560f1db3713 harden-sls-6.c: Fix warning on LLP64
adds f769d22ab68 gcc: Remove size limit of PCH for *-*-mingw32 hosts
adds 070523b9d4c analyzer: fix infinite recursion false +ves [PR108935]
adds 3843dc14602 OpenMP: Ignore side-effects when finding struct comps [PR108545]
adds 096f034a8f5 c++: unevaluated array new-expr size constantness [PR108219]
adds 4abd5bc6001 libstdc++: Make std::chrono::current_zone() default to UTC
adds c54cae823f5 libstdc++: Fix typo in comment in bits/cow_string.h
adds 24ebc5404b8 analyzer: fixes to side-effects for built-in functions [PR107565]
adds a764d3df8bf c++: streamline tf_qualifying_scope usage
adds de81e06273c c++: can't eval PTRMEM_CST in incomplete class [PR107574]
adds c88a7c63480 Daily bump.
adds 854a268dccd testsuite: Handle "packed" targets in c-c++-common/auto-ini [...]
adds 8590e4d096e analyzer: Support errno for newlib
adds b838a9f65f6 testsuite: Fix gcc.dg/attr-copy-6.c for user-label-prefixed [...]
adds 4ea6bfedc87 testsuite: Fix g++.dg/ext/attr-copy-2.C for default_packed targets
adds a2926653ebb testsuite/108985 - missing vect_simd_clones target requirem [...]
adds f0ef740d54f openmp: Fix up error recovery for invalid structured bindin [...]
adds cc88366a80e fold-const: Ignore padding bits in native_interpret_expr RE [...]
adds 2a8ce4b52f5 vect: Fix voluntarily-masked negative conditionals [PR108430]
adds b09dc74801c Avoid creating (const (reg ...)) [PR108603]
adds f2b846f1feb MIPS: Add buildtime option to set msa default
adds 0b83fa07645 MIPS: Bugfix for fix Dejagnu issues with RTL checking enabled.
adds 17301aeb9d3 gcc.dg/overflow-warn-9.c: Fix LLP64
adds 62a8d31ecc0 gcc.dg/memchr-3.c: Account for LLP64 warnings
adds 61407e01894 simplify-rtx: Use byte in simplify_subreg rather than assum [...]
adds da19e37cedc s390: Add LEN_LOAD/LEN_STORE support.
adds 71afd062841 c++: ICE with -Wmismatched-tags and member template [PR106259]
adds 076d309e36c vect: Don't apply masks to operations on invariants [PR108979]
adds 4d82022bfd1 c++, debug: Fix up locus of DW_TAG_imported_module [PR108716]
adds 20bd258d0fa analyzer: fix uninit false +ves reading from DECL_HARD_REGI [...]
adds cbaa1d9c218 c++: constant non-copy-init is manifestly constant [PR108243]
adds 5425159d176 c++: more mce_false folding from cp_fully_fold_init [PR108243]
adds ce9cd7258d0 amdgcn: Enable SIMD vectorization of math functions
adds 2639f9d2313 IRA: Use minimal cost for hard register movement
adds 6b432c0f777 jit, testsuite: fix a failing test by updating its error st [...]
adds 6978df2c04d c++, v3: Emit fundamental tinfos for _Float16/decltype(0.0b [...]
adds df63f4162c7 libquadmath: Assorted libquadmath strtoflt128 fixes [PR8720 [...]
adds 73bbfd5970b testsuite: Fix up memchr-3.c test [PR108991]
adds 14db9ed505d Daily bump.
adds 51af8a6401e d: vector float comparison doesn't result in 0 or -1 [PR108945]
adds 33a7811896a d: Add test for PR d/108167 to the testsuite [PR108167]
adds ce1cea3e22f d: Fix ICE on explicit immutable struct import [PR108877]
adds 929c6b8cd12 d: Allow vectors to be compared for identity [PR108946]
adds dc1be3eb33c testsuite: Tweak gcc.dg/attr-aligned.c for CRIS
adds 2e8686cb518 [c++] suppress redundant null-addr warn in pfn from pmfn
adds ddf7411e206 [vxworks] make wint_t and wchar_t the same distinct type
adds 1e4122f1159 [PR100127] Test for coroutine header in clang-compatible tests
adds 33ca5c92dfa debug/108772 - ICE with late debug generated with -flto
adds 60101899239 target/108738 - limit STV chain discovery
adds a5c543910a1 libstdc++: Update Solaris baselines for GCC 13.0
adds dbeccab7a1f gimple-fold: Fix up fputs -> fwrite folding [PR108988]
adds 59bc2b68de8 libiberty: fix memory leak in pex-win32.c and refactor
adds 0132acc03ca tree-optimization/109002 - partial PRE miscompilation
adds 6703f490cd8 driver: toplev: Fix a typo
adds fe4f3bbe9a1 moxie: fix memory constraints
adds 1cd98eaa4ee moxie: enable LRA
adds 16f2d752432 testsuite: Do not expect partial vectorization for s390.
adds 0412a2358a1 s390: Fix ifcvt test cases.
adds da5adab2ae0 s390: Use arch14 instead of z16 for -march=native.
adds 1b0e3f8ca36 waccess: Fix two -Wnonnull warning issues [PR108986]
adds 9056d0df830 s390: libatomic: Fix 16 byte atomic {cas,load,store}
adds 341e6cd8d60 c++: thinko in extract_local_specs [PR108998]
adds ce1c99f1ccd gcc: Adjust gdbhooks.py VecPrinter for vec layout changes [ [...]
adds 59a576f274b gcc: Fix gdbhooks.py VecPrinter for vec<> as well as vec<>* [...]
adds 220008eafaa [PR104882] [arm] require mve hw for mve run test
adds cfa118fc089 [arm] complete vmsr/vmrs blank and case adjustments
adds cc9cc5a9a5f [PR51534] [arm] split out pr51534 test for softfp
adds a36ae454c45 [arm] adjust expectations for armv8_2-fp16-move-[12].c
adds aee43d26e8f [arm] adjust tests for quotes around +cdecp<N>
adds fdac2bea53b -Wdangling-pointer: don't mark SSA lhs sets as stores
adds 21edd841611 link pthread_join from std::thread ctor
adds 8be49eb927e [libstdc++] [prettyprint] add local std::string use to more tests
adds 1f83aee5864 d: Document that TypeInfo-based va_arg is not implemented
adds 16554ba1fe6 libstdc++: testsuite: async.cc early timeout
adds d3ef73867e3 testsuite: remove XFAIL in gcc.dg/analyzer/pr99716-1.c [PR108988]
adds 56572a08ec4 analyzer: provide placeholder implementation of sprintf
adds df0184906a7 analyzer: start adding test coverage for OpenMP [PR109016]
adds 2aa6673eef6 Daily bump.
adds 5e6fc0e70a0 testsuite: Fix various scan-assembler identifiers not handl [...]
adds 37a084871ad testsuite: Skip gcc.dg/ifcvt-4.c for CRIS
adds 53940eee089 testsuite: Skip gcc.dg/ipa/pr77653.c for CRIS
adds 739e7ebb3d3 diagnostics: Fix up selftests with $COLUMNS < 42 [PR108973]
adds 9d5730dee4f c++: Don't defer local statics initialized with constant ex [...]
adds db1405ddf56 c-family: Account for integral promotions of left shifts fo [...]
adds daaf74a714c c-family: Fix up -Wsign-compare BIT_NOT_EXPR handling [PR107465]
adds 3ec9a872808 c-family: Incremental fix for -Wsign-compare BIT_NOT_EXPR h [...]
adds 97651be1b63 testsuite: Fix up syntax errors in scan-tree-dump-times tar [...]
adds 4ee2f419fe4 Remove remaining traces of m_vecdata from comments [PR109006]
adds ab61100f4f0 Modula-2 rename autogenerated .c files to .cc
adds fbd2eda12c7 Fix modula-2 rename autogenerated .c files to .cc
adds 2858bf16d33 Daily bump.
adds 9debb240a4b RISC-V: Fix wrong partial subreg check for bsetidisi
adds 602cfc746e9 RISC-V: Allow const0_rtx operand in max/min
adds ec99ffabc3d RISC-V: Add scalar move support and fix VSETVL bugs
adds 2a2c4c93fda RISC-V: Add testcase for VSETVL PASS
adds f8ba8a45edc RISC-V: Remove void_type_node of void_args for vsetvlmax intrinsic
adds 1bff101b7e6 RISC-V: Add permutation C/C++ support
adds 7caa1ae5e45 RISC-V: Add RVV misc intrinsic support
adds 7e52f4420ff RISC-V: costs: miscomputed shiftadd_cost triggering synth_m [...]
adds 89456334473 RISC-V: Add prototypes for RISC-V Crypto built-in functions
adds 2c8095109b8 RISC-V: Implement ZBKB, ZBKC and ZBKX extensions
adds 072c558a0f1 RISC-V: Implement ZKND and ZKNE extensions
adds e6416e4323f RISC-V: Implement ZKNH extension
adds 2554d90c6c2 RISC-V: Implement ZKSH and ZKSED extensions
adds 44c918b50af RISC-V: Fix ICE for avl_single-86/avl_single-88/avl_single-90
adds ca27d765f1d testsuite: Fix up syntax error in scan-tree-dump-times targ [...]
adds 6aa1f40a326 Fortran: fix CLASS attribute handling [PR106856]
adds fa9fd689307 Daily bump.
adds c5e77e98af1 libgo: revert incorrectly committed change
adds 75eccddef57 LoongArch: Stop -mfpu from silently breaking ABI [PR109000]
adds 67401d45972 LoongArch: testsuite: Disable stack protector for some tests
adds b83acefb040 Enable scatter for generic
adds c1873079b05 tree-optimization/109025 - fixup double reduction detection
adds 94a67e30442 Revert "Respect GNATMAKE Makefile variable" commit
adds 14e5b65fd9b Fix assertion failure on VSS library
adds 553ff2524f4 amdgcn: Add instruction patterns for conditional min/max op [...]
adds 306c7b1ac3e PR target/107299: Fix build issue when long double is IEEE 128-bit
adds dfb14cdd796 Update gcc fr.po, sv.po
adds 82318c57607 testsuite: Provide means to regexp in multiline patterns
adds 1d92cd072ef testsuite: Fix gcc.dg/analyzer/allocation-size-multiline-3.c
adds 3dd4ada4370 Daily bump.
adds 7dde02e9efc testsuite: Add tail_call effective target
adds 318c9101a3b doc: Document testsuite check_effective_target_tail_call
adds e43f970c7ff testsuite: Gate gcc.dg/plugin/must-tail-call-1.c and -2.c o [...]
adds 1690f928b37 testsuite: Support scanning tree-dumps
adds f30f04b1fbd aarch64: testsuite: disable PIE for aapcs64 tests [PR70150]
adds a1ccb4583df aarch64: testsuite: disable PIE for tests with large code m [...]
adds 7e8a3dbbb26 aarch64: testsuite: disable PIE for fuse_adrp_add_1.c [PR70150]
adds edb336cc575 aarch64: testsuite: disable stack protector for sve-pcs tests
adds 2fa31207ea6 aarch64: testsuite: disable stack protector for pr103147-10 tests
adds 4c59cfc4a4d aarch64: testsuite: disable stack protector for auto-init-7.c
adds 5937cfb981d aarch64: testsuite: disable stack protector for pr104005.c
adds 59a72acbccf aarch64: testsuite: disable stack protector for tests relyi [...]
adds 247cacc9e38 RISC-V: Bugfix for rvv bool mode precision adjustment
adds e09bc034d1b c++: error with constexpr operator() [PR107939]
adds e4692319fd5 c++: noexcept and copy elision [PR109030]
adds 0d573c1f002 c++: Fix up ICE in emit_support_tinfo_1 [PR109042]
adds b2b841fa255 testsuite: Fix another syntax problem in slp-3.c
adds 80f0052b392 c++: -Wdangling-reference with reference wrapper [PR107532]
adds 291c130ef07 libstdc++: Fix comment typo in eh_personality.cc
adds 7d30593c387 libstdc++: Fix symver for __gnu_cxx11_ieee128::__try_use_fa [...]
adds f875857e008 libstdc++: Some baseline_symbols.txt updates
adds 4f181f9c7ee c++: static lambda tsubst [PR108526]
adds c7867f82f4c docs: Add link to gmplib.org.
adds c5c4fdaccdf docs: Clarify LeakSanitizer in documentation [PR81649]
adds af320a16dd6 Daily bump.
adds dcce01af47b testsuite: Fix omp-parallel-for-get-min.c and -for-1.c for [...]
adds 0d25f8265b3 Fix MIPS testsuite over-eager matching
adds 4bcdc362e90 testsuite: Adjust fold-vec-extract-double.p9.c for powerpc [...]
adds 3be550e35e1 testsuite: Adjust pr101384-2.c for Power9 [PR108813]
adds 9fd3d356739 testsuite: Adjust scalar-test-neg-8.c with lp64 [PR108730]
adds bab3b6a9c3b testsuite: Adjust two bfp test cases with has_arch_ppc64 [P [...]
adds 04ff5ad0f32 testsuite: Adjust scalar-test-data-class-1[45].c with int128
adds 2a2a159f7bd testsuite: Adjust powerpc ppc-fortran.exp to support dg-{wa [...]
adds 15b83b69ca9 libgcc, rs6000: Fix bump size for powerpc64 elfv1 ABI [PR108727]
adds 2e3dd14dd28 libgomp.texi: Mention GCN_STACK_SIZE in Offload-Target Specifics
adds 6a87fdd3ed6 Daily bump.
adds 288bc7b5d17 libgomp: Fix default value of GOMP_SPINCOUNT [PR 109062]
adds bad177e8487 range-op-float: Fix up reverse binary operations [PR109008]
adds ace65db9215 middle-end/108995 - avoid folding when sanitizing overflow
adds a6457974a1f LRA: For clobbered regs use operand mode instead of the big [...]
adds d11e088210a Enable UTF-8 code page on Windows 64-bit host [PR108865]
adds 148cbb153da c++: add __is_deducible trait [PR105841]
adds 30556bf81f4 c++: hide __is_deducible for GCC 13
adds 9e6170098d5 c++: fix alias CTAD [PR105841]
adds afe1f0c251d c++: CTAD for less-specialized alias template [PR102529]
adds f366fdfeec0 libstdc++: Really fix symver for __gnu_cxx11_ieee128::__try [...]
adds 3df9760d566 libstdc++: extraneous begin in cartesian_product_view::end [...]
adds c6232ba229a Fix PR 108980: note without warning due to array bounds check
adds 95827e1b9f7 libstdc++: Make views::single/iota/istream SFINAE-friendly [...]
adds 065c93b89c5 libstdc++: Implement LWG 3796 changes to repeat_/chunk_by_v [...]
adds 96abc822246 libstdc++: Implement LWG 3820/3849 changes to cartesian_pro [...]
adds 8e26ac4749c AArch64: Fix codegen regressions around tbz.
adds ec4bc86b439 middle-end: On emergency dumps finish the graph generation.
adds 4214bdb1d77 testsuite: add various -Wanalyzer-null-dereference false +v [...]
adds e0324e2629e c++: allocator temps in list of arrays [PR108773]
adds da2b9c6e310 Daily bump.
adds 68c5d92a139 c++: overloaded fn in contract [PR108542]
adds 2fc55f51f99 c++: signed __int128_t [PR108099]
adds 2dc73876fc9 [PATCH v2] vect: Check that vector factor is a compile-time [...]
adds ab7bb445ee5 RISC-V: Fine tune merge operand constraint for integer/load/store
adds a803c268c55 Extend nops num in "maybe_gen_insn" for RISC-V Vector intrinsics
adds 60bd33bcbb7 RISC-V: Add fault first load C/C++ support
adds a1d5c729cee range-op-float: Fix up -ffinite-math-only range extension a [...]
adds 2c63cc7268f c, c++, cgraphunit: Prevent duplicated -Wunused-value warni [...]
adds 2eb0191aa10 file-prefix-map: Fix up -f*-prefix-map= [PR108464]
adds 4c599ae6e08 tree: Use comdat tree_code_{type,length} even for C++11/14 [...]
adds e3f8dfcd885 cygwin: Don't try to support multilibs [PR107998]
adds 37c8a083d44 libstdc++: Fix GDB Xmethod for std::shared_ptr::use_count() [...]
adds 44f80a370b7 range-op-float: Extend lhs by 0.5ulp rather than 1ulp if no [...]
adds c4fd232f984 analyzer: fix deref-before-check false +ves seen in haproxy [...]
adds e1c8cf9006b c++: class NTTP and nested anon union [PR108566]
adds 649f1939baf Fix OpenACC/GCN 'acc_ev_enqueue_launch_end' position
adds 413ec1d12c5 Speedup PTA solving for call constraint sets
adds 442d51a20ef Document/verify another aspect of OpenACC 'async' semantics [...]
adds b5037d4a073 OpenACC: Remove 'acc_async_test' -> skip shortcut in 'libgo [...]
adds 199867d07be Simplify OpenACC 'no_create' clause implementation
adds 2b2340e236c Allow libgomp 'cbuf' buffering with OpenACC 'async' for 'ep [...]
adds 14f5e56a8a7 analyzer: fix leak false +ve seen in haproxy's cfgparse.c [ [...]
adds f8332e52a49 Use 'GOMP_MAP_VARS_TARGET' for OpenACC compute constructs [ [...]
adds fcbc5c190c4 Fix PR 108874: aarch64 code regression with shift and ands
adds e20e5d9dc11 Fortran: fix ICE with bind(c) in block data [PR104332]
adds 4d0baeae315 ubsan: missed -fsanitize=bounds for compound ops [PR108060]
adds a915c29a7d6 c++: constrained lambda error-recovery [PR108972]
adds 20d790aa3ea MAINTAINERS: add myself to write after approval
adds 991f9eb2da3 c++, abi: Fix up class layout with bitfields [PR109039]
adds 60b6f5c0a33 c++: Don't clear TREE_READONLY for -fmerge-all-constants fo [...]
adds 246127ab238 libgcc, i386: Add __fix{,uns}bfti and __float{,un}tibf [PR107703]
adds c227508d06a c++ testsuite: Add test for PR107703
adds b6503c707cb testsuite: gcc.dg/pr106397.c: Add -w to options
adds 88bcd4e5678 testsuite: gcc.dg/pr108117.c: Require effective-target scheduling
adds 020255eb52e testsuite: Tweak check_fork_available for CRIS
adds c80654412b5 Daily bump.
adds c62df15d283 Docs: Update documentation of Texinfo versions for building [...]
adds 2cf5f485e03 Fortran: fix bounds check for copying of class expressions [...]
adds 23ff46459a4 Re: [PATCH 2/2] Corrected pr25521.c target matching.
adds d9922e4bb5d Fwd: [PATCHJ]: Bugzilla 88860 - Clarify online manual infelicities
adds 1be724089e8 doc: Drop a redundant link to AVR-LibC
adds ed65cebfd31 Daily bump.
adds 9f3214a5b62 gcc.c-torture/compile/103818.c: Enable for llp64 too
adds 1dced435266 gcc/testsuite/gcc.dg: Fix LLP64 targets
adds f56ed5b3bcb Docs: Clean up description of asan-kernel-mem-intrinsic-prefix.
adds fa0ecd22f85 libstdc++: Move www.graphviz.org to https
adds 431c06691dc [PR modula2/109089] implementation of boolean should be C++/C bool
adds 8536c09108f Docs: Fix typo in previous commit
adds 2246d576f92 middle-end: Revert can_special_div_by_const changes [PR108583]
adds 03c6ba86757 ranger: Add range-ops for widen addition and widen multipli [...]
adds 0b3c630fcc4 middle-end: don't form FMAs when multiplication is not sing [...]
adds 81fd62d1378 middle-end: Implement preferred_div_as_shifts_over_mult [PR108583]
adds f23dc726875 AArch64: Update div-bitmask to implement new optab instead [...]
adds eb1d8df792f PR middle-end/109031: Fix final value replacement from narr [...]
adds 13071c3c7d1 aarch64: Add bfloat16_t support for aarch64
adds 44ea73185a8 Daily bump.
adds eb337d28c32 tree-optimization/109046 - re-combine complex loads
adds a1d4d92d6a3 libstdc++: Fix typo in comment
adds dbec2e81692 libstdc++: Update copyright year in FAQ
adds 97d4aaf19e9 libstdc++: Regenerate HTML docs
adds 6ba33b18898 libstdc++: Refer to documentation hacking docs from Makefile
adds 26cb95678d4 libstdc++: Another baseline_symbols.txt update
adds 73dd5c6c887 libcpp: Update cpp_wcwidth() to Unicode 15
adds 336ce497fb2 libcpp: Fix ICE on directive inside _Pragma() operator [PR67046]
adds 7ef44579787 gcn/mkoffload.cc: Pass -save-temps on for the hsaco step
adds ced122b849b c++: suppress -Wdangling-reference for std::span [PR107532]
adds 7ff57009bcc RISC-V: Fine tune RA constraint for narrow instructions
adds 6f6eba35b9f RISC-V: Fix ICE of RVV compare intrinsic
adds 9dd51550b7d RISC-V: Remove RVV intrinsic API test
adds 2219aed9ad6 RISC-V: Fine tunning merge operand constraint
adds c981f61c071 xtensa: Remove REG_OK_STRICT and its derivatives
adds fa9d3aa6789 analyzer, testsuite: add test coverage for various builtins
adds 129664c67b7 testsuite: add test coverage for PR analyzer/108045
adds 23532dac3f6 testsuite: add test coverage for analyzer leak false +ve [P [...]
adds 8e9c65d34c7 Docs: Fix double 'See' in zero-length-bounds docs.
adds 538a0d0f29b c++: handle _FloatNN redeclaration like bool [PR107128]
adds 6360bf9a2d0 xtensa: add .note.GNU-stack section on linux
adds 499b07700f0 d: Refactor DECL_ARGUMENT and DECL_RESULT generation to own [...]
adds d1bddcaf15a d: Delay removing DECL_EXTERNAL from thunks until funcion h [...]
adds ea7ba2c243c Update gcc de.po
adds eb01d03f06c Update gcc sv.po
adds 370298f4930 PR 109103 Modula2 Missing function internal_error_at
adds a9835599fdb Daily bump.
adds e17936f842d New testcase
adds 5159a1f1e91 Fix overactive sanity check in profile_count::to_sreal_scale
adds 72b52751c60 tree-vect-patterns: Fix up ICE in upper_bound [PR109115]
adds b109964ddb4 ifcvt: Lower bitfields only if suitable for scalar register [...]
adds 0e0c18f60af testsuite: move mla_1 test to aarch64 only [PR109118]
adds abb958ada1e libstdc++: Add assertions to std::mask_array operations [PR62196]
adds f50f55b8fa9 libstdc++: Add comment about symver linker scripts to makefile
adds 4d771291f70 libstdc++: Fix preprocessor condition for inline variables
adds 8b6c38ef6a7 Revert latest change to emit_group_store
adds 67839c56277 Add testcase for ifcvt fix
adds bd6e566e9dc Remove variables only used with .DEFERRED_INIT
adds 0e6f87835cc RISC-V: Avoid calloc() poisoning on musl
adds c35cf160a0e c++: Treat unnamed bitfields as padding for __has_unique_ob [...]
adds 7f22d1c83e7 testsuite: Fix up g++.dg/cpp2a/concepts-lambda3.C [PR108972]
adds 4bcc3b5cc87 i386: Use movss to implement V2SImode VEC_PERM.
adds 68ba253bda7 ipa-cp: Fix various issues in update_specialized_profile (P [...]
adds 1526ecd739f ipa-cp: Improve updating behavior when profile counts have [...]
adds 423d34f61c4 d: Fix undefined reference to lambda defined in private enu [...]
adds 42630fadbe2 i386: Fix up split_double_concat [PR109109]
adds 71b33f8fb8d c++: -Wreturn-type with if (true) throw [PR107310]
adds 19c5dfc29d8 PR 109125 Modula2 SIGBUS in m2pim_ldtoa_ldtoa
adds f2e7dd8b023 libstdc++: Implement LWG 3715 changes to view_interface::empty
adds 2b204accd07 libstdc++: Implement P2520R0 changes to move_iterator's ite [...]
adds 9e44a9932c1 c++: variable tmpl partial specialization [PR108468]
adds 578f633ddab libstdc++: Fix template-head of repeat_view::_Iterator [PR109111]
adds ec62dc95c4f c++: constrained template friend class matching [PR96830]
adds cd5baeb4489 c++: redeclaring member of constrained class template [PR96830]
adds 38945ee3b28 gcc/testsuite/gcc.dg: Fix pic test case for PE targets
adds fd42a8fa4b7 Daily bump.
adds a9ae16db8cb i386:Add missing OPTION_MASK_ISA_AVX512VL in i386-builtin.d [...]
adds 8351535f20b riscv: Add basic XThead* vendor extension support
adds c36fb3ca9ee riscv: riscv-cores.def: Add T-Head XuanTie C906
adds b77c32273b4 riscv: thead: Add support for the XTheadBa ISA extension
adds d328d3a6f87 riscv: thead: Add support for the XTheadBs ISA extension
adds c493fa38924 riscv: thead: Add support for the XTheadBb ISA extension
adds 8e7ffe126de riscv: thead: Add support for the XTheadCondMov ISA extensions
adds b2a1bef96da riscv: thead: Add support for the XTheadMac ISA extension
adds 75047aeb7e6 riscv: thead: Add support for the XTheadFmv ISA extension
adds 02fcaf412ae riscv: thead: Add support for the XTheadMemPair ISA extension
adds 45641f3a992 builtins: Move the character difference into result instead [...]
adds 0fc541efc34 tree-optimization/109139 - fix .DEFERRED_INIT removal
adds 5ccbf162511 c++: coerce_template_template_parms interface tweak
adds 3ea64aad06a c++: passing one ttp to another [PR108179]
adds 40c1352c5a4 c++: injected class name as default ttp arg [PR58538]
adds dc35778a4be Avoid duplicate diagnostic in g++.dg/warn/Wuse-after-free3.C
adds cd394c542b7 OpenMP: Add omp_in_explicit_task to omp_runtime_api_call
adds be20dcc359b c++: ICE with constexpr lambda [PR107280]
adds 901edd99b44 Fortran: rank checking with explicit-/assumed-size arrays a [...]
adds 57052c6ed59 i386: Fix blend vector permutation for 8-byte modes
adds 8f1711ef348 PR 109125 13 regression SIGBUS in m2pim_ldtoa_ldtoa
adds 79aaba0a71f diagnostics: attempt to capture crash info in SARIF output [...]
adds ea4dd8f5129 c++: co_await and initializer_list [PR103871]
adds 39b1814c027 Daily bump.
adds 0c061da91a3 maintainer-scripts: Abstract BUGURL in update_web_docs_git
adds af4f6816660 Move target independent documentation files into subdir
adds adb70c2d106 Avoid random stmt order result in pass_waccess::use_after_inval_p
adds 0a07bfad125 tree-optimization/109123 - run -Wuse-afer-free only early
adds 99bae6ee665 libcpp: Update Unicode copyright years
adds 63b25b80124 contrib: Update instructions regarding Unicode updates
adds 46c4be98d1e d: Fix closure fields don't get same alignment as local var [...]
adds d0ed0690f1e c++: co_await and move-only type [PR105406]
adds bd2d206b7b7 [testsuite] fix array element count
adds c5e2c3dd6af middle-end: always find a basename for -fdiagnostics-format=*
adds 8da8c7d3371 d: Merge upstream dmd, druntime 4ca4140e58, phobos 454dff14d.
adds c630157fd01 c++: checking ICE with diagnosed constraint recursion [PR100288]
adds 31cdfdef047 c++: maybe_constant_init and unevaluated operands [PR109030]
adds acff89c7d7b i386: Robustify vec perm blend functions for TARGET_MMX_WITH_SSE
adds 77924dff144 PR 107630 runtime libs should be self-contained
adds f231bca93ca PR modula2/109125 SIGBUS in m2pim_ldtoa_ldtoa
adds e6ccae0ac0d [modula2] Add missing stdbool to testcode
adds 1cc8814098b c++: &enum::enumerator [PR101869]
adds b323f52ccf9 c++: generic lambda, local class, __func__ [PR108242]
adds 78b3bf0e650 c++: __func__ and local class DMI [PR105809]
adds fa4d0ab533c maintainer-scripts: Add Modula-2 manual to update_web_docs_git
adds 5c389a5c36f Daily bump.
adds 6bf80413deb [modula2] Bugfix local symbol names for -fm2-whole-program
adds 4ace81b6118 Docs: Fix some too-long lines in Texinfo manual.
adds 7ffbc74c8c2 Docs: Fix formatting issues in BPF built-ins documentation.
adds 328477f6ee8 d: Merge upstream dmd, druntime 5f7552bb28, phobos 67a47cf39.
adds be6195c7e7a gdbhooks: Update gdbhooks.py for recent tree_code_type chan [...]
adds 713fa5db8ce openmp: Fix up handling of doacross loops with noreturn bod [...]
adds 2bb71424636 testsuite: Fix up forwprop-39.c testcase [PR109145]
adds 02880e7803b RISC-V: Use reg_or_subregno to check regno [PR109092]
adds c413abed869 RISC-V: Handle undef for vector mask patterns
adds daf20b4b836 PR modula2/109102 Wrong quotes in diagnostic
adds 57688950b93 LRA: Implement combining secondary memory reload and original insn
adds 6bfb5eae96b PR modula2/109032 - message 'compiler checks to force' is t [...]
adds 103d423f6ce c, ubsan: Instrument even shortened divisions [PR109151]
adds 24c06560a7f tree-inline: Fix up multiversioning with vector arguments [ [...]
adds ae7190e345a c++: namespace-scoped friend in local class [PR69410]
adds c48be8298c2 libstdc++: Add const to hash<coroutine_handle<P>>::operator [...]
adds 890043314a7 c++: throw and private destructor [PR109172]
adds 6f90de97634 c++: constant, array, lambda, template [PR108975]
adds ac81fea349b testsuite: Skip some gcc.dg/plugin tests for default_packed [...]
adds 44a13125a0d lra: Ignore debug insns and notes in combine_reload_insn [P [...]
adds 454a4d5041f Daily bump.
adds d7caf313525 Fortran: Fix bugs and missing features in finalization [PR37336]
adds 9b83d4755a7 libstdc++: Fix test for hash<coroutine_handle<P>>::operator [...]
adds 430d7d88c1a analyzer: fix ICE on certain longjmp calls [PR109094]
adds cffcb774c63 Daily bump.
adds 0e38aedc6af Docs: correct typo in nonnull function attribute description.
adds 33fb1625992 or1k: Do not clear existing FPU exceptions before updating
adds 8804eb0b880 [modula2] target independent doc and tools rebuilt
adds 14361c5a469 Re: [PATCH] Testsuite: Disable micromips for MSA tests
adds 655689f6be8 Mention undefined behavior on integer overflow.
adds 5426ab34643 Fortran: procedures with BIND(C) attribute require explicit [...]
adds 09abeb73b8e Daily bump.
adds 5889c7bd46a Fortran: Allow external function from in an associate block [...]
adds 5194ad1958c libstdc++: Remove template-head from std::expected<void> ct [...]
adds e19234f4646 testsuite: Fix up 20230313.C test
adds fbd50e867e6 rs6000: Don't ICE when compiling the __builtin_vec_xst_trun [...]
adds 4410a08b80c Fortran: simplification of NEAREST for large argument [PR109186]
adds c67f312d20e Rework 128-bit complex multiply and divide.
adds 0a846340b99 c++: Drop TREE_READONLY on vars (possibly) initialized by t [...]
adds a226590fefb c++: explicit ctor and list-initialization [PR109159]
adds 6c2b28e4320 Fortran: fix documentation of -fno-underscoring [PR109216]
adds 7cfc4da22c4 Update gcc sv.po
adds ccfca55536f libstdc++: Fix formatting in std::filesystem helper function
adds 582f246be2d Daily bump.
adds 76dda105840 [modula2] Add $(CXX_FLAGS) to the bootstrap tool rules.
adds 3a9caf78831 Fortran: Fix regression caused by PR37336 patch [PR109209]
adds 259bd768640 Fortran: Fix regression caused by PR37336 patch [PR109206]
adds 5f413dc41ee tree-optimization/109170 - bogus use-after-free with __buil [...]
adds ab946809508 docs: Create Indices appendix
adds e1e5ecb2896 doc: Fix a few minor errors spotted by testers
adds f25efe50374 docs: Add @defbuiltin family of helpers
adds 8a1b089e050 doc: Update texinfo.tex
adds 43b72ede11d doc: Remove the @gol macro/alias
adds 27334ebe382 update_web_docs_git: Update CSS reference to new manual CSS
adds e54b01a101a docs: Fix up new instances of index reordering
adds 0395e1364dd html: Set CONTENTS_OUTPUT_LOCATION=inline if makeinfo supports it
adds 03041e0361c tree: Fix up component_ref_sam_type handling of arrays of 0 [...]
adds 25db59017f2 libstdc++: Fix simd test compilation with Clang
adds b49aedf6aed testsuite: Fix up vect-simd-clone1[678]*.c tests [PR108898]
adds 49a8bce43cd testsuite: Remove obsolete comments [PR108898]
adds 26adc870e36 tree-optimization/109219 - avoid looking at STMT_SLP_TYPE
adds 0963cb5fde1 Terminate GORI calculations if a relation is not relevant.
adds 041a164ec9b c++: DMI in template with virtual base [PR106890]
adds 8ff3ca2d947 libstdc++: Fix simd compilation with Clang
adds dd282b16bfd Fortran: reject MODULE PROCEDURE outside generic module int [...]
adds 403e48ef441 libstdc++: Skip integer division optimization for Clang
adds fac64bf456c libstdc++: Use more precise __RECIPROCAL_MATH__ macro
adds b3321313598 stor-layout: Set TYPE_TYPELESS_STORAGE consistently for typ [...]
adds 031785270ab Daily bump.
adds 573dbd5175d PR modula2/107630 Remove M2LINK and remove some cross linking
adds 5e812e8c1e8 configure: regenerate
adds 81295d445ec frange: Implement nan_state class [PR109008]
adds eb800d4f2f2 MAINTAINERS: Add myself as OpenMP and libgomp maintainer
adds 1bde3acee77 amdgcn: Add instruction patterns for complex number operations.
adds 0c652ebbf79 analyzer: fix false +ves from -Wanalyzer-deref-before-check [...]
adds d3a6f174543 c++: Avoid duplicate diagnostic calling unavailable functio [...]
adds 426cab4e3b4 c++: attribute on dtor in template [PR108795]
adds aae0d89e65c modula2: Add cwd to include path. Include m2cor before m2pim.
adds 81d762cbec9 LRA: Do not repeat inheritance and live range splitting in [...]
adds ad0b9cf1a07 libstdc++: Make std::istream_iterator copy ctor constexpr ( [...]
adds 9ae1108196e libstdc++: Add allocator-extended constructors to std::matc [...]
adds 7d4f4ce6a5d libstdc++: Add comment to <format> (LWG 3720)
adds ba4f5530c47 libstdc++: Use rvalues in std::string::resize_and_overwrite [...]
adds 02e86035d30 libstdc++: Add missing __cpp_lib_format macro to <version>
adds 924d990425d libstdc++: Define __cpp_lib_constexpr_algorithms in <utilit [...]
adds f2e70da638b libstdc++: Remove std::formatter<const charT[N], charT> spe [...]
adds 3e791f45ded Fortran: improve checking of FINAL subroutine arguments [PR104572]
adds 5a1717fbdfd c++: array bound partial ordering [PR108390]
adds e3af2b64ab9 compiler: add missing Slice_info_expression::do_traverse
adds 6b2740946d2 testsuite: always use UTF-8 in scan-sarif-file[-not] [PR105959]
adds a495b738e4a libstdc++: Fix assigning nullptr to std::atomic<shared_ptr< [...]
adds 50bd9c41d50 Daily bump.
adds 7712736376b Remove TARGET_GEN_MEMSET_SCRATCH_RTX since it's not used anymore.
adds ba31f9a3c8f RISC-V: Add riscv_vector target check
adds 0e2715176df RISC-V: Fix wrong RTL pattern for ternary instructions.
adds a481eed8fd0 RISC-V: Fix wrong vsetvli fusion for vmv.s.x
adds 116a8678840 RISC-V: Implement __riscv_vlenb PR109228
adds cd0c433e5fa RISC-V: Fix LRA issue for LMUL < 1 vector spillings [PR109244]
adds 4872e46e080 c++: local class in nested generic lambda [PR109241]
adds 37dd1f14b6e RISC-V: Fix loss of function to script 'multilib-generator'
adds 3a982e07d28 RISC-V: Bugfix for rvv bool mode size adjustment
adds 484c41c747d tree-vect-generic: Fix up expand_vector_condition [PR109176]
adds db80ccd3436 amdgcn: vec_extract no-op insns
adds 3b97715af0e amdgcn: Fix register size bug
adds 59bfdd5f467 c++: further -Wdangling-reference refinement [PR107532]
adds 097e2afdde0 Skip gnat.dg/div_zero.adb on Aarch64
adds c46b5b0a2c1 ranger: Ranger meets aspell
adds 25979b67615 tree-optimization/109262 - ICE with non-call EH and forwprop
adds 41ade3399bd tree-optimization/107569 - avoid wrecking earlier folding i [...]
adds 5ededfa5b23 PR modula2/109264 Bugfix resolve opaque types containing sets
adds 80ed2a6471a c: [PR84900] cast of compound literal does not cause the co [...]
adds f58cbbb7c90 Don't force target of modulo into a distinct register.
adds 08981d59253 testsuite: Compile-only gcc.dg/tree-ssa/pr100359.c if ! nat [...]
adds 3fbeff66684 testsuite: Xfail gcc.dg/tree-ssa/ssa-fre-100.c for ! natura [...]
adds c4792bd1de0 c++: constexpr PMF conversion [PR105996]
adds ec92be4a4e0 Daily bump.
adds 08ef17c7577 Fix native MSYS2 build failure [PR108865, PR109188]
adds 3b67db31236 Fortran: Escalate failure when Hollerith constant to real c [...]
adds 378ec7b87a5 [testsuite] test for weak_undefined support and add options
adds 86111e7b302 testsuite: Add testcase for already fixed PR [PR99739]
adds 0d9e52675c0 testsuite: Fix up gcc.target/i386/pr109137.c testcase [PR109137]
adds 5450833e4f9 builtins: Fix up ICE in inline_string_cmp [PR109258]
adds fe6e61fb236 modula2: Enable iso-extended-opaque-run-pass.exp to build l [...]
adds ed626f18b18 tree-optimization/106912 - clear const attribute from fntype
adds 0409aa5a2de Ranger cache dominator queries should ignore backedges.
adds 7f1e15f7433 json: preserve key-insertion order [PR109163]
adds e8fec6998b6 Add caveat/safeguard to OpenMP: Handle descriptors in targe [...]
adds 4e2cdb1ddb5 c++: default template arg, partial ordering [PR105481]
adds 243fa4883cf libgomp.texi: Fix wording in GCN offload specifics
adds 1f641d6aba2 libatomic: Fix SEQ_CST 128-bit atomic load [PR108891]
adds bbf2424c57c c++: outer 'this' leaking into local class [PR106969]
adds 833233a4aef Fortran: fix FE memleak with BOZ expressions.
adds 0849a188d53 go: Fix up go.test/test/fixedbugs/bug207.go failure [PR109258]
adds fdb06fe6825 docs, analyzer: improvements to "Debugging the Analyzer"
adds 13ec81eb4c3 Daily bump.
adds d495ea2b232 diagnostics: ensure that .sarif files are UTF-8 encoded [PR109098]
adds b5fce899dbb Fortran: remove dead code [PR104321]
adds 810b924f75d Daily bump.
adds 9cdbe57362e doc: Remove anachronistic note related to languages built
adds 7eca91d4781 predict: Don't emit -Wsuggest-attribute=cold warning for fu [...]
adds 07fc3491260 match.pd: Fix up fneg/fadd simplification [PR109230]
adds 55bc61a75a6 m68k: handle TLS access with offset
adds 93411318964 Daily bump.
adds 50a36a95415 Docs, OpenMP: Correct internal documentation of OMP_FOR.
adds f33fc077570 rs6000: Ensure vec_sld shift count in allowable range [PR109082]
adds 1e20bb6737e rs6000: Make _mm_slli_si128 and _mm_bslli_si128 consistent [...]
adds 4cbd5ef0350 lto/109263 - lto-wrapper and -g0 -ggdb
adds 776a5bb5894 rtl-optimization/109237 - speedup bb_is_just_return
adds 05996192762 fix: pytest error
adds ff1f2f2412b aarch64: update ampere1 vectorization cost
adds 3c0f5a9533b libstdc++: Fix up experimental/net/timer/waitable/dest.cc testcase
adds 9da6f931446 target/109296 - riscv: Add missing mode specifiers for XThe [...]
adds ce4a00e29c7 tree-optimization/108357 - add testcase
adds bff7c6f7016 tree-optimization/54498 - testcase for the bug
adds cffa72fde8c gcov: Fix "subcomand" typos [PR109297]
adds ffcdac4feb4 Daily bump.
adds bab2fb9d63e CRIS: Remove unused constraint "R".
adds 75be4badfed CRIS: Improve bailing for eliminable compares for "addi" vs. "add"
adds 09d0a1f33d9 CRIS: Add peephole2 to handle gcc.target/cris/rld-legit1.c for LRA
adds c4d61d3186b CRIS: Correct "T" to define_memory_constraint, not define_c [...]
adds cc4b7d6bb3b Disallow -gno-dwarf, gno-dwarf-N, -gno-gdb and -gno-vms
adds 33312336d57 Remove Negative(gwarf-) from gdwarf
adds 21c74b6ea41 fixincludes: Declare memmem if it's not declared in system [...]
adds b462947dae9 Revert "rtl-optimization/109237 - speedup bb_is_just_return"
adds 304c7d44a22 Extend UTF-8 support to the 32-bit mingw host.
adds 8443f42f05f testsuite: Fix weak_undefined handling on Darwin
adds 5cea00da1d3 Modula-2: fix documentation layout again
adds a21bd7faba6 Fix PR target/109140
adds 4b5ef857f5f i386: Require just 32-bit alignment for SLOT_FLOATxFDI_387 [...]
adds 3c62ba93de8 Fix line ending
adds ccaee0d2c99 range-op-float: Use get_nan_state in float_widen_lhs_range
adds 39a43dc3365 sanopt: Return TODO_cleanup_cfg if any .{UB,HWA,A}SAN_* cal [...]
adds ce3974e5962 range-op-float: Only flush_denormals_to_zero for +-*/ [PR109154]
adds 0ecebc3a094 openmp: Fix typo in diagnostics [PR109314]
adds 4a9bec952cc gcov-tool: Use subcommand rather than sub-command in functi [...]
adds 1a620081236 libstdc++: Fix operator% implementation for Clang
adds 75cda3be023 bootstrap/84402 - improve (match ...) code generation
adds fcb411564a6 aarch64: Restore vectorisation of vld1 inputs [PR109072]
adds e70e36cbef4 mingw: Fix comments in x-mingw32-utf8
adds 2b9d76c1af1 tree-optimization/107087 - missed CCP after forwprop
adds dd63bba0c8d Fix compute_operand when op1 == op2 symbolically.
adds fb046e69f0e haifa-sched: fix autopref_rank_for_schedule comparator [PR109187]
adds 97383b4116e libstdc++: Add missing trait is_simd_flag_type
adds 5a923516ae6 RISC-V: Define __riscv_v_intrinsic [PR109312]
adds 0e8fc610fb7 c-family: -Wsequence-point and COMPONENT_REF [PR107163]
adds af45b17d0a8 c++: Allow translations of check_postcondition_result messa [...]
adds 22c3a6c3c11 Don't emit -Wxor-used-as-pow on macro expansions [PR107002]
adds 2e71f05403c libbacktrace: minor fixes for zstd decompression
adds cf19ef9eca8 libstdc++: Update tzdata to 2023a [PR109288]
adds bf78b43873b libstdc++: Tell GCC what basic_string::_M_is_local() means [...]
adds cb6f663f9d7 libstdc++: More fixes for null pointers used with std::char_traits
adds b3c5933ee72 Enable 'gfortran.dg/weak-2.f90' for nvptx target
adds ec12639c82e libstdc++: Do not use facets cached in ios for ATL128 build [...]
adds f4698e9b4d6 Update gcc de.po
adds 579cdc1e44b Daily bump.
adds aa8f4242efc compiler: mark Call_expression multiple results as a result struct
adds 91293ffb6af c++: alias ctad refinements [PR109321]
adds c9954996cd6 tree-optimization/109154 - improve if-conversion for vectorization
adds 8dd57939c20 tree-ssa-math-opts: Move PROP_gimple_opt_math from sincos p [...]
adds 36330e2e955 ipa/106124 - ICE with -fkeep-inline-functions and OpenMP
adds 7fd1d28d243 tree-optimization/109327 - forwprop stmt removal issue
adds ad32fcb8e91 scan generic vector tests before lowering
adds 86efc490ab8 tree-optimization/109331 - make sure to clean up the CFG af [...]
adds 8b2766e87db configure: deprecate --enable-link-mutex option
adds b2f327b9be8 RISC-V: Add Z*inx imcompatible check in gcc
adds 3be4e43a6a0 PR modula2/109336 - The -fmod= and -fdef= options do not work
adds 68982b98d2a CRIS: Make rtx-cost 0 for many CONST_INT "quick" operands
adds 14f50ba0540 libstdc++: Enforce requirements on template argument of std [...]
adds 31a90971201 libstdc++: Use std::remove_cv_t in std::optional::transform [...]
adds ce39714a1ce libstdc++: Apply small fix from LWG 3843 to std::expected
adds e0d77144aaa libstdc++: Fix constexpr functions in <experimental/internet>
adds ee122a2eeae libstdc++: Fix filename of new test [PR109242]
adds 00908886569 Daily bump.
adds 3588c8cbc10 Generate vpblendd instead of vpblendw for V4SI under AVX2.
adds a7df3bea9cf Fix fc-prototypes usage with C_INT64_T and non LP64 Targets.
adds ee6ae8cb479 c++: Avoid informs without a warning [PR109278]
adds 1d0ba4467dd tree-optimization/109342 - wrong code with edge equivalences in VN
adds 04b0a7b1a6d tree-optimization/107561 - reduce -Wstringop-overflow false [...]
adds a23b33a1bde c++: lambda mangling alias issues [PR107897]
adds 429a7a88438 Add recursive GORI recompuations with a depth limit.
adds c016887c91a c++: Fix up ICE in build_min_non_dep_op_overload [PR109319]
adds 83d2b1ccd17 libiberty: Remove a reference to the Glibc manual
adds 85131af0603 c++: generic lambda and function ptr conv [PR105221]
adds 58df5350753 c++: anonymous union member reference [PR105452]
adds d20a6a3311b Daily bump.
adds fe42e7fe119 Rename ufix_trunc/ufloat* patterns to fixuns_trunc/floatuns [...]
adds 65dd42d2c3d c-c++-common/Warray-bounds.c: Fix excess warnings on LLP64
adds 5de5e977aa0 Adjust memory_move_cost for MASK_REGS when MODE_SIZE > 8.
adds 608388486a5 RISC-V: Fix missing file dependency in RISC-V back-end [PR109328]
adds 79d1e0b2c2b c++tools: Fix Makefile to properly clean and rebuild [PR101834]
adds e02c9d9116f range-op-float, value-range: Fix up handling of UN{LT,LE,GT [...]
adds 10e573e86c6 libstdc++: Revert addition of boolean flag to net::ip::basi [...]
adds a35e8042fbc libstdc++: Avoid -Wmaybe-uninitialized warning in std::stop [...]
adds e9910e002d6 LRA: Implement commutative operands exchange for combining [...]
adds 1e1b30a6a49 Adjust testcases to not produce errors..
adds 92f02e754ca testsuite, analyzer: Fix up pipe-glibc.c testcase [PR107396]
adds 4969dcd2b7a libstdc++: Teach optimizer that empty COW strings are empty [...]
adds e11cde0381c Daily bump.
adds fc4cde2e6aa c++,coroutines: Stabilize names of promoted slot vars [PR101118].
adds b1f6cb2cc3a aarch64, builtins: Include PR registers in FUNCTION_ARG_REG [...]
adds 87d3bc53b17 testsuite: Add testcase for already fixed PR [PR109362]
adds 5fe05ffefd2 range-op-float: Further comparison fixes
adds 69044e11ac5 range-op-float: Further foperator_{,not_}equal::fold_range fix
adds b06464c7fb0 Change "long_double" into "long double" for C prototypes fr [...]
adds b5e38b1c166 c++: improve "NTTP argument considered unused" fix [PR53164 [...]
adds a5de246535d c++: NTTP constraint depending on outer parms [PR109160]
adds 236cde7202a Daily bump.
adds db4f7a9b47d RISC-V: Fix ICE and codegen error of scalar move in RV32 system.
adds 802ab7d0db5 RISC-V: Fix reload fail issue on vector mac instructions
adds 1719fa40c4e libiberty: Make strstr.c in libiberty ANSI compliant
adds 5bb27a1bb2f PR modula2/109336 pass -fmod= though and build m2/stage2/cc [...]
adds e35503833c0 Skip gnat.dg/prot7.adb on hppa.
adds 8f989fe879d Fix gnat.dg/opt39.adb on hppa.
adds 5f10c7f2d85 Daily bump.
adds b551ea37994 Document signbitm2.
adds 0580ea4b7a6 rs6000: Modify test case after mode promotion disabled
adds 63e95a83ced RISC-V: Fix typo
adds 2a0c4a1c5b9 Added item entry in docs for the new check_effective_target.
adds 9fd6d83a4c9 param: document ranger-recompute-depth
adds b0248580b68 build: Check that -lzstd can be linked
adds da3fd017572 ipa: Avoid constructing aggregate jump functions with huge [...]
adds 9a75f0a02e5 PR modula2/109388 clang warnings related to Modula-2
adds 78b8eda0a93 Update gcc sv.po
adds c37ed38ada7 c++: ICE with loopy var tmpl auto deduction [PR109300]
adds 10bdf6968e2 Daily bump.
adds 59b4a555c3f doc: md.texi (Insn Splitting): Tweak wording for readability.
adds 0dfbb28a954 c++: friend template matching [PR107484]
adds cdd2d6643f7 rs6000: Fix vector parity support [PR108699]
adds d634e6088f1 rs6000: Fix vector_set_var_p9 by considering BE [PR108807]
adds d0b961b802d tree-optimization/109304 - properly handle instrumented aliases
adds 7735b117bcd config: -pthread shouldn't link with -lpthread on Solaris
adds 840354060e2 riscv: Fix bootstrap [PR109384]
adds 34574064412 amdgcn: Add 64-bit vector not
adds 688d126b692 libstdc++: Fix outdated docs about demangling exception messages
adds 3f0ca7a3e44 arm: Fix vcreate definition
adds c1aca26b707 sanitizer: missing signed integer overflow errors [PR109107]
adds ce243c9eefc range-op-float: Fix reverse ops of comparisons [PR109386]
adds c57a93f6475 Fortran: reject module variable as character length in PARA [...]
adds cd5dea63a67 Regenerate gcc.pot
adds 099515c7b79 doc: md.texi (Including Patterns): Fix page break
adds 645b1362516 Daily bump.
adds 4f81edad41c RISC-V: Fix typos
adds fdc5abbdcfb [PATCH] RISC-V: Fix PR109399 VSETVL PASS bug
adds 44e17b8d899 libstdc++: Define std::sub_match::swap member function (LWG 3204)
adds ce1e682ca21 [PATCH] RISC-V: Fix SEW64 of vrsub.vx runtime fail in RV32 system
adds f0f372fab3e ipa: Avoid another ICE when dealing with type-incompatibili [...]
adds ddb0f66e6c1 Add assember CFI directives to millicode division and remai [...]
adds 4a45f5d6a9b [RFA][Bug target/108892 ][13 regression] Force re-recogniti [...]
adds 85cefbc66e7 Fix 22_locale/locale/cons/12658_thread-2.cc on hppa.
adds 9d63ce7c4c0 libstdc++: Harmonize <version> and other headers
adds 6f0d67b9129 libstdc++: Add a test for <version> FTM redefinitions
adds bff26ac1627 libstdc++: Downgrade DEBUG to ASSERTIONS when !HOSTED
adds 3bfd0420e4a libstdc++: Fix some freestanding test failures
adds 1bd13193fab PR modula2/109423 cc1gm2 ICE if an INCL or EXCL is performe [...]
adds 5229788da72 Daily bump.
adds 673a2a6445a testsuite: fix proc unsupported overriding in modules.exp [ [...]
adds 0f816116356 Fix typo in -param=vect-induction-float= attributes
adds 804208a2ab8 [testsuite] enable -maltivec like vect_int for signbit-2.c
adds 939fb3fffeb MAINTAINERS: Add myself as CTF and BTF reviewer
new b1d131f8941 Merge commit '939fb3fffebf7be2638ddef25dbe1c15f2aaa9d6' into HEAD
new 6baa95c9c5b Adjust '.github/bors_log_expected_warnings'
new 3757e8d7179 Merge commit '6baa95c9c5b3fea96fd22d03d961db4e4cf48d88' int [...]
new 2bc9f60374f Placate clang-format, 'gcc/rust/rust-lang.cc:grs_langhook_t [...]
new 62d48d5e4a9 gccrs: Introduce AST::Visitable class for AST
adds f66b135d0b5 gccrs: fatal_error_flag: Fix typo in error message
adds 776ff053800 gccrs: unsafe: check use of `target_feature` attribute
adds d9e05700ac3 gccrs: Check for mutable references in const functions
adds ef792b9658d gccrs: rust: add bound parsing in parse_generic_arg.
adds e1394230b3f gccrs: Implement declarative macro 2.0 parser
adds 3f1dbb2cf8f gccrs: Add name resolution to generic argument associated i [...]
adds 7eab9d18d97 gccrs: Support associated type bound arguments
adds 364f4cd3072 gccrs: Reuse TypeCheckPattern on LetStmt's
adds 8e2abbef4cc gccrs: Add get_locus function for abstract class MetaItemInner.
adds 86f8e47f9df gccrs: diagnostics: Add underline for tokens in diagnostics.
adds 881ed7fb273 gccrs: Change how CompileVarDecl outputs Bvariable's
adds 60affc3a1c5 gccrs: testsuite: Handle Windows carriage returns properly
adds 910e7e0a958 gccrs: Support GroupedPattern during name resolution
adds cb42610bfba gccrs: Do not crash on empty macros expand. Fixes #1712
adds 93fcadd208a gccrs: Add HIR lowering for GroupedPattern
adds d5a303cc664 gccrs: Add get_item method for HIR::GroupedPattern
adds 83e5f634d74 gccrs: Add type resolution for grouped patterns
adds 221650c280c gccrs: Added missing GroupedPattern visitors for code generation
adds 9b19e93873c gccrs: Rename file rust-ast-full-test.cc to rust-ast.cc
adds d6cb04bf5c0 gccrs: moved operator.h to util/rust-operators.h
adds 760f529d813 gccrs: fixed compiler error message on wildcard pattern wit [...]
adds 8e7e682a9f8 gccrs: fixed indentations in AST pretty expanded dump of trait
adds 51b607c2227 gccrs: macro: Allow builtin `MacroInvocation`s within the AST
adds ad9d75f5080 gccrs: Create and use CompilePatternLet visitor for compili [...]
adds 9cbd270632b gccrs: parser: Allow parsing multiple reference types
adds 2dab57c3f2f gccrs: Move rust-buffered-queue.h to util folder #1766
adds fd7358af3cf gccrs: Improve GroupedPattern lowering
adds 95efd84db13 gccrs: Remove HIR::GroupedPattern
adds 0e4bf6e7fc4 gccrs: Optimize HIR::ReferencePattern
adds 86f53e5853d gccrs: Implement lowering ReferencePattern from AST to HIR
adds 2af66ebd1d8 gccrs: parser: Improve parsing of complex generic arguments
adds 7f5144d1c96 gccrs: parser: Fix parsing of closure param list
adds 476faea3563 gccrs: Add support for feature check.
adds 4141941ae7b gccrs: Removed comment copy-pasted from gcc/tree.def
adds 8d1d08cdbcf gccrs: Add another test case for passing associated type-bounds
adds c1b1bbbc645 gccrs: Move TypePredicateItem impl out of the header
adds 688fccb5227 gccrs: Refactor TyVar and TypeBoundPredicates
adds e42118c327f gccrs: Refactor SubstitutionRef base class into its own CC file
adds 6abbfb5280f gccrs: Refactor all substitution mapper code implementation [...]
adds d73082efece gccrs: Refactor BaseType, InferType and ErrorType impl into [...]
adds 26af4b0604d gccrs: Refactor PathProbe into cc file
adds 547e511fbdd gccrs: Refactor PathProbeType code into CC file
adds 615ee14c08e gccrs: Refactor all code out of the rust-tyty.h header
adds 6c4fa22d384 gccrs: Rename rust-tyctx.cc to rust-typecheck-context.cc
adds 1019fd6337b gccrs: Rename header rust-hir-trait-ref.h to rust-hir-trait [...]
adds dcb2e571ac6 gccrs: Refactor handle_substitutions to take a reference
adds 2f228578d56 gccrs: Clear the substitution callbacks when copying Argume [...]
adds 31f1e59962b gccrs: Add missing param subst callback
adds e42c28bcfdd gccrs: Remove monomorphization hack to setup possible assoc [...]
adds 68d671ac725 gccrs: Refactor the type unification code
adds 2a2e6712ba0 gccrs: Fix nullptr dereference
adds f62dcf2c65a gccrs: Add missing Sized, Copy and Clone lang item mappings
adds 9754a60623c gccrs: Fix higher ranked trait bounds computation of self
adds 11150b7c05c gccrs: Remove bad error message on checking function arguments
adds eb4a61ac1ba gccrs: Add general TypeBounds checks
adds fa7b3a2f07f gccrs: Add support for TuplePattern in let statements
adds 1c57244dbc0 gccrs: rust-item: include rust-expr.h
adds f548ddee96a gccrs: parser: Expose parse_macro_invocation as public API
adds 2d30e0b882f gccrs: expansion: Add `get_token_slice` to `MacroInvocLexer` class
adds 3821669164d gccrs: macros: Perform macro expansion in a fixed-point fashion.
adds fbd5244df6b gccrs: expander: Add documentation for `expand_eager_invocations`
adds 5fd04425c09 gccrs: typecheck: Refactor rust-hir-trait-reference.h
adds f64799a567e gccrs: cli: Update safety warning message
adds b4229fb086b gccrs: Update copyright years.
adds fd5eb9f2b01 gccrs: Add feature gate for "rust-intrinsic".
adds a9d72ef2d03 gccrs: Add variadic argument type checking
adds 8a9886a85ea gccrs: Add test
adds e81f5be60d1 gccrs: Simplify WildcardPattern let statement handling
adds b56d093e952 gccrs: lex: Prevent directories in RAIIFile
adds 7b00a80c9df gccrs: testsuite: Add empty string macro test
adds 20529dff93f gccrs: Add support for parsing empty tuple patterns.
adds fd406fc7046 gccrs: Implemented UTF-8 checking for include_str!()
adds c627781b8f6 gccrs: Extract query_type from TypeCheckBase to be a simple extern
adds e90d06c5447 gccrs: Add new virtual function HIR::ImplItem::get_impl_item_name
adds 4b25fc15b92 gccrs: Support for Sized builtin marker trait
adds a11b44b6a57 gccrs: Fix regression in testcase
adds ecdce2bf17a gccrs: Add trailing newline
adds 8b0ed2387a5 gccrs: builtins: Return empty list of tokens instead of nullptr
adds 6774d569c61 gccrs: Fix formatting
adds 8628486f487 gccrs: Add AST::AltPattern class
adds 0ec543c7c61 gccrs: Fix up DejaGnu directives in 'rust/compile/issue-183 [...]
adds 1a58da7c2d8 gccrs: rename rust-hir-full-tests.cc
adds 3b342e11627 gccrs: add test case to show our query-type system is working
adds fa7675df86a gccrs: ast: Refactor TraitItem to keep Location info
adds 2785d591116 gccrs: diagnostic: Refactor Error class
adds f2d6ab839ce gccrs: Added AST Node AST::InlineAsm
adds 990ae497b86 gccrs: Address unsafe with/without block handling ambiguity
adds d2a499a9881 gccrs: Fix issue with parsing unsafe block expression statements
new df3a80d97fe Merge upstream (dummy), "Rust front-end update 2023-04-05"
new 626dabb43d1 Merge commit 'df3a80d97fe58eafcd880448b3768ca302c743f6' int [...]
The 14 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails. The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
.github/bors_log_expected_warnings | 38 +-
ChangeLog | 8 +
MAINTAINERS | 5 +-
c++tools/ChangeLog | 9 +
c++tools/Makefile.in | 12 +-
contrib/ChangeLog | 18 +
contrib/config-list.mk | 2 +-
contrib/unicode/DerivedCoreProperties.txt | 253 +-
contrib/unicode/DerivedNormalizationProps.txt | 83 +-
contrib/unicode/EastAsianWidth.txt | 74 +-
contrib/unicode/NameAliases.txt | 570 +
contrib/unicode/PropList.txt | 56 +-
contrib/unicode/README | 34 +-
contrib/unicode/UnicodeData.txt | 300 +-
fixincludes/ChangeLog | 8 +
fixincludes/config.h.in | 4 +
fixincludes/configure | 10 +
fixincludes/configure.ac | 2 +-
fixincludes/system.h | 4 +
gcc/ChangeLog | 3415 +++
gcc/DATESTAMP | 2 +-
gcc/Makefile.in | 6 +-
gcc/ada/ChangeLog | 22 +
gcc/ada/sem_ch6.adb | 15 +
gcc/analyzer/ChangeLog | 123 +
gcc/analyzer/analyzer.opt | 4 +
gcc/analyzer/engine.cc | 29 +-
gcc/analyzer/infinite-recursion.cc | 151 +-
gcc/analyzer/kf.cc | 31 +
gcc/analyzer/pending-diagnostic.h | 4 +
gcc/analyzer/program-point.cc | 42 +
gcc/analyzer/program-point.h | 3 +
gcc/analyzer/program-state.cc | 28 +-
gcc/analyzer/region-model.cc | 74 +-
gcc/analyzer/region-model.h | 3 +-
gcc/analyzer/sm-malloc.cc | 94 +-
gcc/analyzer/store.cc | 70 +-
gcc/analyzer/store.h | 11 +-
gcc/asan.cc | 12 +-
gcc/builtins.cc | 66 +-
gcc/c-family/ChangeLog | 93 +
gcc/c-family/c-common.cc | 52 +-
gcc/c-family/c-common.h | 3 +-
gcc/c-family/c-cppbuiltin.cc | 2 +
gcc/c-family/c-gimplify.cc | 22 +-
gcc/c-family/c-ubsan.cc | 67 +-
gcc/c-family/c-warn.cc | 125 +-
gcc/c-family/c.opt | 2 +-
gcc/c/ChangeLog | 19 +
gcc/c/c-decl.cc | 36 +-
gcc/c/c-typeck.cc | 2 +-
gcc/cfgexpand.cc | 10 +
gcc/cgraph.cc | 11 +-
gcc/cgraph.h | 11 +-
gcc/cgraphclones.cc | 16 +-
gcc/cgraphunit.cc | 33 +-
gcc/combine.cc | 1 +
gcc/common.opt | 16 +-
gcc/common/config/riscv/riscv-common.cc | 30 +
gcc/config.gcc | 22 +-
gcc/config.host | 10 +-
gcc/config/aarch64/aarch64-builtins.cc | 40 +-
gcc/config/aarch64/aarch64-cores.def | 5 +-
gcc/config/aarch64/aarch64-protos.h | 1 +
gcc/config/aarch64/aarch64-simd.md | 73 +-
gcc/config/aarch64/aarch64-sve-builtins.def | 2 +-
gcc/config/aarch64/aarch64-sve2.md | 57 +-
gcc/config/aarch64/aarch64.cc | 207 +-
gcc/config/aarch64/aarch64.h | 10 +-
gcc/config/aarch64/aarch64.md | 27 +-
gcc/config/arm/mve.md | 4 +-
gcc/config/arm/vfp.md | 4 +-
gcc/config/cris/constraints.md | 12 +-
gcc/config/cris/cris.cc | 23 +-
gcc/config/cris/cris.md | 103 +-
gcc/config/gcn/gcn-protos.h | 6 +
gcc/config/gcn/gcn-valu.md | 478 +-
gcc/config/gcn/gcn.cc | 216 +-
gcc/config/gcn/gcn.md | 7 +
gcc/config/gcn/mkoffload.cc | 3 +
gcc/config/gcn/predicates.md | 7 +
gcc/config/host-linux.cc | 2 +-
gcc/config/i386/host-mingw32.cc | 10 +-
gcc/config/i386/i386-builtin.def | 84 +-
gcc/config/i386/i386-expand.cc | 84 +-
gcc/config/i386/i386-features.cc | 77 +-
gcc/config/i386/i386-features.h | 10 +-
gcc/config/i386/i386-protos.h | 2 -
gcc/config/i386/i386.cc | 51 +-
gcc/config/i386/i386.md | 18 +-
gcc/config/i386/i386.opt | 4 +
gcc/config/i386/mmx.md | 29 +-
gcc/config/i386/sse.md | 69 +-
gcc/config/i386/sym-mingw32.cc | 3 +
gcc/config/i386/t-cygwin-w64 | 3 -
gcc/config/i386/utf8-mingw32.rc | 3 +
gcc/config/i386/winnt-utf8.manifest | 8 +
gcc/config/i386/x-mingw32 | 3 +-
gcc/config/i386/x-mingw32-utf8 | 61 +
gcc/config/i386/x86-tune.def | 6 +-
gcc/config/loongarch/loongarch.h | 4 +-
gcc/config/m68k/m68k-protos.h | 1 +
gcc/config/m68k/m68k.cc | 15 +
gcc/config/m68k/m68k.h | 3 +
gcc/config/mips/mips-protos.h | 2 +-
gcc/config/mips/mips.cc | 5 +-
gcc/config/mips/mips.h | 6 +-
gcc/config/mips/mips.md | 24 +
gcc/config/moxie/constraints.md | 6 +-
gcc/config/moxie/moxie.cc | 3 -
gcc/config/riscv/bitmanip.md | 78 +-
gcc/config/riscv/constraints.md | 22 +
gcc/config/riscv/crypto.md | 435 +
gcc/config/riscv/genrvv-type-indexer.cc | 313 +
gcc/config/riscv/iterators.md | 12 +-
gcc/config/riscv/multilib-generator | 2 +-
gcc/config/riscv/peephole.md | 56 +
gcc/config/riscv/predicates.md | 24 +-
gcc/config/riscv/riscv-builtins.cc | 57 +
gcc/config/riscv/riscv-c.cc | 38 +-
gcc/config/riscv/riscv-cores.def | 4 +
gcc/config/riscv/riscv-ftypes.def | 10 +
gcc/config/riscv/riscv-modes.def | 22 +-
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gcc/m2/gm2-libs/Indexing.mod | 6 +-
gcc/m2/gm2-libs/M2Dependent.def | 15 +-
gcc/m2/gm2-libs/M2Dependent.mod | 405 +-
gcc/m2/gm2-libs/M2LINK.def | 41 -
gcc/m2/gm2-libs/M2RTS.def | 19 +-
gcc/m2/gm2-libs/M2RTS.mod | 28 +-
gcc/m2/gm2-libs/PushBackInput.mod | 7 +-
gcc/m2/gm2-libs/RTExceptions.mod | 5 +-
gcc/m2/gm2-libs/RTint.def | 2 +-
gcc/m2/gm2-libs/RTint.mod | 418 +-
gcc/m2/gm2-libs/SFIO.mod | 1 -
gcc/m2/gm2-libs/StringConvert.mod | 2 -
gcc/m2/gm2-libs/SysStorage.mod | 13 +-
gcc/m2/gm2-libs/libc.def | 10 +-
gcc/m2/gm2-libs/sckt.def | 16 +-
gcc/m2/gm2spec.cc | 173 +-
gcc/m2/lang-specs.h | 7 +-
gcc/m2/lang.opt | 24 +-
gcc/m2/m2.flex | 71 +-
gcc/m2/mc-boot-ch/{GBuiltins.c => GBuiltins.cc} | 2 +-
gcc/m2/mc-boot-ch/GRTco.c | 127 -
gcc/m2/mc-boot-ch/GUnixArgs.cc | 10 +-
gcc/m2/mc-boot-ch/{Gdtoa.c => Gdtoa.cc} | 2 +-
gcc/m2/{pge-boot/Gerrno.c => mc-boot-ch/Gerrno.cc} | 4 +-
gcc/m2/mc-boot-ch/{Gldtoa.c => Gldtoa.cc} | 2 +-
gcc/m2/mc-boot-ch/Glibc.c | 36 +
.../m2rts.h => mc-boot-ch/Gm2rtsdummy.cc} | 29 +-
gcc/m2/mc-boot-ch/Gtermios.cc | 2 +-
gcc/m2/mc-boot-ch/m2rts.h | 5 +-
gcc/m2/mc-boot/{GASCII.c => GASCII.cc} | 1 +
gcc/m2/mc-boot/GASCII.h | 1 +
gcc/m2/{pge-boot/GArgs.c => mc-boot/GArgs.cc} | 9 +-
gcc/m2/mc-boot/GArgs.h | 3 +-
.../GAssertion.c => mc-boot/GAssertion.cc} | 9 +-
gcc/m2/mc-boot/GAssertion.h | 3 +-
gcc/m2/mc-boot/{GBreak.c => GBreak.cc} | 1 +
gcc/m2/mc-boot/GBreak.h | 1 +
gcc/m2/mc-boot/GCOROUTINES.h | 1 +
gcc/m2/mc-boot/{GCmdArgs.c => GCmdArgs.cc} | 27 +-
gcc/m2/mc-boot/GCmdArgs.h | 3 +-
gcc/m2/{pge-boot/GDebug.c => mc-boot/GDebug.cc} | 20 +-
gcc/m2/mc-boot/GDebug.h | 5 +-
.../GDynamicStrings.cc} | 132 +-
gcc/m2/mc-boot/GDynamicStrings.h | 15 +-
gcc/m2/mc-boot/{GEnvironment.c => GEnvironment.cc} | 9 +-
gcc/m2/mc-boot/GEnvironment.h | 5 +-
gcc/m2/{pge-boot/GFIO.c => mc-boot/GFIO.cc} | 152 +-
gcc/m2/mc-boot/GFIO.h | 19 +-
.../{GFormatStrings.c => GFormatStrings.cc} | 27 +-
gcc/m2/mc-boot/GFormatStrings.h | 1 +
gcc/m2/mc-boot/{GFpuIO.c => GFpuIO.cc} | 7 +-
gcc/m2/mc-boot/GFpuIO.h | 1 +
gcc/m2/{pge-boot/GIO.c => mc-boot/GIO.cc} | 119 +-
gcc/m2/mc-boot/GIO.h | 9 +-
gcc/m2/mc-boot/{GIndexing.c => GIndexing.cc} | 19 +-
gcc/m2/mc-boot/GIndexing.h | 5 +-
.../GM2Dependent.c => mc-boot/GM2Dependent.cc} | 534 +-
gcc/m2/mc-boot/GM2Dependent.h | 14 +-
.../GM2EXCEPTION.c => mc-boot/GM2EXCEPTION.cc} | 10 +-
gcc/m2/mc-boot/GM2EXCEPTION.h | 3 +-
gcc/m2/mc-boot/GM2LINK.h | 3 +-
gcc/m2/mc-boot/{GM2RTS.c => GM2RTS.cc} | 69 +-
gcc/m2/mc-boot/GM2RTS.h | 17 +-
gcc/m2/mc-boot/{GMemUtils.c => GMemUtils.cc} | 1 +
gcc/m2/mc-boot/GMemUtils.h | 1 +
.../{pge-boot/GNumberIO.c => mc-boot/GNumberIO.cc} | 88 +-
gcc/m2/mc-boot/GNumberIO.h | 1 +
.../GPushBackInput.c => mc-boot/GPushBackInput.cc} | 22 +-
gcc/m2/mc-boot/GPushBackInput.h | 3 +-
.../GRTExceptions.c => mc-boot/GRTExceptions.cc} | 66 +-
gcc/m2/mc-boot/GRTExceptions.h | 7 +-
gcc/m2/mc-boot/GRTco.h | 1 +
gcc/m2/mc-boot/GRTentity.h | 3 +-
gcc/m2/mc-boot/{GRTint.c => GRTint.cc} | 499 +-
gcc/m2/mc-boot/GRTint.h | 5 +-
gcc/m2/mc-boot/{GSArgs.c => GSArgs.cc} | 9 +-
gcc/m2/mc-boot/GSArgs.h | 3 +-
gcc/m2/{pge-boot/GSFIO.c => mc-boot/GSFIO.cc} | 14 +-
gcc/m2/mc-boot/GSFIO.h | 5 +-
gcc/m2/mc-boot/GSYSTEM.h | 1 +
gcc/m2/mc-boot/GSelective.h | 3 +-
gcc/m2/mc-boot/{GStdIO.c => GStdIO.cc} | 1 +
gcc/m2/mc-boot/GStdIO.h | 1 +
.../{pge-boot/GStorage.c => mc-boot/GStorage.cc} | 9 +-
gcc/m2/mc-boot/GStorage.h | 3 +-
gcc/m2/mc-boot/{GStrCase.c => GStrCase.cc} | 1 +
gcc/m2/mc-boot/GStrCase.h | 1 +
gcc/m2/{pge-boot/GStrIO.c => mc-boot/GStrIO.cc} | 15 +-
gcc/m2/mc-boot/GStrIO.h | 1 +
gcc/m2/{pge-boot/GStrLib.c => mc-boot/GStrLib.cc} | 33 +-
gcc/m2/mc-boot/GStrLib.h | 7 +-
.../{GStringConvert.c => GStringConvert.cc} | 177 +-
gcc/m2/mc-boot/GStringConvert.h | 25 +-
gcc/m2/mc-boot/GSysExceptions.h | 1 +
.../GSysStorage.c => mc-boot/GSysStorage.cc} | 35 +-
gcc/m2/mc-boot/GSysStorage.h | 3 +-
gcc/m2/mc-boot/{GTimeString.c => GTimeString.cc} | 1 +
gcc/m2/mc-boot/GTimeString.h | 1 +
gcc/m2/mc-boot/GUnixArgs.h | 1 +
gcc/m2/mc-boot/{Galists.c => Galists.cc} | 15 +-
gcc/m2/mc-boot/Galists.h | 3 +-
gcc/m2/mc-boot/{Gdecl.c => Gdecl.cc} | 1412 +-
gcc/m2/mc-boot/Gdecl.h | 123 +-
gcc/m2/mc-boot/Gdtoa.h | 5 +-
gcc/m2/mc-boot/Gerrno.h | 1 +
gcc/m2/mc-boot/{Gkeyc.c => Gkeyc.cc} | 265 +-
gcc/m2/mc-boot/Gkeyc.h | 5 +-
gcc/m2/mc-boot/Gldtoa.h | 5 +-
gcc/m2/mc-boot/Glibc.h | 2 +
gcc/m2/mc-boot/Glibm.h | 1 +
gcc/m2/mc-boot/{Glists.c => Glists.cc} | 15 +-
gcc/m2/mc-boot/Glists.h | 3 +-
gcc/m2/mc-boot/{GmcComment.c => GmcComment.cc} | 33 +-
gcc/m2/mc-boot/GmcComment.h | 9 +-
gcc/m2/mc-boot/{GmcComp.c => GmcComp.cc} | 41 +-
gcc/m2/mc-boot/GmcComp.h | 1 +
gcc/m2/mc-boot/{GmcDebug.c => GmcDebug.cc} | 5 +-
gcc/m2/mc-boot/GmcDebug.h | 3 +-
gcc/m2/mc-boot/{GmcError.c => GmcError.cc} | 55 +-
gcc/m2/mc-boot/GmcError.h | 1 +
gcc/m2/mc-boot/{GmcFileName.c => GmcFileName.cc} | 1 +
gcc/m2/mc-boot/GmcFileName.h | 1 +
gcc/m2/mc-boot/{GmcLexBuf.c => GmcLexBuf.cc} | 51 +-
gcc/m2/mc-boot/GmcLexBuf.h | 3 +-
gcc/m2/mc-boot/{GmcMetaError.c => GmcMetaError.cc} | 57 +-
gcc/m2/mc-boot/GmcMetaError.h | 1 +
gcc/m2/mc-boot/{GmcOptions.c => GmcOptions.cc} | 243 +-
gcc/m2/mc-boot/GmcOptions.h | 39 +-
.../mc-boot/{GmcPreprocess.c => GmcPreprocess.cc} | 1 +
gcc/m2/mc-boot/GmcPreprocess.h | 1 +
gcc/m2/mc-boot/{GmcPretty.c => GmcPretty.cc} | 21 +-
gcc/m2/mc-boot/GmcPretty.h | 1 +
gcc/m2/mc-boot/{GmcPrintf.c => GmcPrintf.cc} | 15 +-
gcc/m2/mc-boot/GmcPrintf.h | 1 +
gcc/m2/mc-boot/{GmcQuiet.c => GmcQuiet.cc} | 1 +
gcc/m2/mc-boot/GmcQuiet.h | 1 +
gcc/m2/mc-boot/{GmcReserved.c => GmcReserved.cc} | 1 +
gcc/m2/mc-boot/GmcReserved.h | 1 +
gcc/m2/mc-boot/{GmcSearch.c => GmcSearch.cc} | 23 +-
gcc/m2/mc-boot/GmcSearch.h | 7 +-
gcc/m2/mc-boot/{GmcStack.c => GmcStack.cc} | 1 +
gcc/m2/mc-boot/GmcStack.h | 1 +
gcc/m2/mc-boot/{GmcStream.c => GmcStream.cc} | 7 +-
gcc/m2/mc-boot/GmcStream.h | 1 +
gcc/m2/mc-boot/Gmcflex.h | 3 +-
gcc/m2/mc-boot/{Gmcp1.c => Gmcp1.cc} | 47 +-
gcc/m2/mc-boot/Gmcp1.h | 3 +-
gcc/m2/mc-boot/{Gmcp2.c => Gmcp2.cc} | 35 +-
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gcc/m2/mc-boot/{Gmcp3.c => Gmcp3.cc} | 51 +-
gcc/m2/mc-boot/Gmcp3.h | 3 +-
gcc/m2/mc-boot/{Gmcp4.c => Gmcp4.cc} | 35 +-
gcc/m2/mc-boot/Gmcp4.h | 3 +-
gcc/m2/mc-boot/{Gmcp5.c => Gmcp5.cc} | 43 +-
gcc/m2/mc-boot/Gmcp5.h | 3 +-
gcc/m2/mc-boot/{GnameKey.c => GnameKey.cc} | 17 +-
gcc/m2/mc-boot/GnameKey.h | 5 +-
gcc/m2/mc-boot/Gpth.h | 43 -
gcc/m2/mc-boot/{GsymbolKey.c => GsymbolKey.cc} | 23 +-
gcc/m2/mc-boot/GsymbolKey.h | 7 +-
gcc/m2/mc-boot/Gtermios.h | 9 +-
gcc/m2/mc-boot/{Gtop.c => Gtop.cc} | 1 +
gcc/m2/mc-boot/{Gvarargs.c => Gvarargs.cc} | 1 +
gcc/m2/mc-boot/Gvarargs.h | 1 +
gcc/m2/mc-boot/{Gwlists.c => Gwlists.cc} | 15 +-
gcc/m2/mc-boot/Gwlists.h | 3 +-
gcc/m2/mc-boot/Gwrapc.h | 1 +
gcc/m2/mc/decl.mod | 40 +-
gcc/m2/mc/keyc.mod | 16 +-
gcc/m2/mc/mcOptions.def | 21 +
gcc/m2/mc/mcOptions.mod | 40 +-
gcc/m2/mc/symbolKey.mod | 6 +-
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gcc/m2/{mc-boot/GArgs.c => pge-boot/GArgs.cc} | 2 -
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gcc/m2/pge-boot/{GBuiltins.c => GBuiltins.cc} | 0
gcc/m2/{mc-boot/GDebug.c => pge-boot/GDebug.cc} | 4 +-
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gcc/m2/pge-boot/{GLists.c => GLists.cc} | 2 +-
.../GM2Dependent.c => pge-boot/GM2Dependent.cc} | 457 +-
gcc/m2/pge-boot/GM2Dependent.h | 15 +-
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gcc/m2/pge-boot/GM2RTS.h | 73 +-
gcc/m2/pge-boot/{GNameKey.c => GNameKey.cc} | 2 +-
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gcc/m2/pge-boot/{GOutput.c => GOutput.cc} | 2 +-
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gcc/m2/pge-boot/{GStdIO.c => GStdIO.cc} | 2 +-
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gcc/m2/pge-boot/{GSymbolKey.c => GSymbolKey.cc} | 2 +-
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gcc/m2/pge-boot/GUnixArgs.cc | 6 +-
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gcc/m2/pge-boot/{Gbnflex.c => Gbnflex.cc} | 2 +-
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gcc/m2/pge-boot/{Gldtoa.c => Gldtoa.cc} | 0
gcc/m2/pge-boot/{Glibc.c => Glibc.cc} | 37 +
gcc/m2/pge-boot/Glibc.h | 1 +
gcc/m2/pge-boot/{Glibm.c => Glibm.cc} | 0
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gcc/m2/pge-boot/{Gpge.c => Gpge.cc} | 2 +-
gcc/m2/pge-boot/Gtermios.cc | 2 +-
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gcc/m2/pge-boot/README | 6 +-
gcc/m2/pge-boot/m2rts.h | 2 +-
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gcc/m2/pge-boot/{network.c => network.cc} | 0
gcc/m2/plugin/m2rte.cc | 73 +-
gcc/m2/target-independent/{ => m2}/Builtins.texi | 6 +-
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gcc/m2/target-independent/{ => m2}/gm2-libs.texi | 466 +-
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gcc/m2/target-independent/readme.txt | 5 +-
gcc/m2/tools-src/def2doc.py | 2 +-
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gcc/params.opt | 7 +-
gcc/passes.cc | 7 +
gcc/po/ChangeLog | 34 +
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gcc/po/gcc.pot | 15394 +++++-----
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gcc/po/zh_CN.po | 28546 +++++++++---------
gcc/po/zh_TW.po | 28290 +++++++++---------
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gcc/testsuite/g++.dg/cpp0x/lambda/lambda-const11.C | 14 +
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gcc/testsuite/g++.dg/cpp0x/new6.C | 13 +
gcc/testsuite/g++.dg/cpp0x/noexcept77.C | 9 +
gcc/testsuite/g++.dg/cpp0x/nsdmi-template25.C | 18 +
gcc/testsuite/g++.dg/cpp0x/pr84497.C | 6 +-
gcc/testsuite/g++.dg/cpp0x/ptrmem-cst1.C | 11 +
gcc/testsuite/g++.dg/cpp1y/lambda-generic-func2.C | 18 +
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gcc/testsuite/g++.dg/cpp1y/noexcept1.C | 4 +-
gcc/testsuite/g++.dg/cpp1y/pr108606.C | 11 +
gcc/testsuite/g++.dg/cpp1y/var-templ70.C | 25 +
gcc/testsuite/g++.dg/cpp1y/var-templ71.C | 26 +
gcc/testsuite/g++.dg/cpp1y/var-templ72.C | 27 +
gcc/testsuite/g++.dg/cpp1y/var-templ73.C | 12 +
gcc/testsuite/g++.dg/cpp1y/var-templ74.C | 19 +
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gcc/testsuite/g++.dg/cpp1y/var-templ77.C | 32 +
gcc/testsuite/g++.dg/cpp1y/var-templ78.C | 12 +
gcc/testsuite/g++.dg/cpp1y/var-templ79.C | 5 +
gcc/testsuite/g++.dg/cpp1z/constexpr-lambda28.C | 15 +
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gcc/testsuite/g++.dg/cpp1z/noexcept-type27.C | 8 +
gcc/testsuite/g++.dg/cpp23/ext-floating.h | 3 +-
gcc/testsuite/g++.dg/cpp23/ext-floating14.C | 585 +
gcc/testsuite/g++.dg/cpp23/ext-floating15.C | 11 +
gcc/testsuite/g++.dg/cpp23/static-operator-call5.C | 1 +
gcc/testsuite/g++.dg/cpp23/subscript14.C | 42 +
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gcc/testsuite/g++.dg/cpp2a/concepts-class5.C | 37 +
gcc/testsuite/g++.dg/cpp2a/concepts-class5a.C | 38 +
gcc/testsuite/g++.dg/cpp2a/concepts-friend14.C | 26 +
gcc/testsuite/g++.dg/cpp2a/concepts-lambda3.C | 4 +-
gcc/testsuite/g++.dg/cpp2a/concepts-new1.C | 13 +
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gcc/testsuite/g++.dg/cpp2a/constexpr-inst2.C | 12 +
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gcc/testsuite/g++.dg/cpp2a/lambda-generic11.C | 13 +
gcc/testsuite/g++.dg/debug/dwarf2/pr108716.C | 14 +
gcc/testsuite/g++.dg/debug/pr108967.C | 41 +
gcc/testsuite/g++.dg/eh/dtor4.C | 15 +
gcc/testsuite/g++.dg/ext/attr-copy-2.C | 60 +-
gcc/testsuite/g++.dg/ext/attr-tsafe1.C | 14 +
gcc/testsuite/g++.dg/ext/int128-7.C | 4 +
gcc/testsuite/g++.dg/ext/is_deducible1.C | 35 +
gcc/testsuite/g++.dg/ext/pr109177.C | 6 +
gcc/testsuite/g++.dg/ext/stmtexpr19.C | 2 +-
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.../riscv/rvv/base/vasub_vx_tum_rv32-1.C | 157 -
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.../riscv/rvv/base/vasub_vx_tumu_rv32-1.C | 157 -
.../riscv/rvv/base/vasub_vx_tumu_rv32-2.C | 157 -
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.../riscv/rvv/base/vasub_vx_tumu_rv64-1.C | 160 -
.../riscv/rvv/base/vasub_vx_tumu_rv64-2.C | 160 -
.../riscv/rvv/base/vasub_vx_tumu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vasubu_vv-1.C | 314 -
.../g++.target/riscv/rvv/base/vasubu_vv-2.C | 314 -
.../g++.target/riscv/rvv/base/vasubu_vv-3.C | 314 -
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.../riscv/rvv/base/vasubu_vx_mu_rv32-1.C | 157 -
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.../riscv/rvv/base/vasubu_vx_mu_rv64-1.C | 160 -
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.../g++.target/riscv/rvv/base/vasubu_vx_rv32-1.C | 308 -
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.../riscv/rvv/base/vasubu_vx_tu_rv32-1.C | 157 -
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.../riscv/rvv/base/vasubu_vx_tu_rv64-1.C | 160 -
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.../riscv/rvv/base/vasubu_vx_tum_rv32-1.C | 157 -
.../riscv/rvv/base/vasubu_vx_tum_rv32-2.C | 157 -
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.../riscv/rvv/base/vasubu_vx_tum_rv64-1.C | 160 -
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.../riscv/rvv/base/vasubu_vx_tumu_rv32-1.C | 157 -
.../riscv/rvv/base/vasubu_vx_tumu_rv32-2.C | 157 -
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.../riscv/rvv/base/vasubu_vx_tumu_rv64-1.C | 160 -
.../riscv/rvv/base/vasubu_vx_tumu_rv64-2.C | 160 -
.../riscv/rvv/base/vasubu_vx_tumu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vdiv_vv-1.C | 314 -
.../g++.target/riscv/rvv/base/vdiv_vv-2.C | 314 -
.../g++.target/riscv/rvv/base/vdiv_vv-3.C | 314 -
.../g++.target/riscv/rvv/base/vdiv_vv_mu-1.C | 160 -
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.../g++.target/riscv/rvv/base/vdiv_vx_mu_rv32-1.C | 157 -
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.../g++.target/riscv/rvv/base/vdiv_vx_rv32-1.C | 308 -
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.../g++.target/riscv/rvv/base/vdiv_vx_rv64-1.C | 314 -
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.../g++.target/riscv/rvv/base/vdiv_vx_rv64-3.C | 314 -
.../g++.target/riscv/rvv/base/vdiv_vx_tu_rv32-1.C | 157 -
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.../g++.target/riscv/rvv/base/vdiv_vx_tu_rv32-3.C | 157 -
.../g++.target/riscv/rvv/base/vdiv_vx_tu_rv64-1.C | 160 -
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.../g++.target/riscv/rvv/base/vdiv_vx_tum_rv32-1.C | 157 -
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.../riscv/rvv/base/vdiv_vx_tumu_rv32-1.C | 157 -
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.../riscv/rvv/base/vdiv_vx_tumu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vdivu_vv-1.C | 314 -
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.../g++.target/riscv/rvv/base/vdivu_vv-3.C | 314 -
.../g++.target/riscv/rvv/base/vdivu_vv_mu-1.C | 160 -
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.../g++.target/riscv/rvv/base/vdivu_vx_mu_rv32-1.C | 157 -
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.../g++.target/riscv/rvv/base/vdivu_vx_mu_rv32-3.C | 157 -
.../g++.target/riscv/rvv/base/vdivu_vx_mu_rv64-1.C | 160 -
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.../g++.target/riscv/rvv/base/vdivu_vx_mu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vdivu_vx_rv32-1.C | 308 -
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.../g++.target/riscv/rvv/base/vdivu_vx_rv64-1.C | 314 -
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.../g++.target/riscv/rvv/base/vdivu_vx_tu_rv32-1.C | 157 -
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.../riscv/rvv/base/vdivu_vx_tum_rv32-1.C | 157 -
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gcc/testsuite/g++.target/riscv/rvv/base/vle-1.C | 345 -
gcc/testsuite/g++.target/riscv/rvv/base/vle_tu-1.C | 345 -
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.../g++.target/riscv/rvv/base/vloxei16_mu-1.C | 333 -
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.../g++.target/riscv/rvv/base/vloxei16_tumu-3.C | 333 -
.../g++.target/riscv/rvv/base/vloxei32-1.C | 608 -
.../g++.target/riscv/rvv/base/vloxei32-2.C | 608 -
.../g++.target/riscv/rvv/base/vloxei32-3.C | 608 -
.../g++.target/riscv/rvv/base/vloxei32_mu-1.C | 307 -
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.../g++.target/riscv/rvv/base/vloxei32_tu-2.C | 307 -
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.../g++.target/riscv/rvv/base/vloxei64-1.C | 518 -
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.../g++.target/riscv/rvv/base/vloxei64_mu-1.C | 262 -
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.../g++.target/riscv/rvv/base/vloxei8-1.C | 686 -
.../g++.target/riscv/rvv/base/vloxei8-2.C | 686 -
.../g++.target/riscv/rvv/base/vloxei8-3.C | 686 -
.../g++.target/riscv/rvv/base/vloxei8_mu-1.C | 346 -
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gcc/testsuite/g++.target/riscv/rvv/base/vlse-1.C | 345 -
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.../g++.target/riscv/rvv/base/vlse_tum-1.C | 345 -
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.../g++.target/riscv/rvv/base/vluxei16-1.C | 660 -
.../g++.target/riscv/rvv/base/vluxei16-2.C | 660 -
.../g++.target/riscv/rvv/base/vluxei16-3.C | 660 -
.../g++.target/riscv/rvv/base/vluxei16_mu-1.C | 333 -
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.../g++.target/riscv/rvv/base/vluxei16_tumu-1.C | 333 -
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.../g++.target/riscv/rvv/base/vluxei16_tumu-3.C | 333 -
.../g++.target/riscv/rvv/base/vluxei32-1.C | 608 -
.../g++.target/riscv/rvv/base/vluxei32-2.C | 608 -
.../g++.target/riscv/rvv/base/vluxei32-3.C | 608 -
.../g++.target/riscv/rvv/base/vluxei32_mu-1.C | 307 -
.../g++.target/riscv/rvv/base/vluxei32_mu-2.C | 307 -
.../g++.target/riscv/rvv/base/vluxei32_mu-3.C | 307 -
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.../g++.target/riscv/rvv/base/vluxei32_tu-2.C | 307 -
.../g++.target/riscv/rvv/base/vluxei32_tu-3.C | 307 -
.../g++.target/riscv/rvv/base/vluxei32_tum-1.C | 307 -
.../g++.target/riscv/rvv/base/vluxei32_tum-2.C | 307 -
.../g++.target/riscv/rvv/base/vluxei32_tum-3.C | 307 -
.../g++.target/riscv/rvv/base/vluxei32_tumu-1.C | 307 -
.../g++.target/riscv/rvv/base/vluxei32_tumu-2.C | 307 -
.../g++.target/riscv/rvv/base/vluxei32_tumu-3.C | 307 -
.../g++.target/riscv/rvv/base/vluxei64-1.C | 518 -
.../g++.target/riscv/rvv/base/vluxei64-2.C | 518 -
.../g++.target/riscv/rvv/base/vluxei64-3.C | 518 -
.../g++.target/riscv/rvv/base/vluxei64_mu-1.C | 262 -
.../g++.target/riscv/rvv/base/vluxei64_mu-2.C | 262 -
.../g++.target/riscv/rvv/base/vluxei64_mu-3.C | 262 -
.../g++.target/riscv/rvv/base/vluxei64_tu-1.C | 262 -
.../g++.target/riscv/rvv/base/vluxei64_tu-2.C | 262 -
.../g++.target/riscv/rvv/base/vluxei64_tu-3.C | 262 -
.../g++.target/riscv/rvv/base/vluxei64_tum-1.C | 262 -
.../g++.target/riscv/rvv/base/vluxei64_tum-2.C | 262 -
.../g++.target/riscv/rvv/base/vluxei64_tum-3.C | 262 -
.../g++.target/riscv/rvv/base/vluxei64_tumu-1.C | 262 -
.../g++.target/riscv/rvv/base/vluxei64_tumu-2.C | 262 -
.../g++.target/riscv/rvv/base/vluxei64_tumu-3.C | 262 -
.../g++.target/riscv/rvv/base/vluxei8-1.C | 686 -
.../g++.target/riscv/rvv/base/vluxei8-2.C | 686 -
.../g++.target/riscv/rvv/base/vluxei8-3.C | 686 -
.../g++.target/riscv/rvv/base/vluxei8_mu-1.C | 346 -
.../g++.target/riscv/rvv/base/vluxei8_mu-2.C | 346 -
.../g++.target/riscv/rvv/base/vluxei8_mu-3.C | 346 -
.../g++.target/riscv/rvv/base/vluxei8_tu-1.C | 346 -
.../g++.target/riscv/rvv/base/vluxei8_tu-2.C | 346 -
.../g++.target/riscv/rvv/base/vluxei8_tu-3.C | 346 -
.../g++.target/riscv/rvv/base/vluxei8_tum-1.C | 346 -
.../g++.target/riscv/rvv/base/vluxei8_tum-2.C | 346 -
.../g++.target/riscv/rvv/base/vluxei8_tum-3.C | 346 -
.../g++.target/riscv/rvv/base/vluxei8_tumu-1.C | 346 -
.../g++.target/riscv/rvv/base/vluxei8_tumu-2.C | 346 -
.../g++.target/riscv/rvv/base/vluxei8_tumu-3.C | 346 -
.../g++.target/riscv/rvv/base/vmacc_vv-1.C | 578 -
.../g++.target/riscv/rvv/base/vmacc_vv-2.C | 578 -
.../g++.target/riscv/rvv/base/vmacc_vv-3.C | 578 -
.../g++.target/riscv/rvv/base/vmacc_vv_mu-1.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vv_mu-2.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vv_mu-3.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vv_tu-1.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vv_tu-2.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vv_tu-3.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vv_tum-1.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vv_tum-2.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vv_tum-3.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vv_tumu-1.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vv_tumu-2.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vv_tumu-3.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vx_mu_rv32-1.C | 289 -
.../g++.target/riscv/rvv/base/vmacc_vx_mu_rv32-2.C | 289 -
.../g++.target/riscv/rvv/base/vmacc_vx_mu_rv32-3.C | 289 -
.../g++.target/riscv/rvv/base/vmacc_vx_mu_rv64-1.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vx_mu_rv64-2.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vx_mu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vx_rv32-1.C | 572 -
.../g++.target/riscv/rvv/base/vmacc_vx_rv32-2.C | 572 -
.../g++.target/riscv/rvv/base/vmacc_vx_rv32-3.C | 572 -
.../g++.target/riscv/rvv/base/vmacc_vx_rv64-1.C | 578 -
.../g++.target/riscv/rvv/base/vmacc_vx_rv64-2.C | 578 -
.../g++.target/riscv/rvv/base/vmacc_vx_rv64-3.C | 578 -
.../g++.target/riscv/rvv/base/vmacc_vx_tu_rv32-1.C | 289 -
.../g++.target/riscv/rvv/base/vmacc_vx_tu_rv32-2.C | 289 -
.../g++.target/riscv/rvv/base/vmacc_vx_tu_rv32-3.C | 289 -
.../g++.target/riscv/rvv/base/vmacc_vx_tu_rv64-1.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vx_tu_rv64-2.C | 292 -
.../g++.target/riscv/rvv/base/vmacc_vx_tu_rv64-3.C | 292 -
.../riscv/rvv/base/vmacc_vx_tum_rv32-1.C | 289 -
.../riscv/rvv/base/vmacc_vx_tum_rv32-2.C | 289 -
.../riscv/rvv/base/vmacc_vx_tum_rv32-3.C | 289 -
.../riscv/rvv/base/vmacc_vx_tum_rv64-1.C | 292 -
.../riscv/rvv/base/vmacc_vx_tum_rv64-2.C | 292 -
.../riscv/rvv/base/vmacc_vx_tum_rv64-3.C | 292 -
.../riscv/rvv/base/vmacc_vx_tumu_rv32-1.C | 289 -
.../riscv/rvv/base/vmacc_vx_tumu_rv32-2.C | 289 -
.../riscv/rvv/base/vmacc_vx_tumu_rv32-3.C | 289 -
.../riscv/rvv/base/vmacc_vx_tumu_rv64-1.C | 292 -
.../riscv/rvv/base/vmacc_vx_tumu_rv64-2.C | 292 -
.../riscv/rvv/base/vmacc_vx_tumu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vmadc_vv-1.C | 292 -
.../g++.target/riscv/rvv/base/vmadc_vv-2.C | 292 -
.../g++.target/riscv/rvv/base/vmadc_vv-3.C | 292 -
.../g++.target/riscv/rvv/base/vmadc_vvm-1.C | 292 -
.../g++.target/riscv/rvv/base/vmadc_vvm-2.C | 292 -
.../g++.target/riscv/rvv/base/vmadc_vvm-3.C | 292 -
.../g++.target/riscv/rvv/base/vmadc_vx_rv32-1.C | 289 -
.../g++.target/riscv/rvv/base/vmadc_vx_rv32-2.C | 289 -
.../g++.target/riscv/rvv/base/vmadc_vx_rv32-3.C | 289 -
.../g++.target/riscv/rvv/base/vmadc_vx_rv64-1.C | 292 -
.../g++.target/riscv/rvv/base/vmadc_vx_rv64-2.C | 292 -
.../g++.target/riscv/rvv/base/vmadc_vx_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vmadc_vxm_rv32-1.C | 289 -
.../g++.target/riscv/rvv/base/vmadc_vxm_rv32-2.C | 289 -
.../g++.target/riscv/rvv/base/vmadc_vxm_rv32-3.C | 289 -
.../g++.target/riscv/rvv/base/vmadc_vxm_rv64-1.C | 292 -
.../g++.target/riscv/rvv/base/vmadc_vxm_rv64-2.C | 292 -
.../g++.target/riscv/rvv/base/vmadc_vxm_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vv-1.C | 578 -
.../g++.target/riscv/rvv/base/vmadd_vv-2.C | 578 -
.../g++.target/riscv/rvv/base/vmadd_vv-3.C | 578 -
.../g++.target/riscv/rvv/base/vmadd_vv_mu-1.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vv_mu-2.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vv_mu-3.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vv_tu-1.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vv_tu-2.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vv_tu-3.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vv_tum-1.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vv_tum-2.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vv_tum-3.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vv_tumu-1.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vv_tumu-2.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vv_tumu-3.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vx_mu_rv64-1.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vx_mu_rv64-2.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vx_mu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vx_rv64-1.C | 578 -
.../g++.target/riscv/rvv/base/vmadd_vx_rv64-2.C | 578 -
.../g++.target/riscv/rvv/base/vmadd_vx_rv64-3.C | 578 -
.../g++.target/riscv/rvv/base/vmadd_vx_tu_rv64-1.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vx_tu_rv64-2.C | 292 -
.../g++.target/riscv/rvv/base/vmadd_vx_tu_rv64-3.C | 292 -
.../riscv/rvv/base/vmadd_vx_tum_rv64-1.C | 292 -
.../riscv/rvv/base/vmadd_vx_tum_rv64-2.C | 292 -
.../riscv/rvv/base/vmadd_vx_tum_rv64-3.C | 292 -
.../riscv/rvv/base/vmadd_vx_tumu_rv64-1.C | 292 -
.../riscv/rvv/base/vmadd_vx_tumu_rv64-2.C | 292 -
.../riscv/rvv/base/vmadd_vx_tumu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vmax_vv-1.C | 314 -
.../g++.target/riscv/rvv/base/vmax_vv-2.C | 314 -
.../g++.target/riscv/rvv/base/vmax_vv-3.C | 314 -
.../g++.target/riscv/rvv/base/vmax_vv_mu-1.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vv_mu-2.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vv_mu-3.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vv_tu-1.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vv_tu-2.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vv_tu-3.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vv_tum-1.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vv_tum-2.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vv_tum-3.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vv_tumu-1.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vv_tumu-2.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vv_tumu-3.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vx_mu_rv32-1.C | 157 -
.../g++.target/riscv/rvv/base/vmax_vx_mu_rv32-2.C | 157 -
.../g++.target/riscv/rvv/base/vmax_vx_mu_rv32-3.C | 157 -
.../g++.target/riscv/rvv/base/vmax_vx_mu_rv64-1.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vx_mu_rv64-2.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vx_mu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vx_rv32-1.C | 308 -
.../g++.target/riscv/rvv/base/vmax_vx_rv32-2.C | 308 -
.../g++.target/riscv/rvv/base/vmax_vx_rv32-3.C | 308 -
.../g++.target/riscv/rvv/base/vmax_vx_rv64-1.C | 314 -
.../g++.target/riscv/rvv/base/vmax_vx_rv64-2.C | 314 -
.../g++.target/riscv/rvv/base/vmax_vx_rv64-3.C | 314 -
.../g++.target/riscv/rvv/base/vmax_vx_tu_rv32-1.C | 157 -
.../g++.target/riscv/rvv/base/vmax_vx_tu_rv32-2.C | 157 -
.../g++.target/riscv/rvv/base/vmax_vx_tu_rv32-3.C | 157 -
.../g++.target/riscv/rvv/base/vmax_vx_tu_rv64-1.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vx_tu_rv64-2.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vx_tu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vx_tum_rv32-1.C | 157 -
.../g++.target/riscv/rvv/base/vmax_vx_tum_rv32-2.C | 157 -
.../g++.target/riscv/rvv/base/vmax_vx_tum_rv32-3.C | 157 -
.../g++.target/riscv/rvv/base/vmax_vx_tum_rv64-1.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vx_tum_rv64-2.C | 160 -
.../g++.target/riscv/rvv/base/vmax_vx_tum_rv64-3.C | 160 -
.../riscv/rvv/base/vmax_vx_tumu_rv32-1.C | 157 -
.../riscv/rvv/base/vmax_vx_tumu_rv32-2.C | 157 -
.../riscv/rvv/base/vmax_vx_tumu_rv32-3.C | 157 -
.../riscv/rvv/base/vmax_vx_tumu_rv64-1.C | 160 -
.../riscv/rvv/base/vmax_vx_tumu_rv64-2.C | 160 -
.../riscv/rvv/base/vmax_vx_tumu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vv-1.C | 314 -
.../g++.target/riscv/rvv/base/vmaxu_vv-2.C | 314 -
.../g++.target/riscv/rvv/base/vmaxu_vv-3.C | 314 -
.../g++.target/riscv/rvv/base/vmaxu_vv_mu-1.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vv_mu-2.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vv_mu-3.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vv_tu-1.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vv_tu-2.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vv_tu-3.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vv_tum-1.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vv_tum-2.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vv_tum-3.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vv_tumu-1.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vv_tumu-2.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vv_tumu-3.C | 160 -
.../g++.target/riscv/rvv/base/vmaxu_vx_mu_rv32-1.C | 157 -
.../g++.target/riscv/rvv/base/vmaxu_vx_mu_rv32-2.C | 157 -
.../g++.target/riscv/rvv/base/vmaxu_vx_mu_rv32-3.C | 157 -
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.../g++.target/riscv/rvv/base/vmul_vv-1.C | 578 -
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.../g++.target/riscv/rvv/base/vmul_vx_rv64-3.C | 578 -
.../g++.target/riscv/rvv/base/vmul_vx_tu_rv32-1.C | 289 -
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.../riscv/rvv/base/vmul_vx_tumu_rv32-1.C | 289 -
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.../riscv/rvv/base/vmul_vx_tumu_rv32-3.C | 289 -
.../riscv/rvv/base/vmul_vx_tumu_rv64-1.C | 292 -
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.../riscv/rvv/base/vmul_vx_tumu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vmulh_vv-1.C | 314 -
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.../g++.target/riscv/rvv/base/vmulh_vv-3.C | 314 -
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.../g++.target/riscv/rvv/base/vmulh_vv_tu-3.C | 160 -
.../g++.target/riscv/rvv/base/vmulh_vv_tum-1.C | 160 -
.../g++.target/riscv/rvv/base/vmulh_vv_tum-2.C | 160 -
.../g++.target/riscv/rvv/base/vmulh_vv_tum-3.C | 160 -
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.../g++.target/riscv/rvv/base/vmulh_vv_tumu-3.C | 160 -
.../g++.target/riscv/rvv/base/vmulh_vx_mu_rv32-1.C | 157 -
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.../g++.target/riscv/rvv/base/vmulh_vx_mu_rv64-1.C | 160 -
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.../g++.target/riscv/rvv/base/vmulh_vx_mu_rv64-3.C | 160 -
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.../riscv/rvv/base/vmulhu_vx_tu_rv32-1.C | 157 -
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.../riscv/rvv/base/vmulhu_vx_tumu_rv32-1.C | 157 -
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gcc/testsuite/g++.target/riscv/rvv/base/vmv_v-1.C | 392 -
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.../g++.target/riscv/rvv/base/vmv_v_x_rv32-1.C | 289 -
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.../g++.target/riscv/rvv/base/vmv_v_x_rv64-1.C | 292 -
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.../g++.target/riscv/rvv/base/vnclip_vx-1.C | 216 -
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.../g++.target/riscv/rvv/base/vnclip_vx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vnclipu_vv-1.C | 216 -
.../g++.target/riscv/rvv/base/vnclipu_vv-2.C | 216 -
.../g++.target/riscv/rvv/base/vnclipu_vv-3.C | 216 -
.../g++.target/riscv/rvv/base/vnclipu_vv_mu-1.C | 111 -
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.../g++.target/riscv/rvv/base/vnclipu_vv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vnclipu_vx-1.C | 216 -
.../g++.target/riscv/rvv/base/vnclipu_vx-2.C | 216 -
.../g++.target/riscv/rvv/base/vnclipu_vx-3.C | 216 -
.../g++.target/riscv/rvv/base/vnclipu_vx_mu-1.C | 111 -
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.../g++.target/riscv/rvv/base/vnclipu_vx_tumu-1.C | 111 -
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.../g++.target/riscv/rvv/base/vncvt_x-1.C | 396 -
.../g++.target/riscv/rvv/base/vncvt_x-2.C | 396 -
.../g++.target/riscv/rvv/base/vncvt_x-3.C | 396 -
.../g++.target/riscv/rvv/base/vncvt_x_mu-1.C | 201 -
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.../g++.target/riscv/rvv/base/vncvt_x_tumu-1.C | 201 -
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gcc/testsuite/g++.target/riscv/rvv/base/vneg_v-1.C | 314 -
gcc/testsuite/g++.target/riscv/rvv/base/vneg_v-2.C | 314 -
gcc/testsuite/g++.target/riscv/rvv/base/vneg_v-3.C | 314 -
.../g++.target/riscv/rvv/base/vneg_v_mu-1.C | 160 -
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.../g++.target/riscv/rvv/base/vneg_v_mu-3.C | 160 -
.../g++.target/riscv/rvv/base/vneg_v_tu-1.C | 160 -
.../g++.target/riscv/rvv/base/vneg_v_tu-2.C | 160 -
.../g++.target/riscv/rvv/base/vneg_v_tu-3.C | 160 -
.../g++.target/riscv/rvv/base/vneg_v_tum-1.C | 160 -
.../g++.target/riscv/rvv/base/vneg_v_tum-2.C | 160 -
.../g++.target/riscv/rvv/base/vneg_v_tum-3.C | 160 -
.../g++.target/riscv/rvv/base/vneg_v_tumu-1.C | 160 -
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.../g++.target/riscv/rvv/base/vneg_v_tumu-3.C | 160 -
.../g++.target/riscv/rvv/base/vnmsac_vv-1.C | 578 -
.../g++.target/riscv/rvv/base/vnmsac_vv-2.C | 578 -
.../g++.target/riscv/rvv/base/vnmsac_vv-3.C | 578 -
.../g++.target/riscv/rvv/base/vnmsac_vv_mu-1.C | 292 -
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.../g++.target/riscv/rvv/base/vnmsac_vv_tum-3.C | 292 -
.../g++.target/riscv/rvv/base/vnmsac_vv_tumu-1.C | 292 -
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.../g++.target/riscv/rvv/base/vnmsac_vv_tumu-3.C | 292 -
.../riscv/rvv/base/vnmsac_vx_mu_rv32-1.C | 289 -
.../riscv/rvv/base/vnmsac_vx_mu_rv32-2.C | 289 -
.../riscv/rvv/base/vnmsac_vx_mu_rv32-3.C | 289 -
.../riscv/rvv/base/vnmsac_vx_mu_rv64-1.C | 292 -
.../riscv/rvv/base/vnmsac_vx_mu_rv64-2.C | 292 -
.../riscv/rvv/base/vnmsac_vx_mu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vnmsac_vx_rv32-1.C | 572 -
.../g++.target/riscv/rvv/base/vnmsac_vx_rv32-2.C | 572 -
.../g++.target/riscv/rvv/base/vnmsac_vx_rv32-3.C | 572 -
.../g++.target/riscv/rvv/base/vnmsac_vx_rv64-1.C | 578 -
.../g++.target/riscv/rvv/base/vnmsac_vx_rv64-2.C | 578 -
.../g++.target/riscv/rvv/base/vnmsac_vx_rv64-3.C | 578 -
.../riscv/rvv/base/vnmsac_vx_tu_rv32-1.C | 289 -
.../riscv/rvv/base/vnmsac_vx_tu_rv32-2.C | 289 -
.../riscv/rvv/base/vnmsac_vx_tu_rv32-3.C | 289 -
.../riscv/rvv/base/vnmsac_vx_tu_rv64-1.C | 292 -
.../riscv/rvv/base/vnmsac_vx_tu_rv64-2.C | 292 -
.../riscv/rvv/base/vnmsac_vx_tu_rv64-3.C | 292 -
.../riscv/rvv/base/vnmsac_vx_tum_rv32-1.C | 289 -
.../riscv/rvv/base/vnmsac_vx_tum_rv32-2.C | 289 -
.../riscv/rvv/base/vnmsac_vx_tum_rv32-3.C | 289 -
.../riscv/rvv/base/vnmsac_vx_tum_rv64-1.C | 292 -
.../riscv/rvv/base/vnmsac_vx_tum_rv64-2.C | 292 -
.../riscv/rvv/base/vnmsac_vx_tum_rv64-3.C | 292 -
.../riscv/rvv/base/vnmsac_vx_tumu_rv32-1.C | 289 -
.../riscv/rvv/base/vnmsac_vx_tumu_rv32-2.C | 289 -
.../riscv/rvv/base/vnmsac_vx_tumu_rv32-3.C | 289 -
.../riscv/rvv/base/vnmsac_vx_tumu_rv64-1.C | 292 -
.../riscv/rvv/base/vnmsac_vx_tumu_rv64-2.C | 292 -
.../riscv/rvv/base/vnmsac_vx_tumu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vnmsub_vv-1.C | 578 -
.../g++.target/riscv/rvv/base/vnmsub_vv-2.C | 578 -
.../g++.target/riscv/rvv/base/vnmsub_vv-3.C | 578 -
.../g++.target/riscv/rvv/base/vnmsub_vv_mu-1.C | 292 -
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.../g++.target/riscv/rvv/base/vnmsub_vv_tu-1.C | 292 -
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.../g++.target/riscv/rvv/base/vnmsub_vv_tu-3.C | 292 -
.../g++.target/riscv/rvv/base/vnmsub_vv_tum-1.C | 292 -
.../g++.target/riscv/rvv/base/vnmsub_vv_tum-2.C | 292 -
.../g++.target/riscv/rvv/base/vnmsub_vv_tum-3.C | 292 -
.../g++.target/riscv/rvv/base/vnmsub_vv_tumu-1.C | 292 -
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.../g++.target/riscv/rvv/base/vnmsub_vv_tumu-3.C | 292 -
.../riscv/rvv/base/vnmsub_vx_mu_rv32-1.C | 289 -
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gcc/testsuite/g++.target/riscv/rvv/base/vnot_v-1.C | 314 -
gcc/testsuite/g++.target/riscv/rvv/base/vnot_v-2.C | 314 -
gcc/testsuite/g++.target/riscv/rvv/base/vnot_v-3.C | 314 -
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.../g++.target/riscv/rvv/base/vnsrl_vv-1.C | 216 -
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gcc/testsuite/g++.target/riscv/rvv/base/vor_vv-1.C | 578 -
gcc/testsuite/g++.target/riscv/rvv/base/vor_vv-2.C | 578 -
gcc/testsuite/g++.target/riscv/rvv/base/vor_vv-3.C | 578 -
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.../g++.target/riscv/rvv/base/vor_vx_rv32-1.C | 572 -
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.../g++.target/riscv/rvv/base/vrem_vv-1.C | 314 -
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.../g++.target/riscv/rvv/base/vrem_vx_mu_rv64-1.C | 160 -
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.../riscv/rvv/base/vrem_vx_tumu_rv32-1.C | 157 -
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.../riscv/rvv/base/vrem_vx_tumu_rv64-1.C | 160 -
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.../riscv/rvv/base/vrem_vx_tumu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vremu_vv-1.C | 314 -
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.../g++.target/riscv/rvv/base/vremu_vx_mu_rv64-1.C | 160 -
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.../g++.target/riscv/rvv/base/vremu_vx_mu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vremu_vx_rv32-1.C | 308 -
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.../g++.target/riscv/rvv/base/vremu_vx_rv64-1.C | 314 -
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.../riscv/rvv/base/vremu_vx_tum_rv32-1.C | 157 -
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.../riscv/rvv/base/vremu_vx_tum_rv64-1.C | 160 -
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.../riscv/rvv/base/vremu_vx_tum_rv64-3.C | 160 -
.../riscv/rvv/base/vremu_vx_tumu_rv32-1.C | 157 -
.../riscv/rvv/base/vremu_vx_tumu_rv32-2.C | 157 -
.../riscv/rvv/base/vremu_vx_tumu_rv32-3.C | 157 -
.../riscv/rvv/base/vremu_vx_tumu_rv64-1.C | 160 -
.../riscv/rvv/base/vremu_vx_tumu_rv64-2.C | 160 -
.../riscv/rvv/base/vremu_vx_tumu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vrsub_vx_mu_rv32-1.C | 289 -
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.../g++.target/riscv/rvv/base/vrsub_vx_mu_rv32-3.C | 289 -
.../g++.target/riscv/rvv/base/vrsub_vx_mu_rv64-1.C | 292 -
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.../g++.target/riscv/rvv/base/vrsub_vx_mu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vrsub_vx_rv32-1.C | 572 -
.../g++.target/riscv/rvv/base/vrsub_vx_rv32-2.C | 572 -
.../g++.target/riscv/rvv/base/vrsub_vx_rv32-3.C | 572 -
.../g++.target/riscv/rvv/base/vrsub_vx_rv64-1.C | 578 -
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.../g++.target/riscv/rvv/base/vrsub_vx_tu_rv32-1.C | 289 -
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.../riscv/rvv/base/vsaddu_vx_tu_rv32-1.C | 157 -
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.../g++.target/riscv/rvv/base/vsbc_vvm-1.C | 292 -
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.../g++.target/riscv/rvv/base/vsbc_vxm_rv32-1.C | 289 -
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.../g++.target/riscv/rvv/base/vsbc_vxm_tu_rv32-1.C | 289 -
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gcc/testsuite/g++.target/riscv/rvv/base/vse-1.C | 685 -
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.../g++.target/riscv/rvv/base/vsext_vf8_mu-1.C | 34 -
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.../g++.target/riscv/rvv/base/vsll_vv-1.C | 578 -
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.../g++.target/riscv/rvv/base/vsll_vv_mu-1.C | 292 -
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.../g++.target/riscv/rvv/base/vsll_vx-1.C | 578 -
.../g++.target/riscv/rvv/base/vsll_vx-2.C | 578 -
.../g++.target/riscv/rvv/base/vsll_vx-3.C | 578 -
.../g++.target/riscv/rvv/base/vsll_vx_mu-1.C | 292 -
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gcc/testsuite/g++.target/riscv/rvv/base/vsm-1.C | 40 -
.../g++.target/riscv/rvv/base/vsmul_vv-1.C | 314 -
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.../g++.target/riscv/rvv/base/vsmul_vv_tum-3.C | 160 -
.../g++.target/riscv/rvv/base/vsmul_vv_tumu-1.C | 160 -
.../g++.target/riscv/rvv/base/vsmul_vv_tumu-2.C | 160 -
.../g++.target/riscv/rvv/base/vsmul_vv_tumu-3.C | 160 -
.../g++.target/riscv/rvv/base/vsmul_vx_mu_rv32-1.C | 157 -
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.../g++.target/riscv/rvv/base/vsmul_vx_mu_rv32-3.C | 157 -
.../g++.target/riscv/rvv/base/vsmul_vx_mu_rv64-1.C | 160 -
.../g++.target/riscv/rvv/base/vsmul_vx_mu_rv64-2.C | 160 -
.../g++.target/riscv/rvv/base/vsmul_vx_mu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vsmul_vx_rv32-1.C | 308 -
.../g++.target/riscv/rvv/base/vsmul_vx_rv32-2.C | 308 -
.../g++.target/riscv/rvv/base/vsmul_vx_rv32-3.C | 308 -
.../g++.target/riscv/rvv/base/vsmul_vx_rv64-1.C | 314 -
.../g++.target/riscv/rvv/base/vsmul_vx_rv64-2.C | 314 -
.../g++.target/riscv/rvv/base/vsmul_vx_rv64-3.C | 314 -
.../g++.target/riscv/rvv/base/vsmul_vx_tu_rv32-1.C | 157 -
.../g++.target/riscv/rvv/base/vsmul_vx_tu_rv32-2.C | 157 -
.../g++.target/riscv/rvv/base/vsmul_vx_tu_rv32-3.C | 157 -
.../g++.target/riscv/rvv/base/vsmul_vx_tu_rv64-1.C | 160 -
.../g++.target/riscv/rvv/base/vsmul_vx_tu_rv64-2.C | 160 -
.../g++.target/riscv/rvv/base/vsmul_vx_tu_rv64-3.C | 160 -
.../riscv/rvv/base/vsmul_vx_tum_rv32-1.C | 157 -
.../riscv/rvv/base/vsmul_vx_tum_rv32-2.C | 157 -
.../riscv/rvv/base/vsmul_vx_tum_rv32-3.C | 157 -
.../riscv/rvv/base/vsmul_vx_tum_rv64-1.C | 160 -
.../riscv/rvv/base/vsmul_vx_tum_rv64-2.C | 160 -
.../riscv/rvv/base/vsmul_vx_tum_rv64-3.C | 160 -
.../riscv/rvv/base/vsmul_vx_tumu_rv32-1.C | 157 -
.../riscv/rvv/base/vsmul_vx_tumu_rv32-2.C | 157 -
.../riscv/rvv/base/vsmul_vx_tumu_rv32-3.C | 157 -
.../riscv/rvv/base/vsmul_vx_tumu_rv64-1.C | 160 -
.../riscv/rvv/base/vsmul_vx_tumu_rv64-2.C | 160 -
.../riscv/rvv/base/vsmul_vx_tumu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vsoxei16-1.C | 660 -
.../g++.target/riscv/rvv/base/vsoxei16-2.C | 660 -
.../g++.target/riscv/rvv/base/vsoxei16-3.C | 660 -
.../g++.target/riscv/rvv/base/vsoxei32-1.C | 608 -
.../g++.target/riscv/rvv/base/vsoxei32-2.C | 608 -
.../g++.target/riscv/rvv/base/vsoxei32-3.C | 608 -
.../g++.target/riscv/rvv/base/vsoxei64-1.C | 518 -
.../g++.target/riscv/rvv/base/vsoxei64-2.C | 518 -
.../g++.target/riscv/rvv/base/vsoxei64-3.C | 518 -
.../g++.target/riscv/rvv/base/vsoxei8-1.C | 686 -
.../g++.target/riscv/rvv/base/vsoxei8-2.C | 686 -
.../g++.target/riscv/rvv/base/vsoxei8-3.C | 686 -
.../g++.target/riscv/rvv/base/vsra_vv-1.C | 314 -
.../g++.target/riscv/rvv/base/vsra_vv-2.C | 314 -
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.../g++.target/riscv/rvv/base/vsra_vv_mu-1.C | 160 -
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.../g++.target/riscv/rvv/base/vsra_vv_mu-3.C | 160 -
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.../g++.target/riscv/rvv/base/vsra_vx-1.C | 314 -
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.../g++.target/riscv/rvv/base/vsra_vx_tu-2.C | 160 -
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.../g++.target/riscv/rvv/base/vsrl_vv-1.C | 314 -
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.../g++.target/riscv/rvv/base/vsrl_vv_mu-1.C | 160 -
.../g++.target/riscv/rvv/base/vsrl_vv_mu-2.C | 160 -
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.../g++.target/riscv/rvv/base/vsrl_vx-1.C | 314 -
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gcc/testsuite/g++.target/riscv/rvv/base/vsse-1.C | 685 -
.../g++.target/riscv/rvv/base/vssra_vv-1.C | 314 -
.../g++.target/riscv/rvv/base/vssra_vv-2.C | 314 -
.../g++.target/riscv/rvv/base/vssra_vv-3.C | 314 -
.../g++.target/riscv/rvv/base/vssra_vv_mu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vv_mu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vv_mu-3.C | 160 -
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.../g++.target/riscv/rvv/base/vssra_vv_tu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vv_tum-1.C | 160 -
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.../g++.target/riscv/rvv/base/vssra_vv_tum-3.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vv_tumu-1.C | 160 -
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.../g++.target/riscv/rvv/base/vssra_vv_tumu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vx-1.C | 314 -
.../g++.target/riscv/rvv/base/vssra_vx-2.C | 314 -
.../g++.target/riscv/rvv/base/vssra_vx-3.C | 314 -
.../g++.target/riscv/rvv/base/vssra_vx_mu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vx_mu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vx_mu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vx_tu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vx_tu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vx_tu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vx_tum-1.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vx_tum-2.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vx_tum-3.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vx_tumu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vx_tumu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssra_vx_tumu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vv-1.C | 314 -
.../g++.target/riscv/rvv/base/vssrl_vv-2.C | 314 -
.../g++.target/riscv/rvv/base/vssrl_vv-3.C | 314 -
.../g++.target/riscv/rvv/base/vssrl_vv_mu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vv_mu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vv_mu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vv_tu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vv_tu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vv_tu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vv_tum-1.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vv_tum-2.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vv_tum-3.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vv_tumu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vv_tumu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vv_tumu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vx-1.C | 314 -
.../g++.target/riscv/rvv/base/vssrl_vx-2.C | 314 -
.../g++.target/riscv/rvv/base/vssrl_vx-3.C | 314 -
.../g++.target/riscv/rvv/base/vssrl_vx_mu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vx_mu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vx_mu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vx_tu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vx_tu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vx_tu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vx_tum-1.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vx_tum-2.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vx_tum-3.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vx_tumu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vx_tumu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssrl_vx_tumu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vv-1.C | 314 -
.../g++.target/riscv/rvv/base/vssub_vv-2.C | 314 -
.../g++.target/riscv/rvv/base/vssub_vv-3.C | 314 -
.../g++.target/riscv/rvv/base/vssub_vv_mu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vv_mu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vv_mu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vv_tu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vv_tu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vv_tu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vv_tum-1.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vv_tum-2.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vv_tum-3.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vv_tumu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vv_tumu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vv_tumu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vx_mu_rv32-1.C | 157 -
.../g++.target/riscv/rvv/base/vssub_vx_mu_rv32-2.C | 157 -
.../g++.target/riscv/rvv/base/vssub_vx_mu_rv32-3.C | 157 -
.../g++.target/riscv/rvv/base/vssub_vx_mu_rv64-1.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vx_mu_rv64-2.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vx_mu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vx_rv32-1.C | 308 -
.../g++.target/riscv/rvv/base/vssub_vx_rv32-2.C | 308 -
.../g++.target/riscv/rvv/base/vssub_vx_rv32-3.C | 308 -
.../g++.target/riscv/rvv/base/vssub_vx_rv64-1.C | 314 -
.../g++.target/riscv/rvv/base/vssub_vx_rv64-2.C | 314 -
.../g++.target/riscv/rvv/base/vssub_vx_rv64-3.C | 314 -
.../g++.target/riscv/rvv/base/vssub_vx_tu_rv32-1.C | 157 -
.../g++.target/riscv/rvv/base/vssub_vx_tu_rv32-2.C | 157 -
.../g++.target/riscv/rvv/base/vssub_vx_tu_rv32-3.C | 157 -
.../g++.target/riscv/rvv/base/vssub_vx_tu_rv64-1.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vx_tu_rv64-2.C | 160 -
.../g++.target/riscv/rvv/base/vssub_vx_tu_rv64-3.C | 160 -
.../riscv/rvv/base/vssub_vx_tum_rv32-1.C | 157 -
.../riscv/rvv/base/vssub_vx_tum_rv32-2.C | 157 -
.../riscv/rvv/base/vssub_vx_tum_rv32-3.C | 157 -
.../riscv/rvv/base/vssub_vx_tum_rv64-1.C | 160 -
.../riscv/rvv/base/vssub_vx_tum_rv64-2.C | 160 -
.../riscv/rvv/base/vssub_vx_tum_rv64-3.C | 160 -
.../riscv/rvv/base/vssub_vx_tumu_rv32-1.C | 157 -
.../riscv/rvv/base/vssub_vx_tumu_rv32-2.C | 157 -
.../riscv/rvv/base/vssub_vx_tumu_rv32-3.C | 157 -
.../riscv/rvv/base/vssub_vx_tumu_rv64-1.C | 160 -
.../riscv/rvv/base/vssub_vx_tumu_rv64-2.C | 160 -
.../riscv/rvv/base/vssub_vx_tumu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vv-1.C | 314 -
.../g++.target/riscv/rvv/base/vssubu_vv-2.C | 314 -
.../g++.target/riscv/rvv/base/vssubu_vv-3.C | 314 -
.../g++.target/riscv/rvv/base/vssubu_vv_mu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vv_mu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vv_mu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vv_tu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vv_tu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vv_tu-3.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vv_tum-1.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vv_tum-2.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vv_tum-3.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vv_tumu-1.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vv_tumu-2.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vv_tumu-3.C | 160 -
.../riscv/rvv/base/vssubu_vx_mu_rv32-1.C | 157 -
.../riscv/rvv/base/vssubu_vx_mu_rv32-2.C | 157 -
.../riscv/rvv/base/vssubu_vx_mu_rv32-3.C | 157 -
.../riscv/rvv/base/vssubu_vx_mu_rv64-1.C | 160 -
.../riscv/rvv/base/vssubu_vx_mu_rv64-2.C | 160 -
.../riscv/rvv/base/vssubu_vx_mu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vssubu_vx_rv32-1.C | 308 -
.../g++.target/riscv/rvv/base/vssubu_vx_rv32-2.C | 308 -
.../g++.target/riscv/rvv/base/vssubu_vx_rv32-3.C | 308 -
.../g++.target/riscv/rvv/base/vssubu_vx_rv64-1.C | 314 -
.../g++.target/riscv/rvv/base/vssubu_vx_rv64-2.C | 314 -
.../g++.target/riscv/rvv/base/vssubu_vx_rv64-3.C | 314 -
.../riscv/rvv/base/vssubu_vx_tu_rv32-1.C | 157 -
.../riscv/rvv/base/vssubu_vx_tu_rv32-2.C | 157 -
.../riscv/rvv/base/vssubu_vx_tu_rv32-3.C | 157 -
.../riscv/rvv/base/vssubu_vx_tu_rv64-1.C | 160 -
.../riscv/rvv/base/vssubu_vx_tu_rv64-2.C | 160 -
.../riscv/rvv/base/vssubu_vx_tu_rv64-3.C | 160 -
.../riscv/rvv/base/vssubu_vx_tum_rv32-1.C | 157 -
.../riscv/rvv/base/vssubu_vx_tum_rv32-2.C | 157 -
.../riscv/rvv/base/vssubu_vx_tum_rv32-3.C | 157 -
.../riscv/rvv/base/vssubu_vx_tum_rv64-1.C | 160 -
.../riscv/rvv/base/vssubu_vx_tum_rv64-2.C | 160 -
.../riscv/rvv/base/vssubu_vx_tum_rv64-3.C | 160 -
.../riscv/rvv/base/vssubu_vx_tumu_rv32-1.C | 157 -
.../riscv/rvv/base/vssubu_vx_tumu_rv32-2.C | 157 -
.../riscv/rvv/base/vssubu_vx_tumu_rv32-3.C | 157 -
.../riscv/rvv/base/vssubu_vx_tumu_rv64-1.C | 160 -
.../riscv/rvv/base/vssubu_vx_tumu_rv64-2.C | 160 -
.../riscv/rvv/base/vssubu_vx_tumu_rv64-3.C | 160 -
.../g++.target/riscv/rvv/base/vsub_vv-1.C | 578 -
.../g++.target/riscv/rvv/base/vsub_vv-2.C | 578 -
.../g++.target/riscv/rvv/base/vsub_vv-3.C | 578 -
.../g++.target/riscv/rvv/base/vsub_vv_mu-1.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vv_mu-2.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vv_mu-3.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vv_tu-1.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vv_tu-2.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vv_tu-3.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vv_tum-1.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vv_tum-2.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vv_tum-3.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vv_tumu-1.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vv_tumu-2.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vv_tumu-3.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vx_mu_rv32-1.C | 289 -
.../g++.target/riscv/rvv/base/vsub_vx_mu_rv32-2.C | 289 -
.../g++.target/riscv/rvv/base/vsub_vx_mu_rv32-3.C | 289 -
.../g++.target/riscv/rvv/base/vsub_vx_mu_rv64-1.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vx_mu_rv64-2.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vx_mu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vx_rv32-1.C | 572 -
.../g++.target/riscv/rvv/base/vsub_vx_rv32-2.C | 572 -
.../g++.target/riscv/rvv/base/vsub_vx_rv32-3.C | 572 -
.../g++.target/riscv/rvv/base/vsub_vx_rv64-1.C | 578 -
.../g++.target/riscv/rvv/base/vsub_vx_rv64-2.C | 578 -
.../g++.target/riscv/rvv/base/vsub_vx_rv64-3.C | 578 -
.../g++.target/riscv/rvv/base/vsub_vx_tu_rv32-1.C | 289 -
.../g++.target/riscv/rvv/base/vsub_vx_tu_rv32-2.C | 289 -
.../g++.target/riscv/rvv/base/vsub_vx_tu_rv32-3.C | 289 -
.../g++.target/riscv/rvv/base/vsub_vx_tu_rv64-1.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vx_tu_rv64-2.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vx_tu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vx_tum_rv32-1.C | 289 -
.../g++.target/riscv/rvv/base/vsub_vx_tum_rv32-2.C | 289 -
.../g++.target/riscv/rvv/base/vsub_vx_tum_rv32-3.C | 289 -
.../g++.target/riscv/rvv/base/vsub_vx_tum_rv64-1.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vx_tum_rv64-2.C | 292 -
.../g++.target/riscv/rvv/base/vsub_vx_tum_rv64-3.C | 292 -
.../riscv/rvv/base/vsub_vx_tumu_rv32-1.C | 289 -
.../riscv/rvv/base/vsub_vx_tumu_rv32-2.C | 289 -
.../riscv/rvv/base/vsub_vx_tumu_rv32-3.C | 289 -
.../riscv/rvv/base/vsub_vx_tumu_rv64-1.C | 292 -
.../riscv/rvv/base/vsub_vx_tumu_rv64-2.C | 292 -
.../riscv/rvv/base/vsub_vx_tumu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vsuxei16-1.C | 660 -
.../g++.target/riscv/rvv/base/vsuxei16-2.C | 660 -
.../g++.target/riscv/rvv/base/vsuxei16-3.C | 660 -
.../g++.target/riscv/rvv/base/vsuxei32-1.C | 608 -
.../g++.target/riscv/rvv/base/vsuxei32-2.C | 608 -
.../g++.target/riscv/rvv/base/vsuxei32-3.C | 608 -
.../g++.target/riscv/rvv/base/vsuxei64-1.C | 518 -
.../g++.target/riscv/rvv/base/vsuxei64-2.C | 518 -
.../g++.target/riscv/rvv/base/vsuxei64-3.C | 518 -
.../g++.target/riscv/rvv/base/vsuxei8-1.C | 686 -
.../g++.target/riscv/rvv/base/vsuxei8-2.C | 686 -
.../g++.target/riscv/rvv/base/vsuxei8-3.C | 686 -
.../g++.target/riscv/rvv/base/vwadd_vv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwadd_vv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwadd_vv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwadd_vv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwadd_vx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwadd_vx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwadd_vx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_vx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwadd_wv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwadd_wv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwadd_wv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwadd_wx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwadd_wx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwadd_wx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwadd_wx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwaddu_vv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwaddu_vv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwaddu_vv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwaddu_vx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwaddu_vx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwaddu_vx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_vx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwaddu_wv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwaddu_wv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwaddu_wv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwaddu_wx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwaddu_wx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwaddu_wx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwaddu_wx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwcvt_x-1.C | 216 -
.../g++.target/riscv/rvv/base/vwcvt_x-2.C | 216 -
.../g++.target/riscv/rvv/base/vwcvt_x-3.C | 216 -
.../g++.target/riscv/rvv/base/vwcvt_x_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwcvt_x_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwcvt_x_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwcvt_x_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwcvt_x_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwcvt_x_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwcvt_x_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwcvt_x_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwcvt_x_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwcvt_x_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwcvt_x_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwcvt_x_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwcvtu_x-1.C | 216 -
.../g++.target/riscv/rvv/base/vwcvtu_x-2.C | 216 -
.../g++.target/riscv/rvv/base/vwcvtu_x-3.C | 216 -
.../g++.target/riscv/rvv/base/vwcvtu_x_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwcvtu_x_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwcvtu_x_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwcvtu_x_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwcvtu_x_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwcvtu_x_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwcvtu_x_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwcvtu_x_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwcvtu_x_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwcvtu_x_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwcvtu_x_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwcvtu_x_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmacc_vv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmacc_vv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmacc_vv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmacc_vx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmacc_vx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmacc_vx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmacc_vx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccsu_vx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccu_vv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccu_vv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccu_vv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccu_vx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccu_vx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccu_vx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccu_vx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccus_vx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccus_vx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccus_vx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmaccus_vx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccus_vx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccus_vx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccus_vx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccus_vx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccus_vx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccus_vx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccus_vx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccus_vx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccus_vx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccus_vx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmaccus_vx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmul_vv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmul_vv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmul_vv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmul_vx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmul_vx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmul_vx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmul_vx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmulsu_vv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmulsu_vv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmulsu_vv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmulsu_vx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmulsu_vx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmulsu_vx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulsu_vx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmulu_vv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmulu_vv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmulu_vv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwmulu_vx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwmulu_vx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwmulu_vx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwmulu_vx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwsub_vv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwsub_vv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwsub_vv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwsub_vx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwsub_vx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwsub_vx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_vx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwsub_wv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwsub_wv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwsub_wv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwsub_wx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwsub_wx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwsub_wx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsub_wx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwsubu_vv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwsubu_vv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwsubu_vv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwsubu_vx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwsubu_vx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwsubu_vx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_vx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wv-1.C | 216 -
.../g++.target/riscv/rvv/base/vwsubu_wv-2.C | 216 -
.../g++.target/riscv/rvv/base/vwsubu_wv-3.C | 216 -
.../g++.target/riscv/rvv/base/vwsubu_wv_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wv_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wv_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wv_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wv_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wv_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wv_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wv_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wv_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wv_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wv_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wv_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wx-1.C | 216 -
.../g++.target/riscv/rvv/base/vwsubu_wx-2.C | 216 -
.../g++.target/riscv/rvv/base/vwsubu_wx-3.C | 216 -
.../g++.target/riscv/rvv/base/vwsubu_wx_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wx_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wx_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wx_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wx_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wx_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wx_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wx_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wx_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wx_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wx_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vwsubu_wx_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vxor_vv-1.C | 578 -
.../g++.target/riscv/rvv/base/vxor_vv-2.C | 578 -
.../g++.target/riscv/rvv/base/vxor_vv-3.C | 578 -
.../g++.target/riscv/rvv/base/vxor_vv_mu-1.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vv_mu-2.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vv_mu-3.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vv_tu-1.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vv_tu-2.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vv_tu-3.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vv_tum-1.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vv_tum-2.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vv_tum-3.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vv_tumu-1.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vv_tumu-2.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vv_tumu-3.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vx_mu_rv32-1.C | 289 -
.../g++.target/riscv/rvv/base/vxor_vx_mu_rv32-2.C | 289 -
.../g++.target/riscv/rvv/base/vxor_vx_mu_rv32-3.C | 289 -
.../g++.target/riscv/rvv/base/vxor_vx_mu_rv64-1.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vx_mu_rv64-2.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vx_mu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vx_rv32-1.C | 572 -
.../g++.target/riscv/rvv/base/vxor_vx_rv32-2.C | 572 -
.../g++.target/riscv/rvv/base/vxor_vx_rv32-3.C | 572 -
.../g++.target/riscv/rvv/base/vxor_vx_rv64-1.C | 578 -
.../g++.target/riscv/rvv/base/vxor_vx_rv64-2.C | 578 -
.../g++.target/riscv/rvv/base/vxor_vx_rv64-3.C | 578 -
.../g++.target/riscv/rvv/base/vxor_vx_tu_rv32-1.C | 289 -
.../g++.target/riscv/rvv/base/vxor_vx_tu_rv32-2.C | 289 -
.../g++.target/riscv/rvv/base/vxor_vx_tu_rv32-3.C | 289 -
.../g++.target/riscv/rvv/base/vxor_vx_tu_rv64-1.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vx_tu_rv64-2.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vx_tu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vx_tum_rv32-1.C | 289 -
.../g++.target/riscv/rvv/base/vxor_vx_tum_rv32-2.C | 289 -
.../g++.target/riscv/rvv/base/vxor_vx_tum_rv32-3.C | 289 -
.../g++.target/riscv/rvv/base/vxor_vx_tum_rv64-1.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vx_tum_rv64-2.C | 292 -
.../g++.target/riscv/rvv/base/vxor_vx_tum_rv64-3.C | 292 -
.../riscv/rvv/base/vxor_vx_tumu_rv32-1.C | 289 -
.../riscv/rvv/base/vxor_vx_tumu_rv32-2.C | 289 -
.../riscv/rvv/base/vxor_vx_tumu_rv32-3.C | 289 -
.../riscv/rvv/base/vxor_vx_tumu_rv64-1.C | 292 -
.../riscv/rvv/base/vxor_vx_tumu_rv64-2.C | 292 -
.../riscv/rvv/base/vxor_vx_tumu_rv64-3.C | 292 -
.../g++.target/riscv/rvv/base/vzext_vf2-1.C | 216 -
.../g++.target/riscv/rvv/base/vzext_vf2-2.C | 216 -
.../g++.target/riscv/rvv/base/vzext_vf2-3.C | 216 -
.../g++.target/riscv/rvv/base/vzext_vf2_mu-1.C | 111 -
.../g++.target/riscv/rvv/base/vzext_vf2_mu-2.C | 111 -
.../g++.target/riscv/rvv/base/vzext_vf2_mu-3.C | 111 -
.../g++.target/riscv/rvv/base/vzext_vf2_tu-1.C | 111 -
.../g++.target/riscv/rvv/base/vzext_vf2_tu-2.C | 111 -
.../g++.target/riscv/rvv/base/vzext_vf2_tu-3.C | 111 -
.../g++.target/riscv/rvv/base/vzext_vf2_tum-1.C | 111 -
.../g++.target/riscv/rvv/base/vzext_vf2_tum-2.C | 111 -
.../g++.target/riscv/rvv/base/vzext_vf2_tum-3.C | 111 -
.../g++.target/riscv/rvv/base/vzext_vf2_tumu-1.C | 111 -
.../g++.target/riscv/rvv/base/vzext_vf2_tumu-2.C | 111 -
.../g++.target/riscv/rvv/base/vzext_vf2_tumu-3.C | 111 -
.../g++.target/riscv/rvv/base/vzext_vf4-1.C | 132 -
.../g++.target/riscv/rvv/base/vzext_vf4-2.C | 132 -
.../g++.target/riscv/rvv/base/vzext_vf4-3.C | 132 -
.../g++.target/riscv/rvv/base/vzext_vf4_mu-1.C | 69 -
.../g++.target/riscv/rvv/base/vzext_vf4_mu-2.C | 69 -
.../g++.target/riscv/rvv/base/vzext_vf4_mu-3.C | 69 -
.../g++.target/riscv/rvv/base/vzext_vf4_tu-1.C | 69 -
.../g++.target/riscv/rvv/base/vzext_vf4_tu-2.C | 69 -
.../g++.target/riscv/rvv/base/vzext_vf4_tu-3.C | 69 -
.../g++.target/riscv/rvv/base/vzext_vf4_tum-1.C | 69 -
.../g++.target/riscv/rvv/base/vzext_vf4_tum-2.C | 69 -
.../g++.target/riscv/rvv/base/vzext_vf4_tum-3.C | 69 -
.../g++.target/riscv/rvv/base/vzext_vf4_tumu-1.C | 69 -
.../g++.target/riscv/rvv/base/vzext_vf4_tumu-2.C | 69 -
.../g++.target/riscv/rvv/base/vzext_vf4_tumu-3.C | 69 -
.../g++.target/riscv/rvv/base/vzext_vf8-1.C | 62 -
.../g++.target/riscv/rvv/base/vzext_vf8-2.C | 62 -
.../g++.target/riscv/rvv/base/vzext_vf8-3.C | 62 -
.../g++.target/riscv/rvv/base/vzext_vf8_mu-1.C | 34 -
.../g++.target/riscv/rvv/base/vzext_vf8_mu-2.C | 34 -
.../g++.target/riscv/rvv/base/vzext_vf8_mu-3.C | 34 -
.../g++.target/riscv/rvv/base/vzext_vf8_tu-1.C | 34 -
.../g++.target/riscv/rvv/base/vzext_vf8_tu-2.C | 34 -
.../g++.target/riscv/rvv/base/vzext_vf8_tu-3.C | 34 -
.../g++.target/riscv/rvv/base/vzext_vf8_tum-1.C | 34 -
.../g++.target/riscv/rvv/base/vzext_vf8_tum-2.C | 34 -
.../g++.target/riscv/rvv/base/vzext_vf8_tum-3.C | 34 -
.../g++.target/riscv/rvv/base/vzext_vf8_tumu-1.C | 34 -
.../g++.target/riscv/rvv/base/vzext_vf8_tumu-2.C | 34 -
.../g++.target/riscv/rvv/base/vzext_vf8_tumu-3.C | 34 -
gcc/testsuite/gcc.c-torture/compile/103818.c | 2 +-
gcc/testsuite/gcc.c-torture/compile/pr108892.c | 23 +
.../gcc.c-torture/execute/ieee/pr109008.c | 18 +
.../gcc.c-torture/execute/ieee/pr109386.c | 21 +
gcc/testsuite/gcc.dg-selftests/dg-final.exp | 22 +-
gcc/testsuite/gcc.dg/Walloca-13.c | 2 +-
gcc/testsuite/gcc.dg/Wcomplain-wrong-lang-1.c | 2 +
gcc/testsuite/gcc.dg/Wcomplain-wrong-lang-2.c | 2 +
gcc/testsuite/gcc.dg/Wcomplain-wrong-lang-3.c | 2 +
gcc/testsuite/gcc.dg/Wcomplain-wrong-lang-4.c | 2 +
gcc/testsuite/gcc.dg/Wcomplain-wrong-lang-5.c | 2 +
gcc/testsuite/gcc.dg/Wnonnull-8.c | 14 +
gcc/testsuite/gcc.dg/Wuse-after-free-2.c | 13 +-
gcc/testsuite/gcc.dg/Wuse-after-free-pr109123.c | 41 +
gcc/testsuite/gcc.dg/Wuse-after-free-pr109170.c | 15 +
gcc/testsuite/gcc.dg/Wzero-length-array-bounds-3.c | 19 +
gcc/testsuite/gcc.dg/addr_equal-1.c | 5 +-
.../gcc.dg/analyzer/allocation-size-multiline-3.c | 4 +-
gcc/testsuite/gcc.dg/analyzer/attribute-nonnull.c | 23 +-
gcc/testsuite/gcc.dg/analyzer/builtins-pr107565.c | 29 +
gcc/testsuite/gcc.dg/analyzer/call-summaries-2.c | 15 +-
gcc/testsuite/gcc.dg/analyzer/data-model-1.c | 19 +-
gcc/testsuite/gcc.dg/analyzer/data-model-5.c | 4 -
.../analyzer/deref-before-check-pr108475-1.c | 51 +
.../deref-before-check-pr108475-haproxy-tcpcheck.c | 169 +
.../deref-before-check-pr109060-haproxy-cfgparse.c | 92 +
.../deref-before-check-pr109239-linux-bus.c | 153 +
.../gcc.dg/analyzer/doom-d_main-IdentifyVersion.c | 272 +
.../gcc.dg/analyzer/doom-s_sound-pr108867.c | 653 +
gcc/testsuite/gcc.dg/analyzer/exec-1.c | 43 +
.../analyzer/fd-access-mode-target-headers.c | 2 +-
.../gcc.dg/analyzer/flex-with-call-summaries.c | 3 +-
.../analyzer/infinite-recursion-pr108935-1.c | 17 +
.../analyzer/infinite-recursion-pr108935-1a.c | 17 +
.../analyzer/infinite-recursion-pr108935-2.c | 18 +
gcc/testsuite/gcc.dg/analyzer/leak-pr105906.c | 32 +
.../analyzer/leak-pr108045-with-call-summaries.c | 106 +
.../leak-pr108045-without-call-summaries.c | 107 +
gcc/testsuite/gcc.dg/analyzer/leak-pr109059-1.c | 46 +
gcc/testsuite/gcc.dg/analyzer/leak-pr109059-2.c | 42 +
.../gcc.dg/analyzer/memset-CVE-2017-18549-1.c | 2 +
.../gcc.dg/analyzer/null-deref-pr102671-1.c | 167 +
.../gcc.dg/analyzer/null-deref-pr102671-2.c | 78 +
.../gcc.dg/analyzer/null-deref-pr105755.c | 193 +
...-deref-pr108251-smp_fetch_ssl_fc_has_early-O2.c | 98 +
...ull-deref-pr108251-smp_fetch_ssl_fc_has_early.c | 96 +
.../null-deref-pr108400-SoftEtherVPN-WebUi.c | 77 +
.../gcc.dg/analyzer/null-deref-pr108830.c | 94 +
gcc/testsuite/gcc.dg/analyzer/omp-parallel-for-1.c | 22 +
.../gcc.dg/analyzer/omp-parallel-for-get-min.c | 25 +
gcc/testsuite/gcc.dg/analyzer/pipe-1.c | 2 +
gcc/testsuite/gcc.dg/analyzer/pipe-glibc.c | 4 +
gcc/testsuite/gcc.dg/analyzer/pipe-void-return.c | 2 +
gcc/testsuite/gcc.dg/analyzer/pipe2-1.c | 2 +
gcc/testsuite/gcc.dg/analyzer/pr101547.c | 10 +-
gcc/testsuite/gcc.dg/analyzer/pr101875.c | 14 +-
.../analyzer/{pr104224.c => pr104224-split.c} | 46 +-
gcc/testsuite/gcc.dg/analyzer/pr104224.c | 2 +
gcc/testsuite/gcc.dg/analyzer/realloc-2.c | 2 +
gcc/testsuite/gcc.dg/analyzer/realloc-3.c | 2 +
gcc/testsuite/gcc.dg/analyzer/realloc-5.c | 2 +
gcc/testsuite/gcc.dg/analyzer/setjmp-pr109094.c | 38 +
gcc/testsuite/gcc.dg/analyzer/snprintf-concat.c | 35 +
gcc/testsuite/gcc.dg/analyzer/sprintf-1.c | 64 +
gcc/testsuite/gcc.dg/analyzer/sprintf-concat.c | 35 +
gcc/testsuite/gcc.dg/analyzer/stdarg-1-ms_abi.c | 1 +
gcc/testsuite/gcc.dg/analyzer/stdarg-1-sysv_abi.c | 1 +
gcc/testsuite/gcc.dg/analyzer/stdarg-1.c | 2 +
gcc/testsuite/gcc.dg/analyzer/symbolic-1.c | 2 +
gcc/testsuite/gcc.dg/analyzer/symbolic-7.c | 14 +-
gcc/testsuite/gcc.dg/analyzer/uninit-4.c | 18 +-
gcc/testsuite/gcc.dg/analyzer/uninit-8.c | 73 +
.../gcc.dg/analyzer/uninit-pr108968-register.c | 9 +
gcc/testsuite/gcc.dg/analyzer/uninit-pr94713.c | 10 +-
gcc/testsuite/gcc.dg/analyzer/vsnprintf-1.c | 11 +
gcc/testsuite/gcc.dg/analyzer/zlib-6a.c | 2 +
gcc/testsuite/gcc.dg/asan/pr106190.c | 15 +
gcc/testsuite/gcc.dg/attr-aligned.c | 8 +-
gcc/testsuite/gcc.dg/attr-alloc_size-11.c | 4 +-
gcc/testsuite/gcc.dg/attr-copy-6.c | 6 +-
gcc/testsuite/gcc.dg/auto-init-unused-1.c | 16 +
gcc/testsuite/gcc.dg/builtins-69.c | 2 +-
.../gcc.dg/compound-literal-cast-lvalue-1.c | 9 +
gcc/testsuite/gcc.dg/debug/btf/btf-enum64-1.c | 6 +-
gcc/testsuite/gcc.dg/debug/ctf/ctf-complex-1.c | 6 +-
gcc/testsuite/gcc.dg/ifcvt-4.c | 2 +-
gcc/testsuite/gcc.dg/ipa/pr108959.c | 22 +
gcc/testsuite/gcc.dg/ipa/pr77653.c | 1 +
gcc/testsuite/gcc.dg/ipa/symver1.c | 4 +-
gcc/testsuite/gcc.dg/memchr-3.c | 2 +-
gcc/testsuite/gcc.dg/overflow-warn-9.c | 3 +-
gcc/testsuite/gcc.dg/pic-2.c | 6 +-
gcc/testsuite/gcc.dg/pic-3.c | 6 +-
gcc/testsuite/gcc.dg/pic-4.c | 6 +-
gcc/testsuite/gcc.dg/plugin/crash-test-ice-sarif.c | 63 +
.../gcc.dg/plugin/crash-test-ice-stderr.c | 9 +
.../plugin/crash-test-write-though-null-sarif.c | 63 +
.../plugin/crash-test-write-though-null-stderr.c | 9 +
..._plugin_test_metadata.c => crash_test_plugin.c} | 74 +-
.../gcc.dg/plugin/diagnostic-test-paths-5.c | 2 +
gcc/testsuite/gcc.dg/plugin/infoleak-2.c | 1 +
.../gcc.dg/plugin/infoleak-CVE-2011-1078-1.c | 1 +
.../gcc.dg/plugin/infoleak-CVE-2011-1078-2.c | 1 +
.../gcc.dg/plugin/infoleak-CVE-2017-18549-1.c | 1 +
.../gcc.dg/plugin/infoleak-CVE-2017-18550-1.c | 1 +
.../gcc.dg/plugin/infoleak-antipatterns-1.c | 1 +
gcc/testsuite/gcc.dg/plugin/infoleak-fixit-1.c | 1 +
.../gcc.dg/plugin/infoleak-vfio_iommu_type1.c | 6 +-
gcc/testsuite/gcc.dg/plugin/must-tail-call-1.c | 1 +
gcc/testsuite/gcc.dg/plugin/must-tail-call-2.c | 1 +
gcc/testsuite/gcc.dg/plugin/plugin.exp | 5 +
gcc/testsuite/gcc.dg/pr106397.c | 2 +-
gcc/testsuite/gcc.dg/pr107846.c | 14 +
gcc/testsuite/gcc.dg/pr108117.c | 1 +
gcc/testsuite/gcc.dg/pr108691.c | 9 +
gcc/testsuite/gcc.dg/pr108970.c | 19 +
gcc/testsuite/gcc.dg/pr109008.c | 26 +
gcc/testsuite/gcc.dg/pr109115.c | 20 +
gcc/testsuite/gcc.dg/pr109187.c | 8 +
gcc/testsuite/gcc.dg/pr109230.c | 31 +
gcc/testsuite/gcc.dg/pr109238.c | 16 +
gcc/testsuite/gcc.dg/pr109274.c | 16 +
gcc/testsuite/gcc.dg/pr109301.c | 13 +
gcc/testsuite/gcc.dg/pr109303.c | 24 +
gcc/testsuite/gcc.dg/pr109304.c | 12 +
gcc/testsuite/gcc.dg/pr109327.c | 15 +
gcc/testsuite/gcc.dg/pr25521.c | 7 +-
gcc/testsuite/gcc.dg/pr80163.c | 3 +-
gcc/testsuite/gcc.dg/predict-20.c | 3 +-
gcc/testsuite/gcc.dg/profile-generate-4.c | 19 +
gcc/testsuite/gcc.dg/signbit-2.c | 1 +
gcc/testsuite/gcc.dg/tls/pr78796.c | 2 +-
.../gcc.dg/torture/fp-uint64-convert-double-1.c | 2 +-
.../gcc.dg/torture/fp-uint64-convert-double-2.c | 2 +-
gcc/testsuite/gcc.dg/torture/inf-compare-1-float.c | 1 +
gcc/testsuite/gcc.dg/torture/inf-compare-1.c | 1 +
gcc/testsuite/gcc.dg/torture/inf-compare-2-float.c | 1 +
gcc/testsuite/gcc.dg/torture/inf-compare-2.c | 1 +
gcc/testsuite/gcc.dg/torture/pr108793.c | 10 +
gcc/testsuite/gcc.dg/torture/pr109002.c | 27 +
gcc/testsuite/gcc.dg/torture/pr109139.c | 12 +
gcc/testsuite/gcc.dg/torture/pr109219.c | 21 +
gcc/testsuite/gcc.dg/torture/pr109331.c | 16 +
gcc/testsuite/gcc.dg/torture/pr53922.c | 10 +-
gcc/testsuite/gcc.dg/torture/pr60092.c | 12 +-
gcc/testsuite/gcc.dg/torture/pr90020.c | 7 +-
gcc/testsuite/gcc.dg/torture/ssa-fre-7.c | 4 +-
gcc/testsuite/gcc.dg/tree-ssa/forwprop-39.c | 13 +
gcc/testsuite/gcc.dg/tree-ssa/pr100359.c | 3 +-
gcc/testsuite/gcc.dg/tree-ssa/pr108357.c | 22 +
gcc/testsuite/gcc.dg/tree-ssa/pr109031-1.c | 39 +
gcc/testsuite/gcc.dg/tree-ssa/pr109031-2.c | 39 +
gcc/testsuite/gcc.dg/tree-ssa/pr23109.c | 3 +-
gcc/testsuite/gcc.dg/tree-ssa/pr91091-2.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/pr99739.c | 40 +
gcc/testsuite/gcc.dg/tree-ssa/ssa-fre-100.c | 2 +-
gcc/testsuite/gcc.dg/tree-ssa/ssa-lim-21.c | 7 +-
gcc/testsuite/gcc.dg/ubsan/bounds-4.c | 79 +
gcc/testsuite/gcc.dg/ubsan/bounds-4a.c | 8 +
gcc/testsuite/gcc.dg/ubsan/bounds-4b.c | 9 +
gcc/testsuite/gcc.dg/ubsan/bounds-4c.c | 10 +
gcc/testsuite/gcc.dg/ubsan/bounds-4d.c | 11 +
gcc/testsuite/gcc.dg/ubsan/pr108995.c | 18 +
gcc/testsuite/gcc.dg/vect/pr103116-2.c | 2 +-
gcc/testsuite/gcc.dg/vect/pr108950.c | 14 +
gcc/testsuite/gcc.dg/vect/pr109025.c | 14 +
gcc/testsuite/gcc.dg/vect/slp-3.c | 9 +-
gcc/testsuite/gcc.dg/vect/slp-multitypes-11.c | 5 +-
gcc/testsuite/gcc.dg/vect/slp-perm-8.c | 4 +-
gcc/testsuite/gcc.dg/vect/vect-div-bitmask-4.c | 25 +
gcc/testsuite/gcc.dg/vect/vect-div-bitmask-5.c | 58 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-16.c | 87 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-16b.c | 14 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-16c.c | 17 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-16d.c | 17 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-16e.c | 16 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-16f.c | 14 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-17.c | 87 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-17b.c | 14 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-17c.c | 17 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-17d.c | 17 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-17e.c | 16 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-17f.c | 14 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-18.c | 87 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-18b.c | 14 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-18c.c | 17 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-18d.c | 17 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-18e.c | 16 +
gcc/testsuite/gcc.dg/vect/vect-simd-clone-18f.c | 14 +
gcc/testsuite/gcc.dg/vect/vect-tail-nomask-1.c | 11 +-
gcc/testsuite/gcc.dg/visibility-22.c | 1 +
.../gcc.target/aarch64/aapcs64/aapcs64.exp | 19 +-
gcc/testsuite/gcc.target/aarch64/auto-init-7.c | 2 +-
.../gcc.target/aarch64/bfloat16_scalar_typecheck.c | 196 +-
.../aarch64/bfloat16_vector_typecheck_1.c | 100 +-
.../aarch64/bfloat16_vector_typecheck_2.c | 100 +-
gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr103147-10.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr104005.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr108999.c | 21 +
gcc/testsuite/gcc.target/aarch64/pr109072_1.c | 281 +
gcc/testsuite/gcc.target/aarch64/pr109072_2.c | 60 +
gcc/testsuite/gcc.target/aarch64/pr63304_1.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr70120-2.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr78733.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr79041-2.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr94530.c | 2 +-
gcc/testsuite/gcc.target/aarch64/pr94577.c | 2 +-
.../gcc.target/aarch64/reload-valid-spoff.c | 2 +-
.../gcc.target/aarch64/{rev16_1.c => rev16_2.c} | 26 +-
.../gcc.target/aarch64/shift_and_operator-1.c | 22 +
gcc/testsuite/gcc.target/aarch64/shrink_wrap_1.c | 2 +-
.../gcc.target/aarch64/stack-check-cfa-1.c | 2 +-
.../gcc.target/aarch64/stack-check-cfa-2.c | 2 +-
.../sve/acle/general-c/ternary_bfloat16_opt_n_1.c | 2 +-
gcc/testsuite/gcc.target/aarch64/sve/mla_3.c | 39 +
.../gcc.target/aarch64/sve/pcs/aarch64-sve-pcs.exp | 7 +-
gcc/testsuite/gcc.target/aarch64/sve/pr108430.c | 21 +
gcc/testsuite/gcc.target/aarch64/sve/pr108603.c | 8 +
gcc/testsuite/gcc.target/aarch64/sve/pr109176.c | 12 +
gcc/testsuite/gcc.target/aarch64/sve/pr109254.c | 27 +
gcc/testsuite/gcc.target/aarch64/tbz_2.c | 130 +
gcc/testsuite/gcc.target/aarch64/tbz_3.c | 18 +
gcc/testsuite/gcc.target/aarch64/test_frame_17.c | 2 +-
gcc/testsuite/gcc.target/arm/acle/cde-errors.c | 52 +-
.../gcc.target/arm/acle/cde-mve-error-2.c | 82 +-
.../gcc.target/arm/acle/cde-mve-full-assembly.c | 264 +-
gcc/testsuite/gcc.target/arm/aes-fuse-1.c | 2 +-
gcc/testsuite/gcc.target/arm/aes-fuse-2.c | 2 +-
gcc/testsuite/gcc.target/arm/armv8_2-fp16-move-1.c | 3 +-
gcc/testsuite/gcc.target/arm/armv8_2-fp16-move-2.c | 2 +-
gcc/testsuite/gcc.target/arm/asm-flag-4.c | 2 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_f16.c | 6 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_f32.c | 6 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_s16.c | 6 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_s32.c | 6 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_s64.c | 6 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_s8.c | 6 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_u16.c | 6 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_u32.c | 6 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_u64.c | 6 +-
.../gcc.target/arm/mve/intrinsics/vcreateq_u8.c | 6 +-
gcc/testsuite/gcc.target/arm/pr51534.c | 9 +-
.../gcc.target/arm/{pr51534.c => pr51534s.c} | 8 +-
gcc/testsuite/gcc.target/arm/simd/pr104882.c | 1 +
gcc/testsuite/gcc.target/avr/pr90706.c | 9 +
gcc/testsuite/gcc.target/gcn/complex.c | 627 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_1.c | 33 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_1_run.c | 32 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_2.c | 33 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_2_run.c | 31 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_3.c | 35 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_3_run.c | 32 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_4.c | 35 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_4_run.c | 32 +
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_5.c | 9 +
.../{aarch64/sve => gcn}/cond_fmaxnm_5_run.c | 2 +-
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_6.c | 9 +
.../{aarch64/sve => gcn}/cond_fmaxnm_6_run.c | 2 +-
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_7.c | 9 +
.../{aarch64/sve => gcn}/cond_fmaxnm_7_run.c | 2 +-
gcc/testsuite/gcc.target/gcn/cond_fmaxnm_8.c | 9 +
.../{aarch64/sve => gcn}/cond_fmaxnm_8_run.c | 2 +-
gcc/testsuite/gcc.target/gcn/cond_fminnm_1.c | 10 +
.../{aarch64/sve => gcn}/cond_fminnm_1_run.c | 2 +-
gcc/testsuite/gcc.target/gcn/cond_fminnm_2.c | 10 +
.../{aarch64/sve => gcn}/cond_fminnm_2_run.c | 2 +-
gcc/testsuite/gcc.target/gcn/cond_fminnm_3.c | 12 +
.../{aarch64/sve => gcn}/cond_fminnm_3_run.c | 2 +-
gcc/testsuite/gcc.target/gcn/cond_fminnm_4.c | 12 +
.../{aarch64/sve => gcn}/cond_fminnm_4_run.c | 2 +-
gcc/testsuite/gcc.target/gcn/cond_fminnm_5.c | 10 +
.../{aarch64/sve => gcn}/cond_fminnm_5_run.c | 2 +-
gcc/testsuite/gcc.target/gcn/cond_fminnm_6.c | 10 +
.../{aarch64/sve => gcn}/cond_fminnm_6_run.c | 2 +-
gcc/testsuite/gcc.target/gcn/cond_fminnm_7.c | 10 +
.../{aarch64/sve => gcn}/cond_fminnm_7_run.c | 2 +-
gcc/testsuite/gcc.target/gcn/cond_fminnm_8.c | 10 +
.../{aarch64/sve => gcn}/cond_fminnm_8_run.c | 2 +-
gcc/testsuite/gcc.target/gcn/cond_smax_1.c | 57 +
gcc/testsuite/gcc.target/gcn/cond_smax_1_run.c | 53 +
gcc/testsuite/gcc.target/gcn/cond_smin_1.c | 57 +
gcc/testsuite/gcc.target/gcn/cond_smin_1_run.c | 53 +
gcc/testsuite/gcc.target/gcn/cond_umax_1.c | 54 +
gcc/testsuite/gcc.target/gcn/cond_umax_1_run.c | 53 +
gcc/testsuite/gcc.target/gcn/cond_umin_1.c | 53 +
gcc/testsuite/gcc.target/gcn/cond_umin_1_run.c | 53 +
gcc/testsuite/gcc.target/gcn/simd-math-1.c | 206 +
gcc/testsuite/gcc.target/gcn/simd-math-2.c | 8 +
gcc/testsuite/gcc.target/gcn/smax_1.c | 47 +
gcc/testsuite/gcc.target/gcn/smax_1_run.c | 48 +
gcc/testsuite/gcc.target/gcn/smin_1.c | 47 +
gcc/testsuite/gcc.target/gcn/smin_1_run.c | 48 +
gcc/testsuite/gcc.target/gcn/umax_1.c | 45 +
gcc/testsuite/gcc.target/gcn/umax_1_run.c | 48 +
gcc/testsuite/gcc.target/gcn/umin_1.c | 45 +
gcc/testsuite/gcc.target/gcn/umin_1_run.c | 48 +
gcc/testsuite/gcc.target/i386/auto-init-4.c | 5 +-
.../gcc.target/i386/avx512bf16-pr108881.c | 14 +
gcc/testsuite/gcc.target/i386/harden-sls-6.c | 2 +-
gcc/testsuite/gcc.target/i386/merge-1.c | 2 +-
gcc/testsuite/gcc.target/i386/pr103559-1.c | 13 +
gcc/testsuite/gcc.target/i386/pr103559-2.c | 15 +
gcc/testsuite/gcc.target/i386/pr103559-3.c | 15 +
gcc/testsuite/gcc.target/i386/pr103559-4.c | 13 +
gcc/testsuite/gcc.target/i386/pr105554.c | 10 +
gcc/testsuite/gcc.target/i386/pr109052-2.c | 10 +
gcc/testsuite/gcc.target/i386/pr109052.c | 11 +
gcc/testsuite/gcc.target/i386/pr109109-1.c | 139 +
gcc/testsuite/gcc.target/i386/pr109109-2.c | 175 +
gcc/testsuite/gcc.target/i386/pr109117-1.c | 14 +
gcc/testsuite/gcc.target/i386/pr109137.c | 29 +
gcc/testsuite/gcc.target/i386/pr109276.c | 13 +
gcc/testsuite/gcc.target/i386/pr109362.c | 19 +
gcc/testsuite/gcc.target/i386/pr88828-0.c | 2 +-
gcc/testsuite/gcc.target/i386/sse-movss-4.c | 6 +-
gcc/testsuite/gcc.target/i386/sse2-mmx-21.c | 2 +-
gcc/testsuite/gcc.target/i386/sse2-mmx-movss-1.c | 13 +
gcc/testsuite/gcc.target/i386/sse2-movsd-3.c | 10 +-
gcc/testsuite/gcc.target/loongarch/flt-abi-isa-1.c | 14 +
gcc/testsuite/gcc.target/loongarch/flt-abi-isa-2.c | 10 +
gcc/testsuite/gcc.target/loongarch/flt-abi-isa-3.c | 9 +
gcc/testsuite/gcc.target/loongarch/flt-abi-isa-4.c | 10 +
gcc/testsuite/gcc.target/loongarch/prolog-opt.c | 2 +-
.../gcc.target/loongarch/stack-check-cfa-1.c | 2 +-
.../gcc.target/loongarch/stack-check-cfa-2.c | 2 +-
.../gcc.target/m68k/{tls-gd.c => tls-gd-off.c} | 4 +-
.../gcc.target/m68k/{tls-ie.c => tls-ie-off.c} | 4 +-
.../gcc.target/m68k/{tls-gd.c => tls-ld-off.c} | 7 +-
.../m68k/{tls-ld-xtls.c => tls-ld-xtls-off.c} | 6 +-
gcc/testsuite/gcc.target/m68k/tls-ld.c | 4 +-
.../gcc.target/m68k/{tls-ie.c => tls-le-off.c} | 6 +-
.../m68k/{tls-le-xtls.c => tls-le-xtls-off.c} | 6 +-
gcc/testsuite/gcc.target/m68k/tls-le.c | 2 +-
gcc/testsuite/gcc.target/mips/clo.c | 11 +
gcc/testsuite/gcc.target/mips/clz.c | 10 +
.../mips/hazard-barrier-return-attribute.c | 20 +
gcc/testsuite/gcc.target/mips/mips.exp | 4 +
gcc/testsuite/gcc.target/mips/msa-ds.c | 8 +-
.../powerpc/bfp/scalar-test-data-class-12.c | 1 +
.../powerpc/bfp/scalar-test-data-class-14.c | 1 +
.../powerpc/bfp/scalar-test-data-class-15.c | 1 +
.../gcc.target/powerpc/bfp/scalar-test-neg-8.c | 1 +
.../gcc.target/powerpc/bfp/vec-test-data-class-9.c | 1 +
gcc/testsuite/gcc.target/powerpc/divic3-1.c | 21 +
gcc/testsuite/gcc.target/powerpc/divic3-2.c | 25 +
.../powerpc/fold-vec-extract-double.p9.c | 8 +-
gcc/testsuite/gcc.target/powerpc/mod-no_copy.c | 16 +
gcc/testsuite/gcc.target/powerpc/mod-peephole.c | 25 +
gcc/testsuite/gcc.target/powerpc/mulic3-1.c | 21 +
gcc/testsuite/gcc.target/powerpc/mulic3-2.c | 25 +
gcc/testsuite/gcc.target/powerpc/p9-vparity.c | 1 +
.../gcc.target/powerpc/ppc-fortran/ppc-fortran.exp | 5 +
gcc/testsuite/gcc.target/powerpc/pr101384-2.c | 2 +-
gcc/testsuite/gcc.target/powerpc/pr108699.c | 42 +
gcc/testsuite/gcc.target/powerpc/pr109082.c | 14 +
gcc/testsuite/gcc.target/powerpc/pr109167.c | 47 +
gcc/testsuite/gcc.target/powerpc/pr109178.c | 13 +
gcc/testsuite/gcc.target/powerpc/pr56605.c | 3 +-
.../gcc.target/riscv/_Float16-zhinxmin-1.c | 2 +-
gcc/testsuite/gcc.target/riscv/arch-19.c | 4 +
gcc/testsuite/gcc.target/riscv/mcpu-thead-c906.c | 28 +
gcc/testsuite/gcc.target/riscv/pr108987.c | 9 +
.../gcc.target/riscv/predef-__riscv_v_intrinsic.c | 11 +
.../riscv/rvv/base/binop_vv_constraint-4.c | 2 +-
.../riscv/rvv/base/binop_vv_constraint-6.c | 1 +
.../riscv/rvv/base/binop_vx_constraint-167.c | 143 +
.../riscv/rvv/base/binop_vx_constraint-168.c | 143 +
.../riscv/rvv/base/binop_vx_constraint-169.c | 163 +
.../riscv/rvv/base/binop_vx_constraint-170.c | 163 +
.../riscv/rvv/base/binop_vx_constraint-171.c | 75 +
.../riscv/rvv/base/binop_vx_constraint-172.c | 71 +
.../riscv/rvv/base/binop_vx_constraint-173.c | 75 +
.../riscv/rvv/base/binop_vx_constraint-174.c | 71 +
gcc/testsuite/gcc.target/riscv/rvv/base/bug-1.c | 79 +
gcc/testsuite/gcc.target/riscv/rvv/base/bug-2.c | 86 +
gcc/testsuite/gcc.target/riscv/rvv/base/bug-3.c | 22 +
gcc/testsuite/gcc.target/riscv/rvv/base/bug-4.c | 22 +
gcc/testsuite/gcc.target/riscv/rvv/base/bug-5.c | 22 +
.../gcc.target/riscv/rvv/base/merge_constraint-1.c | 204 +
.../gcc.target/riscv/rvv/base/merge_constraint-2.c | 118 +
.../gcc.target/riscv/rvv/base/merge_constraint-3.c | 95 +
.../gcc.target/riscv/rvv/base/merge_constraint-4.c | 28 +
.../riscv/rvv/base/narrow_constraint-1.c | 319 +
.../riscv/rvv/base/narrow_constraint-10.c | 293 +
.../riscv/rvv/base/narrow_constraint-11.c | 293 +
.../riscv/rvv/base/narrow_constraint-2.c | 370 +
.../riscv/rvv/base/narrow_constraint-3.c | 392 +
.../riscv/rvv/base/narrow_constraint-4.c | 319 +
.../riscv/rvv/base/narrow_constraint-5.c | 319 +
.../riscv/rvv/base/narrow_constraint-6.c | 369 +
.../riscv/rvv/base/narrow_constraint-7.c | 392 +
.../riscv/rvv/base/narrow_constraint-8.c | 319 +
.../riscv/rvv/base/narrow_constraint-9.c | 319 +
.../gcc.target/riscv/rvv/base/pr108185-1.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-2.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-3.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-4.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-5.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-6.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-7.c | 68 +
.../gcc.target/riscv/rvv/base/pr108185-8.c | 77 +
.../gcc.target/riscv/rvv/base/scalar_move-1.c | 75 +
.../gcc.target/riscv/rvv/base/scalar_move-2.c | 62 +
.../gcc.target/riscv/rvv/base/scalar_move-3.c | 58 +
.../gcc.target/riscv/rvv/base/scalar_move-4.c | 54 +
.../gcc.target/riscv/rvv/base/scalar_move-5.c | 176 +
.../gcc.target/riscv/rvv/base/scalar_move-6.c | 201 +
.../gcc.target/riscv/rvv/base/scalar_move-7.c | 176 +
.../gcc.target/riscv/rvv/base/scalar_move-8.c | 201 +
.../gcc.target/riscv/rvv/base/scalar_move-9.c | 26 +
gcc/testsuite/gcc.target/riscv/rvv/base/spill-1.c | 194 +-
gcc/testsuite/gcc.target/riscv/rvv/base/spill-2.c | 136 +-
gcc/testsuite/gcc.target/riscv/rvv/base/spill-3.c | 76 +-
gcc/testsuite/gcc.target/riscv/rvv/base/spill-5.c | 36 +-
gcc/testsuite/gcc.target/riscv/rvv/base/spill-7.c | 161 +-
.../riscv/rvv/base/ternop_vv_constraint-3.c | 83 +
.../riscv/rvv/base/ternop_vv_constraint-4.c | 83 +
.../riscv/rvv/base/ternop_vv_constraint-5.c | 83 +
.../riscv/rvv/base/ternop_vv_constraint-6.c | 83 +
.../riscv/rvv/base/ternop_vx_constraint-8.c | 71 +
.../riscv/rvv/base/ternop_vx_constraint-9.c | 71 +
.../gcc.target/riscv/rvv/base/vaadd_vv-1.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv-2.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv_m-1.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv_m-2.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv_m-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vaadd_vv_mu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv_tu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vaadd_vv_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv_tum-1.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv_tum-2.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv_tum-3.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv_tumu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv_tumu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vv_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vaadd_vx_m_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vaadd_vx_m_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vaadd_vx_m_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vaadd_vx_m_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vaadd_vx_m_rv64-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vaadd_vx_mu_rv64-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vaadd_vx_rv64-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vaaddu_vv-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vaaddu_vv_m-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vaaddu_vx_m_rv64-1.c | 160 -
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gcc/testsuite/gcc.target/riscv/rvv/base/vadc-1.c | 27 -
gcc/testsuite/gcc.target/riscv/rvv/base/vadc-2.c | 48 -
gcc/testsuite/gcc.target/riscv/rvv/base/vadc-3.c | 78 -
gcc/testsuite/gcc.target/riscv/rvv/base/vadc-4.c | 79 -
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.../gcc.target/riscv/rvv/base/vand_vv-1.c | 292 -
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.../riscv/rvv/base/vand_vx_tumu_rv32-1.c | 289 -
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.../riscv/rvv/base/vand_vx_tumu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vasub_vv-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vasub_vv-3.c | 160 -
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.../riscv/rvv/base/vasub_vx_tum_rv32-1.c | 157 -
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.../riscv/rvv/base/vasubu_vx_mu_rv32-1.c | 157 -
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.../riscv/rvv/base/vasubu_vx_tum_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vdiv_vv_tum-1.c | 160 -
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gcc/testsuite/gcc.target/riscv/rvv/base/vle-1.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vle-2.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vle-3.c | 345 -
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gcc/testsuite/gcc.target/riscv/rvv/base/vle_m-1.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vle_m-2.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vle_m-3.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vle_mu-1.c | 344 -
gcc/testsuite/gcc.target/riscv/rvv/base/vle_mu-2.c | 344 -
gcc/testsuite/gcc.target/riscv/rvv/base/vle_mu-3.c | 344 -
gcc/testsuite/gcc.target/riscv/rvv/base/vle_tu-1.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vle_tu-2.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vle_tu-3.c | 345 -
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gcc/testsuite/gcc.target/riscv/rvv/base/vlenb-1.c | 46 +
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.../gcc.target/riscv/rvv/base/vloxei8_v-1.c | 346 -
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gcc/testsuite/gcc.target/riscv/rvv/base/vlse-1.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vlse-2.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vlse-3.c | 345 -
.../riscv/rvv/base/vlse-vsse-constraint-1.c | 113 -
gcc/testsuite/gcc.target/riscv/rvv/base/vlse_m-1.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vlse_m-2.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vlse_m-3.c | 345 -
.../gcc.target/riscv/rvv/base/vlse_mu-1.c | 345 -
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.../gcc.target/riscv/rvv/base/vlse_mu-3.c | 345 -
.../gcc.target/riscv/rvv/base/vlse_tu-1.c | 345 -
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.../gcc.target/riscv/rvv/base/vluxei16_v-1.c | 333 -
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.../gcc.target/riscv/rvv/base/vluxei32_v-1.c | 307 -
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.../gcc.target/riscv/rvv/base/vluxei32_v_m-3.c | 307 -
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.../gcc.target/riscv/rvv/base/vluxei32_v_tu-2.c | 307 -
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.../gcc.target/riscv/rvv/base/vluxei32_v_tumu-3.c | 307 -
.../gcc.target/riscv/rvv/base/vluxei64_v-1.c | 262 -
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.../gcc.target/riscv/rvv/base/vluxei64_v_tumu-3.c | 262 -
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gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-1.c | 25 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-2.c | 43 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-3.c | 78 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-4.c | 79 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-5.c | 24 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-6.c | 43 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-7.c | 85 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmadc-8.c | 86 -
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gcc/testsuite/gcc.target/riscv/rvv/base/vmerge-1.c | 27 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmerge-2.c | 47 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmerge-3.c | 78 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmerge-4.c | 79 -
.../gcc.target/riscv/rvv/base/vmerge_vvm-1.c | 69 -
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.../gcc.target/riscv/rvv/base/vmerge_vvm-6.c | 292 -
.../gcc.target/riscv/rvv/base/vmerge_vvm_tu-1.c | 69 -
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.../riscv/rvv/base/vmerge_vxm_tu_rv32-1.c | 289 -
.../riscv/rvv/base/vmerge_vxm_tu_rv32-2.c | 289 -
.../riscv/rvv/base/vmerge_vxm_tu_rv32-3.c | 289 -
.../riscv/rvv/base/vmerge_vxm_tu_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vmin_vv-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmin_vv_m-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmin_vv_tum-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmin_vv_tumu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmin_vx_m_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vmin_vx_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vmin_vx_tum_rv32-1.c | 157 -
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.../riscv/rvv/base/vmin_vx_tumu_rv32-1.c | 157 -
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.../riscv/rvv/base/vmin_vx_tumu_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vminu_vv-1.c | 160 -
.../gcc.target/riscv/rvv/base/vminu_vv-2.c | 160 -
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.../gcc.target/riscv/rvv/base/vminu_vv_m-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vminu_vv_tu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vminu_vv_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vminu_vv_tum-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vminu_vv_tum-3.c | 160 -
.../gcc.target/riscv/rvv/base/vminu_vv_tumu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vminu_vv_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vminu_vx_m_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vminu_vx_m_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vminu_vx_m_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vminu_vx_mu_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vminu_vx_mu_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vminu_vx_mu_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vminu_vx_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vminu_vx_tu_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vminu_vx_tu_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vminu_vx_tu_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vminu_vx_tu_rv64-3.c | 160 -
.../riscv/rvv/base/vminu_vx_tum_rv32-1.c | 157 -
.../riscv/rvv/base/vminu_vx_tum_rv32-2.c | 157 -
.../riscv/rvv/base/vminu_vx_tum_rv32-3.c | 157 -
.../riscv/rvv/base/vminu_vx_tum_rv64-1.c | 160 -
.../riscv/rvv/base/vminu_vx_tum_rv64-2.c | 160 -
.../riscv/rvv/base/vminu_vx_tum_rv64-3.c | 160 -
.../riscv/rvv/base/vminu_vx_tumu_rv32-1.c | 157 -
.../riscv/rvv/base/vminu_vx_tumu_rv32-2.c | 157 -
.../riscv/rvv/base/vminu_vx_tumu_rv32-3.c | 157 -
.../riscv/rvv/base/vminu_vx_tumu_rv64-1.c | 160 -
.../riscv/rvv/base/vminu_vx_tumu_rv64-2.c | 160 -
.../riscv/rvv/base/vminu_vx_tumu_rv64-3.c | 160 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-1.c | 25 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-2.c | 42 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-3.c | 77 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-4.c | 78 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-5.c | 24 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-6.c | 42 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-7.c | 84 -
gcc/testsuite/gcc.target/riscv/rvv/base/vmsbc-8.c | 84 -
.../gcc.target/riscv/rvv/base/vmsbc_vv-1.c | 292 -
.../gcc.target/riscv/rvv/base/vmsbc_vv-2.c | 292 -
.../gcc.target/riscv/rvv/base/vmsbc_vv-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmsbc_vvm-1.c | 292 -
.../gcc.target/riscv/rvv/base/vmsbc_vvm-2.c | 292 -
.../gcc.target/riscv/rvv/base/vmsbc_vvm-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmsbc_vx_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vmsbc_vx_rv32-2.c | 289 -
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.../gcc.target/riscv/rvv/base/vmsbc_vx_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vmsbc_vxm_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vmsbc_vxm_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vmsbc_vxm_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vmsbc_vxm_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vv-1.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vv-2.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vv-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vv_m-1.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vv_m-2.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vv_m-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vv_mu-1.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vv_mu-2.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vv_mu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vx_m_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vmseq_vx_m_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vmseq_vx_m_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vmseq_vx_m_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vx_m_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vx_m_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vx_mu_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vmseq_vx_mu_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vmseq_vx_mu_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vmseq_vx_mu_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vx_mu_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vx_mu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vx_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vmseq_vx_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vmseq_vx_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vmseq_vx_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vx_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vmseq_vx_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmsge_vv-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vv-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vv_m-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vv_m-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vv_m-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vv_mu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vv_mu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vx_m_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vmsge_vx_m_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vmsge_vx_m_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vmsge_vx_m_rv64-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vx_m_rv64-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vx_m_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vx_mu_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vmsge_vx_mu_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vmsge_vx_mu_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmsge_vx_mu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsge_vx_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vmsge_vx_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmsge_vx_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vv-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vv-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vv_m-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vv_m-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vv_m-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vv_mu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vv_mu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv64-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv64-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vx_m_rv64-3.c | 160 -
.../riscv/rvv/base/vmsgeu_vx_mu_rv32-1.c | 157 -
.../riscv/rvv/base/vmsgeu_vx_mu_rv32-2.c | 157 -
.../riscv/rvv/base/vmsgeu_vx_mu_rv32-3.c | 157 -
.../riscv/rvv/base/vmsgeu_vx_mu_rv64-1.c | 160 -
.../riscv/rvv/base/vmsgeu_vx_mu_rv64-2.c | 160 -
.../riscv/rvv/base/vmsgeu_vx_mu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgeu_vx_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vmsgeu_vx_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vmsgeu_vx_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vmsgeu_vx_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmsgeu_vx_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgt_vv-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgt_vv-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgt_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgt_vv_m-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgt_vv_m-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgt_vv_m-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgt_vv_mu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgt_vv_mu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgt_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsgt_vx_m_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vmsgt_vx_m_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vmsgt_vx_m_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vmsgt_vx_m_rv64-1.c | 160 -
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.../riscv/rvv/base/vmsleu_vx_mu_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmslt_vv-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmslt_vx_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmsltu_vv-1.c | 160 -
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.../riscv/rvv/base/vmsltu_vx_mu_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmsne_vv-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vmsne_vx_mu_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vmul_vv_tu-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vmul_vv_tum-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vmul_vx_m_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vmul_vx_m_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vmul_vx_mu_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vmul_vx_mu_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vmul_vx_mu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmul_vx_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vmul_vx_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vmul_vx_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmul_vx_tu_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vmul_vx_tu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmul_vx_tum_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vmul_vx_tum_rv64-3.c | 292 -
.../riscv/rvv/base/vmul_vx_tumu_rv32-1.c | 289 -
.../riscv/rvv/base/vmul_vx_tumu_rv32-2.c | 289 -
.../riscv/rvv/base/vmul_vx_tumu_rv32-3.c | 289 -
.../riscv/rvv/base/vmul_vx_tumu_rv64-1.c | 292 -
.../riscv/rvv/base/vmul_vx_tumu_rv64-2.c | 292 -
.../riscv/rvv/base/vmul_vx_tumu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmulh_vv-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmulh_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmulh_vv_m-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmulh_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmulh_vv_tu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmulh_vv_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmulh_vv_tum-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmulh_vv_tum-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmulh_vv_tumu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmulh_vv_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmulh_vx_m_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vmulh_vx_m_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vmulh_vx_m_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vmulh_vx_m_rv64-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmulh_vx_m_rv64-2.c | 160 -
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.../gcc.target/riscv/rvv/base/vmulhsu_vv-1.c | 160 -
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.../riscv/rvv/base/vmulhsu_vx_m_rv32-1.c | 157 -
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.../riscv/rvv/base/vmulhsu_vx_m_rv64-1.c | 160 -
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.../riscv/rvv/base/vmulhsu_vx_mu_rv32-3.c | 157 -
.../riscv/rvv/base/vmulhsu_vx_mu_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmulhsu_vx_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vmulhsu_vx_rv64-1.c | 160 -
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.../riscv/rvv/base/vmulhsu_vx_tu_rv32-1.c | 157 -
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.../riscv/rvv/base/vmulhsu_vx_tu_rv64-1.c | 160 -
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.../riscv/rvv/base/vmulhsu_vx_tum_rv32-1.c | 157 -
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.../riscv/rvv/base/vmulhsu_vx_tum_rv32-3.c | 157 -
.../riscv/rvv/base/vmulhsu_vx_tum_rv64-1.c | 160 -
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.../riscv/rvv/base/vmulhsu_vx_tum_rv64-3.c | 160 -
.../riscv/rvv/base/vmulhsu_vx_tumu_rv32-1.c | 157 -
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.../riscv/rvv/base/vmulhsu_vx_tumu_rv32-3.c | 157 -
.../riscv/rvv/base/vmulhsu_vx_tumu_rv64-1.c | 160 -
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.../riscv/rvv/base/vmulhsu_vx_tumu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmulhu_vv-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmulhu_vv-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vmulhu_vv_m-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vmulhu_vv_mu-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vmulhu_vv_tumu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vmulhu_vv_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmulhu_vx_m_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vmulhu_vx_m_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vmulhu_vx_m_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vmulhu_vx_m_rv64-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmulhu_vx_m_rv64-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmulhu_vx_m_rv64-3.c | 160 -
.../riscv/rvv/base/vmulhu_vx_mu_rv32-1.c | 157 -
.../riscv/rvv/base/vmulhu_vx_mu_rv32-2.c | 157 -
.../riscv/rvv/base/vmulhu_vx_mu_rv32-3.c | 157 -
.../riscv/rvv/base/vmulhu_vx_mu_rv64-1.c | 160 -
.../riscv/rvv/base/vmulhu_vx_mu_rv64-2.c | 160 -
.../riscv/rvv/base/vmulhu_vx_mu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmulhu_vx_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vmulhu_vx_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vmulhu_vx_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vmulhu_vx_rv64-1.c | 160 -
.../gcc.target/riscv/rvv/base/vmulhu_vx_rv64-2.c | 160 -
.../gcc.target/riscv/rvv/base/vmulhu_vx_rv64-3.c | 160 -
.../riscv/rvv/base/vmulhu_vx_tu_rv32-1.c | 157 -
.../riscv/rvv/base/vmulhu_vx_tu_rv32-2.c | 157 -
.../riscv/rvv/base/vmulhu_vx_tu_rv32-3.c | 157 -
.../riscv/rvv/base/vmulhu_vx_tu_rv64-1.c | 160 -
.../riscv/rvv/base/vmulhu_vx_tu_rv64-2.c | 160 -
.../riscv/rvv/base/vmulhu_vx_tu_rv64-3.c | 160 -
.../riscv/rvv/base/vmulhu_vx_tum_rv32-1.c | 157 -
.../riscv/rvv/base/vmulhu_vx_tum_rv32-2.c | 157 -
.../riscv/rvv/base/vmulhu_vx_tum_rv32-3.c | 157 -
.../riscv/rvv/base/vmulhu_vx_tum_rv64-1.c | 160 -
.../riscv/rvv/base/vmulhu_vx_tum_rv64-2.c | 160 -
.../riscv/rvv/base/vmulhu_vx_tum_rv64-3.c | 160 -
.../riscv/rvv/base/vmulhu_vx_tumu_rv32-1.c | 157 -
.../riscv/rvv/base/vmulhu_vx_tumu_rv32-2.c | 157 -
.../riscv/rvv/base/vmulhu_vx_tumu_rv32-3.c | 157 -
.../riscv/rvv/base/vmulhu_vx_tumu_rv64-1.c | 160 -
.../riscv/rvv/base/vmulhu_vx_tumu_rv64-2.c | 160 -
.../riscv/rvv/base/vmulhu_vx_tumu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vmv_v_v-1.c | 276 -
.../gcc.target/riscv/rvv/base/vmv_v_v-2.c | 276 -
.../gcc.target/riscv/rvv/base/vmv_v_v-3.c | 276 -
.../gcc.target/riscv/rvv/base/vmv_v_v_tu-1.c | 276 -
.../gcc.target/riscv/rvv/base/vmv_v_v_tu-2.c | 276 -
.../gcc.target/riscv/rvv/base/vmv_v_v_tu-3.c | 276 -
.../gcc.target/riscv/rvv/base/vmv_v_x_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vmv_v_x_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vmv_v_x_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vmv_v_x_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vmv_v_x_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vmv_v_x_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vmv_v_x_tu_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vmv_v_x_tu_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vmv_v_x_tu_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vmv_v_x_tu_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vmv_v_x_tu_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vmv_v_x_tu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vnclip_wv-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wv-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wv-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wv_m-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnclip_wv_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wv_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wv_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wv_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wv_tum-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnclip_wv_tumu-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnclip_wv_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wx-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnclip_wx-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wx_m-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnclip_wx_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wx_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wx_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wx_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wx_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wx_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wx_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclip_wx_tum-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnclip_wx_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wv-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnclipu_wv_m-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnclipu_wv_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wv_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wv_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wv_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wv_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wv_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wv_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wv_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wv_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wv_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnclipu_wx_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vncvt_x-1.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x-2.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x-3.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_m-1.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_m-2.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_m-3.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_mu-1.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_mu-2.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_mu-3.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_tu-1.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_tu-2.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_tu-3.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_tum-1.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_tum-2.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_tum-3.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_tumu-1.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_tumu-2.c | 201 -
.../gcc.target/riscv/rvv/base/vncvt_x_tumu-3.c | 201 -
gcc/testsuite/gcc.target/riscv/rvv/base/vneg_v-1.c | 160 -
gcc/testsuite/gcc.target/riscv/rvv/base/vneg_v-2.c | 160 -
gcc/testsuite/gcc.target/riscv/rvv/base/vneg_v-3.c | 160 -
.../gcc.target/riscv/rvv/base/vneg_v_m-1.c | 160 -
.../gcc.target/riscv/rvv/base/vneg_v_m-2.c | 160 -
.../gcc.target/riscv/rvv/base/vneg_v_m-3.c | 160 -
.../gcc.target/riscv/rvv/base/vneg_v_mu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vneg_v_mu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vneg_v_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vneg_v_tu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vneg_v_tu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vneg_v_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vneg_v_tum-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vnmsac_vv-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vnmsac_vx_m_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vnmsac_vx_m_rv64-1.c | 292 -
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.../riscv/rvv/base/vnmsac_vx_mu_rv32-1.c | 289 -
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.../riscv/rvv/base/vnmsac_vx_mu_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vnmsac_vx_rv32-1.c | 289 -
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.../riscv/rvv/base/vnmsac_vx_tu_rv64-1.c | 292 -
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.../riscv/rvv/base/vnmsac_vx_tum_rv32-1.c | 289 -
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.../riscv/rvv/base/vnmsac_vx_tum_rv64-1.c | 292 -
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.../riscv/rvv/base/vnmsac_vx_tumu_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vnmsub_vv-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vnmsub_vv_tu-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vnmsub_vv_tum-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vnmsub_vx_m_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vnmsub_vx_m_rv64-1.c | 292 -
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.../riscv/rvv/base/vnmsub_vx_mu_rv32-1.c | 289 -
.../riscv/rvv/base/vnmsub_vx_mu_rv32-2.c | 289 -
.../riscv/rvv/base/vnmsub_vx_mu_rv32-3.c | 289 -
.../riscv/rvv/base/vnmsub_vx_mu_rv64-1.c | 292 -
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.../riscv/rvv/base/vnmsub_vx_mu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vnmsub_vx_rv32-1.c | 289 -
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.../riscv/rvv/base/vnmsub_vx_tu_rv32-1.c | 289 -
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.../riscv/rvv/base/vnmsub_vx_tu_rv32-3.c | 289 -
.../riscv/rvv/base/vnmsub_vx_tu_rv64-1.c | 292 -
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.../riscv/rvv/base/vnmsub_vx_tu_rv64-3.c | 292 -
.../riscv/rvv/base/vnmsub_vx_tum_rv32-1.c | 289 -
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.../riscv/rvv/base/vnmsub_vx_tum_rv32-3.c | 289 -
.../riscv/rvv/base/vnmsub_vx_tum_rv64-1.c | 292 -
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.../riscv/rvv/base/vnmsub_vx_tumu_rv32-1.c | 289 -
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.../riscv/rvv/base/vnmsub_vx_tumu_rv64-1.c | 292 -
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.../riscv/rvv/base/vnmsub_vx_tumu_rv64-3.c | 292 -
gcc/testsuite/gcc.target/riscv/rvv/base/vnot_v-1.c | 160 -
gcc/testsuite/gcc.target/riscv/rvv/base/vnot_v-2.c | 160 -
gcc/testsuite/gcc.target/riscv/rvv/base/vnot_v-3.c | 160 -
.../gcc.target/riscv/rvv/base/vnot_v_m-1.c | 160 -
.../gcc.target/riscv/rvv/base/vnot_v_m-2.c | 160 -
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.../gcc.target/riscv/rvv/base/vnot_v_mu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vnot_v_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vnot_v_tu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vnot_v_tu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vnot_v_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vnot_v_tum-1.c | 160 -
.../gcc.target/riscv/rvv/base/vnot_v_tum-2.c | 160 -
.../gcc.target/riscv/rvv/base/vnot_v_tum-3.c | 160 -
.../gcc.target/riscv/rvv/base/vnot_v_tumu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vnot_v_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vnsra_wv-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnsra_wv_tu-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnsra_wv_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnsra_wv_tum-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnsra_wv_tumu-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnsra_wx-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnsra_wx-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnsra_wx_m-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnsra_wx_tu-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnsrl_wv-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnsrl_wv_m-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnsrl_wv_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wv_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wv_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wv_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wv_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wv_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wv_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wv_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wv_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wv_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wv_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wv_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wv_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx_tum-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnsrl_wx_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vnsrl_wx_tumu-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vnsrl_wx_tumu-3.c | 111 -
gcc/testsuite/gcc.target/riscv/rvv/base/vor_vv-1.c | 292 -
gcc/testsuite/gcc.target/riscv/rvv/base/vor_vv-2.c | 292 -
gcc/testsuite/gcc.target/riscv/rvv/base/vor_vv-3.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_m-1.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_m-2.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_m-3.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_mu-1.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_mu-2.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_mu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_tu-1.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_tu-2.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_tu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_tum-1.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_tum-2.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_tum-3.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_tumu-1.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_tumu-2.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vv_tumu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_m_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_m_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_m_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_m_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_m_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_m_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_mu_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_mu_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_mu_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_mu_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_mu_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_mu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_tu_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_tu_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_tu_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_tu_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_tu_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_tu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_tum_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_tum_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_tum_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_tum_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_tum_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_tum_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_tumu_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_tumu_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_tumu_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vor_vx_tumu_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_tumu_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vor_vx_tumu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vread_csr.c | 25 -
.../gcc.target/riscv/rvv/base/vrem_vv-1.c | 160 -
.../gcc.target/riscv/rvv/base/vrem_vv-2.c | 160 -
.../gcc.target/riscv/rvv/base/vrem_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vrem_vv_m-1.c | 160 -
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.../riscv/rvv/base/vrem_vx_tumu_rv32-1.c | 157 -
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.../riscv/rvv/base/vrem_vx_tumu_rv64-1.c | 160 -
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.../riscv/rvv/base/vrem_vx_tumu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vremu_vv-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vremu_vv-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vremu_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vremu_vv_tu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vremu_vv_tum-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vremu_vx_m_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vremu_vx_m_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vremu_vx_m_rv64-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vremu_vx_mu_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vremu_vx_tu_rv64-1.c | 160 -
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.../riscv/rvv/base/vremu_vx_tum_rv32-1.c | 157 -
.../riscv/rvv/base/vremu_vx_tum_rv32-2.c | 157 -
.../riscv/rvv/base/vremu_vx_tum_rv32-3.c | 157 -
.../riscv/rvv/base/vremu_vx_tum_rv64-1.c | 160 -
.../riscv/rvv/base/vremu_vx_tum_rv64-2.c | 160 -
.../riscv/rvv/base/vremu_vx_tum_rv64-3.c | 160 -
.../riscv/rvv/base/vremu_vx_tumu_rv32-1.c | 157 -
.../riscv/rvv/base/vremu_vx_tumu_rv32-2.c | 157 -
.../riscv/rvv/base/vremu_vx_tumu_rv32-3.c | 157 -
.../riscv/rvv/base/vremu_vx_tumu_rv64-1.c | 160 -
.../riscv/rvv/base/vremu_vx_tumu_rv64-2.c | 160 -
.../riscv/rvv/base/vremu_vx_tumu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vrsub_vx_m_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vrsub_vx_m_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vrsub_vx_m_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vrsub_vx_m_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vrsub_vx_m_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vrsub_vx_m_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vrsub_vx_mu_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vrsub_vx_mu_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vrsub_vx_mu_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vrsub_vx_mu_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vrsub_vx_mu_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vrsub_vx_mu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vrsub_vx_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vrsub_vx_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vrsub_vx_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vrsub_vx_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vrsub_vx_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vrsub_vx_tu_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vrsub_vx_tu_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vrsub_vx_tu_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vrsub_vx_tu_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vrsub_vx_tu_rv64-3.c | 292 -
.../riscv/rvv/base/vrsub_vx_tum_rv32-1.c | 289 -
.../riscv/rvv/base/vrsub_vx_tum_rv32-2.c | 289 -
.../riscv/rvv/base/vrsub_vx_tum_rv32-3.c | 289 -
.../riscv/rvv/base/vrsub_vx_tum_rv64-1.c | 292 -
.../riscv/rvv/base/vrsub_vx_tum_rv64-2.c | 292 -
.../riscv/rvv/base/vrsub_vx_tum_rv64-3.c | 292 -
.../riscv/rvv/base/vrsub_vx_tumu_rv32-1.c | 289 -
.../riscv/rvv/base/vrsub_vx_tumu_rv32-2.c | 289 -
.../riscv/rvv/base/vrsub_vx_tumu_rv32-3.c | 289 -
.../riscv/rvv/base/vrsub_vx_tumu_rv64-1.c | 292 -
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.../riscv/rvv/base/vrsub_vx_tumu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsadd_vv-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsadd_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsadd_vv_m-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsadd_vv_m-2.c | 160 -
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.../gcc.target/riscv/rvv/base/vsadd_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsadd_vv_tu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsadd_vv_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsadd_vv_tum-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsadd_vv_tum-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsadd_vv_tum-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsadd_vv_tumu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsadd_vv_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsadd_vx_m_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vsadd_vx_m_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vsadd_vx_m_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsadd_vx_m_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsadd_vx_mu_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vsadd_vx_mu_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vsadd_vx_mu_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsadd_vx_mu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsadd_vx_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vsadd_vx_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsadd_vx_tu_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vsadd_vx_tu_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vsadd_vx_tu_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsadd_vx_tu_rv64-3.c | 160 -
.../riscv/rvv/base/vsadd_vx_tum_rv32-1.c | 157 -
.../riscv/rvv/base/vsadd_vx_tum_rv32-2.c | 157 -
.../riscv/rvv/base/vsadd_vx_tum_rv32-3.c | 157 -
.../riscv/rvv/base/vsadd_vx_tum_rv64-1.c | 160 -
.../riscv/rvv/base/vsadd_vx_tum_rv64-2.c | 160 -
.../riscv/rvv/base/vsadd_vx_tum_rv64-3.c | 160 -
.../riscv/rvv/base/vsadd_vx_tumu_rv32-1.c | 157 -
.../riscv/rvv/base/vsadd_vx_tumu_rv32-2.c | 157 -
.../riscv/rvv/base/vsadd_vx_tumu_rv32-3.c | 157 -
.../riscv/rvv/base/vsadd_vx_tumu_rv64-1.c | 160 -
.../riscv/rvv/base/vsadd_vx_tumu_rv64-2.c | 160 -
.../riscv/rvv/base/vsadd_vx_tumu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsaddu_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_m-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsaddu_vv_m-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_mu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_mu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_tu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_tu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_tum-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_tum-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_tum-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_tumu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_tumu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vv_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vx_m_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vsaddu_vx_m_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vsaddu_vx_m_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vsaddu_vx_m_rv64-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vx_m_rv64-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vx_m_rv64-3.c | 160 -
.../riscv/rvv/base/vsaddu_vx_mu_rv32-1.c | 157 -
.../riscv/rvv/base/vsaddu_vx_mu_rv32-2.c | 157 -
.../riscv/rvv/base/vsaddu_vx_mu_rv32-3.c | 157 -
.../riscv/rvv/base/vsaddu_vx_mu_rv64-1.c | 160 -
.../riscv/rvv/base/vsaddu_vx_mu_rv64-2.c | 160 -
.../riscv/rvv/base/vsaddu_vx_mu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vx_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vsaddu_vx_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vsaddu_vx_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vsaddu_vx_rv64-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vx_rv64-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsaddu_vx_rv64-3.c | 160 -
.../riscv/rvv/base/vsaddu_vx_tu_rv32-1.c | 157 -
.../riscv/rvv/base/vsaddu_vx_tu_rv32-2.c | 157 -
.../riscv/rvv/base/vsaddu_vx_tu_rv32-3.c | 157 -
.../riscv/rvv/base/vsaddu_vx_tu_rv64-1.c | 160 -
.../riscv/rvv/base/vsaddu_vx_tu_rv64-2.c | 160 -
.../riscv/rvv/base/vsaddu_vx_tu_rv64-3.c | 160 -
.../riscv/rvv/base/vsaddu_vx_tum_rv32-1.c | 157 -
.../riscv/rvv/base/vsaddu_vx_tum_rv32-2.c | 157 -
.../riscv/rvv/base/vsaddu_vx_tum_rv32-3.c | 157 -
.../riscv/rvv/base/vsaddu_vx_tum_rv64-1.c | 160 -
.../riscv/rvv/base/vsaddu_vx_tum_rv64-2.c | 160 -
.../riscv/rvv/base/vsaddu_vx_tum_rv64-3.c | 160 -
.../riscv/rvv/base/vsaddu_vx_tumu_rv32-1.c | 157 -
.../riscv/rvv/base/vsaddu_vx_tumu_rv32-2.c | 157 -
.../riscv/rvv/base/vsaddu_vx_tumu_rv32-3.c | 157 -
.../riscv/rvv/base/vsaddu_vx_tumu_rv64-1.c | 160 -
.../riscv/rvv/base/vsaddu_vx_tumu_rv64-2.c | 160 -
.../riscv/rvv/base/vsaddu_vx_tumu_rv64-3.c | 160 -
gcc/testsuite/gcc.target/riscv/rvv/base/vsbc-1.c | 27 -
gcc/testsuite/gcc.target/riscv/rvv/base/vsbc-2.c | 56 -
gcc/testsuite/gcc.target/riscv/rvv/base/vsbc-3.c | 77 -
gcc/testsuite/gcc.target/riscv/rvv/base/vsbc-4.c | 78 -
.../gcc.target/riscv/rvv/base/vsbc_vvm-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsbc_vvm-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsbc_vvm-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsbc_vvm_tu-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsbc_vvm_tu-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsbc_vvm_tu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsbc_vxm_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vsbc_vxm_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vsbc_vxm_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vsbc_vxm_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vsbc_vxm_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsbc_vxm_tu_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vsbc_vxm_tu_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vsbc_vxm_tu_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vsbc_vxm_tu_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsbc_vxm_tu_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsbc_vxm_tu_rv64-3.c | 292 -
gcc/testsuite/gcc.target/riscv/rvv/base/vse-1.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vse-2.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vse-3.c | 345 -
.../gcc.target/riscv/rvv/base/vse-constraint-1.c | 97 -
gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-1.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-2.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vse_m-3.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vsetvl-1.c | 750 -
.../gcc.target/riscv/rvv/base/vsext_vf2-1.c | 111 -
.../gcc.target/riscv/rvv/base/vsext_vf2-2.c | 111 -
.../gcc.target/riscv/rvv/base/vsext_vf2-3.c | 111 -
.../gcc.target/riscv/rvv/base/vsext_vf2_m-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vsext_vf2_tum-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vsext_vf2_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vsext_vf2_tumu-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vsext_vf2_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vsext_vf4-1.c | 69 -
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.../gcc.target/riscv/rvv/base/vsext_vf4_tumu-1.c | 69 -
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.../gcc.target/riscv/rvv/base/vsext_vf8-1.c | 34 -
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.../gcc.target/riscv/rvv/base/vsext_vf8-3.c | 34 -
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.../gcc.target/riscv/rvv/base/vsext_vf8_tumu-3.c | 34 -
.../gcc.target/riscv/rvv/base/vsll_vv-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vv-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vv-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vv_m-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vsll_vv_m-3.c | 292 -
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.../gcc.target/riscv/rvv/base/vsll_vv_mu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vv_tu-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vv_tu-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vv_tu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vv_tum-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vv_tum-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vv_tum-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vv_tumu-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vv_tumu-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vv_tumu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_m-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_m-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_m-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_mu-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vsll_vx_mu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_tu-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_tu-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_tu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_tum-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_tum-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_tum-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_tumu-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_tumu-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsll_vx_tumu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsmul_vv-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vv-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vv_m-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsmul_vv_m-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vsmul_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vv_tu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vv_tu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vv_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vv_tum-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vv_tum-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vv_tum-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vv_tumu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vv_tumu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vv_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vx_m_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vsmul_vx_m_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vsmul_vx_m_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vsmul_vx_m_rv64-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vx_m_rv64-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vx_m_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vx_mu_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vsmul_vx_mu_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vsmul_vx_mu_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vsmul_vx_mu_rv64-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vx_mu_rv64-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vx_mu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vx_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vsmul_vx_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vsmul_vx_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vsmul_vx_rv64-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vx_rv64-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vx_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vx_tu_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vsmul_vx_tu_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vsmul_vx_tu_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vsmul_vx_tu_rv64-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vx_tu_rv64-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsmul_vx_tu_rv64-3.c | 160 -
.../riscv/rvv/base/vsmul_vx_tum_rv32-1.c | 157 -
.../riscv/rvv/base/vsmul_vx_tum_rv32-2.c | 157 -
.../riscv/rvv/base/vsmul_vx_tum_rv32-3.c | 157 -
.../riscv/rvv/base/vsmul_vx_tum_rv64-1.c | 160 -
.../riscv/rvv/base/vsmul_vx_tum_rv64-2.c | 160 -
.../riscv/rvv/base/vsmul_vx_tum_rv64-3.c | 160 -
.../riscv/rvv/base/vsmul_vx_tumu_rv32-1.c | 157 -
.../riscv/rvv/base/vsmul_vx_tumu_rv32-2.c | 157 -
.../riscv/rvv/base/vsmul_vx_tumu_rv32-3.c | 157 -
.../riscv/rvv/base/vsmul_vx_tumu_rv64-1.c | 160 -
.../riscv/rvv/base/vsmul_vx_tumu_rv64-2.c | 160 -
.../riscv/rvv/base/vsmul_vx_tumu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsoxei16_v-1.c | 333 -
.../gcc.target/riscv/rvv/base/vsoxei16_v-2.c | 333 -
.../gcc.target/riscv/rvv/base/vsoxei16_v-3.c | 333 -
.../gcc.target/riscv/rvv/base/vsoxei16_v_m-1.c | 333 -
.../gcc.target/riscv/rvv/base/vsoxei16_v_m-2.c | 333 -
.../gcc.target/riscv/rvv/base/vsoxei16_v_m-3.c | 333 -
.../gcc.target/riscv/rvv/base/vsoxei32_v-1.c | 307 -
.../gcc.target/riscv/rvv/base/vsoxei32_v-2.c | 307 -
.../gcc.target/riscv/rvv/base/vsoxei32_v-3.c | 307 -
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.../gcc.target/riscv/rvv/base/vsoxei32_v_m-2.c | 307 -
.../gcc.target/riscv/rvv/base/vsoxei32_v_m-3.c | 307 -
.../gcc.target/riscv/rvv/base/vsoxei64_v-1.c | 262 -
.../gcc.target/riscv/rvv/base/vsoxei64_v-2.c | 262 -
.../gcc.target/riscv/rvv/base/vsoxei64_v-3.c | 262 -
.../gcc.target/riscv/rvv/base/vsoxei64_v_m-1.c | 262 -
.../gcc.target/riscv/rvv/base/vsoxei64_v_m-2.c | 262 -
.../gcc.target/riscv/rvv/base/vsoxei64_v_m-3.c | 262 -
.../gcc.target/riscv/rvv/base/vsoxei8_v-1.c | 346 -
.../gcc.target/riscv/rvv/base/vsoxei8_v-2.c | 346 -
.../gcc.target/riscv/rvv/base/vsoxei8_v-3.c | 346 -
.../gcc.target/riscv/rvv/base/vsoxei8_v_m-1.c | 346 -
.../gcc.target/riscv/rvv/base/vsoxei8_v_m-2.c | 346 -
.../gcc.target/riscv/rvv/base/vsoxei8_v_m-3.c | 346 -
.../gcc.target/riscv/rvv/base/vsra_vv-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv_m-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv_m-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv_m-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv_mu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv_mu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv_tu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsra_vv_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv_tum-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv_tum-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv_tum-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vv_tumu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsra_vv_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vsra_vx-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_m-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_m-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_m-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_mu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_mu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_tu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_tu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_tum-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_tum-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_tum-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_tumu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_tumu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsra_vx_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_m-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_m-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_m-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_mu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_mu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_tu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_tu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_tum-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_tum-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_tum-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_tumu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_tumu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vv_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_m-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_m-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_m-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_mu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_mu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_tu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_tu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_tum-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_tum-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_tum-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_tumu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_tumu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vsrl_vx_tumu-3.c | 160 -
gcc/testsuite/gcc.target/riscv/rvv/base/vsse-1.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vsse-2.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vsse-3.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vsse_m-1.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vsse_m-2.c | 345 -
gcc/testsuite/gcc.target/riscv/rvv/base/vsse_m-3.c | 345 -
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.../gcc.target/riscv/rvv/base/vssrl_vv-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssrl_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssrl_vv_m-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssrl_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssrl_vv_tu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssrl_vv_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssrl_vv_tum-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssrl_vx-1.c | 160 -
.../gcc.target/riscv/rvv/base/vssrl_vx-2.c | 160 -
.../gcc.target/riscv/rvv/base/vssrl_vx-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssrl_vx_m-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssrl_vx_tu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssrl_vx_tum-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssub_vv-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssub_vv-3.c | 160 -
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.../gcc.target/riscv/rvv/base/vssub_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssub_vv_tu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vssub_vv_tu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vssub_vv_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssub_vv_tum-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssub_vv_tumu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssub_vv_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssub_vx_m_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vssub_vx_m_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vssub_vx_m_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vssub_vx_m_rv64-1.c | 160 -
.../gcc.target/riscv/rvv/base/vssub_vx_m_rv64-2.c | 160 -
.../gcc.target/riscv/rvv/base/vssub_vx_m_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssub_vx_mu_rv32-1.c | 157 -
.../gcc.target/riscv/rvv/base/vssub_vx_mu_rv32-2.c | 157 -
.../gcc.target/riscv/rvv/base/vssub_vx_mu_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vssub_vx_mu_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssub_vx_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vssub_vx_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssub_vx_tu_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vssub_vx_tu_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vssub_vx_tu_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssub_vx_tu_rv64-3.c | 160 -
.../riscv/rvv/base/vssub_vx_tum_rv32-1.c | 157 -
.../riscv/rvv/base/vssub_vx_tum_rv32-2.c | 157 -
.../riscv/rvv/base/vssub_vx_tum_rv32-3.c | 157 -
.../riscv/rvv/base/vssub_vx_tum_rv64-1.c | 160 -
.../riscv/rvv/base/vssub_vx_tum_rv64-2.c | 160 -
.../riscv/rvv/base/vssub_vx_tum_rv64-3.c | 160 -
.../riscv/rvv/base/vssub_vx_tumu_rv32-1.c | 157 -
.../riscv/rvv/base/vssub_vx_tumu_rv32-2.c | 157 -
.../riscv/rvv/base/vssub_vx_tumu_rv32-3.c | 157 -
.../riscv/rvv/base/vssub_vx_tumu_rv64-1.c | 160 -
.../riscv/rvv/base/vssub_vx_tumu_rv64-2.c | 160 -
.../riscv/rvv/base/vssub_vx_tumu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv-1.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv-2.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv_m-1.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv_m-2.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv_m-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv_mu-1.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv_mu-2.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv_mu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv_tu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssubu_vv_tu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv_tum-1.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv_tum-2.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv_tum-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vv_tumu-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssubu_vv_tumu-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vx_m_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vssubu_vx_m_rv32-3.c | 157 -
.../gcc.target/riscv/rvv/base/vssubu_vx_m_rv64-1.c | 160 -
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.../riscv/rvv/base/vssubu_vx_mu_rv32-1.c | 157 -
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.../riscv/rvv/base/vssubu_vx_mu_rv32-3.c | 157 -
.../riscv/rvv/base/vssubu_vx_mu_rv64-1.c | 160 -
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.../riscv/rvv/base/vssubu_vx_mu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vssubu_vx_rv32-1.c | 157 -
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.../gcc.target/riscv/rvv/base/vssubu_vx_rv64-1.c | 160 -
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.../gcc.target/riscv/rvv/base/vssubu_vx_rv64-3.c | 160 -
.../riscv/rvv/base/vssubu_vx_tu_rv32-1.c | 157 -
.../riscv/rvv/base/vssubu_vx_tu_rv32-2.c | 157 -
.../riscv/rvv/base/vssubu_vx_tu_rv32-3.c | 157 -
.../riscv/rvv/base/vssubu_vx_tu_rv64-1.c | 160 -
.../riscv/rvv/base/vssubu_vx_tu_rv64-2.c | 160 -
.../riscv/rvv/base/vssubu_vx_tu_rv64-3.c | 160 -
.../riscv/rvv/base/vssubu_vx_tum_rv32-1.c | 157 -
.../riscv/rvv/base/vssubu_vx_tum_rv32-2.c | 157 -
.../riscv/rvv/base/vssubu_vx_tum_rv32-3.c | 157 -
.../riscv/rvv/base/vssubu_vx_tum_rv64-1.c | 160 -
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.../riscv/rvv/base/vssubu_vx_tum_rv64-3.c | 160 -
.../riscv/rvv/base/vssubu_vx_tumu_rv32-1.c | 157 -
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.../riscv/rvv/base/vssubu_vx_tumu_rv32-3.c | 157 -
.../riscv/rvv/base/vssubu_vx_tumu_rv64-1.c | 160 -
.../riscv/rvv/base/vssubu_vx_tumu_rv64-2.c | 160 -
.../riscv/rvv/base/vssubu_vx_tumu_rv64-3.c | 160 -
.../gcc.target/riscv/rvv/base/vsub_vv-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv_m-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vsub_vv_m-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv_mu-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv_mu-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv_mu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv_tu-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv_tu-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv_tu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv_tum-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv_tum-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv_tum-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vv_tumu-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vsub_vv_tumu-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vx_m_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vsub_vx_m_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vsub_vx_m_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vsub_vx_m_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vx_mu_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vsub_vx_mu_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vsub_vx_mu_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vsub_vx_mu_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vx_mu_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vx_mu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vx_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vsub_vx_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vsub_vx_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vsub_vx_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vx_tu_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vsub_vx_tu_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vsub_vx_tu_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vsub_vx_tu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsub_vx_tum_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vsub_vx_tum_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vsub_vx_tum_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vsub_vx_tum_rv64-3.c | 292 -
.../riscv/rvv/base/vsub_vx_tumu_rv32-1.c | 289 -
.../riscv/rvv/base/vsub_vx_tumu_rv32-2.c | 289 -
.../riscv/rvv/base/vsub_vx_tumu_rv32-3.c | 289 -
.../riscv/rvv/base/vsub_vx_tumu_rv64-1.c | 292 -
.../riscv/rvv/base/vsub_vx_tumu_rv64-2.c | 292 -
.../riscv/rvv/base/vsub_vx_tumu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vsuxei16_v-1.c | 333 -
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.../gcc.target/riscv/rvv/base/vsuxei16_v-3.c | 333 -
.../gcc.target/riscv/rvv/base/vsuxei16_v_m-1.c | 333 -
.../gcc.target/riscv/rvv/base/vsuxei16_v_m-2.c | 333 -
.../gcc.target/riscv/rvv/base/vsuxei16_v_m-3.c | 333 -
.../gcc.target/riscv/rvv/base/vsuxei32_v-1.c | 307 -
.../gcc.target/riscv/rvv/base/vsuxei32_v-2.c | 307 -
.../gcc.target/riscv/rvv/base/vsuxei32_v-3.c | 307 -
.../gcc.target/riscv/rvv/base/vsuxei32_v_m-1.c | 307 -
.../gcc.target/riscv/rvv/base/vsuxei32_v_m-2.c | 307 -
.../gcc.target/riscv/rvv/base/vsuxei32_v_m-3.c | 307 -
.../gcc.target/riscv/rvv/base/vsuxei64_v-1.c | 262 -
.../gcc.target/riscv/rvv/base/vsuxei64_v-2.c | 262 -
.../gcc.target/riscv/rvv/base/vsuxei64_v-3.c | 262 -
.../gcc.target/riscv/rvv/base/vsuxei64_v_m-1.c | 262 -
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.../gcc.target/riscv/rvv/base/vsuxei64_v_m-3.c | 262 -
.../gcc.target/riscv/rvv/base/vsuxei8_v-1.c | 346 -
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.../gcc.target/riscv/rvv/base/vsuxei8_v-3.c | 346 -
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.../gcc.target/riscv/rvv/base/vwmaccu_vv-3.c | 111 -
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.../gcc.target/riscv/rvv/base/vwmaccu_vv_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vv_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccu_vx_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmaccus_vx_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vv_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmul_vx_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vv_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulsu_vx_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vv_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwmulu_vx_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwrite_csr.c | 25 -
.../gcc.target/riscv/rvv/base/vwsub_vv-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vv_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_vx_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wv_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsub_wx_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_tu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_tu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_tu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_tum-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_tum-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_tum-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_tumu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_tumu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vv_tumu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vx-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vx-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vx-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vx_m-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vx_m-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vx_m-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vx_mu-1.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vx_mu-2.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vx_mu-3.c | 111 -
.../gcc.target/riscv/rvv/base/vwsubu_vx_tu-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vwsubu_wv_mu-3.c | 111 -
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.../gcc.target/riscv/rvv/base/vxor_vv-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vxor_vx_m_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vxor_vx_m_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vxor_vx_m_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vxor_vx_m_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vxor_vx_m_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vxor_vx_m_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vxor_vx_mu_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vxor_vx_mu_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vxor_vx_mu_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vxor_vx_mu_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vxor_vx_mu_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vxor_vx_mu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vxor_vx_rv32-1.c | 289 -
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.../gcc.target/riscv/rvv/base/vxor_vx_rv64-1.c | 292 -
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.../gcc.target/riscv/rvv/base/vxor_vx_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vxor_vx_tu_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vxor_vx_tu_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vxor_vx_tu_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vxor_vx_tu_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vxor_vx_tu_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vxor_vx_tu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vxor_vx_tum_rv32-1.c | 289 -
.../gcc.target/riscv/rvv/base/vxor_vx_tum_rv32-2.c | 289 -
.../gcc.target/riscv/rvv/base/vxor_vx_tum_rv32-3.c | 289 -
.../gcc.target/riscv/rvv/base/vxor_vx_tum_rv64-1.c | 292 -
.../gcc.target/riscv/rvv/base/vxor_vx_tum_rv64-2.c | 292 -
.../gcc.target/riscv/rvv/base/vxor_vx_tum_rv64-3.c | 292 -
.../riscv/rvv/base/vxor_vx_tumu_rv32-1.c | 289 -
.../riscv/rvv/base/vxor_vx_tumu_rv32-2.c | 289 -
.../riscv/rvv/base/vxor_vx_tumu_rv32-3.c | 289 -
.../riscv/rvv/base/vxor_vx_tumu_rv64-1.c | 292 -
.../riscv/rvv/base/vxor_vx_tumu_rv64-2.c | 292 -
.../riscv/rvv/base/vxor_vx_tumu_rv64-3.c | 292 -
.../gcc.target/riscv/rvv/base/vzext_vf2-1.c | 111 -
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.../gcc.target/riscv/rvv/base/vzext_vf2-3.c | 111 -
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.../gcc.target/riscv/rvv/base/vzext_vf4-1.c | 69 -
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.../gcc.target/riscv/rvv/base/vzext_vf8-1.c | 34 -
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.../gcc.target/riscv/rvv/base/vzext_vf8_tu-1.c | 34 -
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.../gcc.target/riscv/rvv/base/vzext_vf8_tumu-3.c | 34 -
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-1.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-10.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-11.c | 4 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-12.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-13.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-14.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-15.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-16.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-2.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-3.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-4.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-7.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-8.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_multiple-9.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-1.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-10.c | 4 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-100.c | 25 +
.../gcc.target/riscv/rvv/vsetvl/avl_single-101.c | 29 +
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.../gcc.target/riscv/rvv/vsetvl/avl_single-13.c | 4 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-14.c | 4 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-16.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-2.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-23.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-27.c | 4 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-3.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-30.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-38.c | 8 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-4.c | 2 +-
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.../gcc.target/riscv/rvv/vsetvl/avl_single-6.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-65.c | 4 +-
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.../gcc.target/riscv/rvv/vsetvl/avl_single-67.c | 8 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-68.c | 6 +-
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.../gcc.target/riscv/rvv/vsetvl/avl_single-80.c | 22 +
.../vsetvl/{avl_single-30.c => avl_single-81.c} | 16 +-
.../gcc.target/riscv/rvv/vsetvl/avl_single-82.c | 30 +
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.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-2.c | 2 +-
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.../gcc.target/riscv/rvv/vsetvl/imm_bb_prop-4.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/imm_conflict-4.c | 8 +-
.../gcc.target/riscv/rvv/vsetvl/imm_conflict-5.c | 8 +-
.../riscv/rvv/vsetvl/imm_loop_invariant-12.c | 2 +-
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.../riscv/rvv/vsetvl/imm_loop_invariant-14.c | 2 +-
.../riscv/rvv/vsetvl/imm_loop_invariant-15.c | 2 +-
.../riscv/rvv/vsetvl/imm_loop_invariant-16.c | 2 +-
.../gcc.target/riscv/rvv/vsetvl/imm_switch-5.c | 4 +-
.../gcc.target/riscv/rvv/vsetvl/imm_switch-6.c | 4 +-
.../gcc.target/riscv/rvv/vsetvl/imm_switch-7.c | 6 +-
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.../gcc.target/riscv/rvv/vsetvl/imm_switch-9.c | 6 +-
.../gcc.target/riscv/rvv/vsetvl/pr109399.c | 14 +
.../riscv/rvv/vsetvl/vlmax_back_prop-1.c | 6 +-
.../riscv/rvv/vsetvl/vlmax_back_prop-10.c | 6 +-
.../riscv/rvv/vsetvl/vlmax_back_prop-11.c | 6 +-
.../riscv/rvv/vsetvl/vlmax_back_prop-12.c | 8 +-
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.../riscv/rvv/vsetvl/vlmax_back_prop-2.c | 6 +-
.../riscv/rvv/vsetvl/vlmax_back_prop-20.c | 6 +-
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gcc/testsuite/gcc.target/riscv/xtheadba-addsl.c | 55 +
gcc/testsuite/gcc.target/riscv/xtheadba.c | 14 +
gcc/testsuite/gcc.target/riscv/xtheadbb-ext.c | 20 +
gcc/testsuite/gcc.target/riscv/xtheadbb-extu-2.c | 22 +
gcc/testsuite/gcc.target/riscv/xtheadbb-extu.c | 22 +
gcc/testsuite/gcc.target/riscv/xtheadbb-ff1.c | 18 +
gcc/testsuite/gcc.target/riscv/xtheadbb-rev.c | 45 +
gcc/testsuite/gcc.target/riscv/xtheadbb-srri.c | 25 +
gcc/testsuite/gcc.target/riscv/xtheadbb.c | 14 +
gcc/testsuite/gcc.target/riscv/xtheadbs-tst.c | 13 +
gcc/testsuite/gcc.target/riscv/xtheadbs.c | 14 +
gcc/testsuite/gcc.target/riscv/xtheadcmo.c | 14 +
.../gcc.target/riscv/xtheadcondmov-mveqz-imm-eqz.c | 38 +
.../gcc.target/riscv/xtheadcondmov-mveqz-imm-not.c | 38 +
.../gcc.target/riscv/xtheadcondmov-mveqz-reg-eqz.c | 38 +
.../gcc.target/riscv/xtheadcondmov-mveqz-reg-not.c | 38 +
.../riscv/xtheadcondmov-mvnez-imm-cond.c | 38 +
.../gcc.target/riscv/xtheadcondmov-mvnez-imm-nez.c | 38 +
.../riscv/xtheadcondmov-mvnez-reg-cond.c | 38 +
.../gcc.target/riscv/xtheadcondmov-mvnez-reg-nez.c | 38 +
gcc/testsuite/gcc.target/riscv/xtheadcondmov.c | 14 +
gcc/testsuite/gcc.target/riscv/xtheadfmemidx.c | 14 +
gcc/testsuite/gcc.target/riscv/xtheadfmv-fmv.c | 24 +
gcc/testsuite/gcc.target/riscv/xtheadfmv.c | 14 +
gcc/testsuite/gcc.target/riscv/xtheadint.c | 14 +
.../gcc.target/riscv/xtheadmac-mula-muls.c | 43 +
gcc/testsuite/gcc.target/riscv/xtheadmac.c | 14 +
gcc/testsuite/gcc.target/riscv/xtheadmemidx.c | 14 +
gcc/testsuite/gcc.target/riscv/xtheadmempair-1.c | 98 +
gcc/testsuite/gcc.target/riscv/xtheadmempair-2.c | 84 +
gcc/testsuite/gcc.target/riscv/xtheadmempair-3.c | 29 +
gcc/testsuite/gcc.target/riscv/xtheadmempair.c | 13 +
gcc/testsuite/gcc.target/riscv/xtheadsync.c | 14 +
gcc/testsuite/gcc.target/riscv/zba-shNadd-07.c | 6 +-
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gcc/testsuite/gcc.target/riscv/zbkb32.c | 36 +
gcc/testsuite/gcc.target/riscv/zbkb64.c | 28 +
gcc/testsuite/gcc.target/riscv/zbkc32.c | 17 +
gcc/testsuite/gcc.target/riscv/zbkc64.c | 17 +
gcc/testsuite/gcc.target/riscv/zbkx32.c | 18 +
gcc/testsuite/gcc.target/riscv/zbkx64.c | 18 +
gcc/testsuite/gcc.target/riscv/zknd32.c | 18 +
gcc/testsuite/gcc.target/riscv/zknd64.c | 36 +
gcc/testsuite/gcc.target/riscv/zkne32.c | 18 +
gcc/testsuite/gcc.target/riscv/zkne64.c | 30 +
gcc/testsuite/gcc.target/riscv/zknh-sha256.c | 28 +
gcc/testsuite/gcc.target/riscv/zknh-sha512-32.c | 42 +
gcc/testsuite/gcc.target/riscv/zknh-sha512-64.c | 31 +
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gcc/testsuite/gcc.target/riscv/zksh32.c | 19 +
gcc/testsuite/gcc.target/riscv/zksh64.c | 19 +
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gcc/testsuite/gcc.target/s390/s390.exp | 3 +
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.../s390/vector/partial/s390-vec-length-epil-3.c | 16 +
.../s390/vector/partial/s390-vec-length-epil-7.c | 11 +
.../vector/partial/s390-vec-length-epil-run-1.c | 7 +
.../vector/partial/s390-vec-length-epil-run-2.c | 7 +
.../vector/partial/s390-vec-length-epil-run-3.c | 7 +
.../vector/partial/s390-vec-length-epil-run-7.c | 7 +
.../s390/vector/partial/s390-vec-length-full-1.c | 12 +
.../s390/vector/partial/s390-vec-length-full-2.c | 12 +
.../s390/vector/partial/s390-vec-length-full-3.c | 13 +
.../s390/vector/partial/s390-vec-length-full-7.c | 14 +
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gcc/testsuite/gcc.target/sparc/20230328-1.c | 19 +
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gcc/testsuite/gcc.target/sparc/20230328-3.c | 19 +
gcc/testsuite/gcc.target/sparc/20230328-4.c | 19 +
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gcc/testsuite/gcc.target/xtensa/pr108919.c | 46 +
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gcc/testsuite/gdc.dg/simd2i.d | 17 +-
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gcc/testsuite/gdc.dg/torture/pr109144.d | 9 +
gcc/testsuite/gdc.dg/{ => torture}/simd23084.d | 1 -
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gcc/testsuite/gdc.dg/torture/simd23218.d | 15 +
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gcc/testsuite/gdc.test/compilable/ice13920.d | 5 -
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gcc/testsuite/gdc.test/compilable/test6777.d | 11 -
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gcc/testsuite/gdc.test/fail_compilation/fail233.d | 12 -
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gcc/testsuite/gdc.test/runnable/e7804.d | 2 -
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gcc/testsuite/gdc.test/runnable/test16098.d | 73 +
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gcc/testsuite/gdc.test/runnable/traits.d | 38 -
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gcc/testsuite/gdc.test/runnable/xtest46_gc.d | 4 +
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gcc/testsuite/gfortran.dg/finalize_38.f90 | 222 +
gcc/testsuite/gfortran.dg/finalize_38a.f90 | 240 +
gcc/testsuite/gfortran.dg/finalize_39.f90 | 71 +
gcc/testsuite/gfortran.dg/finalize_40.f90 | 44 +
gcc/testsuite/gfortran.dg/finalize_41.f90 | 139 +
gcc/testsuite/gfortran.dg/finalize_42.f90 | 53 +
gcc/testsuite/gfortran.dg/finalize_43.f90 | 41 +
gcc/testsuite/gfortran.dg/finalize_44.f90 | 123 +
gcc/testsuite/gfortran.dg/finalize_45.f90 | 132 +
gcc/testsuite/gfortran.dg/finalize_46.f90 | 92 +
gcc/testsuite/gfortran.dg/finalize_47.f90 | 105 +
gcc/testsuite/gfortran.dg/finalize_48.f90 | 59 +
gcc/testsuite/gfortran.dg/finalize_49.f90 | 67 +
gcc/testsuite/gfortran.dg/finalize_50.f90 | 254 +
gcc/testsuite/gfortran.dg/finalize_51.f90 | 70 +
gcc/testsuite/gfortran.dg/gomp/map-9.f90 | 13 +
gcc/testsuite/gfortran.dg/ibits_2.f90 | 32 +
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gcc/testsuite/gfortran.dg/nearest_6.f90 | 26 +
gcc/testsuite/gfortran.dg/pr103628.f90 | 14 +
gcc/testsuite/gfortran.dg/pr104349.f90 | 8 +
gcc/testsuite/gfortran.dg/pr104572.f90 | 14 +
gcc/testsuite/gfortran.dg/pr106945.f90 | 11 +
gcc/testsuite/gfortran.dg/pr109209.f90 | 80 +
gcc/testsuite/gfortran.dg/pr109265.f90 | 39 +
gcc/testsuite/gfortran.dg/pr85877.f90 | 25 +
gcc/testsuite/gfortran.dg/pr96024.f90 | 11 +
gcc/testsuite/gfortran.dg/pr96025.f90 | 11 +
gcc/testsuite/gfortran.dg/pr99036.f90 | 9 +
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gcc/testsuite/gfortran.dg/vect/pr108979.f90 | 21 +
gcc/testsuite/gfortran.dg/weak-2.f90 | 28 +
gcc/testsuite/gfortran.dg/weak-3.f90 | 30 +
gcc/testsuite/gm2/complex/pass/arith3.mod | 2 +-
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gcc/testsuite/gm2/complex/run/pass/arith4.mod | 2 +-
gcc/testsuite/gm2/complex/run/pass/arith5.mod | 2 +-
.../callingC/pass/examples-callingC-pass.exp | 2 +-
.../run/pass/examples-callingC-run-pass.exp | 2 +-
.../gm2/examples/cpp/pass/examples-cpp-pass.exp | 2 +-
.../examples/cppDef/pass/examples-cppDef-pass.exp | 2 +-
.../examples/hello/pass/examples-hello-pass.exp | 2 +-
.../gm2/examples/map/pass/examples-map-pass.exp | 2 +-
.../gm2/iso/check/fail/iso-check-fail.exp | 2 +-
.../pass/iso-extended-opaque-pass.exp} | 3 +-
.../gm2/iso/extended-opaque/pass/stressset.def | 6 +
.../gm2/iso/extended-opaque/pass/stressset.mod | 18 +
.../gm2/iso/extended-opaque/pass/testset.mod | 8 +
gcc/testsuite/gm2/isolib/run/pass/real2.mod | 2 +-
gcc/testsuite/gm2/isolib/run/pass/real3.mod | 2 +-
gcc/testsuite/gm2/isolib/run/pass/realconv.mod | 2 +-
gcc/testsuite/gm2/isolib/run/pass/realconv2.mod | 2 +-
.../pass/link-externalscaffold-pass.exp | 2 +-
.../gm2/link/externalscaffold/pass/scaffold.c | 26 +-
.../hello.mod => link/nondefaultext/pass/hello.md} | 2 +
gcc/testsuite/gm2/link/nondefaultext/pass/liba.dm | 8 +
gcc/testsuite/gm2/link/nondefaultext/pass/liba.md | 6 +
.../pass/link-nondefaultext-pass.exp} | 11 +-
gcc/testsuite/gm2/pim/fail/largeconst.mod | 7 +
gcc/testsuite/gm2/pim/fail/setunknown.mod | 8 +
gcc/testsuite/gm2/pim/fail/setunknown2.mod | 5 +
gcc/testsuite/gm2/pim/pass/testshort.mod | 2 +-
gcc/testsuite/gm2/pimlib/base/run/pass/FIO.mod | 181 +-
gcc/testsuite/gm2/pimlib/base/run/pass/StrLib.mod | 99 +-
.../pimlib/base/run/pass/pimlib-base-run-pass.exp | 2 +-
gcc/testsuite/gm2/pimlib/run/pass/limittests.mod | 5 +-
.../run/pass/iso-extended-opaque-run-pass.exp} | 16 +-
.../gm2/projects/iso/small/run/pass/stressset.def | 6 +
.../gm2/projects/iso/small/run/pass/stressset.mod | 18 +
.../gm2/projects/iso/small/run/pass/test1.mod | 9 +
.../gm2/projects/iso/small/run/pass/testlib.def | 16 +
.../gm2/projects/iso/small/run/pass/testlib.mod | 21 +
.../gm2/projects/iso/small/run/pass/testset.mod | 8 +
.../pass/random/projects-pim-run-pass-random.exp | 2 +-
.../gm2/projects/pim/run/pass/tower/AdvCmd.def | 10 +
.../gm2/projects/pim/run/pass/tower/AdvCmd.mod | 294 +
.../pim/run/pass/tower/AdvIntroduction.def | 7 +
.../pim/run/pass/tower/AdvIntroduction.mod | 275 +
.../pim/run/pass/tower}/AdvMap.def | 56 +-
.../gm2/projects/pim/run/pass/tower/AdvMap.mod | 57 +
.../gm2/projects/pim/run/pass/tower/AdvMath.def | 120 +
.../gm2/projects/pim/run/pass/tower/AdvMath.mod | 220 +
.../gm2/projects/pim/run/pass/tower/AdvParse.bnf | 379 +
.../gm2/projects/pim/run/pass/tower/AdvParse.def | 18 +
.../gm2/projects/pim/run/pass/tower/AdvParse.mod | 873 +
.../gm2/projects/pim/run/pass/tower/AdvSound.def | 70 +
.../gm2/projects/pim/run/pass/tower/AdvSound.mod | 143 +
.../gm2/projects/pim/run/pass/tower/AdvSystem.def | 189 +
.../gm2/projects/pim/run/pass/tower/AdvSystem.mod | 574 +
.../projects/pim/run/pass/tower/AdvTreasure.def | 22 +
.../projects/pim/run/pass/tower/AdvTreasure.mod | 1632 ++
.../gm2/projects/pim/run/pass/tower/AdvUtil.def | 57 +
.../gm2/projects/pim/run/pass/tower/AdvUtil.mod | 1573 +
.../gm2/projects/pim/run/pass/tower/DrawG.def | 36 +
.../gm2/projects/pim/run/pass/tower/DrawG.mod | 327 +
.../gm2/projects/pim/run/pass/tower/DrawL.def | 23 +
.../gm2/projects/pim/run/pass/tower/DrawL.mod | 422 +
.../gm2/projects/pim/run/pass/tower/Dungeon.mod | 34 +
.../gm2/projects/pim/run/pass/tower/Lock.def | 27 +
.../gm2/projects/pim/run/pass/tower/Lock.mod | 75 +
.../gm2/projects/pim/run/pass/tower/ProcArgs.def | 15 +
.../gm2/projects/pim/run/pass/tower/ProcArgs.mod | 58 +
.../gm2/projects/pim/run/pass/tower/Screen.def | 55 +
.../gm2/projects/pim/run/pass/tower/Screen.mod | 303 +
.../projects/pim/run/pass/tower/SocketControl.c | 27 +
.../projects/pim/run/pass/tower/SocketControl.def | 6 +
.../gm2/projects/pim/run/pass/tower/Window.def | 16 +
.../gm2/projects/pim/run/pass/tower/Window.mod | 62 +
.../gm2/projects/pim/run/pass/tower/adv.flex | 266 +
.../projects/pim/run/pass/tower/advflex.c} | 523 +-
.../gm2/projects/pim/run/pass/tower/advflex.def | 32 +
.../run/pass/tower/projects-pim-run-pass-tower.exp | 119 +
gcc/testsuite/gm2/projects/pim/run/pass/tower/star | 71 +
.../auto-init/fail/switches-auto-init-fail.exp | 2 +-
.../pim2/fail/switches-check-all-pim2-fail.exp | 2 +-
.../makeall/fail/switches-makeall-fail.exp | 2 +-
.../makeall/pass/switches-makeall-pass.exp | 1 -
gcc/testsuite/gm2/types/run/pass/d.c | 7 +-
.../gm2/warnings/returntype/pass/Termbase.mod | 10 +-
.../warnings/returntype/pass/keypressedsimple.mod | 2 +-
gcc/testsuite/gnat.dg/div_zero.adb | 2 +-
gcc/testsuite/gnat.dg/opt39.adb | 2 +-
gcc/testsuite/gnat.dg/prot7.adb | 1 +
gcc/testsuite/gnat.dg/specs/opt6.ads | 69 +
gcc/testsuite/jit.dg/test-error-array-bounds.c | 2 +-
gcc/testsuite/lib/gm2-simple.exp | 9 +-
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.../testsuite/26_numerics/valarray/mask-7_neg.cc | 18 +
.../testsuite/26_numerics/valarray/mask-8_neg.cc | 18 +
.../testsuite/26_numerics/valarray/mask.cc | 47 +
.../27_io/basic_ofstream/open/char/noreplace.cc | 2 +-
.../27_io/basic_ofstream/open/wchar_t/noreplace.cc | 2 +-
.../28_regex/match_results/ctors/char/alloc.cc | 56 +
.../testsuite/28_regex/sub_match/lwg3204.cc | 38 +
.../atomic/operators/pointer_partial_void.cc | 1 +
libstdc++-v3/testsuite/30_threads/async/async.cc | 17 +-
.../30_threads/stop_token/stop_source/109339.cc | 10 +
.../experimental/net/internet/address/v4/cons.cc | 37 +-
.../net/internet/address/v4/creation.cc | 28 +-
.../net/internet/address/v4/members.cc | 14 +
.../experimental/net/internet/endpoint/cons.cc | 79 +
.../net/internet/endpoint/extensible.cc | 47 +
.../experimental/net/internet/network/v4/cons.cc | 134 +
.../net/internet/network/v4/members.cc | 190 +
.../experimental/net/timer/waitable/dest.cc | 2 +-
.../testsuite/experimental/simd/tests/operators.cc | 9 +-
.../experimental/simd/tests/reductions.cc | 3 +-
libstdc++-v3/testsuite/lib/libstdc++.exp | 1 +
.../testsuite/libstdc++-prettyprinters/80276.cc | 5 +
.../libstdc++-prettyprinters/libfundts.cc | 6 +
.../testsuite/libstdc++-xmethods/shared_ptr.cc | 7 +
.../testsuite/std/format/arguments/lwg3810.cc | 2 +-
.../testsuite/std/format/formatter/requirements.cc | 9 +
.../testsuite/std/format/functions/format.cc | 15 +
.../testsuite/std/ranges/adaptors/chunk_by/1.cc | 8 +
.../testsuite/std/ranges/adaptors/lwg3715.cc | 33 +
.../testsuite/std/ranges/cartesian_product/1.cc | 33 +
.../testsuite/std/ranges/iota/iota_view.cc | 10 +
libstdc++-v3/testsuite/std/ranges/istream_view.cc | 12 +
libstdc++-v3/testsuite/std/ranges/repeat/1.cc | 8 +
libstdc++-v3/testsuite/std/ranges/single_view.cc | 13 +
.../testsuite/std/time/time_zone/get_info_local.cc | 4 +-
libstdc++-v3/testsuite/std/time/tzdb/1.cc | 22 +-
maintainer-scripts/ChangeLog | 19 +
maintainer-scripts/update_web_docs_git | 15 +-
8811 files changed, 427988 insertions(+), 1536496 deletions(-)
create mode 100644 contrib/unicode/NameAliases.txt
create mode 100644 gcc/config/i386/sym-mingw32.cc
create mode 100644 gcc/config/i386/utf8-mingw32.rc
create mode 100644 gcc/config/i386/winnt-utf8.manifest
create mode 100644 gcc/config/i386/x-mingw32-utf8
create mode 100644 gcc/config/riscv/crypto.md
create mode 100644 gcc/config/riscv/genrvv-type-indexer.cc
create mode 100644 gcc/config/riscv/riscv-scalar-crypto.def
create mode 100644 gcc/config/riscv/riscv-vsetvl.def
create mode 100644 gcc/config/riscv/thead.cc
create mode 100644 gcc/config/riscv/thead.md
rename gcc/config/xtensa/{xtensa-dynconfig.c => xtensa-dynconfig.cc} (78%)
create mode 100644 gcc/d/dmd/errorsink.d
create mode 100644 gcc/d/dmd/location.d
rename gcc/m2/gm2-compiler/{DynamicStringPath.def => DynamicPath.def} (73%)
rename gcc/m2/gm2-compiler/{DynamicStringPath.mod => DynamicPath.mod} (72%)
create mode 100644 gcc/m2/gm2-compiler/PathName.def
create mode 100644 gcc/m2/gm2-compiler/PathName.mod
delete mode 100644 gcc/m2/gm2-libs-coroutines/Debug.def
delete mode 100644 gcc/m2/gm2-libs-coroutines/Debug.mod
delete mode 100644 gcc/m2/gm2-libs-iso/wrapsock.c
delete mode 100644 gcc/m2/gm2-libs-iso/wraptime.c
delete mode 100644 gcc/m2/gm2-libs/M2LINK.def
rename gcc/m2/mc-boot-ch/{GBuiltins.c => GBuiltins.cc} (94%)
delete mode 100644 gcc/m2/mc-boot-ch/GRTco.c
rename gcc/m2/mc-boot-ch/{Gdtoa.c => Gdtoa.cc} (98%)
rename gcc/m2/{pge-boot/Gerrno.c => mc-boot-ch/Gerrno.cc} (92%)
rename gcc/m2/mc-boot-ch/{Gldtoa.c => Gldtoa.cc} (97%)
copy gcc/m2/{gm2-libs-ch/m2rts.h => mc-boot-ch/Gm2rtsdummy.cc} (63%)
rename gcc/m2/mc-boot/{GASCII.c => GASCII.cc} (99%)
rename gcc/m2/{pge-boot/GArgs.c => mc-boot/GArgs.cc} (89%)
rename gcc/m2/{pge-boot/GAssertion.c => mc-boot/GAssertion.cc} (86%)
rename gcc/m2/mc-boot/{GBreak.c => GBreak.cc} (98%)
rename gcc/m2/mc-boot/{GCmdArgs.c => GCmdArgs.cc} (91%)
rename gcc/m2/{pge-boot/GDebug.c => mc-boot/GDebug.cc} (84%)
rename gcc/m2/{pge-boot/GDynamicStrings.c => mc-boot/GDynamicStrings.cc} (95%)
rename gcc/m2/mc-boot/{GEnvironment.c => GEnvironment.cc} (88%)
rename gcc/m2/{pge-boot/GFIO.c => mc-boot/GFIO.cc} (94%)
rename gcc/m2/mc-boot/{GFormatStrings.c => GFormatStrings.cc} (98%)
rename gcc/m2/mc-boot/{GFpuIO.c => GFpuIO.cc} (98%)
rename gcc/m2/{pge-boot/GIO.c => mc-boot/GIO.cc} (78%)
rename gcc/m2/mc-boot/{GIndexing.c => GIndexing.cc} (96%)
rename gcc/m2/{pge-boot/GM2Dependent.c => mc-boot/GM2Dependent.cc} (62%)
rename gcc/m2/{pge-boot/GM2EXCEPTION.c => mc-boot/GM2EXCEPTION.cc} (92%)
rename gcc/m2/mc-boot/{GM2RTS.c => GM2RTS.cc} (92%)
rename gcc/m2/mc-boot/{GMemUtils.c => GMemUtils.cc} (99%)
rename gcc/m2/{pge-boot/GNumberIO.c => mc-boot/GNumberIO.cc} (94%)
rename gcc/m2/{pge-boot/GPushBackInput.c => mc-boot/GPushBackInput.cc} (92%)
rename gcc/m2/{pge-boot/GRTExceptions.c => mc-boot/GRTExceptions.cc} (93%)
rename gcc/m2/mc-boot/{GRTint.c => GRTint.cc} (62%)
rename gcc/m2/mc-boot/{GSArgs.c => GSArgs.cc} (94%)
rename gcc/m2/{pge-boot/GSFIO.c => mc-boot/GSFIO.cc} (94%)
rename gcc/m2/mc-boot/{GStdIO.c => GStdIO.cc} (99%)
rename gcc/m2/{pge-boot/GStorage.c => mc-boot/GStorage.cc} (87%)
rename gcc/m2/mc-boot/{GStrCase.c => GStrCase.cc} (99%)
rename gcc/m2/{pge-boot/GStrIO.c => mc-boot/GStrIO.cc} (95%)
rename gcc/m2/{pge-boot/GStrLib.c => mc-boot/GStrLib.cc} (88%)
rename gcc/m2/mc-boot/{GStringConvert.c => GStringConvert.cc} (93%)
rename gcc/m2/{pge-boot/GSysStorage.c => mc-boot/GSysStorage.cc} (88%)
rename gcc/m2/mc-boot/{GTimeString.c => GTimeString.cc} (99%)
rename gcc/m2/mc-boot/{Galists.c => Galists.cc} (97%)
rename gcc/m2/mc-boot/{Gdecl.c => Gdecl.cc} (95%)
rename gcc/m2/mc-boot/{Gkeyc.c => Gkeyc.cc} (88%)
rename gcc/m2/mc-boot/{Glists.c => Glists.cc} (97%)
rename gcc/m2/mc-boot/{GmcComment.c => GmcComment.cc} (92%)
rename gcc/m2/mc-boot/{GmcComp.c => GmcComp.cc} (92%)
rename gcc/m2/mc-boot/{GmcDebug.c => GmcDebug.cc} (95%)
rename gcc/m2/mc-boot/{GmcError.c => GmcError.cc} (97%)
rename gcc/m2/mc-boot/{GmcFileName.c => GmcFileName.cc} (99%)
rename gcc/m2/mc-boot/{GmcLexBuf.c => GmcLexBuf.cc} (98%)
rename gcc/m2/mc-boot/{GmcMetaError.c => GmcMetaError.cc} (97%)
rename gcc/m2/mc-boot/{GmcOptions.c => GmcOptions.cc} (85%)
rename gcc/m2/mc-boot/{GmcPreprocess.c => GmcPreprocess.cc} (99%)
rename gcc/m2/mc-boot/{GmcPretty.c => GmcPretty.cc} (96%)
rename gcc/m2/mc-boot/{GmcPrintf.c => GmcPrintf.cc} (98%)
rename gcc/m2/mc-boot/{GmcQuiet.c => GmcQuiet.cc} (99%)
rename gcc/m2/mc-boot/{GmcReserved.c => GmcReserved.cc} (99%)
rename gcc/m2/mc-boot/{GmcSearch.c => GmcSearch.cc} (93%)
rename gcc/m2/mc-boot/{GmcStack.c => GmcStack.cc} (99%)
rename gcc/m2/mc-boot/{GmcStream.c => GmcStream.cc} (98%)
rename gcc/m2/mc-boot/{Gmcp1.c => Gmcp1.cc} (99%)
rename gcc/m2/mc-boot/{Gmcp2.c => Gmcp2.cc} (99%)
rename gcc/m2/mc-boot/{Gmcp3.c => Gmcp3.cc} (99%)
rename gcc/m2/mc-boot/{Gmcp4.c => Gmcp4.cc} (99%)
rename gcc/m2/mc-boot/{Gmcp5.c => Gmcp5.cc} (99%)
rename gcc/m2/mc-boot/{GnameKey.c => GnameKey.cc} (97%)
delete mode 100644 gcc/m2/mc-boot/Gpth.h
rename gcc/m2/mc-boot/{GsymbolKey.c => GsymbolKey.cc} (92%)
rename gcc/m2/mc-boot/{Gtop.c => Gtop.cc} (99%)
rename gcc/m2/mc-boot/{Gvarargs.c => Gvarargs.cc} (99%)
rename gcc/m2/mc-boot/{Gwlists.c => Gwlists.cc} (97%)
rename gcc/m2/pge-boot/{GASCII.c => GASCII.cc} (95%)
rename gcc/m2/{mc-boot/GArgs.c => pge-boot/GArgs.cc} (98%)
rename gcc/m2/{mc-boot/GAssertion.c => pge-boot/GAssertion.cc} (98%)
rename gcc/m2/pge-boot/{GBuiltins.c => GBuiltins.cc} (100%)
rename gcc/m2/{mc-boot/GDebug.c => pge-boot/GDebug.cc} (99%)
rename gcc/m2/{mc-boot/GDynamicStrings.c => pge-boot/GDynamicStrings.cc} (99%)
rename gcc/m2/{mc-boot/GFIO.c => pge-boot/GFIO.cc} (99%)
rename gcc/m2/{mc-boot/GIO.c => pge-boot/GIO.cc} (99%)
rename gcc/m2/pge-boot/{GIndexing.c => GIndexing.cc} (98%)
rename gcc/m2/pge-boot/{GLists.c => GLists.cc} (98%)
rename gcc/m2/{mc-boot/GM2Dependent.c => pge-boot/GM2Dependent.cc} (66%)
rename gcc/m2/{mc-boot/GM2EXCEPTION.c => pge-boot/GM2EXCEPTION.cc} (98%)
rename gcc/m2/pge-boot/{GM2LINK.c => GM2LINK.cc} (100%)
rename gcc/m2/pge-boot/{GM2RTS.c => GM2RTS.cc} (95%)
rename gcc/m2/pge-boot/{GNameKey.c => GNameKey.cc} (99%)
rename gcc/m2/{mc-boot/GNumberIO.c => pge-boot/GNumberIO.cc} (99%)
rename gcc/m2/pge-boot/{GOutput.c => GOutput.cc} (98%)
rename gcc/m2/{mc-boot/GPushBackInput.c => pge-boot/GPushBackInput.cc} (99%)
rename gcc/m2/{mc-boot/GRTExceptions.c => pge-boot/GRTExceptions.cc} (99%)
rename gcc/m2/pge-boot/{GRTco.c => GRTco.cc} (100%)
rename gcc/m2/{mc-boot/GSFIO.c => pge-boot/GSFIO.cc} (99%)
rename gcc/m2/pge-boot/{GSYSTEM.c => GSYSTEM.cc} (100%)
rename gcc/m2/pge-boot/{GSelective.c => GSelective.cc} (100%)
rename gcc/m2/pge-boot/{GStdIO.c => GStdIO.cc} (97%)
rename gcc/m2/{mc-boot/GStorage.c => pge-boot/GStorage.cc} (98%)
rename gcc/m2/pge-boot/{GStrCase.c => GStrCase.cc} (97%)
rename gcc/m2/{mc-boot/GStrIO.c => pge-boot/GStrIO.cc} (99%)
rename gcc/m2/{mc-boot/GStrLib.c => pge-boot/GStrLib.cc} (99%)
rename gcc/m2/pge-boot/{GSymbolKey.c => GSymbolKey.cc} (99%)
rename gcc/m2/pge-boot/{GSysExceptions.c => GSysExceptions.cc} (99%)
rename gcc/m2/{mc-boot/GSysStorage.c => pge-boot/GSysStorage.cc} (99%)
rename gcc/m2/pge-boot/{Gabort.c => Gabort.cc} (100%)
rename gcc/m2/pge-boot/{Gbnflex.c => Gbnflex.cc} (99%)
rename gcc/m2/pge-boot/{Gcbuiltin.c => Gcbuiltin.cc} (100%)
rename gcc/m2/pge-boot/{Gdtoa.c => Gdtoa.cc} (100%)
rename gcc/m2/{mc-boot-ch/Gerrno.c => pge-boot/Gerrno.cc} (100%)
rename gcc/m2/pge-boot/{Gldtoa.c => Gldtoa.cc} (100%)
rename gcc/m2/pge-boot/{Glibc.c => Glibc.cc} (81%)
rename gcc/m2/pge-boot/{Glibm.c => Glibm.cc} (100%)
rename gcc/m2/pge-boot/{Gmcrts.c => Gmcrts.cc} (100%)
rename gcc/m2/pge-boot/{Gpge.c => Gpge.cc} (99%)
rename gcc/m2/pge-boot/{Gwrapc.c => Gwrapc.cc} (100%)
rename gcc/m2/pge-boot/{main.c => main.cc} (52%)
rename gcc/m2/pge-boot/{network.c => network.cc} (100%)
rename gcc/m2/target-independent/{ => m2}/Builtins.texi (98%)
rename gcc/m2/target-independent/{ => m2}/SYSTEM-iso.texi (99%)
rename gcc/m2/target-independent/{ => m2}/SYSTEM-pim.texi (99%)
create mode 100644 gcc/m2/target-independent/m2/gm2-ebnf.texi
rename gcc/m2/target-independent/{ => m2}/gm2-libs.texi (97%)
copy gcc/{doc/include/gpl_v3.texi => m2/target-independent/m2/gpl_v3_without_node. [...]
create mode 100644 gcc/testsuite/c-c++-common/Wsign-compare-2.c
create mode 100644 gcc/testsuite/c-c++-common/Wunused-var-18.c
create mode 100644 gcc/testsuite/c-c++-common/Wxor-used-as-pow-pr107002-0.c
create mode 100644 gcc/testsuite/c-c++-common/Wxor-used-as-pow-pr107002-1.c
create mode 100644 gcc/testsuite/c-c++-common/Wxor-used-as-pow-pr107002-2.c
create mode 100644 gcc/testsuite/c-c++-common/cold-2.c
create mode 100644 gcc/testsuite/c-c++-common/cpp/pr67046.c
create mode 100644 gcc/testsuite/c-c++-common/diagnostic-format-sarif-file-Wbidi-chars.c
create mode 100644 gcc/testsuite/c-c++-common/diagnostic-format-sarif-file-bad-utf [...]
create mode 100644 gcc/testsuite/c-c++-common/diagnostic-format-sarif-file-bad-utf [...]
create mode 100644 gcc/testsuite/c-c++-common/diagnostic-format-sarif-file-bad-utf [...]
create mode 100644 gcc/testsuite/c-c++-common/diagnostic-format-sarif-file-valid-CP850.c
create mode 100644 gcc/testsuite/c-c++-common/gomp/doacross-8.c
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create mode 100644 gcc/testsuite/c-c++-common/pr106133.c
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create mode 100644 gcc/testsuite/g++.dg/cpp2a/concepts-recursive-sat5.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/constexpr-inst2.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/is-constant-evaluated14.C
create mode 100644 gcc/testsuite/g++.dg/cpp2a/lambda-generic11.C
create mode 100644 gcc/testsuite/g++.dg/debug/dwarf2/pr108716.C
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create mode 100644 gcc/testsuite/g++.dg/eh/dtor4.C
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create mode 100644 gcc/testsuite/g++.dg/ext/is_deducible1.C
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create mode 100644 gcc/testsuite/g++.dg/gomp/pr106124.C
create mode 100644 gcc/testsuite/g++.dg/gomp/pr107558.C
create mode 100644 gcc/testsuite/g++.dg/ipa/pr106258.C
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create mode 100644 gcc/testsuite/g++.dg/lookup/friend24.C
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create mode 100644 gcc/testsuite/g++.dg/lookup/this2.C
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create mode 100644 gcc/testsuite/g++.dg/template/partial-order3.C
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled_lto_lean updated (459c1cad12 -> 8ac211f4f6)
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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_bootstrap/master-aarch64-bootstrap_profiled_lto_lean
in repository toolchain/ci/base-artifacts.
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04-build_abe-binutils/console.log.xz | Bin 35144 -> 34952 bytes
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06-check_regression/console.log.xz | Bin 2628 -> 2648 bytes
07-update_baseline/console.log | 38 ++++++++++-----------
dashboard/dashboard-generate.sh | 2 +-
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_check_bootstrap/master-arm-check_bootstrap updated (83fb0e5c15 -> 1fbe8dde8e)
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Summary of changes:
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38 files changed, 7984 insertions(+), 7055 deletions(-)
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[toolchain/ci/base-artifacts] branch linaro-local/ci/tcwg_gcc_bootstrap/master-arm-bootstrap_profiled updated (49aa1c92a4 -> eaab4cb636)
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new 6a8175d017 182: onsuccess: #19: 2: Success after binutils/gcc: 57 commits
new 9e9e037801 183: onsuccess: #20: 2: Success after binutils/gcc: 15 commits
new 0a45002ced 184: onsuccess: #21: 2: Success after binutils/gcc: 12 commits
new 8233231fee 185: onsuccess: #22: 2: Success after binutils/gcc: 59 commits
new 77f42ab01b 186: onsuccess: #23: 2: Success after binutils/gcc: 43 commits
new 757d527926 187: onsuccess: #24: 2: Success after binutils/gcc: 40 commits
new 062d4b9ab4 188: onsuccess: #25: 2: Success after binutils/gcc: 36 commits
new 8a0ed6b1d0 189: onsuccess: #26: 2: Success after binutils/gcc: 41 commits
new fed4bf7b5c 190: onsuccess: #27: 2: Success after binutils/gcc: 30 commits
new cd92501854 191: onsuccess: #28: 2: Success after binutils/gcc: 16 commits
new dfda2998db 192: onsuccess: #29: 2: Success after binutils/gcc: 32 commits
new 806693ceb3 193: onsuccess: #30: 2: Success after binutils/gcc: 43 commits
new c6d3ed98e2 194: onsuccess: #31: 2: Success after binutils/gcc: 36 commits
new 1ac8ba854c 195: onsuccess: #32: 2: Success after binutils/gcc: 28 commits
new 388e5e1c95 196: onsuccess: #33: 2: Success after binutils/gcc: 32 commits
new 63a5a4ce71 197: onsuccess: #34: 2: Success after binutils/gcc: 3 commits
new 4e2dc026f3 198: onsuccess: #35: 2: Success after binutils/gcc: 12 commits
new d0f5c1054f 199: onsuccess: #37: 2: [TCWG CI] Success after binutils/gcc [...]
new 1ad4b79595 200: onsuccess: #38: 2: [TCWG CI] Success after binutils/gcc [...]
new 65b5ce7875 201: onsuccess: #39: 2: [TCWG CI] Success after binutils/gcc [...]
new 8ee6472cfb 202: onsuccess: #40: 2: [TCWG CI] Success after binutils/gcc [...]
new d5c3f10894 203: onsuccess: #41: 2: [TCWG CI] Success after binutils/gcc [...]
new bd3c3faa7a 204: onsuccess: #42: 2: [TCWG CI] Success after binutils/gcc [...]
new 7d8fa70ea2 205: onsuccess: #43: 2: [TCWG CI] Success after binutils/gcc [...]
new 2cbad00872 206: onsuccess: #44: 2: [TCWG CI] Success after binutils/gcc [...]
new 5bf9734a5a 207: onsuccess: #45: 2: [TCWG CI] Success after binutils/gcc [...]
new b603016fd2 208: onsuccess: #47: 2: [TCWG CI] Success after binutils/gcc [...]
new c1f019b375 209: onsuccess: #48: 2: [TCWG CI] Success after binutils/gcc [...]
new 8a020b60cb 210: onsuccess: #49: 2: [TCWG CI] Success after binutils/gcc [...]
new eaab4cb636 211: onsuccess: #50: 2: [TCWG CI] Success after binutils/gcc [...]
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N -- N -- N refs/heads/linaro-local/ci/tcwg_gcc_bootstrap/master-arm [...]
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Summary of changes:
01-reset_artifacts/console.log.xz | Bin 1932 -> 1908 bytes
02-prepare_abe/console.log.xz | Bin 2500 -> 2536 bytes
04-build_abe-binutils/console.log.xz | Bin 49236 -> 48840 bytes
05-build_abe-bootstrap_profiled/console.log.xz | Bin 602400 -> 598552 bytes
06-check_regression/console.log.xz | Bin 2620 -> 2612 bytes
07-update_baseline/console.log | 66 ++++++++++++-------------
dashboard/dashboard-generate.sh | 2 +-
git/binutils_rev | 2 +-
git/gcc_rev | 2 +-
mail/changes-list-long.txt | 11 ++---
mail/changes-list-short.txt | 2 +-
mail/last_good.sh | 18 +++----
manifest.sh | 20 ++++----
13 files changed, 61 insertions(+), 62 deletions(-)
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