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unknown user pushed a change to branch master
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from 4d80863d7f9 check undefine_p for one more vr
new 38048fc501b RISC-V: Fix SUBREG move of VLS mode[PR111486]
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Summary of changes:
gcc/config/riscv/riscv.cc | 3 ++-
gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111486.c | 11 +++++++++++
2 files changed, 13 insertions(+), 1 deletion(-)
create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/autovec/pr111486.c
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tcwg-buildslave pushed a change to branch linaro-local/v1.0_to_v1.1-840/tcwg_gnu_native_check_gdb/master-arm
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tcwg-buildslave pushed a change to branch linaro-local/v0.0_to_v0.1-82/tcwg_bmk-code_vect-cpu2017rate/gnu-arm-master-O3
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