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unknown user pushed a change to branch master
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from 66346b6d800 tree-optimization/121059 - record loop mask when required
new 0eee2dd2865 amdgcn: Don't clobber VCC if we don't need to
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gcc/config/gcn/gcn-valu.md | 23 ++++++++++-------------
gcc/config/gcn/gcn.md | 28 +++++++++++-----------------
2 files changed, 21 insertions(+), 30 deletions(-)
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unknown user pushed a change to branch releases/gcc-15
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from 0588de08620 [committed] [PR rtl-optimization/120242] Fix SUBREG_PROMOTE [...]
new 6d9253b7bcf aarch64: Fix up commutative and early-clobber markers on co [...]
new 944ecdf0852 aarch64: PR target/120999: Adjust operands for movprfx alte [...]
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gcc/config/aarch64/aarch64-sve.md | 56 ++++++-------
gcc/config/aarch64/aarch64-sve2.md | 30 +++----
gcc/config/aarch64/aarch64.md | 102 +++++++++++------------
gcc/testsuite/gcc.target/aarch64/sve2/pr120999.c | 17 ++++
4 files changed, 111 insertions(+), 94 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/aarch64/sve2/pr120999.c
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unknown user pushed a change to branch master
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from aeea9ae36 Cygwin: signal: make context structures registers handling portable
new 8065978ff Cygwin: doc: warn about unprivileged access to raw devices
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winsup/doc/specialnames.xml | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
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unknown user pushed a change to branch main
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from aeea9ae36 Cygwin: signal: make context structures registers handling portable
new 8065978ff Cygwin: doc: warn about unprivileged access to raw devices
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winsup/doc/specialnames.xml | 10 +++++++++-
1 file changed, 9 insertions(+), 1 deletion(-)
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unknown user pushed a change to branch cygwin-3_6-branch
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from 26dafb54e Cygwin: pty: TCIFLUSH also clears readahead buffer in the master
new de2dccc8e Cygwin: doc: warn about unprivileged access to raw devices
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winsup/doc/specialnames.xml | 10 +++++++++-
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unknown user pushed a change to branch master
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from f7f0539ae9c RISC-V: Add testcase for rv32 SAT_MUL from uint64
new 66346b6d800 tree-optimization/121059 - record loop mask when required
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gcc/testsuite/gcc.dg/vect/pr121059.c | 24 ++++++++++++++++++++++++
gcc/tree-vect-stmts.cc | 10 ++++++++++
2 files changed, 34 insertions(+)
create mode 100644 gcc/testsuite/gcc.dg/vect/pr121059.c
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unknown user pushed a change to branch main
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from 5d65b2287 Cygwin: dumper: port to AArch64
new d0b70afbc Cygwin: add dummy implementation of _fe_nomask_env
new 9653999c2 Cygwin: malloc_wrapper: port to AArch64
new aeea9ae36 Cygwin: signal: make context structures registers handling portable
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winsup/cygwin/exceptions.cc | 51 ++++++++++++----------
winsup/cygwin/fenv.c | 10 +++++
winsup/cygwin/include/cygwin/signal.h | 77 ++++++++++++++++++++++++++++++++-
winsup/cygwin/local_includes/register.h | 25 +++++++++++
winsup/cygwin/mm/malloc_wrapper.cc | 14 ++++++
winsup/cygwin/profil.c | 7 +--
winsup/cygwin/thread.cc | 3 +-
winsup/utils/profiler.cc | 7 +--
8 files changed, 159 insertions(+), 35 deletions(-)
create mode 100644 winsup/cygwin/local_includes/register.h
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unknown user pushed a change to branch master
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from 1f252ce4b2b gas deferrred diags leak
new 168c017e206 s390x sframe regressions
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bfd/elf64-s390.c | 2 ++
1 file changed, 2 insertions(+)
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unknown user pushed a change to branch master
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from dc07752af00 x86: Check all 0s/1s vectors with standard_sse_constant_p
new f01216a0b71 Match: Refine the widen mul check for SAT_MUL pattern
new f7f0539ae9c RISC-V: Add testcase for rv32 SAT_MUL from uint64
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gcc/match.pd | 3 +--
.../sat/{sat_u_mul-1-u16-from-u128.c => sat_u_mul-1-u16-from-u64.c} | 4 ++--
.../sat/{sat_u_mul-1-u32-from-u128.c => sat_u_mul-1-u32-from-u64.c} | 4 ++--
.../sat/{sat_u_mul-1-u8-from-u128.c => sat_u_mul-1-u8-from-u64.c} | 4 ++--
...sat_u_mul-run-1-u16-from-u128.c => sat_u_mul-run-1-u16-from-u64.c} | 4 ++--
...sat_u_mul-run-1-u32-from-u128.c => sat_u_mul-run-1-u32-from-u64.c} | 4 ++--
.../{sat_u_mul-run-1-u8-from-u128.c => sat_u_mul-run-1-u8-from-u64.c} | 4 ++--
7 files changed, 13 insertions(+), 14 deletions(-)
copy gcc/testsuite/gcc.target/riscv/sat/{sat_u_mul-1-u16-from-u128.c => sat_u_mul- [...]
copy gcc/testsuite/gcc.target/riscv/sat/{sat_u_mul-1-u32-from-u128.c => sat_u_mul- [...]
copy gcc/testsuite/gcc.target/riscv/sat/{sat_u_mul-1-u8-from-u128.c => sat_u_mul-1 [...]
copy gcc/testsuite/gcc.target/riscv/sat/{sat_u_mul-run-1-u16-from-u128.c => sat_u_ [...]
copy gcc/testsuite/gcc.target/riscv/sat/{sat_u_mul-run-1-u32-from-u128.c => sat_u_ [...]
copy gcc/testsuite/gcc.target/riscv/sat/{sat_u_mul-run-1-u8-from-u128.c => sat_u_m [...]
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from 07d8de9174c x86-64: Add --enable-x86-64-mfentry
new dc07752af00 x86: Check all 0s/1s vectors with standard_sse_constant_p
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gcc/config/i386/i386-features.cc | 12 +++++-------
gcc/testsuite/gcc.target/i386/pr121015.c | 32 ++++++++++++++++++++++++++++++++
2 files changed, 37 insertions(+), 7 deletions(-)
create mode 100644 gcc/testsuite/gcc.target/i386/pr121015.c
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