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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-lts-defconfig in repository toolchain/ci/llvm-project.
from ce65ebc39e5 [AArch64][GlobalISel] Support lowering musttail calls adds 8535ba6fa01 [Docs] Moves topics to new categories adds dbcd7f56027 [WebAssembly] Restore defaults for stores per memop adds 73778e9878f [utils] Amend update_llc_test_checks.py to non-llc tooling, NFC adds 84c368e2e22 [utils] Add minimal support for MIR inputs to update_llc_te [...] adds 4fd11c1e456 [Object] Extend MachOUniversalBinary::getObjectForArch adds fa7f168a371 llvm-reduce: Avoid use-after-free when removing a branch in [...] adds e93aded7f02 Initialize all fields in ABIArgInfo. adds 798fe477e39 llvm-reduce: Add pass to reduce instructions adds 98a57332ef0 gn build: Merge r372282 adds 21143b93a6e [WebAssembly] Sort output data sections to place .bss last adds d8399d12cd8 GlobalISel: Don't materialize immarg arguments to intrinsics adds 22e2c09515e AMDGPU/GlobalISel: Fix RegBankSelect G_SMULH/G_UMULH pre-gfx9 adds c189f023ac4 MachineScheduler: Fix assert from not checking subregs adds 01213407c41 Fix typo adds a30d022db6d AMDGPU/GlobalISel: Attempt to RegBankSelect image intrinsics adds a62ef583468 AMDGPU/GlobalISel: RegBankSelect llvm.amdgcn.raw.buffer.{lo [...] adds 838ff36553a AMDGPU/GlobalISel: RegBankSelect struct buffer load/store adds 67f1f6ff8c0 AMDGPU/GlobalISel: Select llvm.amdgcn.raw.buffer.store adds 494243597b4 AMDGPU/GlobalISel: Select llvm.amdgcn.raw.buffer.store.format adds c15aa241f82 [CLANG][BPF] change __builtin_preserve_access_index() signature adds 4f663a63677 AMDGPU/GlobalISel: RegBankSelect tbuffer load/store adds bffbeecb44a AMDGPU/GlobalISel: RegBankSelect llvm.amdgcn.ds.swizzle adds 9f4c7571a1f AMDGPU/SILoadStoreOptimizer: Add const to more functions adds 84dc688bc71 [Builtins] Delete setjmp_syscall and qsetjmp adds c36b0bf3106 [lldb] [Process/gdb-remote] Correct more missing LLDB_INVAL [...] adds eff4fd69998 [X86] Remove unused argument from a helper function. NFC adds d103bb654fe [X86] Change a SmallVector& argument to SmallVectorImpl&. NFC adds 56aa691c414 [ARM] Fix for buildbots adds c2d25ed1b36 [X86] Prevent crash in LowerBUILD_VECTORvXi1 for v64i1 vect [...] adds a44768858c7 [Unroll] Add an option to control complete unrolling adds 5e7c76aa382 [TestCommit] Trivial change to test commit access. adds 8a12e40185c [TestCommit] Trivial change to test commit access. adds da89495a3e7 Fix MSVC "result of 32-bit shift implicitly converted to 64 [...] adds 04398c729b2 [llvm-ar] Include a line number when failing to parse an MR [...] adds cce2342d469 Fix -Wdocumentation "@returns in a void function" warning. NFCI. adds aa03c14827f Revert [llvm-ar] Include a line number when failing to pars [...] adds ec841cf36ca [cmake] Strip quotes in try_compile_only adds 0cfb78e52af [ARM] MVE i1 splat adds 13bdae8541c Revert r372285 "GlobalISel: Don't materialize immarg argume [...] adds c65dd89804d [DAG] Add SelectionDAG::MaxRecursionDepth constant adds 57990b4be0a [clang-tidy] Fix bugprone-argument-comment-check to correct [...] adds eb231d15825 [CUDA][HIP] Fix typo in `BestViableFunction` adds b88800d8829 Clean out unused diagnostics. NFC. adds 88a5fbfcea7 [TableGen] Support encoding per-HwMode adds ed69faa01bf [OpenCL] Add version handling and add vector ld/st builtins adds 3c3602aefa5 Remove an unsafe member variable that wasn't needed; NFC. adds 7592e3a81fc [Float2Int] auto-generate complete test checks; NFC adds ed9104c3f87 Reverting r372323 because it broke color tests on Linux. adds cde4f727fff [docs] Break long (>80) line. NFC adds 9e94ef42bab [DAGCombiner] Add node to the worklist in topological order [...] adds af6043557dd [DAG][X86] Convert isNegatibleForFree/GetNegatedExpression [...] adds efb9e45d6bc Revert r372325 - Reverting r372323 because it broke color t [...] adds 7decdbf2db8 X86: Add missing test for vshli SimplifyDemandedBitsForTargetNode adds 7cb60fb00f5 Make appendCallNB lambda mutable adds e0900f285bb [MCA] Improved cost computation for loop carried dependenci [...] adds 3ecab8e4555 Reapply r372285 "GlobalISel: Don't materialize immarg argum [...] adds 13e71ce6931 [Float2Int] avoid crashing on unreachable code (PR38502) adds e2f9bc3b11b [AMDGPU] Unnecessary -amdgpu-scalarize-global-loads=false f [...] adds 7a67ed57952 [InstCombine] Simplify @llvm.usub.with.overflow+non-zero ch [...] adds cb032aa2c77 [SVFS] Vector Function ABI demangling. adds aa6ef2eeacc gn build: Merge r372343 adds ca4c5deae5d [NFC][PowerPC] Fast-isel VSX support test adds d89f2d872df [Analysis] Allow -scalar-evolution-max-iterations more than once adds e6b2164723b Don't use invalidated iterators in FlattenCFGPass adds f1b6bd403d5 [lsan] Fix deadlock in dl_iterate_phdr. adds 1796aad50ca llvm-reduce: Follow-up to 372280, now with more-better msan fixing adds d487d6401d9 [AMDGPU] fixed underflow in getOccupancyWithNumVGPRs adds f5fcf615665 Don't false-positive match against binary path. adds 75fbb171c30 [ObjC][ARC] Skip debug instructions when computing the inse [...] new 08f938bd1ae Revert "[CUDA][HIP] Fix typo in `BestViableFunction`" new b8fc6a91164 [CUDA][HIP] Re-apply part of r372318. new a4da991e4a4 [AArch64] Fix formatting (NFC) new 0c3d4cfbade [WebAssembly][NFC] Remove unnecessary braces new 40c3d6e3359 Model converted constant expressions as full-expressions. new ccf8d5b8292 Fix for stringized function-macro args continued across lines
The 6 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: .../clang-tidy/bugprone/ArgumentCommentCheck.cpp | 2 +- .../test/clang-tidy/bugprone-argument-comment.cpp | 22 + clang/docs/LanguageExtensions.rst | 4 +- clang/include/clang/AST/TextNodeDumper.h | 2 - clang/include/clang/Basic/Builtins.def | 4 +- clang/include/clang/Basic/DiagnosticASTKinds.td | 1 - clang/include/clang/Basic/DiagnosticCommonKinds.td | 2 - clang/include/clang/Basic/DiagnosticDriverKinds.td | 3 - .../include/clang/Basic/DiagnosticFrontendKinds.td | 6 - clang/include/clang/Basic/DiagnosticSemaKinds.td | 12 +- clang/include/clang/CodeGen/CGFunctionInfo.h | 10 +- clang/lib/AST/TextNodeDumper.cpp | 3 +- .../Lex/DependencyDirectivesSourceMinimizer.cpp | 7 +- clang/lib/Parse/ParseDecl.cpp | 4 +- clang/lib/Sema/OpenCLBuiltins.td | 161 ++++- clang/lib/Sema/SemaChecking.cpp | 12 +- clang/lib/Sema/SemaLookup.cpp | 7 + clang/lib/Sema/SemaOverload.cpp | 34 +- clang/lib/Sema/SemaStmt.cpp | 71 +- clang/lib/Sema/SemaTemplate.cpp | 7 +- clang/test/AST/ast-dump-color.cpp | 4 +- clang/test/Sema/builtin-preserve-access-index.c | 26 +- clang/test/SemaCUDA/function-overload.cu | 17 + .../implicit-member-target-collision-cxx11.cu | 6 +- clang/test/SemaOpenCL/fdeclare-opencl-builtins.cl | 50 ++ .../DependencyDirectivesSourceMinimizerTest.cpp | 26 +- clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp | 22 +- compiler-rt/cmake/Modules/BuiltinTests.cmake | 6 + compiler-rt/lib/lsan/lsan_common.cpp | 6 +- compiler-rt/lib/lsan/lsan_common.h | 5 +- compiler-rt/lib/lsan/lsan_common_linux.cpp | 12 +- compiler-rt/lib/lsan/lsan_common_mac.cpp | 6 +- .../test/lsan/TestCases/Linux/libdl_deadlock.cpp | 52 ++ lld/test/ELF/copy-rel-abs.s | 5 +- lld/test/wasm/custom-section-name.ll | 58 ++ lld/test/wasm/data-layout.ll | 60 +- lld/test/wasm/data-segment-merging.ll | 52 +- lld/test/wasm/data-segments.ll | 30 +- lld/test/wasm/reloc-addend.ll | 4 +- lld/test/wasm/relocatable.ll | 60 +- lld/test/wasm/tls-align.ll | 2 +- lld/test/wasm/tls.ll | 2 +- lld/wasm/OutputSegment.h | 4 +- lld/wasm/Writer.cpp | 20 +- .../GDBRemoteCommunicationServerLLGS.cpp | 7 +- llvm/docs/Frontend/PerformanceTips.rst | 3 +- llvm/docs/ProgrammingDocumentation.rst | 12 - llvm/docs/SubsystemDocumentation.rst | 4 - llvm/docs/UserGuides.rst | 4 - llvm/docs/index.rst | 8 + llvm/include/llvm/Analysis/VectorUtils.h | 111 +++ .../llvm/CodeGen/GlobalISel/InstructionSelector.h | 5 + .../CodeGen/GlobalISel/InstructionSelectorImpl.h | 14 +- llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h | 3 + llvm/include/llvm/CodeGen/SelectionDAG.h | 4 + llvm/include/llvm/CodeGen/TargetLowering.h | 12 + llvm/include/llvm/CodeGen/TargetSubtargetInfo.h | 2 - llvm/include/llvm/ExecutionEngine/Orc/RPCUtils.h | 2 +- llvm/include/llvm/MC/MCSubtargetInfo.h | 2 + llvm/include/llvm/Object/MachOUniversal.h | 8 +- llvm/include/llvm/Target/Target.td | 13 + llvm/include/llvm/Target/TargetSelectionDAG.td | 5 + llvm/include/llvm/Transforms/Scalar/Float2Int.h | 6 +- .../llvm/Transforms/Scalar/LoopUnrollPass.h | 7 + llvm/include/llvm/Transforms/Utils/UnrollLoop.h | 3 +- llvm/lib/Analysis/CMakeLists.txt | 1 + llvm/lib/Analysis/ScalarEvolution.cpp | 1 + llvm/lib/Analysis/VFABIDemangling.cpp | 418 +++++++++++ llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 27 +- llvm/lib/CodeGen/ScheduleDAGInstrs.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 313 +------- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 18 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 247 ++++++- llvm/lib/DebugInfo/Symbolize/Symbolize.cpp | 2 +- llvm/lib/Object/MachOUniversal.cpp | 23 +- llvm/lib/Object/Object.cpp | 2 +- llvm/lib/Passes/PassBuilder.cpp | 9 + .../ProfileData/Coverage/CoverageMappingReader.cpp | 2 +- llvm/lib/Target/AArch64/AArch64.td | 1 + llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 2 +- llvm/lib/Target/AArch64/AArch64InstrFormats.td | 4 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 2 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 279 +++++++- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 7 + llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 60 ++ llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 5 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 399 ++++++++++- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 40 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 4 + llvm/lib/Target/AMDGPU/BUFInstructions.td | 110 +-- llvm/lib/Target/AMDGPU/DSInstructions.td | 2 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 104 +-- llvm/lib/Target/AMDGPU/SIInstructions.td | 12 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 24 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 14 +- llvm/lib/Target/AMDGPU/VOP1Instructions.td | 18 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 44 +- llvm/lib/Target/ARM/ARMBasicBlockInfo.h | 2 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 38 +- llvm/lib/Target/ARM/ARMInstrInfo.td | 52 +- llvm/lib/Target/ARM/ARMInstrThumb2.td | 48 +- llvm/lib/Target/Hexagon/HexagonDepMapAsm2Intrin.td | 696 +++++++++--------- llvm/lib/Target/Hexagon/HexagonDepOperands.td | 83 ++- llvm/lib/Target/Hexagon/HexagonIntrinsics.td | 46 +- llvm/lib/Target/Mips/MicroMipsDSPInstrInfo.td | 4 +- llvm/lib/Target/Mips/Mips64InstrInfo.td | 1 + llvm/lib/Target/Mips/MipsDSPInstrInfo.td | 19 +- llvm/lib/Target/Mips/MipsInstrInfo.td | 2 + llvm/lib/Target/Mips/MipsMSAInstrInfo.td | 55 +- llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 3 +- llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 6 +- llvm/lib/Target/PowerPC/PPCInstrVSX.td | 4 +- llvm/lib/Target/RISCV/RISCVInstrInfoA.td | 8 +- llvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp | 6 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 49 +- llvm/lib/Target/SystemZ/SystemZInstrFormats.td | 166 ++--- llvm/lib/Target/SystemZ/SystemZInstrVector.td | 18 +- llvm/lib/Target/SystemZ/SystemZOperands.td | 121 ++-- llvm/lib/Target/SystemZ/SystemZOperators.td | 6 +- llvm/lib/Target/SystemZ/SystemZPatterns.td | 4 +- .../lib/Target/SystemZ/SystemZSelectionDAGInfo.cpp | 8 +- .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 10 - .../WebAssembly/WebAssemblyInstrBulkMemory.td | 4 +- llvm/lib/Target/X86/X86ISelDAGToDAG.cpp | 12 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 434 ++++++----- llvm/lib/Target/X86/X86ISelLowering.h | 11 + llvm/lib/Target/X86/X86InstrAVX512.td | 224 +++--- llvm/lib/Target/X86/X86InstrMMX.td | 8 +- llvm/lib/Target/X86/X86InstrSSE.td | 204 +++--- llvm/lib/Target/X86/X86InstrSystem.td | 2 +- llvm/lib/Target/X86/X86InstrTSX.td | 2 +- llvm/lib/Target/X86/X86InstrXOP.td | 16 +- .../Transforms/InstCombine/InstCombineAndOrXor.cpp | 21 + llvm/lib/Transforms/ObjCARC/PtrState.cpp | 4 + llvm/lib/Transforms/Scalar/FlattenCFGPass.cpp | 24 +- llvm/lib/Transforms/Scalar/Float2Int.cpp | 47 +- .../lib/Transforms/Scalar/LoopUnrollAndJamPass.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 26 +- .../ScalarEvolution/multiple-max-iterations.ll | 2 + .../AArch64/GlobalISel/arm64-irtranslator.ll | 3 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.exp.mir | 12 +- .../GlobalISel/inst-select-amdgcn.s.sendmsg.mir | 3 +- .../GlobalISel/irtranslator-amdgcn-sendmsg.ll | 15 + .../AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll | 12 +- .../AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll | 9 +- .../irtranslator-struct-return-intrinsics.ll | 5 +- .../llvm.amdgcn.raw.buffer.store.format.f16.ll | 519 ++++++++++++++ .../llvm.amdgcn.raw.buffer.store.format.f32.ll | 314 ++++++++ .../GlobalISel/llvm.amdgcn.raw.buffer.store.ll | 791 +++++++++++++++++++++ .../AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll | 45 ++ .../AMDGPU/GlobalISel/regbankselect-amdgcn-exp.mir | 40 +- .../GlobalISel/regbankselect-amdgcn.ds.swizzle.mir | 21 + .../regbankselect-amdgcn.image.load.1d.ll | 181 +++++ .../regbankselect-amdgcn.image.sample.1d.ll | 268 +++++++ .../regbankselect-amdgcn.raw.buffer.load.ll | 173 +++++ .../regbankselect-amdgcn.struct.buffer.load.ll | 179 +++++ .../regbankselect-amdgcn.struct.buffer.store.ll | 174 +++++ .../AMDGPU/GlobalISel/regbankselect-smulh.mir | 62 +- .../AMDGPU/GlobalISel/regbankselect-umulh.mir | 62 +- llvm/test/CodeGen/AMDGPU/max.ll | 30 +- ...hed-assert-dead-def-subreg-use-other-subreg.mir | 70 ++ llvm/test/CodeGen/AMDGPU/sminmax.ll | 29 +- llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll | 18 +- llvm/test/CodeGen/PowerPC/fast-isel-call.ll | 6 +- llvm/test/CodeGen/PowerPC/fast-isel-const.ll | 2 +- llvm/test/CodeGen/PowerPC/fast-isel-load-store.ll | 9 +- llvm/test/CodeGen/PowerPC/fast-isel-ret.ll | 6 +- .../CodeGen/Thumb2/LowOverheadLoops/massive.mir | 50 +- llvm/test/CodeGen/Thumb2/mve-pred-build-var.ll | 37 +- llvm/test/CodeGen/WebAssembly/bulk-memory.ll | 40 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 77 ++ llvm/test/CodeGen/X86/recip-fastmath.ll | 16 +- llvm/test/CodeGen/X86/recip-fastmath2.ll | 112 +-- .../CodeGen/X86/vshli-simplify-demanded-bits.ll | 58 ++ llvm/test/Other/opt-O2-pipeline.ll | 2 +- llvm/test/Other/opt-O3-pipeline.ll | 2 +- llvm/test/Other/opt-Os-pipeline.ll | 2 +- llvm/test/Reduce/Inputs/remove-bbs.py | 1 - llvm/test/Reduce/Inputs/remove-global-vars.py | 14 +- llvm/test/Reduce/Inputs/remove-instructions.py | 17 + llvm/test/Reduce/remove-global-vars.ll | 6 +- llvm/test/Reduce/remove-instructions.ll | 23 + llvm/test/TableGen/HwModeEncodeDecode.td | 81 +++ llvm/test/TableGen/immarg.td | 31 + llvm/test/Transforms/Float2Int/basic.ll | 412 ++++++----- .../result-of-usub-is-non-zero-and-no-overflow.ll | 36 +- .../LoopUnroll/disable-full-unroll-by-opt.ll | 35 + llvm/test/Transforms/ObjCARC/code-motion.ll | 39 + llvm/test/Transforms/Util/flattencfg.ll | 30 + .../X86/SkylakeClient/bottleneck-analysis.s | 12 +- llvm/tools/llvm-lipo/llvm-lipo.cpp | 7 +- llvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp | 40 +- llvm/tools/llvm-mca/Views/BottleneckAnalysis.h | 8 +- llvm/tools/llvm-objdump/MachODump.cpp | 2 +- llvm/tools/llvm-reduce/CMakeLists.txt | 1 + llvm/tools/llvm-reduce/DeltaManager.h | 2 + .../tools/llvm-reduce/deltas/ReduceBasicBlocks.cpp | 11 +- .../llvm-reduce/deltas/ReduceInstructions.cpp | 65 ++ llvm/tools/llvm-reduce/deltas/ReduceInstructions.h | 20 + llvm/tools/vfabi-demangle-fuzzer/CMakeLists.txt | 7 + .../vfabi-demangler-fuzzer.cpp | 26 + llvm/unittests/Analysis/CMakeLists.txt | 1 + llvm/unittests/Analysis/VectorFunctionABITest.cpp | 439 ++++++++++++ llvm/utils/TableGen/CodeEmitterGen.cpp | 130 +++- llvm/utils/TableGen/CodeGenTarget.cpp | 3 +- llvm/utils/TableGen/FixedLenDecoderEmitter.cpp | 65 +- llvm/utils/TableGen/GlobalISelEmitter.cpp | 27 +- llvm/utils/TableGen/InfoByHwMode.cpp | 11 + llvm/utils/TableGen/InfoByHwMode.h | 5 + llvm/utils/TableGen/SubtargetEmitter.cpp | 3 + llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn | 1 + .../gn/secondary/llvm/tools/llvm-reduce/BUILD.gn | 1 + .../gn/secondary/llvm/unittests/Analysis/BUILD.gn | 1 + llvm/utils/update_llc_test_checks.py | 23 +- 216 files changed, 8468 insertions(+), 2478 deletions(-) create mode 100644 compiler-rt/test/lsan/TestCases/Linux/libdl_deadlock.cpp create mode 100644 lld/test/wasm/custom-section-name.ll create mode 100644 llvm/lib/Analysis/VFABIDemangling.cpp create mode 100644 llvm/test/Analysis/ScalarEvolution/multiple-max-iterations.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.stor [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.stor [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.sleep.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.swi [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image. [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image. [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.bu [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct [...] create mode 100644 llvm/test/CodeGen/AMDGPU/sched-assert-dead-def-subreg-use-other [...] create mode 100644 llvm/test/CodeGen/X86/vshli-simplify-demanded-bits.ll create mode 100755 llvm/test/Reduce/Inputs/remove-instructions.py create mode 100644 llvm/test/Reduce/remove-instructions.ll create mode 100644 llvm/test/TableGen/HwModeEncodeDecode.td create mode 100644 llvm/test/TableGen/immarg.td create mode 100644 llvm/test/Transforms/LoopUnroll/disable-full-unroll-by-opt.ll create mode 100644 llvm/test/Transforms/ObjCARC/code-motion.ll create mode 100644 llvm/tools/llvm-reduce/deltas/ReduceInstructions.cpp create mode 100644 llvm/tools/llvm-reduce/deltas/ReduceInstructions.h create mode 100644 llvm/tools/vfabi-demangle-fuzzer/CMakeLists.txt create mode 100644 llvm/tools/vfabi-demangle-fuzzer/vfabi-demangler-fuzzer.cpp create mode 100644 llvm/unittests/Analysis/VectorFunctionABITest.cpp