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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check_bootstrap/master-aarch64-check_bootstrap in repository toolchain/ci/binutils-gdb.
from 3c4c0a18c8 x86-64: Use MAXPAGESIZE for the relro segment alignment adds e6b3636709 gdb: add a symbol* argument to get_return_value adds 0b35f123c2 gdb: Respect the DW_CC_nocall attribute adds ce20459e16 x86: Add has_sib to struct instr_info adds e63f65fea9 sim/testsuite: Default global_cc_os and global_cc_works properly adds 3319ba7a8d i386: Update I386_NEED_DYNAMIC_RELOC_TYPE_P for DT_TEXTREL adds bc85f56bfd Automatic date update in version.in adds d0b2f561a1 sim: testsuite: cleanup the istarget * logic adds 7443cb7479 sim/testsuite/cris/c/stat3.c: Fix formatting nit adds e94b2738a1 sim/common: Improve sim_dump_memory head comment
No new revisions were added by this update.
Summary of changes: bfd/elfxx-x86.h | 1 + bfd/version.h | 2 +- gdb/gdbtypes.c | 11 +++ gdb/gdbtypes.h | 10 +++ gdb/infcall.c | 5 ++ gdb/infcmd.c | 20 +++-- gdb/inferior.h | 10 ++- gdb/python/py-finishbreakpoint.c | 57 +++++++------ gdb/stack.c | 18 +++- .../{main-foo.c => calling-convention.c} | 7 +- gdb/testsuite/gdb.dwarf2/calling-convention.exp | 97 ++++++++++++++++++++++ ld/testsuite/ld-i386/i386.exp | 1 + ld/testsuite/ld-i386/{warn1.d => pr28894.d} | 1 - ld/testsuite/ld-i386/pr28894.s | 7 ++ opcodes/i386-dis.c | 17 ++-- sim/common/sim-memopt.c | 3 +- sim/testsuite/aarch64/allinsn.exp | 17 ++-- sim/testsuite/arm/allinsn.exp | 22 ++--- sim/testsuite/arm/iwmmxt/iwmmxt.exp | 22 ++--- sim/testsuite/arm/misc.exp | 22 ++--- sim/testsuite/arm/thumb/allthumb.exp | 22 ++--- sim/testsuite/arm/xscale/xscale.exp | 22 ++--- sim/testsuite/avr/allinsn.exp | 17 ++-- sim/testsuite/bfin/allinsn.exp | 17 ++-- sim/testsuite/bpf/allinsn.exp | 26 +++--- sim/testsuite/cr16/allinsn.exp | 28 +++---- sim/testsuite/cr16/misc.exp | 28 +++---- sim/testsuite/cris/asm/asm.exp | 48 +++++------ sim/testsuite/cris/c/stat3.c | 2 +- sim/testsuite/d10v/allinsn.exp | 17 ++-- sim/testsuite/example-synacor/allinsn.exp | 21 ++--- sim/testsuite/frv/allinsn-a-b.exp | 3 +- sim/testsuite/frv/allinsn-c.exp | 3 +- sim/testsuite/frv/allinsn-d-h.exp | 3 +- sim/testsuite/frv/allinsn-i-l.exp | 3 +- sim/testsuite/frv/allinsn-m.exp | 3 +- sim/testsuite/frv/allinsn-n.exp | 3 +- sim/testsuite/frv/allinsn-o-s.exp | 3 +- sim/testsuite/frv/allinsn-t-z.exp | 3 +- sim/testsuite/frv/fr400/allinsn.exp | 21 ++--- sim/testsuite/frv/fr500/allinsn.exp | 21 ++--- sim/testsuite/frv/fr550/allinsn.exp | 21 ++--- sim/testsuite/frv/interrupts.exp | 21 ++--- sim/testsuite/frv/misc.exp | 21 ++--- sim/testsuite/frv/parallel.exp | 21 ++--- sim/testsuite/ft32/allinsn.exp | 17 ++-- sim/testsuite/h8300/allinsn.exp | 16 ++-- sim/testsuite/iq2000/allinsn.exp | 17 ++-- sim/testsuite/lib/sim-defs.exp | 6 +- sim/testsuite/lm32/allinsn.exp | 17 ++-- sim/testsuite/m32c/allinsn.exp | 17 ++-- sim/testsuite/m32r/allinsn.exp | 23 ++--- sim/testsuite/m32r/misc.exp | 23 ++--- sim/testsuite/m68hc11/allinsn.exp | 17 ++-- sim/testsuite/mcore/allinsn.exp | 17 ++-- sim/testsuite/microblaze/allinsn.exp | 17 ++-- sim/testsuite/mn10300/allinsn.exp | 17 ++-- sim/testsuite/moxie/allinsn.exp | 17 ++-- sim/testsuite/msp430/allinsn.exp | 17 ++-- sim/testsuite/or1k/alltests.exp | 19 ++--- sim/testsuite/pru/allinsn.exp | 17 ++-- sim/testsuite/riscv/allinsn.exp | 17 ++-- sim/testsuite/sh/allinsn.exp | 6 +- sim/testsuite/v850/allinsns.exp | 29 +++---- 64 files changed, 551 insertions(+), 523 deletions(-) copy gdb/testsuite/gdb.dwarf2/{main-foo.c => calling-convention.c} (91%) create mode 100644 gdb/testsuite/gdb.dwarf2/calling-convention.exp copy ld/testsuite/ld-i386/{warn1.d => pr28894.d} (74%) create mode 100644 ld/testsuite/ld-i386/pr28894.s