[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig updated (c6ed1fcf245 -> a72b9dfd45c)

10 May 2020


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig
in repository toolchain/ci/llvm-project.
from  c6ed1fcf245 [DebugInfo] Dump raw data in a case of decoding error of an [...]
      adds  e4e3e41905d Revert "Relands "[YAMLVFSWriter][Test][NFC] Add couple tests""
      adds  99ac9ce7016 [NFC] Clean up in MCObjectStreamer and X86AsmBackend
      adds  6bf0ad78dc0 [Driver] Don't pass -u__llvm_profile_runtime for clang -fpr [...]
      adds  68a9356bdea [lldb] [testsuite] TestReproducerAttach.py: Fix dependency  [...]
      adds  3c5dd5863c3 [MLIR] Register JIT event listeners with RTDyldObjectLinkingLayer
      adds  31fd12aa095 [clang-format] [PR34574] Handle [[nodiscard]] attribute in  [...]
      adds  65399cde4b4 NativeFormatting.h - reduce raw_ostream.h include to forwar [...]
      adds  fccd7965657 [X86] Add tests showing failure of combineVectorCompareAndM [...]
      adds  84cbd472e59 [clangd] Fix a data race in RecordsLatencies test
      adds  7425bdbd2fa [X86] Add test cases for 'abs from mul patterns' (PR45691)
      adds  0e8e731449d [X86] Allow combineVectorCompareAndMaskUnaryOp to handle 'a [...]
      adds  f4d4e246e0e [X86] Remove mul(abs(x),abs(x)) -> mul(x,x) tests
      adds  4319c895516 LLParser.h - remove unused ValueHandle.h include. NFC.
      adds  0b9783350b3 LTO.h - reduce includes to forward declarations. NFC.
      adds  4f4ce13944b [libcxx testing] Make three locking tests more reliable
      adds  82ddae061b4 [clang-tidy] RenamerClangTidy now renames dependent member  [...]
      adds  b05c8c5756e [flang] Make implicit conversion explicit in assignment
      adds  c746781f508 [clangd] Fix data race in BackgroundIndex test
      adds  c9537b9cc86 [lldb/debugserver] Include TargetConditionals.h where needed
      adds  0e49ac73eaf [NFC] Small rework to RenamerClangTidyCheck addUsage
      adds  6eee2d9b5bd [ARM] Convert VDUPLANE to VDUP under MVE
      adds  56bf0b58c24 [X86] Add an assert that v32i16/v64i8 splitting in LowerVSE [...]
      adds  c7be6a86f44 [X86] Teach getUndefRegClearance that we use undef for inpu [...]
      adds  d7258c6a833 [X86] Add XOP vector shift by scalar amount tests
      adds  f8b09f7b520 [CodeGenPrepare][X86] Add x16i16, v32i8 and XOP vector shif [...]
      adds  beda9d04c28 AMDGPU: Skip GetUnderlyingObject check in pointsToConstantMemory
      adds  a881dc11035 Fix typo
      adds  16295d521e2 InstCombine: Broaden copy-constant-to-alloca optimization
      adds  ee1a69824d9 GlobalISel: Combine G_UNMERGE_VALUES with G_TRUNC
      adds  69999605ee9 GlobalISel: Move code into lowering for G_MERGE_VALUES
      adds  c8fbcb1e78a [Clang] Pass --pack-dyn-relocs=relr to lld for Fuchsia
      adds  5b02be0b973 [Clang] Pass -z max-page-size to linker for Fuchsia
      adds  9237d88001c [X86] isVectorShiftByScalarCheap - don't limit fast XOP vec [...]
      adds  57fb56b30e8 [LAA] Remove unneeded PtrRtChecking argument (NFC).
      adds  24b3c2d0585 [BreakFalseDeps] Harden pickBestRegisterForUndef against ch [...]
      adds  3af85fa8f06 GlobalISel: Handle more cases in lowerUnmergeValues
      adds  66db6f21292 [X86] Add test cases for vXi16 PMULH opportunities that don [...]
       new  a72b9dfd45c [sanitizer] Enable whitelist/blacklist in new PM
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 .../bugprone/ReservedIdentifierCheck.cpp           |    1 +
 .../readability/IdentifierNamingCheck.cpp          |    1 +
 .../clang-tidy/utils/RenamerClangTidyCheck.cpp     |  186 +-
 .../clang-tidy/utils/RenamerClangTidyCheck.h       |   12 +
 .../clangd/unittests/BackgroundIndexTests.cpp      |    4 +-
 .../clangd/unittests/ClangdLSPServerTests.cpp      |    2 +-
 clang-tools-extra/docs/ReleaseNotes.rst            |    6 +
 .../checks/readability-identifier-naming.rst       |   59 +
 ...ability-identifier-naming-member-decl-usage.cpp |  119 +-
 clang/lib/CodeGen/BackendUtil.cpp                  |    5 +-
 clang/lib/CodeGen/TargetInfo.cpp                   |    2 +-
 clang/lib/Driver/ToolChain.cpp                     |   23 +-
 clang/lib/Driver/ToolChains/Darwin.cpp             |    3 +-
 clang/lib/Driver/ToolChains/Fuchsia.cpp            |    4 +
 clang/lib/Driver/ToolChains/Linux.cpp              |    7 +-
 clang/lib/Format/UnwrappedLineParser.cpp           |   15 +-
 clang/test/Driver/coverage-ld.c                    |   14 +-
 clang/test/Driver/fuchsia.c                        |    2 +-
 clang/unittests/Format/FormatTest.cpp              |    4 +
 .../sanitizer_coverage_whitelist_blacklist.cpp     |    7 +
 flang/lib/Semantics/expression.cpp                 |   18 +
 .../thread.sharedtimedmutex.class/lock.pass.cpp    |   40 +-
 .../lock_shared.pass.cpp                           |   97 +-
 .../try_lock_shared_until.pass.cpp                 |   79 +-
 .../reproducers/attach/TestReproducerAttach.py     |    7 +-
 .../tools/debugserver/source/MacOSX/MachProcess.mm |    1 +
 .../GlobalISel/LegalizationArtifactCombiner.h      |   36 +-
 .../llvm/CodeGen/GlobalISel/LegalizerHelper.h      |    8 +
 llvm/include/llvm/LTO/LTO.h                        |   10 +-
 llvm/include/llvm/Support/NativeFormatting.h       |    3 +-
 .../Transforms/Instrumentation/SanitizerCoverage.h |   19 +-
 llvm/lib/Analysis/LoopAccessAnalysis.cpp           |   16 +-
 llvm/lib/AsmParser/LLParser.h                      |    1 -
 llvm/lib/CodeGen/BreakFalseDeps.cpp                |    9 +
 llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp    |  102 +-
 llvm/lib/MC/MCObjectStreamer.cpp                   |    8 +-
 llvm/lib/Support/NativeFormatting.cpp              |    3 +-
 llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp     |   10 +-
 llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp     |    7 +-
 llvm/lib/Target/ARM/ARMISelLowering.cpp            |   24 +-
 llvm/lib/Target/ARM/ARMInstrInfo.td                |    2 +-
 llvm/lib/Target/ARM/ARMInstrMVE.td                 |   18 +-
 llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp |    2 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |   18 +-
 llvm/lib/Target/X86/X86InstrInfo.cpp               |   98 +-
 .../InstCombine/InstCombineLoadStoreAlloca.cpp     |   44 +-
 .../Instrumentation/SanitizerCoverage.cpp          |    3 +-
 .../CodeGen/AArch64/GlobalISel/legalize-select.mir |   18 +-
 llvm/test/CodeGen/AArch64/arm64-vabs.ll            |   47 +-
 .../AMDGPU/GlobalISel/artifact-combiner-sext.mir   |   22 +-
 .../artifact-combiner-unmerge-values.mir           |  345 +-
 .../CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll     |   21 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-and.mir     |  312 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-anyext.mir  |   52 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-bitcast.mir |   87 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir  |   48 +-
 .../GlobalISel/legalize-implicit-def-s1025.mir     |  754 ++-
 .../GlobalISel/legalize-load-constant-32bit.mir    |   39 +-
 .../AMDGPU/GlobalISel/legalize-load-constant.mir   | 1641 +++---
 .../AMDGPU/GlobalISel/legalize-load-flat.mir       |  902 ++-
 .../AMDGPU/GlobalISel/legalize-load-global.mir     | 1330 +++--
 .../AMDGPU/GlobalISel/legalize-load-local.mir      | 2927 +++++-----
 .../AMDGPU/GlobalISel/legalize-load-private.mir    | 5908 +++++++++-----------
 .../AMDGPU/GlobalISel/legalize-merge-values.mir    | 1556 +++---
 .../test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir |   48 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-select.mir  |  186 +-
 .../AMDGPU/GlobalISel/legalize-sext-inreg.mir      |  130 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-sext.mir    |  116 +-
 .../legalize-sextload-constant-32bit.mir           |   39 +-
 .../AMDGPU/GlobalISel/legalize-store-global.mir    | 2667 ++++-----
 .../CodeGen/AMDGPU/GlobalISel/legalize-trunc.mir   |   24 +-
 .../GlobalISel/legalize-unmerge-values-xfail.mir   |   14 -
 .../AMDGPU/GlobalISel/legalize-unmerge-values.mir  |  184 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-xor.mir     |   48 +-
 .../CodeGen/AMDGPU/GlobalISel/legalize-zext.mir    |   54 +-
 .../legalize-zextload-constant-32bit.mir           |   43 +-
 .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.sdot4.ll |   64 +-
 .../CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.udot4.ll |   64 +-
 .../CodeGen/AMDGPU/aa-points-to-constant-memory.ll |  112 +
 .../Thumb2/LowOverheadLoops/fast-fp-loops.ll       |   10 +-
 llvm/test/CodeGen/Thumb2/mve-pred-shuffle.ll       |    2 +-
 llvm/test/CodeGen/Thumb2/mve-vdup.ll               |    4 +-
 llvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll  |   80 +-
 llvm/test/CodeGen/Thumb2/mve-vld3.ll               |  189 +-
 llvm/test/CodeGen/Thumb2/mve-vld4.ll               |   21 +-
 llvm/test/CodeGen/Thumb2/mve-vst3.ll               |  562 +-
 llvm/test/CodeGen/X86/avx2-arith.ll                |    8 +-
 llvm/test/CodeGen/X86/avx2-vector-shifts.ll        |    8 +-
 llvm/test/CodeGen/X86/cast-vsel.ll                 |    6 +-
 llvm/test/CodeGen/X86/combine-mul.ll               |  120 +-
 llvm/test/CodeGen/X86/combine-shl.ll               |    4 +-
 .../X86/div-rem-pair-recomposition-signed.ll       |   16 +-
 .../X86/div-rem-pair-recomposition-unsigned.ll     |   16 +-
 llvm/test/CodeGen/X86/midpoint-int-vec-128.ll      |  108 +-
 llvm/test/CodeGen/X86/midpoint-int-vec-256.ll      |  218 +-
 llvm/test/CodeGen/X86/midpoint-int-vec-512.ll      |  188 +-
 llvm/test/CodeGen/X86/min-legal-vector-width.ll    |   32 +-
 llvm/test/CodeGen/X86/mmx-arith.ll                 |    4 +-
 llvm/test/CodeGen/X86/pmul.ll                      |  150 +-
 llvm/test/CodeGen/X86/pmulh.ll                     | 1969 +++++++
 llvm/test/CodeGen/X86/pr45563-2.ll                 |   20 +-
 llvm/test/CodeGen/X86/pr45833.ll                   |   20 +-
 llvm/test/CodeGen/X86/prefer-avx256-shift.ll       |   12 +-
 llvm/test/CodeGen/X86/prefer-avx256-wide-mul.ll    |    4 +-
 llvm/test/CodeGen/X86/vec_saddo.ll                 |   34 +-
 llvm/test/CodeGen/X86/vec_setcc.ll                 |    2 +-
 llvm/test/CodeGen/X86/vec_smulo.ll                 |  320 +-
 llvm/test/CodeGen/X86/vec_ssubo.ll                 |   34 +-
 llvm/test/CodeGen/X86/vec_uaddo.ll                 |   26 +-
 llvm/test/CodeGen/X86/vec_umulo.ll                 |  326 +-
 llvm/test/CodeGen/X86/vec_usubo.ll                 |   30 +-
 llvm/test/CodeGen/X86/vector-ext-logic.ll          |   20 +-
 llvm/test/CodeGen/X86/vector-fshl-128.ll           |   22 +-
 llvm/test/CodeGen/X86/vector-fshl-256.ll           |    6 +-
 llvm/test/CodeGen/X86/vector-fshl-rot-128.ll       |   18 +-
 llvm/test/CodeGen/X86/vector-fshl-rot-256.ll       |    6 +-
 llvm/test/CodeGen/X86/vector-fshr-128.ll           |   16 +-
 llvm/test/CodeGen/X86/vector-fshr-256.ll           |    6 +-
 llvm/test/CodeGen/X86/vector-fshr-rot-128.ll       |   18 +-
 llvm/test/CodeGen/X86/vector-fshr-rot-256.ll       |    6 +-
 llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll      |   20 +-
 llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll      |   12 +-
 llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll      |   20 +-
 llvm/test/CodeGen/X86/vector-reduce-mul.ll         |  190 +-
 llvm/test/CodeGen/X86/vector-rotate-128.ll         |   18 +-
 llvm/test/CodeGen/X86/vector-rotate-256.ll         |    6 +-
 llvm/test/CodeGen/X86/vector-shift-ashr-128.ll     |    4 +-
 llvm/test/CodeGen/X86/vector-shift-ashr-256.ll     |   40 +-
 llvm/test/CodeGen/X86/vector-shift-ashr-512.ll     |   16 +-
 llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll  |   12 +-
 .../CodeGen/X86/vector-shift-by-select-loop.ll     |  135 +-
 llvm/test/CodeGen/X86/vector-shift-shl-128.ll      |   16 +-
 llvm/test/CodeGen/X86/vector-shift-shl-256.ll      |   12 +-
 llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll   |   24 +-
 llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll    |   16 +-
 .../CodeGen/X86/vshli-simplify-demanded-bits.ll    |    2 +-
 llvm/test/CodeGen/X86/widen_mul.ll                 |    6 +-
 .../CodeGen/X86/x86-setcc-int-to-fp-combine.ll     |   42 +
 .../Transforms/CodeGenPrepare/X86/vec-shift.ll     |  228 +-
 .../InstCombine/AMDGPU/memcpy-from-constant.ll     |   92 +
 llvm/unittests/Support/VirtualFileSystemTest.cpp   |   57 -
 .../include/mlir/ExecutionEngine/ExecutionEngine.h |   15 +-
 mlir/lib/ExecutionEngine/ExecutionEngine.cpp       |   29 +-
 143 files changed, 14106 insertions(+), 12528 deletions(-)
 delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values-xfail.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/aa-points-to-constant-memory.ll
 create mode 100644 llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-defconfig updated (c6ed1fcf245 -> a72b9dfd45c)