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from 9fd9db97367 [AMDGPU] Disable SReg Global LD/ST, perf regression new 8e27bd1b3b4 [SelectionDAG] fold FP binops with 2 undef operands to undef new cc1eb134513 [X86] Prefer lowerVectorShuffleAsBitMask over using a avx51 [...] new 1d5f3f532c6 [X86] Change vXi8 MULHU lowering to unpack high and low hal [...]
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Summary of changes: lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 6 +- lib/Target/X86/X86ISelLowering.cpp | 111 ++++++++++---------- test/CodeGen/X86/fp-undef.ll | 5 - test/CodeGen/X86/prefer-avx256-wide-mul.ll | 17 ++-- test/CodeGen/X86/scalarize-fp.ll | 22 ++-- test/CodeGen/X86/vector-idiv-udiv-256.ll | 34 +++---- test/CodeGen/X86/vector-idiv-udiv-512.ll | 156 ++++++++++++++--------------- test/CodeGen/X86/vector-shuffle-256-v32.ll | 19 +--- 8 files changed, 164 insertions(+), 206 deletions(-)