[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Oz updated (6e1308bc1027 -> 5de69e16ea9a)

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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Oz in repository toolchain/ci/llvm-project.

from 6e1308bc1027 [SCEV][NFC] Simplify check with CI->isZero() exit condition adds ca0ce99fc87c [lldb] Print embedded nuls in char arrays (PR44649) adds 7106f588567b [lldb] Make the thread_local g_global_boundary accessed fr [...] adds 00baad35b2a3 [SystemZ] Bugfix and refactorization of mem-mem operations adds a33e4c8ae925 [SystemZ] Reapply memcmp and memcpy patches. adds fa639eda6535 [lldb] Fix TestStackCorefile.py for ca0ce99fc8 adds eaa52750ce38 [mlir][linalg] Verify every LinalgOp has a body. adds 0b48b015b574 [Flang] flang-omp-report replace std::vector's with llvm:: [...] adds a8f69be61fc8 [mlir][linalg] Expose flag to control nofold attribute whe [...] adds 05fb26062c32 [MLIR] Fix assert crash when an unregistered dialect op is [...] adds e3e1da20d4a9 Follow up to a3936a6c19c, correctly select LiveDebugValues [...] adds a04c0b7ed2f9 [mlir][python] Fix MemRefType IsAFunction in Python bindings adds 18fbd5fe34f0 [mlir][python] Better support for variadic regions in Pyth [...] adds 16729d0f6274 [Orc] ELFNixPlatform::setupJITDylib - remove dead return. NFCI. adds 77dcdc2f50cc [CostModel][X86] Pre-SSE41 targets can use PMADDWD for sex [...] adds 012c0cc7c38c [mlir] NFC - Avoid unused symbol in opt mode. adds 0ce3c7111e90 [clangd] IncludeCleaner: Handle macros coming from ScratchBuffer adds b577126d6268 [clang][sema] instantiateOMPDeclareVariantAttr - merge rep [...] adds 88487662f7c2 [Codegen] TargetLowering::getCanonicalIndexType - early ou [...] adds dc8a41de3493 [ARM] Simplify address calculation for NEON load/store adds c0d88613f204 [SystemZ] Remove some now unused ISD XXX_LOOP opcodes. adds 094faa5fcabd [VectorCombine] Add test showing issue when running Vector [...] adds 51eefa816457 [NVPTX] Add VRFrame and VRFrameLocal to integer register classes adds a567fd8a0820 Fixup [NVPTX] Add VRFrame and VRFrameLocal to integer regi [...] adds 743e263e0850 [hexagon] Add system register, transfer support adds b5426ced7128 [DebugInfo][InstrRef] Place variable-values PHI using LLVM [...] adds 3f335ffffe47 [mlir][linalg] Fix FusionOnTensors header and make local m [...] adds c2e5c95a1458 [RISCV][test] Add tests of (add (shl r, c0), c1) adds 4fee8a16915e [NFC][compiler-rt][profile] Remove non-Posix -h option from test adds 849b36bf6f52 [JITLink][NFC] Add TableManager to replace PerGraph...Buil [...] adds 0eeaad3012af [mlir][Linalg] Fix insertion point in comprehensive bufferization adds 82dd977bafa8 [mlir][Linalg] Tighten canonicalization of InsertSliceOp t [...] adds 722a2fb7f9a3 [lldb] Fix 'frame diagnose' docstring typo adds 25a3463c44ee [libc++][NFC] Fixes placement of the return type. adds ac3edc5af099 [analyzer][solver] Handle simplification to ConcreteInt adds e4e48e2f025b [AMDGPU] Add more tests for build_vector adds 1fa27f2a10e8 [libc++] LWG3480: make (recursive_)directory_iterator C++2 [...] adds a316343e193d [llvm-profgen] Allow generating AutoFDO profile from CSSPG [...] adds a8e7d11acaa3 [ValueTracking] Simplify getKnowledgeValidInContext() call (NFC) adds 8282024a7477 [sanitizer] Move out stack trace pointer from header StackDepot adds f7ba572483dd [RISCV] Update Zba, Zbb, Zbc, and Zbs version from 0.93 to 1.0. adds 727a891ec8c4 [FPEnv][InstSimplify] Fold fadd X, 0 ==> X, when we know X [...] adds b6c218d4fdb7 [libTooling] Add "switch"-like Stencil combinator adds 13185f01546a [Transforms] eliminateDeadStores - remove unused variable. NFC. adds fcbec7e668ec [TTI][X86] Swap getInterleavedMemoryOpCostAVX2/getInterlea [...] adds 5f668bba5574 [Polly] Clean up Polly's getting started docs. adds f7a3214306cb [Driver][WebAssembly] Use ToolChain reference instead of g [...] adds 871f773986c3 [TTI][X86] Merge getInterleavedMemoryOpCostAVX2 into getIn [...] adds b050564d3e93 [AIX] Ignore case when comparing output from od adds 0a869ef3a844 [llvm-mca][timeline] Indicate output was stopped due to cy [...] adds 5f05ff081f39 [BasicAA] Improve scalable vector handling adds 228b3b729d90 [libc++][AIX] Add scripts and config for building with the [...] adds 78e17e23aa0f [lldb] Rewrite TestDiamond and document some bugs. adds 59dd418e8941 [mlir][tosa] Fix tosa.cast UiToFp32 for tosa-to-linalg adds e632e900ac10 [lldb] Remove logging from Platform::~Platform adds b9941de0bfac Fix a rejects-valid with consteval on overloaded operators adds a5e52ce3f2aa [Polly][docs] Fix itemize list for release notes. adds 19db33c06e7e [Polly] Remove support for code generated by gfortran+DragonEgg. adds 3ff9cc01f275 [X86] Use CMOVNS for abs instead of CMOVGE. adds 8ecbcd058fbd [Driver][Darwin] Use T reference instead of getToolChain() [...] adds 482c53fa0dce [lldb] Move ~Platform to source file adds 68157fe15b23 Fix a crash on valid consteval code. adds 69853f992048 [IVUsers] Move preheader check into SCEVExpander adds 79ae9562cc15 [RISCV] Remove unused member variable. NFC adds 7f3861cfdb10 autogen tests for ease of update adds 3d7bf6625a6e [X86][Costmodel] Improve cost modelling for not-fully-inte [...] adds e9e6266c704d [AArch64] Add extra tests for fptosisat vector variants adds 8b31f07cdf13 [tests] Add indvars tests showing missing transforms with [...] adds afad0cdf31e8 [mlir][vector] Refactor linalg vectorization for reductions adds cb3aa49ec04d [MLIR][arith] fix references to std.constant in comments adds 21abe2128058 [TableGen][PGO] Disable profile instrumentation for printI [...] adds d0a5f61c4f6f [clang] Support -clear-ast-before-backend without -disable-free adds 8c66d781721f [test] Fix asan dynamic unit tests with per-target runtime dirs adds aeeefe97c686 [bazel] Move MC header usage from Support to tblgen adds 277623f4d5a6 Compress formatting of array type names (int [4] -> int[4]) adds 414abff1fe8a [SLP]Fix PR52090: clang crashes: Assertion `Index < Length [...] adds 50b68a3d0305 [OpenMP][host runtime] Add support for teams affinity adds 8e54f24f89c5 Disable add_mlir_aggregate() debug file generation. adds 1062f989af23 [flang] Expunge bogus semantic check for ELEMENTAL without [...] adds f9ad1d1c775a Revert "Compress formatting of array type names (int [4] - [...] adds b840d3ab0d8a [OpenMP][host runtime] small fixup of RTM CPUID bit check adds acb3b187c4c8 [OpenMP][host runtime] Add initial hybrid CPU support adds 039096ee7137 [hwasan] Add default "/" prefix. adds 7a3fb71c3cbd [hwasan] Fix TestCases/thread-uaf.c. adds 439e00a25bde [scudo] Fix running tests under hwasan. adds 675ed4c82df6 [NFC][Interpreter] Remove unused CompilerInvocation adds 6965a776ee19 [flang] Fold LGE/LGT/LLE/LLT intrinsic functions adds 65c9907c809a [mlir][ods] Enable emitting getter/setter prefix adds 0fcda9ae5757 [flang] Admit NULL() in generic procedure resolution cases adds db8a88fef87e [libc] add memccpy and mempcpy adds 1274a07da009 [NFC][asan] Use more common socket type in test adds 882ce178b317 [NFC][sanitizer] Remove %stdcxx11 adds a1e78aee6603 [NFC][asan] Speedup uar_signals.cpp test adds 42ad7e1bc908 [CSSPGO] Turn off PseudoProbeUpdatePass for non-FDO builds. adds 3f96f7b30c91 Fix getInlineCost with ComputeFullInlineCost enabled adds d3cb6bf2d462 [mlir][linalg][bufferize] Rewrite conflict detection adds 7dd7078760e7 [mlir][linalg][bufferize] Handle scf::ForOp correctly in b [...] adds 44610c01aeed [MLIR][ODS] default-valued strings should be in quotes adds 1202d280c6d9 [SCEV][NFC] Reduce memory footprint & compile time via DFS [...] adds effbf0bdd039 PR52183: Don't emit code for a void-typed constant expression. adds 12cbc8cbf071 [analyzer] Fix property access kind detection inside parentheses. adds 9e9b0f462146 [PowerPC] Support ppc-asm-full-reg-names for AIX adds 90ae538cab4b [SCEV] Prove implication of predicates to their sign-flipp [...] adds 81e9c90686f7 [llvm] Use llvm::is_contained (NFC) adds 4fe5ab4b00b2 [RISCV] Optimize immediate materialisation with SH*ADD adds 7c704c0f53bd [NFC] fix a typo adds 35d710148b98 Use Module's FileSpec for limiting binaries to set dyld br [...] adds 844706701ea3 [MLIR] Add `KeywordOrString` handling to AsmParser adds 2ccdc7315e8b [RISCV] Add invalid match case for uimm2, uimm3 and uimm7 adds 2232a68b2df2 Fix another test not using the standard separator for sani [...] adds b092dc0bb9e4 [AArch64ISelLowering] Avoid duplane in some cases when sve [...] adds a92cf5a5a0cd [clang-format] [PR42014,PR52021] don't let clang-format as [...] adds 191a395343b9 [git-clang-format] Add --diffstat parameter adds bc9b106a5750 [lldb] Fix an include in HostTest.cpp adds 8c3adce81dc3 [JSON] Handle uint64_t type adds 082fa5681904 [ARM] Fix MOVCC peephole to not use an incorrect register class adds 25cbf7216201 [libc++] Use apple-install-libcxx.sh in the Apple/system CI job adds a4f42a33be37 [AArch64] Improve fptosi.sat lowering adds c450e47a8c2d [llvm-dwarfdump] Fix unsigned overflow when calculating stats adds fa1a68285e40 [AArch64] Improve fptosi.sat vector lowering adds e23351cdc9bc [Test][InstCombine] Precommit tests for PR52078 adds 7b07c0135140 [InstCombine] Support arbitrary const shift amount for `ls [...] adds 0d1705a9d623 [lldb] [DynamicRegisterInfo] Support value_regs with offset adds 2712d1814860 [lldb] [ABI/X86] Add pseudo-registers if missing adds 3dbcea8b957a Reland [clang] Check unsupported types in expressions adds 6a89fefd13cd Adds //mlir:GPUTransforms dependency to //llvm:MC as the f [...] adds f70f9620d9ab [lldb] [ABI/AArch64] Do not add subregs if some of them ar [...] adds e7418906f505 [lldb] [test] Simplify X86 TestGDBServerTargetXML logic to [...] adds 6069a6a50494 [pstl] Initial implementation of OpenMP backend, on behalf [...] adds 0379263f23a6 [AMDGPU] Fix width check for signed mul24 generation. adds 97809c828f8e [AArch64]Enabling Cortex-A510 Support adds 6678db00e678 [X86] Enable promotion of i16 popcnt (PR52056) adds 4a9bcb605b32 [libc] Memory function benchmarks: rename MemcmpConfigurat [...] adds f2ea85255075 Fix a crash on an invalid templated UDL declaration adds 1583c41d07a4 [lldb] [test] Add TestGDBServerTargetXML tests for x86 dup [...] adds 5bf32a0e4841 [Polly] Remove checkIslAstExprInt and use RAII instead of [...] adds de3038400b16 [AMDGPU] Avoid redundant calls to numBits in AMDGPUCodeGen [...] adds ecef0359538c [Driver][NetBSD] Use Triple reference instead of ToolChain [...] adds 096ace55804d [AArch64] Fix failing test target-invalid-cpu-note.c adds 03a8e70a192f [lldb] Add test for struct merging in scratch ASTContext adds 8cd9c351a1af [VectorCombine] add tests for shuffle of binops; NFC adds a64e6ecfe13f [llvm-readelf] Make -W an alias of --wide adds cef9978027cf [libc++][doc] Use issue labels. adds 26b675d65eb2 [OpenMP][Tools][NFC] Make an Archer test more robust adds a59c1a2138a5 [libc++] LWG3266: delete the to_chars(bool) overload. adds 60802715d1d0 [mlir][vector] NFC - Refactor and extract a helper Structu [...] adds c294715e2e0c [ARM] Don't use TARGET_HEADER_BUILTIN in arm_mve_builtins. [...] adds 395e1fe30574 [clang] Capture Framework when HeaderSearch is resolved vi [...] adds 24703cb6a4e9 [IR] Fix a few incorrect paths in file header comments. NFC adds 42eea2b69bb9 [AIX] Enable int128 in 64 bit mode adds b24788abd8df [mlir][sparse] implement sparse tensor init operation adds f5ed223b0fd0 [DebugInfo] Limit the size of DIExpressions that we will s [...] adds aa80034ab986 [DebugInfo] retainedTypes should not have subprograms adds 1312aff768b0 [SLP]Add a test for shrink shuffle after reorder, NFC. adds ff4c98c05559 [lldb] Harden TestCompletion against new settings in 'targ [...] adds 59b94c4a60d4 NFC: Remove wayward MIR tests from lib/Target adds 6a154e606e57 [clang] Use llvm::is_contained (NFC) adds ccbfcfda1e21 [SystemZ] Handle huge immediates in SystemZInstrInfo::load [...] adds 47eb99aa44ab [clang] Pass -clear-ast-before-backend in Clang::ConstructJob() adds e0f3a3b228ce [ubsan] Remove REQUIRED from some TestCases adds bacddf47a838 [amdgpu] Fix a crash case when preserving MDT in SILowerCo [...] adds 4e572db0c2ec [lld/mac] Mark private externs with GOT relocs as LOCAL in [...] adds 03375a3fb33b [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate u [...] adds cfd155c41bf2 [SelectionDAG] Fix typo in option help adds 659a08399a78 [WebAssembly] Add import info to `dylink` section of share [...] adds 69708477be25 [compiler-rt/profile] Hide __llvm_profile_raw_version adds 4a1d63d7d09f [VectorCombine] Add option to only run scalarization transforms. adds d0e7bdc20849 [modules] Make a module map referenced by a system map a s [...] adds 82e858d1bf4b [ConstantRange] Better diagnostic for correctness test fai [...] adds 0c52c271a538 [BasicAA] Rename ExtendedValue to CastedValue (NFC) adds 3b48e1170dc6 [HIP] Relax conditions for address space cast in builtin args adds 727e642e970d [InstCombine] generalize fold for mask-with-signbit-splat adds 53fc5100e07a Revert "[HIP] Relax conditions for address space cast in b [...] adds 9eb8040a28b9 [ConstantRange] Support checking optimality for subset of [...] adds cd538a6b1462 [AMDGPU] Precommit fused-bitlogic.ll test. NFC. adds a49f5386ce6b [InstCombine] generalize fold for mask-with-signbit-splat, part 2 adds 2a2432e95f23 [NFC] Make Assume2KnowledgeMap's typedef more precise adds f92db6d3fff1 [HIP] Relax conditions for address space cast in builtin args adds 587493b441ea [ConstantRange] Compute precise shl range for single elements adds 4594f8116543 Fix Xcode project for debugserver adds 1830ec94ac02 Revert "[HIP] [AlwaysInliner] Disable AlwaysInliner to eli [...] adds 489561d46381 [clang] fix typo correction not looking for candidates in [...] adds f8ee74fc1304 [ELF] Require two-dash form for --pack-dyn-relocs adds efc6fe963c11 [MLIR][TOSA] Drop "OnTensors" suffix adds e9b1c974be27 [mlir][sparse] run less combinations of SpMM in test (to r [...] adds 965ec6dbe7e0 [mlir] Add folder for shape.add adds da07942834fe [WebAssembly] Add prototype relaxed laneselect instructions adds f6cd43c0987a [X86] Add more tests for D111858. NFC adds da2e1f622db4 [Polly][docs] Fix Sphinx warning. adds 80dba72a669b [Clang/Test]: Rename enable_noundef_analysis to disable-no [...] adds 8ca4b3ef19fe [Clang/Test]: Rename enable_noundef_analysis to disable-no [...] adds 705387c5074b Resolve lit failures in clang after 8ca4b3e's land adds 9aa6c72b92b6 Fix lit test failures in clang-ppc* and clang-x64-windows-msvc adds 52d6c5df85fa [MLIR] Generalize Affine dependence analysis using Affine [...] adds 37ca7a795b27 Fix missing failures in clang-ppc64be* and retry fixing cl [...] adds 64591f217d98 [TableGen] Replace static_cast with llvm's cast. NFC adds e7bb8dd92983 [mlir][linalg][bufferize] Relax rules for extract_slice/in [...] adds f0711106dc6c [clang-tidy] Fix false positive in cppcoreguidelines-virtu [...] adds 9bf6bef9951a [AArch64] Optimize add/sub with immediate adds d137f1288e2c [X86][LV] X86 does *not* prefer vectorized addressing adds 76ca0d67ab07 [ConstantFolding] ConstantFoldScalarCall1 - early-out if g [...] adds c18cf10a0495 [ConstantFolding] Use getValueAPF const ref value where po [...] adds c28824179530 [ConstantFolding] ConstantFoldScalarCall2 - early-out if g [...] adds a1b43d2bc946 [LazyValueInfo] getPredicateAt - remove unnecessary null p [...] adds d464a9d476a2 [Analysis] Replace assert(isa)/dyn_cast with cast. NFC. adds 4d7c7d87e46e [docs] Mention DragonFlyBSD as a supported platform for LLVM. adds 41a6fc8438f3 [Demangle] Extract nonMicrosoftDemangle from llvm::demangle adds a3813438ae1c [llvm-cxxfilt] Use nonMicrosoftDemangle for demangling NFC adds 48ce523a26b7 [Symbolize] Demangle Rust symbols adds 60b96aa65e59 [lldb] Split ParseSingleMember into Obj-C property and nor [...] adds d5f5121ea65a [LV][X86] Add PR47437 test case adds 6c96ceabaf84 [Support] Add more Windows error codes to mapWindowsError adds 939a80867004 Use llvm::is_contained (NFC) adds bfe5b1b3122c [NFC][X86][Codegen] Add missing interleaving tests after D111546 adds 6ec644e2157d [TTI][X86] Add SSE2 sub-128bit vXi16/32 and v2i64 stride 2 [...] adds 3956a1f8b6d2 [libc++][doc] Adds more issue status labels. adds 85b87179f482 [TTI][X86] Add v8i16 -> 2 x v4i16 stride 2 interleaved load costs adds 2c941fa2f9b9 [OpenMP][deviceRTLs] Fix wrong return value of `__kmpc_is_ [...] adds 492a4a428f77 [APInt] Fix 1-bit edge case in smul_ov() adds 49562d3dfed0 Revert "[clang] Pass -clear-ast-before-backend in Clang::C [...] adds d0d991cd23ef Improve fatal error message when an Attribute or Type wasn [...] adds ecbee4804d44 [Builders.h] Silence a warning by adding a cast. adds beb7862db520 [X86] Add DAG combine for negation of CMOV absolute value [...] adds c0b1b52a28be [NFC][sanitizer] Rename stack depot tests adds 746dd6a70093 [NFC][sanitizer] Add StackDepotTestOnlyUnmap adds 8e1d532707fd [Object] Simplify RELR decoding adds d0dbc991c098 Revert "[AArch64] Optimize add/sub with immediate" adds 40b9c39db159 [MLIR][LLVM] Add memset intrinsic adds 6176fda3f992 Fix a few warnings (signed/unsigned comparison in gtest, a [...] adds 10726992fad7 Use llvm::erase_value (NFC) adds ff13189c5d0d [RISCV] Unify the arch string parsing logic to to RISCVISAInfo. adds 8efa6512e066 [RISCV][NFC] Fix build error adds 1d7aadb4c48a [gn build] Port ff13189c5d0d adds 27969c4e00bb tsan: refactor trace tests adds 2e0fb007d63c [llvm][AArch64][SVE] Fold literals into math instructions adds 2edb89c74684 Lex arguments for __has_cpp_attribute and friends as expan [...] adds 052b77e49f50 [InstCombine] Add some extra tests for truncated saturates. NFC adds c8be7743acc7 Bump the value of __STDC_VERSION__ in -std=c2x mode adds dd8c8d4b7cee This patch supports the following checks for THREADPRIVATE [...] adds 887acf6842cb [X86][Costmodel] Load/store i16 Stride=6 VF=32 interleaving costs adds 4b76a74b4283 [X86][Costmodel] Load/store i32 Stride=3 VF=32 interleaving costs adds 3a6a9f74d3a5 [X86][Costmodel] Load/store i32 Stride=4 VF=32 interleaving costs adds 3274ce3a287d [X86][Costmodel] Load/store i64 Stride=2 VF=32 interleaving costs adds 91373bf12ec6 [X86][Costmodel] Load/store i64 Stride=4 VF=16 interleaving costs adds 274b2439f839 [ConstantRange] Add fast signed multiply adds 498c7236bc76 [X86][SLM] +1uop for PSHUFBrm xmm adds 680afaaa5d92 [X86][SLM] Fix uops for PCLMULQDQ adds 5ed5df480257 [X86][SLM] Fix uops for PCMPISTR/PCMPISTR instructions adds 0bb32b1b2121 [X86][SLM] Fix BitTest+Set uops + port usage adds dbf5dc893069 [CostModel][X86] Add div/rem by negative power-of-2 constants adds f17f694a0fcf [fir] Add IfBuilder and utility functions adds dc3382dc2c12 [CostModel][X86] Add mul by positive/negative power-of-2 c [...] adds d245f2e8597b [clang] Use llvm::erase_if (NFC) adds c900b0a6d5f7 [lldb] Skip target variable test on AS adds fa16329ae072 [NFC] [LoopPeel] Change the way DT is updated for loop exits adds 8b7cc93e9dc7 [JITLink] Add comments, rename types for visitExistingEdge [...] adds 67c64d83378e [PowerPC] Implement scheduling model for Power10 adds f383c5331106 [MachineSink] Compile time improvement for large testcases [...] adds 3f0b178de21e [AArch64] Fixed a bug on AArch64MIPeepholeOpt adds 6e63f96e11ee [Parse] Improve diagnostic and recovery when there is an e [...] adds de4d2f80b75e Fix cyclic header dependency between Support<->Option due [...] adds a3939e159fc9 [lldb] Return StringRef from PluginInterface::GetPluginName adds 605efd5dd5bf Fix bazel build. adds 7cdb1df8c704 [AMDGPU] Divergence driven selection for fused bitlogic adds e9ff7d250e47 [AArch64][GISel] Add 8/16 bit uaddo lowering tests. adds 239b4d62b6c0 [lldb] [Utility] Remove Status::WasInterrupted() along wit [...] adds 942536ac084c [X86] Prefer VEX encoding in X86 assembler. adds 3d850d03ae4d [SelectionDAG] Fix illegal widening of scalable-vector loads adds 96351680833e [AIX][cmake] Set atomics related macros when build with xlclang adds d86992100452 [AMDGPU] Add patterns for i8/i16 local atomic load/store adds 36deb9a670d0 Add new MachineFunction property FailsVerification adds 012248b0bc8e Remove the verifyAfter mechanism that was replaced by D111397 adds ea970661dc74 Fix signed/unsigned comparison after b5426ced71280 adds a129932b0d45 [AMDGPU] Add link to bug adds a2d805c020a1 [clang][modules] Delay creating `IdentifierInfo` for names [...] adds d914aa4ead2a [lldb] Fix SymbolFilePDBTests for a3939e1 adds ee691fbc3de3 [lldb][NFC] clang format change adds c773f6501dba [NFC] Remove Block-ABI-Apple.txt adds baad10c09e44 Revert "[NFC] [LoopPeel] Change the way DT is updated for [...] adds d8bc7e40ce1c [lldb] [lldb-server] Refactor ConnectToRemote() adds c4ede6d60892 [DebugInfo][InstrRef] Avoid a crash during DBG_PHI maintenence adds d55db4b033f0 [AMDGPU] Remove unused VirtRegMap analysis. NFC. adds c4603a8a4384 [InstCombine][DebugInfo] Remove superflous assertion, add test adds c0782ba898ff [AArch64][SVE][CodeGen] Add tests for RSHRN{T,B} instructions adds b9ca73e1a8fd [DebugInfo] Correctly handle arrays with 0-width elements [...] adds 3b3509b3cba2 [Sema] haveSameParameterTypes - replace repeated isNull() [...] adds 5918688248fa [OpenMP][Tests][NFC] Flagging OMPT tests as XFAIL for Inte [...] adds c93fb143b98e [OpenMP][Tests][NFC] Work around ICC bug Older intel compi [...] adds 59a994e8daee [OpenMP][OMPT] thread_num determination for programs with [...] adds b37efed957ed [lldb] Fix PDB/compilands.test for a3939e1 adds c850d5c5c8a1 [X86][Costmodel] Add SSE2 sub-128bit vXi8/16 stride 2 inte [...] adds f04133815360 [X86][Costmodel] Add SSE2 sub-128bit vXi32/f32 stride 2 in [...] adds cbf778a592fa Remove also Block-ABI-Apple.txt from the Makefile adds 5644d152578f [analyzer][NFC] Add unittests for CallDescription and spli [...] adds 3ec7b91141da [analyzer][NFC] Refactor CallEvent::isCalled() adds 72d04d7b2b53 [analyzer] Allow matching non-CallExprs using CallDescriptions adds 2a3cc4d46184 [Analysis] add utility function for unary shuffle mask creation adds 1ef6bd9b1bff [lldb] Delete TestStandardUnwind adds f5056c8c16bb [AArch64] Improve shuffle vector by using wider types adds ac4e01ea0eb0 [SVE][CodeGen] Fix predicate for add/sub + element count patterns adds ee7ca88a3ec5 [InstCombine][DebugInfo] Remove superflous assertion, add [...] adds 366fb539485a [lldb] Fix missing dependency on libc++ from LLDB test sui [...] adds d5429a13da2b [mlir][python] Add 'loc' property to ops adds ac1c0dd3175a [ADT] Add some basic APInt::isPowerOf2() unit test coverage adds f5755c0849a5 [Mips] Add glue between CopyFromReg, CopyToReg and RDHWR n [...] adds 616a3cc01ef2 [libc++] Add the std::views::reverse range adaptor adds f193bcc701de Revert D105169 due to the two-stage failure in ASAN adds b0c4aaff24fb Allow only valid vector.shape_cast transitive folding adds 251b1e7c25b5 [libomptarget] Pass OMP_TARGET_OFFLOAD env variable throug [...] adds 1156bd4fc3a7 [LV] Record memory widening decisions (NFCI) adds a77cd55dea05 [mlir] Add support for specifying printing flags when addi [...] adds 7e5dbcdd59a2 [libc++][NFC] Fix typo in test adds 20211b32612b [mlir] Fix tsan failure in PassCrashRecovery adds f2c144fc1866 [LLD][TEST] Add testing for negative addends for R_X86_64_ [...] adds ab41a1c50558 [clang] Disable -clear-ast-before-backend with -print-stats adds d78136121eb1 [mlir] Add AnyAttrOf tablegen attribute constraint adds 6d6ad76a6037 [mlir][NFC] Provide accessor for TableGen record for constraints adds 8612b47a8e64 [NFC] ProfileSummary: const a bunch of members and fields. adds 31d3c0b33310 [ADT] Fix Wshift-overflow gcc warning in isPowerOf2 unit test adds 4a5ff56b1492 [mlir][docs] Fix name of get arith->LLVM patterns in docs adds 1fb24fe85a19 Reland [clang] Pass -clear-ast-before-backend in Clang::Co [...] adds 62627c721732 [Sanitizers] Replaced getMaxPointerSizeInBits with getPoin [...] adds 8568ca789ec1 Use llvm::erase_if (NFC) adds 63f8099e233c [OpenMP] libomp: add check of task function pointer for NULL. adds 009f3a89d833 BPF: remove intrindics @llvm.stacksave() and @llvm.stackrestore() adds 239bdf461cae [gn build] Port 009f3a89d833 adds 84d9bc51a33b [RISCV] Rewrite forwardCopyWillClobberTuple to not assume [...] adds 62bf850910e6 [mlir] Flipping Test dialect to prefixed form _Both adds e844f05397b7 [LoopUtils] Simplify addRuntimeCheck to return a single value. adds 51788a5aff87 [JITLink][NFC] Fix Wdangling-else warning in LinkGraphTests adds d24e721debb0 [AIX] Disable tests failing due to lack of 64-bit XCOFF ob [...] adds 2e4e2004afc5 Fix a comment in SemaSYCL to make sure I can commit adds e9e4fc0fd3e0 BPF: fix a bug in IRPeephole pass adds 74c4d44d47b2 [LV] Update test that was missed in e844f05397b72. adds 1300677f976e [AArch64][GlobalISel] combine and + [la]sr => ubfx adds f4a8526cc49f [NFC][BPF] fix comments and rename functions related to BT [...] adds 2ea5e7ba570a [mlir] SPIR-V: add sin, cos, log, sqrt OCL ops adds 79175f336c1f [runtimes] Use the new "runtimes" build by default and dep [...] adds bf32bb7e056c [mlir] Update approximation range for Tanh operation adds 9a2e9c5db692 Add tests for the other variants of BreakpointCreateBySour [...] adds d0d9be337e17 [libc++][NFC] Reorganize release notes adds 5b949a649aff Fix crash when diagnosing a CTAD failure in an array new e [...] adds be10b1f1cc5f [libcxx] Make allocator<T>:allocate throw bad_array_new_length adds 1ff367dbb02d Fix Linux error in TestBreakInLoadedDylib.py. adds 44b22f6f40f1 [MLIR] Expose optional attribute parsing functions adds 92b8cc52bbc8 [Support][ThinLTO] Move ThinLTO caching to LLVM Support library adds 25107cc8b1f7 [gn build] Port 92b8cc52bbc8 adds 8e46e34d2435 Revert "[Support][ThinLTO] Move ThinLTO caching to LLVM Su [...] adds ff6fe9a2f161 [gn build] Port 8e46e34d2435 adds 54d868991ab7 [ExpandMemCmp] Update CFG before DTU adds 62293e7d33ff Revert "[lldb] [lldb-server] Refactor ConnectToRemote()" adds a229a4aa6418 [lldb] [lldb-server] Refactor ConnectToRemote() adds 313c657fcea3 [InlineAdvisor] Add -inline-replay-scope=<Function|Module> [...] adds b9cfa016daae [SLP]Fix emission of the shrink shuffles. adds b8ce97372d85 [NewPM] Add PipelineTuningOption to eagerly invalidate analyses adds 04dc68710ad2 [DebugInfo][ARM] Fix incorrect debug information for RWPI [...] adds 431a5d841195 [x86] Implement a tagged-globals backend feature. adds 1053e0b27ce1 [RISCV] Use a lambda to avoid having the Support library d [...] adds 2f80b73e0cf0 [flang] Fold BTEST adds cdf9df65f48c [X86] Regenerate testb-je-fusion.ll with common NOFUSION/F [...] adds 9d1db3d4a197 [mlir][sparse] generalize sparse_tensor.convert on static/ [...] adds ecd25edfc5d9 [InlineCost] Add empty line between call sites when printi [...] adds 7cf1fef45f13 Suppress some bitwise-or-of-bool warnings with explicit int cast adds a83384498bee [X86] combineMulToPMADDWD - replace ASHR(X,16) -> LSHR(X,16) adds 2786dc1096a5 [InlineAdvisor][NFC] Fix tests added in D110658 on adds 20d397f85333 workflows: Migrate repo-lockdown to GitHub Actions adds 3be1f4b8fd53 repo-lockdown: Add pr comment and fix typo adds 0eed292fbae2 [CMake] Cache the compiler-rt library search results adds bd0cae6d1650 [mlir][sparse] Renaming variables for consistency/clarity adds 41f814589f20 [InlineAdvisor][NFC] Fix tests added in D110658 V2 adds c5011aed9c29 Add a "command container" hierarchy to allow users to add [...] adds b477b9277497 [RISCV] Fix typo in comment. NFC adds 0567f0333176 [HIP] [AlwaysInliner] Disable AlwaysInliner to eliminate u [...] adds 684b6265b31c [RISCV][TableGen] Remove HasMaskedOffOperand as a member o [...] adds 87c016078ad7 [libc] add atof, strtof and strtod adds 4ada6c2aafff [mlir][tosa] Adds a canonicalization to the transpose op i [...] adds cb5a10199b32 [test] Remove tests pinned to the legacy PM adds 15fefcb9eb3a [opt] Directly translate -O# to -passes='default<O#>' adds f24532ae91d5 Follow-on to fix a test from c5011aed9c297d6ddd8ee4f77453b [...] adds 252386ac81f9 [mlir] Add enclosingOpOk parameter to properlyDominates adds fd26ca4e7515 [mlir][scf] Add insideMutuallyExclusiveBranches helper adds bc03a9c066bf Simplify the TableManager class and move it into a public header. adds 21bb463e9639 [mlir] fix bugs with NamedAttrList adds facff468b6c4 [RISCV] Reorder the vector register allocation order. adds e678c5117710 [Support][ThinLTO] Move ThinLTO caching to LLVM Support library adds c531d3805d2b [JITLink] Use DEBUG_WITH_TYPE, rather than defining DEBUG_TYPE. adds a94bc9d81bfc Fix small typo in Block ABI docs adds 34173330bb3f [RISCV] Split RISCV vector builtins into their own file an [...] adds 39a1fcb9cf59 [RISCV] Remove the HasSideEffects property from riscv_vector.td adds cc3115cd1d35 [JITLink][x86-64] Lift GOT, PLT table managers into x86_64 [...] adds b68bf98c0ace [llvm-readobj] Delete redundant 'static' from namespace sc [...] adds 8189c4eee749 [tools] Delete redundant 'static' from namespace scope 'st [...] adds 957a5e987444 [lldb] Fix nullptr dereference in AppleObjCRuntimeV2 adds 7272982e1dfe [libomptarget] Refactor DeviceRTL prior to AMDGPU bringup adds dcc91dd2a798 first draft of a written policy around git repos adds 408e6de8c09f [Driver][Gnu] Support -shared -static: pass -shared to ld [...] adds cf65271e462f [llvm-shlib] Fix windows build failed while llvm non-stand [...] adds 5352ea4a721e [lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm* adds 9da51402f477 [DebugInfo][InstrRef] Fix Wdangling-else warning in InstrR [...] adds cf033bb2d39c [DebugInfo][NFC] Zero-initialize a class field adds e41ebbecf97a [mlir][RFC] Refactor layout representation in MemRefType adds cfaa5c344d5b [lldb] Filter duplicates in Target::GetScratchTypeSystems adds 134e1817f62c [lldb] change name demangling to be consistent between win [...] adds 9a57d1e52680 [lldb] Allow dumping the state of all scratch TypeSystems adds 8bac18be0e45 [lldb] Reduce code duplication around inferior building adds 849b17949f18 [DebugInfo][InstrRef] Avoid un-necessary densemap copies a [...] adds ee11612ee10e Revert "[lldb] [ABI/X86] Support combining xmm* and ymm*h [...] adds 7dfb1395549c [lldb] Adjust udt-layout.test after MS mangling change adds 8fbac4e88ac3 [clangd] Add code completion of param name on /* inside fu [...] adds 39f2b059633e [lldb] [Host] Make Terminal methods return llvm::Error adds c6d7f248bda3 [lldb] [ABI/X86] Refactor ABIX86::AugmentRegisterInfo() adds d576f4501439 [MLIR][OpenMP] Added parseClauses adds 45503fc04449 [fir] Add FIRBuilder utility functions adds 7a801138f8bd [runtimes] Make sure LLVM_LIT_ARGS is set before including [...] adds f97f946839d1 Canonicalize max/min operations on integers. adds 1c2c67b46b55 [lldb] [Process/Utility] Fix value_regs/invalidate_regs for ARM adds e1e2635327d7 [HWASan] Use tagged-globals feature on x86. adds 7df912c65d19 Revert "[lldb] [Process/Utility] Fix value_regs/invalidate [...] adds 71e39e3f1867 [ADT] Add APInt::isNegatedPowerOf2() helper adds 5cd28f71b1d9 [lldb] [Process/Utility] clang-format RegisterInfos_arm.h adds 28e0c3421653 [lldb] [Process/Utility] Define sN regs on ARM via helper macro adds ca889733a227 [libc++][docs] Mark LWG3420 complete adds 607fb1bb8c91 [AArch64] Always add -tune-cpu argument to -cc1 driver adds 5eaf5b916146 [PowerPC] Restrict various P10 options to P10 only. adds 10e08784ca27 [MLIR][OpenMP][NFC] Moved Synchronization Hint related functions adds 23db763b7dad Fix documentation errors introduced by 607fb1bb8c91a2f284d [...] adds 5ea35791e664 [AArch64] Split out processor/tuning features adds 3af474c0a15a Changes to print-changed classes in preparation for DotCfg [...] adds b492b0be95d9 [lldb] [Process/Utility] Define dN regs on ARM via helper macro adds cf68e1b2fb4f [Driver, Frontend] Use StringRef::contains (NFC) adds 6fd55bba61bb [libunwind] Add a from-scratch config for running libunwind tests adds b1ce4549307d [OpenMP] Remove macro guards for device debugging adds bf6b0d16747f [clang-tidy] Support globbing in NOLINT* expressions adds 7812cb72a321 Use reference type in for loop adds ac0561ebb734 [Verifier] Add context for assume operand bundles verifier errors adds 1529738b6619 [debugserver] Fix BUILDING_FOR_ARM64_OSX adds a66798cd67fe Remove unneeded variable num_found. adds b84da5ba6e31 [libc++] [test] Add tests for converting array types in sh [...] adds 081bad1d4d4e [x86] add tests for psubus; NFC adds c1ca9e3077cb [AMDGPU] add test for usubsat; NFC adds e2f16be5991a Fix clang-tidy warnings in MLIR Python bindings (NFC) adds a039746e1c0b [runtimes] Trigger CI on changes to libunwind adds 494dad6b72d4 [libc++][NFC] Mark LWG3573 as complete adds 622c40722e14 [libc++] Make __weekday_from_days private in weekday adds 9403514e7649 [LoopPredication] Calculate profitability without BPI adds dc8a5f9419f5 [RISCV] Use llvm::stable_sort instead of std::stable_sort. NFC adds fca0218875f5 [indvars] Canonicalize exit conditions to unsigned using r [...] adds 0836a1059dcf Extend transform introduced in D111896 to multiple exits adds 08619006a0c0 [SCEV] Avoid compile time explosion in ScalarEvolution::is [...] adds 57553ce43281 Revert "Reland [clang] Pass -clear-ast-before-backend in C [...] adds 9c44a0996c8c [SCEV] Fix formatting error introduced by D112080 adds 8ac5a6641fa4 [lldb] improve the help strings for gdb-remote and kdp-remote adds 6fe902daf931 [cuda] Add address space predicate funuctions. adds 5e004b03f72a [lldb/test] Update test/API/functionalities/load_lazy to macOS 12 adds 91e19f66e51a [driver] Explicitly specify `-fbuild-session-timestamp` in [...] adds c983aeddcf5a [fir] Add character utility functions in FIRBuilder adds e2faf721b2b9 [x86] add tests for psubus; NFC adds 17386cb4dc89 [clang][Driver] Make multiarch output file basenames reproducible adds 92a0389b0425 [x86] add special-case lowering for usubsat for pre-SSE4 adds 922bf57fc8fe [Driver][Gnu] Delete unneeded -Bstatic dispatch for arm/thumb adds 9660563950aa [llvm-reduce] Add reduction passes to reduce operands to u [...] adds 1813fde9cc0b [WebAssembly] Emit clangast in custom section aligned by 4 bytes adds 9c62bb55f473 Implementation of `ReshapeNoopOptimization` canonicalizer. adds a897590f11b6 Add MLIR_INSTALL_AGGREGATE_OBJECTS and default it to ON. adds b6b7fe60a444 [NVPTX] Add a late SROA pass which allows optimizing away [...] adds cd40b5a71290 BPF: set .BTF and .BTF.ext section alignment to 4 adds 320f65ee65f4 [LLDB][NFC] Remove parameter names from forward declaratio [...] adds 2542bfa43a97 [WebAssembly] Add prototype relaxed swizzle instructions adds ea9826ff7719 [ORC-RT] Avoid switching out-of-band error value into __or [...] adds 21369d4b9d92 [ORC-RT] Use function pointer type (rather than reference) [...] adds b574c52db533 [ORC-RT] Add MethodWrapperHandler utility for WrapperFunction. adds 9378ca52ca6e [NFC] Fix typos adds 063c2f89aa7f [clang] Add option to disable -clear-ast-before-backend adds e8c245dcd3b9 [llvm-profgen] Skip duplication factor outside of body sam [...] adds 269f563a2bcd [NARY-REASSOCIATE] Fix infinite recursion optimizing min\max adds de10a02fc067 [CSKY] Complete to add basic integer instruction set adds 660c511e5b79 [Flang][flang-omp-report] Switch from std::string to Strin [...] adds e9fe8ef4b0aa [flang] flang-omp-report replace std::map with llvm::DenseMap adds 5e969125c609 [clang-format] git-clang-format throws an assertion when r [...] adds 57e00810edd7 [clang-format] [PR52015] clang-format should put __attribu [...] adds 6d0c7bc17de8 [WebAssembly] Implementation of table.get/set for reftypes [...] adds 862e8d7e5520 [AArch64] Improve div and rem costmodel tests. NFC adds ec428f7b7806 [SPARC] Recognize the prefetch instruction adds f903c8505515 [AArch64] Emit .cfi_negate_ra_state for PAC-auth instructions. adds ffbff6c511ba [lldb/DWARF] Ignore debug info pointing to the low addresses adds f45d7407168d [docs] Fix hyperlink adds 551d118805c8 [lldb/test] Remove quote/unquote steps from the make invocations adds 956df6fa620a [lldb] Improve assert message in TestCPPAccelerator adds 9fc523d11408 [X86] Remove X86ProcFamilyEnum::IntelSLM adds 6561c074c072 [lldb] [Process/Utility] Define qN regs on ARM via helper macro adds ab2ca8496d54 consteval if does not form a discarded statement adds 5b395bd63363 [CostModel][X86] Add costs for multiply-by-pow2 constants adds a3c05982ac05 [SLP][X86] Improve SLP tests for division/multiplication b [...] adds 5a8ad80b6fa5 [libunwind] Use the from-scratch testing configuration by default adds be6c8dc765c3 [SelectionDAG] Fix getVectorSubVecPointer for scalable sub [...] adds 192331b890e2 [lldb] [Process/Linux] Support arbitrarily-sized FPR write [...] adds 99277a81f807 [lldb] [Process/Utility] Fix value_regs/invalidate_regs for ARM adds f290efc32622 [lldb] [ABI/X86] Support combining xmm* and ymm*h regs into ymm* adds a413663d8fea [NewPM][test] Avoid using -enable-new-pm=1 since -passes i [...] adds 57bd67abfcb8 [NewPM][test] Use -passes syntax in SpeculativeExecution l [...] adds 15f1fb5a302d [NewPM][test] Use -passes syntax in BoundsChecking lit tests adds 5e4dbd7a2fb0 [NewPM][test] Use -passes syntax in VectorCombine lit tests adds e9320b1a95a6 [NewPM][test] Only use -passes syntax in Scalarizer lit tests adds cbe3b6b21f6d [libc++] Move LIBCXX-DEBUG-FIXME to params.py adds 9e7b7303f1d3 [libFuzzer] Update InputInfo.TimeOfUnit when replacing it [...] adds 6bb7d2474fe4 [mlir][Linalg] Add a first vectorization pattern for conv1 [...] adds 89950ade216b [DebugInfo][InstrRef] Track a single variable at a time adds 6a9942339099 [mlir] Expand prefixing to OpFormatGen adds 3efd2a0bec02 [x86] make helper for useVPTERNLOG; NFC adds c959da9ef344 [clangd] Only publish preamble after rebuilds adds 60e19f6752b7 [clangd] Fix use-after-free in HeaderIncluderCache adds fe1f0de00335 [RISCV][WebAssembly][TargetLowering] Allow expandCTLZ/expa [...] adds 0abb5d293cf7 [Sema, StaticAnalyzer] Use StringRef::contains (NFC) adds a3ca7dd0ab99 [NewPM][test] Use -passes syntax in Mem2Reg lit tests adds 3d152bc49ddc [NewPM][test] Strickly use -passes in some more lit tests adds aab0f2264aeb [lld-macho] Fix dangling string reference when adding frameworks adds 16be17ad4b13 [analyzer][NFC] Refactor llvm::isa<> usages in the StaticAnalyzer adds a29dfc089d18 [RISCV] Use clang_builtin_alias for all RISCV vector intrinsics. adds eabf11f9ea8d [CodeGenPrepare] Avoid a scalable-vector crash in ctlz/cttz adds fe66433fe119 [clang] Add plugin ActionType to run command line plugin b [...] adds c4c7e06bd700 [MLIR][OpenMP] Shifted hint from CriticalOp to CriticalDeclareOp adds ea9a0556b451 [InstCombine] add tests for casted insertelement; NFC adds 99d1ce4a621a [OpenMP] Add GOMP allocator functions adds e1fb13401e1b [WebAssembly] Add prototype relaxed float min max instructions adds 6b6564fcf9f5 Fix unused variable warning. adds 310736e098f8 [mlir] fix region property generation in python bindings adds 7562f3df8906 InvalidPtrChecker - don't dereference a dyn_cast<> - use c [...] adds 08ed216000b6 [IR] Refactor GlobalIFunc to inherit from GlobalObject, Re [...] adds 2caf7571e102 [Clang][AST] Resolve FIXME: Remove ObjCObjectPointer from [...] adds 00500d5bad22 [NFC] De-template LazyCallGraph::visitReferences() and mov [...] adds 6b82adbb4980 Raise compile error when using unimplemented functions adds 503d061dc7a8 Precommit InstCombine/and-xor-or.ll test. NFC. adds fb8829768d77 [clang] Disallow mixing SEH and Objective-C exceptions adds 5692ed0cce8c [ORC-RT] Configure the ORC runtime for more architectures [...] adds 80ab06c599a0 [InstCombine] fold fake vector insert to bit-logic adds 1412719066a6 [lld/mac] Remove else-after-return in ICF code adds 5d57578a4e48 [MC] Recursively calculate symbol offset adds 618583565687 [AMDGPU] Allow rematerialization of SOP with virtual registers adds c80d8a8ceabb [AMDGPU] MachineLICM cannot hoist VALU adds 207998c242c8 [lldb] Remove variable "any" which is set but not used adds b046eb19b8a4 [AArch64][GlobalISel] combine (and (or x, c1), c2) => (and [...] adds a3dd4e777095 Drop transfer_read inner most unit dimensions adds 4e21caece0dd Update ext-int test to have x86 linux/windows before ABI Impl adds 02d7089c2390 [fir] Add Character helper adds 35037ae1971a Make dr177x.cpp test work with Windows-32 bit platfroms wi [...] adds bd5494d127a3 [mlir][sparse] make index type explicit in public API of s [...] adds 8977bd58067d [IndVars] Invalidate SCEV when IR is changed in rewriteLoo [...] adds 3c59cdee5caa Precommit updated InstCombine/and-xor-or.ll test. NFC. adds 8dc44d8dd872 Remove include of 'type_info' from ext-int test. adds b92412fb286b [InstCombine] Fold `(a & ~b) & ~c` to `a & ~(b | c)` adds 048688fd80fa [libc++] Fix incorrect main() signatures in the tests adds 40163f1df8c6 [x86] add special-case lowering for usubsat for AVX512 adds 676d091c630c Revert "[fir] Add Character helper" adds 8e4ae603d6ec [Tests] Add tests for non-speculatable ephemeral values adds ff5050a3a4f2 [libc++abi] Guard include of <unistd.h> behind __has_include adds 070a2ddcb665 [libunwind] Revert "Use the from-scratch testing configura [...] adds 3cea2505fd8d [runtimes] Rename CI job from "Runtimes build" to "Bootstr [...] adds f3671de5500f Revert "[ORC-RT] Configure the ORC runtime for more archit [...] adds cb9a0dc293cf [ARM] Fix inline assembly referencing floating point regis [...] adds 6ea7437ca5a4 [SelectionDAG] Bail out of mergeTruncStores when not optimizing adds 9ef55ddc3fe2 [lld-macho] Temporarily disable lc-linker-option.ll on Windows adds 4e1a6c07052b [msan] Add stat-family interceptors on Linux adds b75f3dd88e25 [ARM] Use correct name of floating point ceil intrinsic in test. adds 34188f237f25 [Driver][OpenBSD] Some improvements to the external assemb [...] adds dc2be87ecf10 [MLIR][OpenMP] Add support for ordered construct adds c5931267db26 [modules] While merging ObjCInterfaceDecl definitions, mer [...] adds edff0070a126 [Codegen] Set ARITH_FENCE as meta-instruction adds 6b715e9c4d9c [lld-macho][nfc] Added some notes on deliberate difference [...] adds 6742c8a2d83a [NFC][msan] Break the loop when done adds 60a8db6dc5a4 [NFC][msan] Rerun update_test_checks.py for a test adds 66b650f3da70 [NFC][msan] Add NormalArgAfterNoUndef testcase adds 1302fdc233f4 [ELF] Avoid adding an orphan section to a less suitable segment adds cb11ddb96c47 Revert "[MLIR][OpenMP] Add support for ordered construct" adds 1123e03a9d94 [opt-viewer] Use safe yaml load_all adds d531e5cf5841 [LLDB] [NFC] Typo fix in usage text for "type filter" command adds 76db6d80805a [NFC][LoopIdiom] Add more test case to runtime-determined [...] adds e4ce92245c96 [fir] Add Character helper adds 46fb5d5ddffd [lldb][NFC] clang-format CPlusPlusLanguage.cpp adds 9c55e718f537 [mlir][linalg][bufferize] Bufferize using PostOrder traversal adds 65ef43e288ad [mlir][linalg][bufferize][NFC] Check return value of getRe [...] adds b37e5187f22f [MLIR][OpenMP] Add support for ordered construct adds 92fb574c9f20 [lldb] [Host] Add setters for common teletype properties t [...] adds 9448cdc90007 [SVE][Analysis] Tune the cost model according to the tune- [...] adds 36ec848dc718 [mlir][linalg][bufferize][NFC] Change findValueInReverseUs [...] adds 1a8ec24efbae [NARY-REASSOCIATE][NFC] Simplify min/max handling adds 4a7b4beac759 [lldb] Add serial:// protocol for connecting to serial port adds 4745e4178397 [lldb] [unittest] Disable SetParity() tests on Linux entirely adds cbe789844703 [lldb] [Host/Terminal] Add missing #ifdef for baudRateToConst() adds b8c3683d46f9 [lldb] [Host/SerialPort] Add std::moves for better compatibility adds 9635b2951da1 [docs] Fix broken link rendering in the LLVM Coding Standards. adds b471e25a5924 [clang] Support __float128 on DragonFlyBSD. adds 7bbd7e9c1d1d Revert "[fir] Add Character helper" adds 49be23a1eb57 [libcxx] Support allocators with explicit c-tors in vector<bool> adds 05a2d1766864 [libcxx] Throw correct exception from std::vector::reserve adds 9ba5bb43099d [NFC][LoopIdiom] Make for loops more readable adds 5a3556aa5563 [lldb] Add omitted abstract formal parameters in DWARF sym [...] adds 376c1389f6f3 [mlir] Use empty() calls where possible. adds 898e80964c95 [mlir] Fix a crash when creating a 1d zero element LLVM constant adds 2ace1e5753a4 [lldb] Remove ConstString from GetPluginNameStatic of some [...] adds 39724158d387 [lldb] Silence -Wpessimizing-move warning adds aad244dfc566 Revert "AddGlobalAnnotations for function with or without [...] adds 954d77b98dd6 [clang][deps] Ensure reported context hash is strict adds 24616664afd4 [clang][deps] NFC: Remove redundant CompilerInstance reference adds 207e9fdea704 [clang][deps] NFC: Rename scanning CompilerInstance adds c62220f9623d [clang][deps] NFC: Rename building CompilerInvocation adds 9bfe7af15976 [ARM] Add new abs test. NFC adds 302a165e18fd [MIPS] Fix switching between 32/64-bit variants of r6 targ [...] adds 0d153df69e8f [SVE] Fix selection failure when splitting extended masked loads adds 6c88086ba804 [lldb] Fix a thinko in 2ace1e57 adds b8b14b682c33 [clang][deps] Make resource directory deduction configurable adds 7ff4f48adb26 Relax assert in ExprConstant to a return None. adds c5501a7a5c58 [mlir][linalg][bufferize] Eliminate InitTensorOps of Inser [...] adds 7a7e93f1225c [mlir][linalg][bufferize] Avoid creating copies that are n [...] adds 94213bc7decb [mlir][linalg][bufferize] Fix bug in getInplaceableOpResult adds 5f8228d31062 [mlir][linalg][bufferize] Fix bufferizesToMemoryWrite for [...] adds 3ea7877c8b62 [SLP]Unify vectorization of PHI and store nodes with impro [...] adds fa111d30855e [SystemZ][z/OS] Additional test coverage for validating di [...] adds d2198771e9cc [DAGCombiner] fold bit-hack form of usubsat adds aa3519f178fc [SystemZ][z/OS] Initial implementation for lowerCall on z/OS adds 72117f2ffeb6 [runtimes] Properly handle the sysroot/triple/gcc-toolchain adds 88303693ce97 Do not downcast uint64_t to unsigned in UniqueID hash computation adds 6b560a8e235b [InstCombine] add tests for DeMorgan with reassociation; NFC adds 3888de9507c7 [InstCombine] generalize reassociated Demorgan folds adds a602c2b51dcc [libomptarget][DeviceRTL] Generalise and simplify cmakelists adds 203accf0bdde [mlir][Linalg] Improve conv vectorization for the stride==1 case. adds 5c72323141e4 [ORC-RT] Remove stray printf debugging output. adds 77fdc0e56bf9 [lld-macho] Simplify lc-linker-option.ll and re-enable it [...] adds 56df1d80e291 [libc++] Use addressof in vector. adds b396010240cd [Clang] Support typedef with btf_decl_tag attributes adds f6811cec8421 [DebugInfo] Support typedef with btf_decl_tag attributes adds dccfaddc6bcc [clang] Use StringRef::contains (NFC) adds b8da59475076 Reapply [ORC-RT] Configure the ORC runtime for more archit [...] adds 2dcad7754a20 [clang] Don't clear AST if we have consumers running after [...] adds cfca2ae1f5ba Update the C++ and C status pages now that Clang 13 has be [...] adds acfe7d895d2f Update the title and encoding for the C++ status page adds baea663a6e9b [IPT] Restructure cache to allow lazy update following inv [...] adds 92673fad66f4 [RISCV] Add a test showing incorrect VSETVLI insertion adds 19b07ec00062 Reland [clang] Pass -clear-ast-before-backend in Clang::Co [...] adds 66d22b4da4af [VectorCombine] fold shuffle-of-binops with common operand adds 13c31539f7da [fir] Add Character helper adds 92a6dd6e50c8 [test][ORC-RT] Disable x86_64 tests when target arch does [...] adds 21f9e4a1ed91 Avoid infinity arithmetics when computing exp approximations adds b7144ab76517 [NFC] Clean up a few methods within GreedyPatternRewriter adds 5652ecc3739d [mlir:GreedyPatternRewriter] Add debug logging for pattern [...] adds a4b8979a81af [SLP] Add additional tests which caused crashes with versioning. adds ba4920e98e2f Revert "[CMake] Cache the compiler-rt library search results" adds 408075ec6a95 Add the papers that were applied to the latest C2x working draft adds 3781a46c3c70 Revert "[IPT] Restructure cache to allow lazy update follo [...] adds d55be79d7548 [RISCV] Expand scalable vector CTTZ/CTLZ/CTPOP. adds ab3d5d053367 Revert "[compiler-rt/profile] Hide __llvm_profile_raw_version" adds f7587a9d38f4 Follow-up on https://github.com/llvm/llvm-project/commit/8 [...] adds 184852584231 [CodeMetrics] Don't require speculatability for ephemeral values adds 626f0449f345 [Triple] Don't repeat the function name in comments. NFC adds aee49255074f Recommit: Compress formatting of array type names (int [4] [...] adds d723ad5bcf71 Enable libc++ in the build for libcxx initializerlist pret [...] adds fdb66eda77a0 [test] Make sure plugin actually runs in clear-ast-before- [...] adds 8262f45c73ae [InstCombine] Add additional store forwarding test (NFC) adds 52f4922ebb7b [OpenMP][NFC] skip atomic tests for non-x86 arch adds d9eca3320a4d [modules] Fix tracking ObjCInterfaceType decl when there a [...] adds 0472e83ffcc6 BPF: emit BTF_KIND_DECL_TAG for typedef types adds d7b338537cf3 Modify "statistics dump" to dump JSON. adds 439fc09fed32 [gn build] Port d7b338537cf3 adds 969b72fb662b Add test to check we can instcombine after reassociate. NFC. adds 64f002c6d36d Follow-up fixes for aee49255074fd4ef38d97e6e70cbfbf2f9fd0fa7 adds 3087a8488948 [libcxx] [test] Add an XFAIL for the timespec test for Min [...] adds 6836629f8891 [libcxx] [test] Add a specific XFAIL for a MinGW env failu [...] adds 2ba572a82a35 [fir] Remove createConcatenate test temporarily adds 5dc339d9825f [AArch64][GlobalISel] Fold 64-bit cmps with 64-bit adds adds 1d8cc45b0e4e [mlir][vector] Add patterns to convert multidimreduce to v [...] adds 93d0ade17c2d [mlir][linalg] Remove special case for contraction vectorization adds 910838f07da7 Fix buildbots after https://reviews.llvm.org/D111686 adds 5c0369eceb2c Fix escaping in RewriterGen.cpp. adds 458ed5fcc362 [TargetLowering][RISCV] Prevent scalarization of fixed vec [...] adds db0486c46fe1 Remove unused parallel-libs project adds 95935e8285ad Make genAttributeVerifier escape the summary. adds 516884f58b46 [MLIR] Fix FloorDivSIOpConverter that was failing for inde [...] adds 8c1368052420 PR18733: Remove -Wweak-template-vtables adds f5ee1acc62d5 [libcxx] [test] Convert an XFAIL: LIBCXX-WINDOWS-FIXME int [...] adds 048d2c76efcd [modules] Update visibility for merged ObjCInterfaceDecl d [...] adds c0d6e1b9e0b1 [InstCombine] Precommit new and-xor-or.ll tests. NFC. adds ff37b1105d6e [LegalizeVectorOps][X86] Don't defer BITREVERSE expansion [...] adds 0bf230d42206 [fir] Remove unused function in CharacterTest adds 996123e5e8d9 [TargetLowering] Simplify the interface for expandCTPOP/ex [...] adds c16655f138b1 [docs] Remove Makefile.sphinx files adds 6c6abb1ded8d [RISCV] Remove Zvamo C intrinsics and builtins. adds 05c21f54a454 compiler-rt: Fix arch detection for ppc64le adds 09b95b9dc9af [lldb] Always set the minimum OS version in the Darwin builder adds d7733f84228b [DebugInfo] Expand ability to load 2-byte addresses in dwa [...] adds 08f4b56fb979 [lldb] Include unistd.h for sleep in profile_vrs_detach adds 2e97236aacbb [Demangle] Rename OutputStream to OutputString adds 4976be1e955d [gn build] Make 'compiler-rt' depend on include dir adds 3bbc869e2ef2 [mlir][linalg][bufferize] Support scf::IfOp adds ca0c92d6a1cc [AMDGPU] Allow to use a whole register file on gfx90a for VGPRs adds b7ea298dfd83 [msan] Don't use TLS slots of noundef args adds 34c97d5ae354 [libcxxabi] Fix build after D111947 adds a48bfc2c09ac [gn build] Port 2e97236aacbb adds ddbf1961941b [Coroutines] Ignore partial lifetime markers refer of an alloca adds 85bf221f204e Fix for OutputStream->OutputBuffer rename adds 13755436bb3d [PowerPC] return early if there is no preparing candidate [...] adds 86a5c3261643 [PowerPC] iterate on the SmallSet directly; NFC adds 3b93dc6880f7 Add basic aarch64-none-elf bare metal driver. adds 4ff103c02400 [clang][ASTImporter] Fix for importing functions with EST_ [...] adds a2e7af75166d [fir] Add utility function to FIRBuilder and MutableBox adds 71cfce832054 [lldb] Fix TestCompressedVectors after array type name change adds b5e9f83ea48e [lldb] Remove ConstString from ABI, Architecture and Disas [...] adds 01b4ddbfbbad [Analyzer][NFC] Move RangeConstraintManager's def before C [...] adds e2a2c8328f57 [Analyzer][NFC] Add RangedConstraintManager to ConstraintAssignor adds 5f8dca023504 [Analyzer] Extend ConstraintAssignor to handle remainder op adds e5b87fb7222c Fix baremetal.cpp test to handle windows paths. adds 74c6895b39e3 [RISCV] Fix missing cross-block VSETVLI insertion adds cac8808f154c [analyzer][solver] Introduce reasoning for not equal to operator adds eda2ebd78073 [mlir][Vector] NFC - Extract rewrites related to insert/ex [...] adds d46531567919 [LLVM-C]Add LLVMAddMetadataToInst, deprecated LLVMSetInstD [...] adds 66e06cc8cba3 [llvm] [ADT] Update llvm::Split() per Pavel Labath's suggestions adds 99a64cc9da29 AMDGPULibCalls::parseFunctionName - use reference instead [...] adds 49e1753c5ef9 Mark baremetal.cpp test as unsupported on Windows. adds 8b8070e23442 Host::GetOSBuildString adds 8ae83a1bafdf [NFC][LV] Autogenerate check lines in a test for ease of f [...] adds 2eaef530232e [TTI] `BasicTTIImplBase::getInterleavedMemoryOpCost()`: fi [...] adds a750332d7701 AMDGPULibCalls - constify some FuncInfo& arguments. NFCI. adds 6f6842d782a1 Revert "[NFC][LV] Autogenerate check lines in a test for e [...] adds e1db72703f65 [NFC] Re-harden test/Transforms/LoopVectorize/X86/pr48340.ll adds 43f8845dd371 [lldb] Fix build errors from 8b8070e23 adds ff569ed03092 [lldb] [Utility/UriParser] Replace port==-1 with llvm::None adds 286e98b97ebe [DSE] Add test cases with more complex redundant stores. adds 3f00e10bddd7 [mlir][OpenMP]Support for modifiers in workshare loops adds 74cd4dee20e8 [AMDGPU] Preserve deadness of vcc when shrinking instructions adds d8e50c9dba7a [CodeGen] Add PR50197 AArch64/ARM/X86 test coverage adds f37463b2eef6 [lldb] Another build fix for 8b8070e23 adds fd5e3f36f218 Replace references to Makefile.sphinx adds 8fac9e95ade9 [X86] `X86TTIImpl::getInterleavedMemoryOpCost()`: scale in [...] adds 0bd6a9f2d1ea [clang/llvm] Inclusive language: replace segregate with separate adds cfe22cd4ef9d [AArch64][SVE] Add new ld<n> intrinsics that return a stru [...] adds 3085e678519e [Flang][docs] Remove an out-dated section on the new driver adds c87a4a46b217 [libc++][test][NFC] Add tests for std::vector comparisons adds 7457fe3dd44a [InstCombine][NFC] Precommit new tests adds 09dc8ab74c94 [libc++][doc] Fixes FeatureTestMacroTable.html. adds 7593f68a0551 [libc++][nfc] Remove double spaces. adds 12b44bf5ee3e [SystemZ] Give the EXRL_Pseudo a size value of 6 bytes. adds 6fe949c4edf1 [Target, Transforms] Use StringRef::contains (NFC) adds ba02586fbe18 [OpenMP][OMPT][GOMP] task frame support in KMP_API_NAME_GO [...] adds ce7b8343beb6 [RISCV] Merge vector tests for rv32 and rv64 into a single [...] adds 28ef8052d228 [AIX] Enable rtl for plugins test adds 0766aef3f32d [LegalizeTypes][RISCV][PowerPC] Expand CTLZ/CTTZ/CTPOP ins [...] adds 5bb7562962de [Attributor] Generalize GEP construction adds 3a10fe2d893f [Loads] Use more powerful constant folding API adds 7ea5409e42c8 [libc++] Fix tests after aee49255074f adds 950f22a5e13c [llvm]Inclusive language: replace master with main adds 0f12cf7ebaaf [lldb] Pass the target triple when determining the DWARF version adds 04c184bba7d7 [TargetLowering] Simplify the interface of expandABS. NFC adds d9eebe3cd783 [DebugInfo][InstrRef] Add unit tests for transfer-function [...] adds 412eb07edd4e [indvars] Use fact loop must exit to canonicalize to unsig [...] adds a5f56342b017 [DAG] narrowExtractedVectorLoad - EXTRACT_SUBVECTOR indice [...] adds d4da71282f6e [InstCombine] Various tests for truncating saturates and r [...] adds d5074c716664 [flang] Fix bogus folding error for ISHFT(x, negative) adds 93139a3c3266 [LegalizeTypes] Only expand CTLZ/CTTZ/CTPOP during type pr [...] adds b03628d986d4 [flang] Emit unformatted headers & footers even with RECL= adds e7084ceab312 [DebugInfo][Instr] Track subregisters across stack spills/ [...] adds f2360e1156d0 [flang] Enforce rest of semantic constraint C919 adds e6f39c8b4891 [libunwind] Fix path to libunwind for per-target-runtime-d [...] adds 6cf69179170e [Dexter] Add DexFinishTest command to conditionally early- [...] adds 4d692daa3a6a [ConstantFolding] Drop misleading comment (NFC) adds 27181cad0d4e Support: Add Expected<T>::moveInto() to avoid extra names adds 55f7cc1a9a2a [InstCombine] Precommit new and-xor-or.ll tests. NFC. adds 2915889d74b1 [ScheduleDAGInstrs] Call adjustSchedDependency in more cases adds 3f34f75a68c3 [AMDGPU] Fix latency for implicit vcc_lo operands on GFX10 wave32 adds 42e4959253e0 [lldb/Formatters] Remove space from vector type string sum [...] adds 58e7ec471c3e [AMDGPU] Run SIShrinkInstructions before post-RA scheduling adds 489fec277788 [mlir][Linalg] NFC - Drop Optional in favor of FailureOr adds ae698f89b8a4 AMDGPU: Fix hardcoded registers in tests adds 7d962f9ca365 AMDGPU: Regenerate MIR test checks adds c4ba1108dd60 [flang] Extension to distinguish specific procedures adds 2410fb4616b2 Support: Use Expected<T>::moveInto() in a few places adds a41837d1dad3 [libc++][NFC] Remove duplicate Python imports adds cd824f9e39c8 [X86] Fix bad formatting. NFC adds 8d4b74ac3f1f AMDGPU: Don't consider whether amdgpu-flat-work-group-size [...] adds ec57b3755111 AMDGPU: Use attributor to propagate amdgpu-flat-work-group-size adds e4235bdf26a2 Fix locals naming in DNBArchMachARM64::GetGPRState for 32- [...] adds 89d55d3c86f0 [mlir][Linalg] Retire CodegenStrategy::transform adds 236197e2d026 [lld-macho] Implement -oso_prefix adds b8452dba28e7 [flang] Support NAMELIST input of short arrays adds 14b90d1fe0d7 [flang] Fix generic resolution case adds a5a493e19205 [flang] Speed common runtime cases of DOT_PRODUCT & MATMUL adds 61cfdf636dc7 [BasicAA] Model implicit trunc of GEP indices adds bf6f955f393f [libomptarget] Run GPU offloading tests on both new and ol [...] adds ce71f8e01742 [flang] Fix crash on empty formatted external READs adds fbb020fb48be [flang] Extension: allow tabs in output format strings adds f6aac0dd4d13 [flang] Fix DOT_PRODUCT for logical adds 89a927c67812 [flang] Fix NAMELIST input bug with multiple subscript triplets adds b83242e20e09 [flang] Support legacy usage of 'A' edit descriptors for i [...] adds e18ea6f2946a Support: Skip buffering buffer_unique_ostream's owned stream adds ec2a25296fec [gn build] Port e18ea6f2946a adds 4e3eebc6bd32 [tools, utils] Use StringRef::contains (NFC) adds fc3f92a8f457 [flang] Fix buildbot (new warnings on old code) adds b432583d28ee [NFC][X86] Add MC tests for all untested VIA PadLock instructions adds 2d8c18fbbdd1 [X86] Don't add implicit REP prefix to VIA PadLock xstore new 7088da480c33 [NFC] Correct arc draft option new 5de69e16ea9a [clang-tidy] Tidy up spelling, grammar, and inconsistencie [...]

The 2 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .github/lockdown.yml | 8 - .github/workflows/repo-lockdown.yml | 18 + README.md | 3 +- .../clang-tidy/ClangTidyDiagnosticConsumer.cpp | 82 +- clang-tools-extra/clang-tidy/GlobList.cpp | 5 +- clang-tools-extra/clang-tidy/GlobList.h | 5 +- .../VirtualClassDestructorCheck.cpp | 19 +- clang-tools-extra/clangd/ClangdLSPServer.cpp | 2 +- clang-tools-extra/clangd/CodeComplete.cpp | 113 +- clang-tools-extra/clangd/IncludeCleaner.cpp | 12 +- clang-tools-extra/clangd/TUScheduler.cpp | 13 +- .../clangd/test/initialize-params.test | 3 +- .../clangd/unittests/ClangdLSPServerTests.cpp | 2 +- .../clangd/unittests/CodeCompleteTests.cpp | 31 +- .../clangd/unittests/DiagnosticsTests.cpp | 2 +- clang-tools-extra/clangd/unittests/HoverTests.cpp | 2 +- .../clangd/unittests/IncludeCleanerTests.cpp | 41 + .../clangd/unittests/TUSchedulerTests.cpp | 47 +- clang-tools-extra/docs/ReleaseNotes.rst | 3 + clang-tools-extra/docs/clang-tidy/Contributing.rst | 10 +- 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llvm/test/Analysis/CostModel/X86/div.ll | 609 + .../CostModel/X86/gather-i16-with-i8-index.ll | 36 +- .../CostModel/X86/gather-i32-with-i8-index.ll | 36 +- .../CostModel/X86/gather-i64-with-i8-index.ll | 36 +- .../CostModel/X86/gather-i8-with-i8-index.ll | 36 +- .../CostModel/X86/interleaved-load-f32-stride-2.ll | 8 +- .../CostModel/X86/interleaved-load-f32-stride-3.ll | 5 +- .../CostModel/X86/interleaved-load-f32-stride-4.ll | 3 + .../CostModel/X86/interleaved-load-f64-stride-2.ll | 7 +- .../CostModel/X86/interleaved-load-f64-stride-4.ll | 3 + .../CostModel/X86/interleaved-load-i16-stride-2.ll | 8 +- .../CostModel/X86/interleaved-load-i16-stride-5.ll | 3 + .../CostModel/X86/interleaved-load-i16-stride-6.ll | 3 + .../interleaved-load-i32-stride-2-indices-0u.ll | 19 +- .../CostModel/X86/interleaved-load-i32-stride-2.ll | 8 +- .../interleaved-load-i32-stride-3-indices-01u.ll | 11 +- .../interleaved-load-i32-stride-3-indices-0uu.ll | 11 +- .../CostModel/X86/interleaved-load-i32-stride-3.ll | 3 + .../interleaved-load-i32-stride-4-indices-012u.ll | 11 +- .../interleaved-load-i32-stride-4-indices-01uu.ll | 11 +- .../interleaved-load-i32-stride-4-indices-0uuu.ll | 11 +- .../CostModel/X86/interleaved-load-i32-stride-4.ll | 3 + .../CostModel/X86/interleaved-load-i64-stride-2.ll | 7 +- .../CostModel/X86/interleaved-load-i64-stride-4.ll | 3 + .../X86/interleaved-store-f32-stride-2.ll | 4 +- .../X86/interleaved-store-f32-stride-3.ll | 3 + .../X86/interleaved-store-f32-stride-4.ll | 3 + .../X86/interleaved-store-f64-stride-2.ll | 3 + .../X86/interleaved-store-f64-stride-4.ll | 3 + .../X86/interleaved-store-i16-stride-2.ll | 8 +- .../X86/interleaved-store-i16-stride-5.ll | 3 + .../X86/interleaved-store-i16-stride-6.ll | 3 + .../X86/interleaved-store-i32-stride-2.ll | 4 +- .../X86/interleaved-store-i32-stride-3.ll | 3 + .../X86/interleaved-store-i32-stride-4.ll | 3 + .../X86/interleaved-store-i64-stride-2.ll | 3 + .../X86/interleaved-store-i64-stride-4.ll | 3 + .../CostModel/X86/interleaved-store-i8-stride-2.ll | 12 +- llvm/test/Analysis/CostModel/X86/mul.ll | 716 + llvm/test/Analysis/CostModel/X86/mul32.ll | 20 +- llvm/test/Analysis/CostModel/X86/rem.ll | 628 + ...-evolution-prove-implications-via-truncation.ll | 218 + .../Analysis/StackSafetyAnalysis/i386-bug-fix.ll | 24 + llvm/test/Bitcode/attr-btf_tag-typedef.ll | 54 + .../GlobalISel/combine-and-or-disjoint-mask.mir | 83 + .../form-bitfield-extract-from-shr-and.mir | 190 + .../AArch64/GlobalISel/merge-stores-truncating.ll | 9 +- .../test/CodeGen/AArch64/GlobalISel/select-cmp.mir | 291 +- .../CodeGen/AArch64/GlobalISel/uaddo-8-16-bits.mir | 872 ++ llvm/test/CodeGen/AArch64/concat-vector.ll | 3 +- llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll | 408 +- llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll | 2901 +++-- llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll | 281 +- llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll | 2359 ++-- llvm/test/CodeGen/AArch64/icmp-shift-opt.ll | 142 + .../AArch64/machine-outliner-retaddr-sign-cfi.ll | 3 +- .../machine-outliner-retaddr-sign-regsave.mir | 1 + .../machine-outliner-retaddr-sign-sp-mod.mir | 9 + .../AArch64/machine-outliner-retaddr-sign-thunk.ll | 5 + .../CodeGen/AArch64/misched-fusion-addr-tune.ll | 40 + llvm/test/CodeGen/AArch64/neon-widen-shuffle.ll | 179 + llvm/test/CodeGen/AArch64/sign-return-address.ll | 84 +- .../CodeGen/AArch64/sve-fixed-length-concat.ll | 3 +- .../AArch64/sve-fixed-length-limit-duplane.ll | 28 + .../CodeGen/AArch64/sve-fp-immediates-merging.ll | 1071 ++ llvm/test/CodeGen/AArch64/sve-insert-vector.ll | 20 + .../CodeGen/AArch64/sve-intrinsics-fp-arith-imm.ll | 1309 ++ .../sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll | 568 + .../sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll | 284 + llvm/test/CodeGen/AArch64/sve-masked-ldst-sext.ll | 20 + llvm/test/CodeGen/AArch64/sve-masked-ldst-zext.ll | 20 + .../sve2-intrinsics-binary-narrowing-shr.ll | 73 + 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llvm/test/CodeGen/AMDGPU/occupancy-levels.ll | 2 +- .../propagate-attributes-flat-work-group-size.ll | 49 - .../AMDGPU/propagate-flat-work-group-size.ll | 214 + .../CodeGen/AMDGPU/r600.amdgpu-alias-analysis.ll | 2 +- llvm/test/CodeGen/AMDGPU/remat-sop.mir | 60 + llvm/test/CodeGen/AMDGPU/schedule-ilp.ll | 2 +- .../CodeGen/AMDGPU/schedule-regpressure-limit3.ll | 2 +- llvm/test/CodeGen/AMDGPU/sdiv64.ll | 152 +- llvm/test/CodeGen/AMDGPU/shrink-carry.mir | 8 +- llvm/test/CodeGen/AMDGPU/srem64.ll | 74 +- llvm/test/CodeGen/AMDGPU/target-cpu.ll | 4 +- llvm/test/CodeGen/AMDGPU/udiv64.ll | 74 +- .../AMDGPU/unstructured-cfg-def-use-issue.ll | 24 +- llvm/test/CodeGen/AMDGPU/urem64.ll | 112 +- llvm/test/CodeGen/AMDGPU/usubsat.ll | 36 + llvm/test/CodeGen/AMDGPU/vgpr-agpr-limit-gfx90a.ll | 700 + .../vgpr-descriptor-waterfall-loop-idom-update.ll | 6 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 6 +- llvm/test/CodeGen/ARM/alloc-no-stack-realign.ll | 105 +- llvm/test/CodeGen/ARM/arm-post-indexing-opt.ll | 325 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llvm/test/CodeGen/PowerPC/pcrel-tail-calls.ll | 35 +- llvm/test/CodeGen/PowerPC/popcnt-zext.ll | 134 +- llvm/test/CodeGen/PowerPC/ppc64-acc-regalloc.ll | 50 +- llvm/test/CodeGen/PowerPC/ppc64-i128-abi.ll | 35 +- llvm/test/CodeGen/PowerPC/ppc64-rop-protection.ll | 256 +- llvm/test/CodeGen/PowerPC/reg-names.ll | 1 + llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll | 12 +- llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll | 12 +- llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll | 16 +- llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll | 16 +- llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll | 16 +- llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll | 16 +- llvm/test/CodeGen/PowerPC/spill-vec-pair.ll | 48 +- llvm/test/CodeGen/PowerPC/testComparesi32gtu.ll | 12 +- llvm/test/CodeGen/PowerPC/testComparesi32ltu.ll | 12 +- .../CodeGen/RISCV/GlobalISel/calllowering-ret.ll | 13 +- llvm/test/CodeGen/RISCV/attributes.ll | 20 +- llvm/test/CodeGen/RISCV/bswap-ctlz-cttz-ctpop.ll | 427 +- llvm/test/CodeGen/RISCV/byval.ll | 2 +- llvm/test/CodeGen/RISCV/calls.ll | 6 +- llvm/test/CodeGen/RISCV/copy-frameindex.mir | 22 +- llvm/test/CodeGen/RISCV/double-calling-conv.ll | 6 +- llvm/test/CodeGen/RISCV/double-previous-failure.ll | 2 +- llvm/test/CodeGen/RISCV/fastcc-int.ll | 4 +- llvm/test/CodeGen/RISCV/imm.ll | 42 +- llvm/test/CodeGen/RISCV/rv64zbb.ll | 455 +- llvm/test/CodeGen/RISCV/rvv/abs-sdnode.ll | 48 +- .../RISCV/rvv/access-fixed-objects-by-rvv.ll | 6 +- .../CodeGen/RISCV/rvv/addi-scalable-offset.mir | 4 +- llvm/test/CodeGen/RISCV/rvv/combine-splats.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/combine-store-fp.ll | 4 +- .../CodeGen/RISCV/rvv/common-shuffle-patterns.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/constant-folding.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/ctlz-sdnode.ll | 3017 +++++ llvm/test/CodeGen/RISCV/rvv/ctpop-sdnode.ll | 1142 ++ llvm/test/CodeGen/RISCV/rvv/cttz-sdnode.ll | 2555 ++++ llvm/test/CodeGen/RISCV/rvv/extload-truncstore.ll | 500 +- llvm/test/CodeGen/RISCV/rvv/extract-subvector.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/extractelt-fp-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv32.ll | 180 +- llvm/test/CodeGen/RISCV/rvv/extractelt-int-rv64.ll | 144 +- .../RISCV/rvv/fixed-vector-strided-load-store.ll | 132 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-abs.ll | 192 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll | 56 +- .../CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll | 1768 +-- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll | 2673 +--- .../RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll | 70 +- .../RISCV/rvv/fixed-vectors-calling-conv.ll | 498 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz.ll | 12977 ++----------------- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop.ll | 968 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz.ll | 9067 ++----------- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll | 32 +- .../RISCV/rvv/fixed-vectors-extload-truncstore.ll | 1338 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract-i1.ll | 120 +- .../RISCV/rvv/fixed-vectors-extract-subvector.ll | 290 +- .../CodeGen/RISCV/rvv/fixed-vectors-extract.ll | 294 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll | 36 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll | 56 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-conv.ll | 152 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll | 792 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-shuffles.ll | 80 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll | 84 +- .../CodeGen/RISCV/rvv/fixed-vectors-fp-vrgather.ll | 66 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 1152 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll | 508 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-i2fp.ll | 432 +- .../CodeGen/RISCV/rvv/fixed-vectors-insert-i1.ll | 142 +- .../RISCV/rvv/fixed-vectors-insert-subvector.ll | 240 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll | 136 +- .../RISCV/rvv/fixed-vectors-int-buildvec.ll | 316 +- .../RISCV/rvv/fixed-vectors-int-exttrunc.ll | 158 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-setcc.ll | 326 +- .../RISCV/rvv/fixed-vectors-int-shuffles.ll | 252 +- .../CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll | 450 +- .../RISCV/rvv/fixed-vectors-int-vrgather.ll | 80 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll | 5024 +++---- .../RISCV/rvv/fixed-vectors-mask-buildvec.ll | 100 +- .../RISCV/rvv/fixed-vectors-mask-load-store.ll | 48 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-logic.ll | 78 +- .../CodeGen/RISCV/rvv/fixed-vectors-mask-splat.ll | 200 +- .../RISCV/rvv/fixed-vectors-masked-gather.ll | 554 +- .../RISCV/rvv/fixed-vectors-masked-load-fp.ll | 224 +- .../RISCV/rvv/fixed-vectors-masked-load-int.ll | 262 +- .../RISCV/rvv/fixed-vectors-masked-scatter.ll | 572 +- .../RISCV/rvv/fixed-vectors-masked-store-fp.ll | 200 +- .../RISCV/rvv/fixed-vectors-masked-store-int.ll | 240 +- .../RISCV/rvv/fixed-vectors-reduction-fp-vp.ll | 72 +- .../RISCV/rvv/fixed-vectors-reduction-fp.ll | 566 +- .../RISCV/rvv/fixed-vectors-reduction-int-vp.ll | 592 +- .../RISCV/rvv/fixed-vectors-reduction-int.ll | 2400 ++-- .../RISCV/rvv/fixed-vectors-reduction-mask-vp.ll | 60 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-fp.ll | 96 +- .../CodeGen/RISCV/rvv/fixed-vectors-select-int.ll | 244 +- .../CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll | 278 +- .../CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll | 44 +- .../CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll | 34 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll | 34 +- .../CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll | 30 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll | 44 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll | 44 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll | 44 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrdiv-vp.ll | 44 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfrsub-vp.ll | 44 +- .../CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll | 44 +- .../CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll | 24 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll | 24 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpgather.ll | 672 +- .../CodeGen/RISCV/rvv/fixed-vectors-vpscatter.ll | 480 +- .../RISCV/rvv/fixed-vectors-vreductions-mask.ll | 78 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll | 34 +- .../CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll | 30 +- .../CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll | 12 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll | 12 +- .../CodeGen/RISCV/rvv/fixed-vectors-vselect.ll | 116 +- .../CodeGen/RISCV/rvv/fixed-vectors-vshl-vp.ll | 4 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsra-vp.ll | 8 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsrl-vp.ll | 6 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll | 12 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll | 12 +- .../CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll | 24 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmacc.ll | 150 +- .../CodeGen/RISCV/rvv/fixed-vectors-vwmaccu.ll | 150 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll | 250 +- .../test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll | 200 +- .../CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/insert-subvector.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/insertelt-fp-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/insertelt-i1.ll | 144 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll | 208 +- llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv64.ll | 144 +- llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll | 128 +- .../test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll | 16 + .../RISCV/rvv/legalize-scalable-vectortype.ll | 8 +- .../CodeGen/RISCV/rvv/legalize-store-sdnode.ll | 16 + llvm/test/CodeGen/RISCV/rvv/load-add-store-16.ll | 40 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-32.ll | 32 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-64.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/load-add-store-8.ll | 48 +- llvm/test/CodeGen/RISCV/rvv/load-mask.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/localvar.ll | 28 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv32.ll | 216 +- .../CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll | 216 +- llvm/test/CodeGen/RISCV/rvv/mask-reg-alloc.mir | 6 +- llvm/test/CodeGen/RISCV/rvv/mgather-sdnode.ll | 240 +- llvm/test/CodeGen/RISCV/rvv/mscatter-sdnode.ll | 236 +- .../RISCV/rvv/named-vector-shuffle-reverse.ll | 488 +- .../CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/rv32-spill-zvlsseg.ll | 20 +- .../CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll | 18 +- llvm/test/CodeGen/RISCV/rvv/rv64-spill-zvlsseg.ll | 20 +- llvm/test/CodeGen/RISCV/rvv/rvv-framelayout.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/select-fp.ll | 120 +- llvm/test/CodeGen/RISCV/rvv/select-int.ll | 320 +- llvm/test/CodeGen/RISCV/rvv/select-sra.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll | 460 +- llvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll | 460 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv32.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/sink-splat-operands.ll | 224 +- llvm/test/CodeGen/RISCV/rvv/stepvector.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/urem-seteq-vec.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vaadd-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vaaddu-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vadc-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv32.ll | 837 -- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode-rv64.ll | 809 -- llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll | 862 ++ llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll | 46 +- llvm/test/CodeGen/RISCV/rvv/vand-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv32.ll | 1329 -- llvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv64.ll | 1301 -- llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll | 1354 ++ llvm/test/CodeGen/RISCV/rvv/vand-vp.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vasubu-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vcompress-rv64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vdiv-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll | 958 -- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll | 894 -- llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll | 1181 ++ llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vdivu-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv32.ll | 1001 -- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv64.ll | 925 -- llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll | 1169 ++ llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll | 32 +- llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv32.ll | 619 - llvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv64.ll | 619 - llvm/test/CodeGen/RISCV/rvv/vexts-sdnode.ll | 620 + llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll | 256 +- llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll | 60 +- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll | 60 +- .../test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vfpext-sdnode.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vfptoi-sdnode.ll | 508 +- llvm/test/CodeGen/RISCV/rvv/vfptrunc-sdnode.ll | 104 +- llvm/test/CodeGen/RISCV/rvv/vfrdiv-vp.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfrsub-vp.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv32.ll | 48 +- llvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll | 48 +- llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv32.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/vfwadd-rv64.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll | 48 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll | 48 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll | 48 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll | 48 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll | 28 +- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll | 28 +- .../test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/vfwmul-rv64.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv32.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll | 56 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vitofp-sdnode.ll | 424 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll | 340 +- llvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll | 340 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll | 340 +- llvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll | 340 +- llvm/test/CodeGen/RISCV/rvv/vmacc-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vmadc-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll | 272 +- llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll | 264 +- llvm/test/CodeGen/RISCV/rvv/vmadd-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmax-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv32.ll | 867 -- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode-rv64.ll | 839 -- llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll | 892 ++ llvm/test/CodeGen/RISCV/rvv/vmaxu-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv32.ll | 867 -- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv64.ll | 839 -- llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll | 892 ++ llvm/test/CodeGen/RISCV/rvv/vmerge-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv32.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv32.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfge-rv64.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv32.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfle-rv64.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv32.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv32.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmfne-rv64.ll | 192 +- llvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv32.ll | 867 -- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv64.ll | 839 -- llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll | 892 ++ llvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv32.ll | 867 -- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv64.ll | 839 -- llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll | 892 ++ llvm/test/CodeGen/RISCV/rvv/vmsbc-rv32.ll | 12 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll | 184 +- .../test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv64.ll | 176 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll | 70 +- llvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll | 70 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv32.ll | 414 +- llvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll | 396 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv32.ll | 554 +- llvm/test/CodeGen/RISCV/rvv/vmsge-rv64.ll | 540 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv32.ll | 554 +- llvm/test/CodeGen/RISCV/rvv/vmsgeu-rv64.ll | 540 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll | 414 +- llvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll | 396 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv32.ll | 414 +- llvm/test/CodeGen/RISCV/rvv/vmsgtu-rv64.ll | 396 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll | 70 +- llvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll | 70 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv32.ll | 414 +- llvm/test/CodeGen/RISCV/rvv/vmsle-rv64.ll | 396 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll | 414 +- llvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll | 396 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv32.ll | 414 +- llvm/test/CodeGen/RISCV/rvv/vmslt-rv64.ll | 396 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv32.ll | 414 +- llvm/test/CodeGen/RISCV/rvv/vmsltu-rv64.ll | 396 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv32.ll | 414 +- llvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll | 396 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll | 70 +- llvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll | 70 +- llvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv32.ll | 896 -- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode-rv64.ll | 868 -- llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll | 921 ++ llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vmulh-sdnode-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vmulhsu-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vmulhu-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vmv.x.s-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv32.ll | 108 +- llvm/test/CodeGen/RISCV/rvv/vnclip-rv64.ll | 108 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv32.ll | 108 +- llvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll | 108 +- llvm/test/CodeGen/RISCV/rvv/vnmsac-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv32.ll | 108 +- llvm/test/CodeGen/RISCV/rvv/vnsra-rv64.ll | 108 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll | 108 +- llvm/test/CodeGen/RISCV/rvv/vnsrl-rv64.ll | 108 +- llvm/test/CodeGen/RISCV/rvv/vor-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll | 1120 -- llvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv64.ll | 1093 -- llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll | 1146 ++ llvm/test/CodeGen/RISCV/rvv/vor-vp.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vpgather-sdnode.ll | 452 +- llvm/test/CodeGen/RISCV/rvv/vpopc-rv32.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vpopc-rv64.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vpscatter-sdnode.ll | 228 +- .../CodeGen/RISCV/rvv/vreductions-fp-sdnode.ll | 324 +- llvm/test/CodeGen/RISCV/rvv/vreductions-fp-vp.ll | 108 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv32.ll | 672 +- .../test/CodeGen/RISCV/rvv/vreductions-int-rv64.ll | 576 +- llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll | 888 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask-vp.ll | 84 +- llvm/test/CodeGen/RISCV/rvv/vreductions-mask.ll | 28 +- llvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv32.ll | 978 -- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv64.ll | 938 -- llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll | 1231 ++ llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll | 36 +- llvm/test/CodeGen/RISCV/rvv/vremu-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv32.ll | 1037 -- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv64.ll | 985 -- llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll | 1235 ++ llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll | 32 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll | 324 +- llvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll | 360 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll | 112 +- llvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll | 112 +- llvm/test/CodeGen/RISCV/rvv/vrsub-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv32.ll | 559 - llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv64.ll | 531 - llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll | 584 + llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vsadd-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vselect-fp-rv64.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vselect-mask.ll | 42 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll | 98 +- .../CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir | 90 + llvm/test/CodeGen/RISCV/rvv/vsetvli-regression.ll | 4 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll | 76 +- llvm/test/CodeGen/RISCV/rvv/vsext-rv64.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv32.ll | 630 - llvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv64.ll | 630 - llvm/test/CodeGen/RISCV/rvv/vshl-sdnode.ll | 631 + llvm/test/CodeGen/RISCV/rvv/vshl-vp.ll | 6 +- llvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll | 30 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vslide1up-rv64.ll | 72 +- llvm/test/CodeGen/RISCV/rvv/vsm-rv32.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsm-rv64.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll | 544 +- llvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll | 704 +- llvm/test/CodeGen/RISCV/rvv/vsplats-i1.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv32.ll | 803 -- llvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv64.ll | 803 -- llvm/test/CodeGen/RISCV/rvv/vsra-sdnode.ll | 804 ++ llvm/test/CodeGen/RISCV/rvv/vsra-vp.ll | 10 +- llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv32.ll | 583 - llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv64.ll | 583 - llvm/test/CodeGen/RISCV/rvv/vsrl-sdnode.ll | 584 + llvm/test/CodeGen/RISCV/rvv/vsrl-vp.ll | 8 +- llvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vssubu-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll | 12 +- llvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv32.ll | 816 -- llvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv64.ll | 788 -- llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll | 841 ++ llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv32.ll | 544 +- llvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll | 704 +- llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv32.ll | 315 - llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv64.ll | 315 - llvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode.ll | 316 + llvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwadd-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vwadd.w-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vwaddu-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwmul-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwmulu-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwmulu-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwsub-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwsubu-rv64.ll | 96 +- llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv64.ll | 60 +- llvm/test/CodeGen/RISCV/rvv/vxor-rv32.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv32.ll | 1329 -- llvm/test/CodeGen/RISCV/rvv/vxor-sdnode-rv64.ll | 1301 -- llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll | 1354 ++ llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll | 88 +- llvm/test/CodeGen/RISCV/rvv/zvlsseg-zero-vl.ll | 16 +- .../CodeGen/RISCV/select-optimize-multiple.mir | 348 +- llvm/test/CodeGen/RISCV/shlimm-addimm.ll | 408 + .../test/CodeGen/RISCV/srem-seteq-illegal-types.ll | 60 +- .../test/CodeGen/RISCV/urem-seteq-illegal-types.ll | 96 +- llvm/test/CodeGen/SystemZ/call-zos-01.ll | 191 + llvm/test/CodeGen/SystemZ/call-zos-vararg.ll | 195 + llvm/test/CodeGen/SystemZ/call-zos-vec.ll | 66 + llvm/test/CodeGen/SystemZ/int-const-02.ll | 26 + llvm/test/CodeGen/SystemZ/loop-03.ll | 2 +- llvm/test/CodeGen/SystemZ/memcmp-01.ll | 27 + llvm/test/CodeGen/SystemZ/memcpy-01.ll | 25 + llvm/test/CodeGen/SystemZ/memset-05.ll | 139 +- llvm/test/CodeGen/SystemZ/mverify-optypes.mir | 6 +- .../CodeGen/SystemZ/tail-call-mem-intrinsics.ll | 8 - llvm/test/CodeGen/Thumb2/abs.ll | 207 + .../test/CodeGen/WebAssembly/externref-tableget.ll | 76 + .../test/CodeGen/WebAssembly/externref-tableset.ll | 82 + .../test/CodeGen/WebAssembly/funcref-table_call.ll | 32 + llvm/test/CodeGen/WebAssembly/funcref-tableget.ll | 76 + llvm/test/CodeGen/WebAssembly/funcref-tableset.ll | 82 + llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 106 + llvm/test/CodeGen/WebAssembly/simd-unsupported.ll | 9 +- llvm/test/CodeGen/X86/abs.ll | 68 +- llvm/test/CodeGen/X86/bitreverse.ll | 9 +- llvm/test/CodeGen/X86/combine-abs.ll | 2 +- llvm/test/CodeGen/X86/combine-bitreverse.ll | 9 +- llvm/test/CodeGen/X86/iabs.ll | 10 +- llvm/test/CodeGen/X86/icmp-shift-opt.ll | 334 + llvm/test/CodeGen/X86/neg-abs.ll | 174 +- llvm/test/CodeGen/X86/parity-vec.ll | 10 +- llvm/test/CodeGen/X86/parity.ll | 18 +- llvm/test/CodeGen/X86/pmulh.ll | 83 +- llvm/test/CodeGen/X86/popcnt.ll | 15 +- llvm/test/CodeGen/X86/psubus.ll | 165 + llvm/test/CodeGen/X86/tagged-globals-pic.ll | 45 + llvm/test/CodeGen/X86/tagged-globals-static.ll | 45 + llvm/test/CodeGen/X86/testb-je-fusion.ll | 194 +- llvm/test/CodeGen/X86/vector-bitreverse.ll | 704 +- .../X86/vector-interleaved-load-i16-stride-5.ll | 1557 +++ .../X86/vector-interleaved-load-i16-stride-6.ll | 1833 +++ .../X86/vector-interleaved-load-i32-stride-3.ll | 777 ++ .../X86/vector-interleaved-load-i32-stride-4.ll | 905 ++ .../X86/vector-interleaved-load-i64-stride-2.ll | 343 + .../X86/vector-interleaved-load-i64-stride-4.ll | 519 + .../X86/vector-interleaved-store-i16-stride-5.ll | 1289 ++ .../X86/vector-interleaved-store-i16-stride-6.ll | 1162 ++ .../X86/vector-interleaved-store-i32-stride-3.ll | 655 + .../X86/vector-interleaved-store-i32-stride-4.ll | 675 + .../X86/vector-interleaved-store-i64-stride-2.ll | 372 + .../X86/vector-interleaved-store-i64-stride-4.ll | 470 + .../DebugInfo/ARM/machine-cp-updates-dbg-reg.mir | 4 + llvm/test/DebugInfo/ARM/rwpi.ll | 34 + .../MIR/AArch64/dbgcall-site-indirect-param.mir | 13 +- .../MIR/AArch64/dbgcall-site-orr-moves.mir | 9 +- .../InstrRef/livedebugvalues_stackslot_subregs.mir | 56 + .../livedebugvalues_subreg_substitutions.mir | 11 +- .../MIR/InstrRef/pick-vphi-in-shifting-loop.mir | 128 + .../DebugInfo/MIR/X86/callsite-stack-value.mir | 9 +- .../DebugInfo/MIR/X86/debug-call-site-param.mir | 19 +- llvm/test/DebugInfo/MSP430/cu-ranges.ll | 72 + llvm/test/DebugInfo/MSP430/dwarf-basics-v5.ll | 154 + llvm/test/DebugInfo/MSP430/ranges_always.ll | 241 + llvm/test/DebugInfo/NVPTX/debug-info.ll | 8 +- llvm/test/DebugInfo/X86/attr-btf_tag-typedef.ll | 69 + llvm/test/DebugInfo/X86/convert-loclist.ll | 5 +- llvm/test/DebugInfo/salvage-gep.ll | 19 +- llvm/test/DebugInfo/salvage-limit-expr-size.ll | 47 + llvm/test/DebugInfo/symbolize-demangling.s | 14 +- llvm/test/Demangle/ms-options.test | 57 +- .../Instrumentation/BoundsChecking/many-trap.ll | 4 +- .../Instrumentation/BoundsChecking/many-traps-2.ll | 2 +- llvm/test/Instrumentation/BoundsChecking/opt.ll | 2 +- llvm/test/Instrumentation/BoundsChecking/phi.ll | 2 +- .../Instrumentation/BoundsChecking/simple-32.ll | 2 +- llvm/test/Instrumentation/BoundsChecking/simple.ll | 1 - .../Instrumentation/MemorySanitizer/msan_eager.ll | 59 +- .../MemorySanitizer/msan_llvm_launder_invariant.ll | 4 +- .../MemorySanitizer/msan_llvm_strip_invariant.ll | 4 +- llvm/test/MC/CSKY/basic.s | 270 +- llvm/test/MC/Hexagon/sysregs.s | 83 + llvm/test/MC/Hexagon/sysregs2.s | 168 + llvm/test/MC/Hexagon/sysregs3.s | 13 + llvm/test/MC/MachO/chained-alias-offset.s | 12 + llvm/test/MC/RISCV/attribute-arch.s | 15 +- llvm/test/MC/RISCV/attribute-with-insts.s | 2 +- llvm/test/MC/RISCV/insn-invalid.s | 5 + llvm/test/MC/RISCV/invalid-attribute.s | 4 +- llvm/test/MC/RISCV/rv32i-invalid.s | 2 +- llvm/test/MC/RISCV/rv32zbbp-valid.s | 8 +- llvm/test/MC/RISCV/rv64zba-aliases-valid.s | 40 + llvm/test/MC/Sparc/sparcv9-instructions.s | 10 + llvm/test/MC/SystemZ/insn-bad-zos-z13.s | 60 + llvm/test/MC/SystemZ/insn-bad-zos-z14.s | 23 + llvm/test/MC/SystemZ/insn-bad-zos-z15.s | 41 + llvm/test/MC/SystemZ/insn-bad-zos-z196.s | 59 + llvm/test/MC/SystemZ/insn-bad-zos.s | 158 + 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