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from 3bd8feb970a AMDGPU: Turn D16 for MIMG instructions into a regular operand new 6694c8fd847 AMDGPU: Add implicit def of SCC to kill and indirect pseudos new f474189510d AMDGPU: Pass AMDGPUSampleVariant to MIMG_{Sampler,Gather}(_WQM) new 2b1cd517a0e TableGen/SearchableTables: Support more generic enums and tables new db5003ee85e AMDGPU: Use generic tables instead of SearchableTable new f6113ec066b AMDGPU: Refactor MIMG instruction TableGen using generic tables new d42a61b0d4f AMDGPU: Select MIMG instructions manually in SITargetLowering new 330c65751e0 AMDGPU: Convert test cases to the dimension-aware intrinsics new 7f7cea53068 InstCombine/AMDGPU: Add dimension-aware image intrinsics to [...] new 4c3fa871b5a AMDGPU: Remove old-style image intrinsics new ec3300aa1eb AMDGPU: Remove redundant MIMG instruction variants new 21650449492 [CodeGen] Avoid handling DBG_VALUE in LiveRegUnits::stepBackward
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Summary of changes: docs/TableGen/BackEnds.rst | 16 + include/llvm/IR/IntrinsicsAMDGPU.td | 219 +--- include/llvm/TableGen/SearchableTable.td | 131 +- lib/CodeGen/LiveRegUnits.cpp | 4 +- lib/Target/AMDGPU/AMDGPU.td | 1 + lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 76 -- lib/Target/AMDGPU/AMDGPUISelLowering.h | 84 -- lib/Target/AMDGPU/AMDGPUInstrInfo.cpp | 7 +- lib/Target/AMDGPU/AMDGPUInstrInfo.h | 11 +- lib/Target/AMDGPU/AMDGPUSearchableTables.td | 58 +- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 37 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 14 +- lib/Target/AMDGPU/MIMGInstructions.td | 1291 +++++++------------- lib/Target/AMDGPU/SIISelLowering.cpp | 586 ++++----- lib/Target/AMDGPU/SIISelLowering.h | 2 + lib/Target/AMDGPU/SIInstrFormats.td | 14 - lib/Target/AMDGPU/SIInstrInfo.td | 184 --- lib/Target/AMDGPU/SIInstructions.td | 12 +- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 97 +- lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 39 +- lib/Transforms/InstCombine/CMakeLists.txt | 4 + lib/Transforms/InstCombine/InstCombineInternal.h | 4 + .../InstCombine/InstCombineSimplifyDemanded.cpp | 239 ++-- lib/Transforms/InstCombine/InstCombineTables.td | 11 + .../AMDGPU/llvm.amdgcn.image.atomic.ll | 78 +- .../AMDGPU/adjust-writemask-invalid-copy.ll | 24 +- test/CodeGen/AMDGPU/coalescer-subrange-crash.ll | 66 - test/CodeGen/AMDGPU/commute-shifts.ll | 4 +- .../CodeGen/AMDGPU/constant-address-space-32bit.ll | 10 +- test/CodeGen/AMDGPU/else.ll | 4 +- test/CodeGen/AMDGPU/image-schedule.ll | 15 +- test/CodeGen/AMDGPU/insert-skips-kill-uncond.mir | 2 +- test/CodeGen/AMDGPU/insert_vector_elt.ll | 9 +- .../CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll | 1 + test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.ll | 130 -- test/CodeGen/AMDGPU/llvm.amdgcn.image.d16.ll | 123 -- test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll | 47 +- .../AMDGPU/llvm.amdgcn.image.gather4.d16.ll | 102 -- .../AMDGPU/llvm.amdgcn.image.gather4.dim.ll | 1 + test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.ll | 362 ------ .../AMDGPU/llvm.amdgcn.image.gather4.o.dim.ll | 118 ++ .../CodeGen/AMDGPU/llvm.amdgcn.image.getlod.dim.ll | 34 + test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.ll | 53 - test/CodeGen/AMDGPU/llvm.amdgcn.image.ll | 210 ---- .../CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.ll | 137 --- .../CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll | 90 ++ test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.ll | 435 ------- .../AMDGPU/llvm.amdgcn.image.sample.o.dim.ll | 371 ++++++ test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.ll | 427 ------- test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll | 20 + test/CodeGen/AMDGPU/llvm.amdgcn.ps.live.ll | 6 +- test/CodeGen/AMDGPU/llvm.amdgcn.s.waitcnt.ll | 12 +- test/CodeGen/AMDGPU/print-mir-custom-pseudo.ll | 4 +- test/CodeGen/AMDGPU/sgpr-copy.ll | 31 +- test/CodeGen/AMDGPU/si-lod-bias.ll | 59 - test/CodeGen/AMDGPU/si-scheduler.ll | 9 +- test/CodeGen/AMDGPU/si-sgpr-spill.ll | 234 +--- test/CodeGen/AMDGPU/skip-if-dead.ll | 6 +- test/CodeGen/AMDGPU/split-smrd.ll | 4 +- test/CodeGen/AMDGPU/subreg-coalescer-crash.ll | 4 +- test/CodeGen/AMDGPU/undefined-subreg-liverange.ll | 7 +- test/CodeGen/AMDGPU/unigine-liveness-crash.ll | 30 +- test/CodeGen/AMDGPU/wqm.ll | 92 +- test/MC/AMDGPU/gfx7_asm_all.s | 786 ++++++------ test/MC/AMDGPU/gfx8_asm_all.s | 836 ++++++------- test/TableGen/generic-tables-instruction.td | 36 + test/TableGen/generic-tables.td | 138 +++ test/TableGen/searchabletables-intrinsic.td | 19 +- .../AMDGPU/amdgcn-demanded-vector-elts.ll | 979 +++++++-------- utils/TableGen/SearchableTableEmitter.cpp | 835 ++++++++++--- 70 files changed, 4026 insertions(+), 6115 deletions(-) create mode 100644 lib/Transforms/InstCombine/InstCombineTables.td delete mode 100644 test/CodeGen/AMDGPU/coalescer-subrange-crash.ll delete mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.ll delete mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.image.d16.ll delete mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.d16.ll delete mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.ll create mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.o.dim.ll create mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.dim.ll delete mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.ll delete mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.image.ll delete mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.ll delete mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.ll create mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.dim.ll delete mode 100644 test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.o.ll delete mode 100644 test/CodeGen/AMDGPU/si-lod-bias.ll create mode 100644 test/TableGen/generic-tables-instruction.td create mode 100644 test/TableGen/generic-tables.td