[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3 updated (aacfbb953eb7 -> 9b6f264d2b09)

9 Nov 2021


      This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3
in repository toolchain/ci/llvm-project.
from  aacfbb953eb7 [Clang/Test]: Rename enable_noundef_analysis to disable-no [...]
      adds  63fff0f5bffe Fix lit test failures in CodeGenCoroutines
      adds  025a2f73a319 [InstCombine] add tests for umax with sub; NFC
      adds  83c2fb9f66be [InstCombine] match usub.sat from umax intrinsic
      adds  39c4c7d3912a [DAGCombiner] remove vselect fold that was accidentally added
      adds  f8efc5c0ac68 [NFC][TTI] Add/extract `getReplicationShuffleCost()` metho [...]
      adds  a30ec4778a47 [TTI][CostModel] `getUserCost()`: recognize replication sh [...]
      adds  19a7e4729da5 [MLIR][OpenMP] Added omp.sections and omp.section
      adds  1c2ad70fd50f [Test][SLPVectorizer] Precommit test for PR52275
      adds  23566f18c629 [NFC][X86][Costmodel] Add tests for i32/i64 replication shuffles
      adds  f8627877a94f [SCEV] Make eraseValueFromMap() private (NFC)
      adds  859a6d973f3d [llvm-objdump] Remove untested diagnostic "missing data di [...]
      adds  e3cec17b2db2 [InstSimplify] Remove incorrect icmp of gep fold (PR52429)
      adds  14d656b3d805 [Target] Use llvm::reverse (NFC)
      adds  815e8b5a2022 [Hexagon] Remove an extraneous variable (NFC)
      adds  cefc01fa65a7 [X86] Simplify a call to MachineBasicBlock::erase (NFC)
      adds  9f0194be4570 [ConstantRange] Add getEquivalentICmp() variant with offse [...]
      adds  2249ecee8d9a [IR][ShuffleVector] Fix Wdangling-else warning in Instruct [...]
      adds  d9e2c8f54dde [yaml2obj][COFF] Make some PEHeader fields optional
      adds  bbab17c6c987 [Clang][Attr] fix a btf_type_attr CGDebugInfo codegen bug
      adds  843d1eda18c3 [llvm] Use llvm::reverse (NFC)
      adds  e4bab21848dc [AMDGPU] Use MachineBasicBlock::{predecessors,successors} (NFC)
      adds  22e21da47d8a [WebAssembly] Remove unused declaration SelectExternRefAddr (NFC)
      adds  815b9f53d85e [hwasan] Replace _Unwind_Word with uintptr_t
      adds  70986ea3d6ae [sanitizer][aarch64] Add cast to drop reliance on the type [...]
      adds  ad523cc398d1 [NFC][Docs] Add missing Doxygen group comments for LLVM-C
      adds  0ff1edeeecc8 [DAG] SimplifyVBinOp - replace FoldConstantVectorArithmeti [...]
      adds  f7880a78cee0 [X86] Add AVX512 test coverage to vselect-zero.ll
      adds  b5ef56f0bc9b [X86][AVX] Add missing X86ISD::VBROADCAST(v4f32 -> v8f32)  [...]
      adds  8adb6d6de29b [clang] Use llvm::reverse. NFCI.
      adds  9b8b16457c23 Put implementation details into anonymous namespaces. NFCI.
      adds  d391e4fe841d [X86] Update RET/LRET instruction to use the same naming c [...]
      adds  f057756a1ae2 [SLP] Fix Wdocumentation warning - remove \returns from vo [...]
      adds  9a140a1586cc [libc++] Make test_allocator constexpr-friendly for conste [...]
      adds  69603ae90fa8 [libc++][doc] Don't mention Prague twice.
      adds  2e20ff8c1ab4 [AVR] Remove a global initializer. NFCI.
      adds  db27867dfc95 [compiler-rt] Produce the right arch suffix for arm baremetal
      adds  eb1c7c133901 [AST, Analysis] Use llvm::reverse (NFC)
      adds  41ef3187e0c7 [ARM, X86] Use MachineBasicBlock::{predecessors,successors} (NFC)
      adds  aee86f9b6cbb [AMDGPU] Remove unused declaration selectSMRD (NFC)
      adds  a8c318b50ecc [BasicAA] Use index size instead of pointer size
      adds  17acd6d9403a [AArch64] Rewrite and update fcvt-fixed.ll. NFC
      adds  d09a21a0b378 [lldb] Remove failures case from TestTaggedPointerCmd
      adds  cf71a5ea8f95 [ConstantRange] Support zero size in isSizeLargerThan()
      adds  2060895c9ce7 [ConstantRange] Add exact union/intersect (NFC)
      adds  54c563474ab6 [fir] Add fir.extract_value and fir.insert_value conversion
      adds  55e4cd8485dc [X86][AVX2] Recognise 256-bit truncation shuffles and mask [...]
      adds  0d182d9d1e09 [Transforms] Use make_early_inc_range (NFC)
      adds  c7d27f90e7c8 [ORE][AsmPrinter] add testcase for D113173; NFC
      adds  50acbbe3cd19 [AsmPrinter][ORE] use correct opcode name
      adds  4fb282fec5ef [CSKY] Add CSKY 16-bit instruction format and encoding
      adds  7c6f5950f08d [PowerPC] comment for different input register classes; nfc
      adds  e32cf690dfdc [RISCV] Optimize (add (mul r, c0), c1)
      adds  9b6f264d2b09 [XCOFF][llvm-readobj] improve the relocation output.
No new revisions were added by this update.
Summary of changes:
 clang/lib/AST/Decl.cpp                             |    3 +-
 clang/lib/AST/Expr.cpp                             |   15 +-
 clang/lib/AST/MicrosoftMangle.cpp                  |    4 +-
 clang/lib/AST/VTableBuilder.cpp                    |    6 +-
 clang/lib/Analysis/CFG.cpp                         |   38 +-
 clang/lib/Analysis/CloneDetection.cpp              |    5 +-
 clang/lib/Analysis/ReachableCode.cpp               |    6 +-
 clang/lib/CodeGen/CGDebugInfo.cpp                  |    7 +-
 clang/lib/CodeGen/CGExpr.cpp                       |    3 +-
 clang/lib/CodeGen/CodeGenModule.cpp                |   20 +-
 clang/lib/Driver/ToolChains/AVR.cpp                |    4 +-
 clang/lib/Lex/ModuleMap.cpp                        |   15 +-
 clang/lib/Sema/CodeCompleteConsumer.cpp            |    3 +-
 clang/test/CodeGenCoroutines/coro-await.cpp        |    6 +-
 clang/test/CodeGenCoroutines/coro-ret-void.cpp     |    5 -
 .../coro-symmetric-transfer-01-exp-namespace.cpp   |    4 +-
 compiler-rt/cmake/Modules/AddCompilerRT.cmake      |   13 +-
 compiler-rt/lib/hwasan/hwasan_exceptions.cpp       |    4 +-
 .../lib/sanitizer_common/sanitizer_linux.cpp       |    2 +-
 flang/lib/Optimizer/CodeGen/CodeGen.cpp            |  108 +-
 flang/lib/Optimizer/CodeGen/DescriptorModel.h      |  140 ++
 flang/lib/Optimizer/CodeGen/TypeConverter.h        |   28 +
 flang/test/Fir/convert-to-llvm.fir                 |   64 +
 libcxx/docs/Status/Cxx20Issues.csv                 |    2 +-
 .../map/map.cons/assign_initializer_list.pass.cpp  |   11 +-
 .../set/set.cons/assign_initializer_list.pass.cpp  |   11 +-
 .../allocator_move.pass.cpp                        |   21 +-
 .../push_back_exception_safety.pass.cpp            |    7 +-
 .../push_front_exception_safety.pass.cpp           |    7 +-
 .../containers/sequences/vector.bool/move.pass.cpp |   23 +-
 .../sequences/vector/vector.cons/move.pass.cpp     |   25 +-
 .../re/re.results/re.results.const/move.pass.cpp   |    9 +-
 .../basic.string/string.capacity/capacity.pass.cpp |    8 +-
 .../basic.string/string.cons/move_alloc.pass.cpp   |   17 +-
 .../futures/futures.promise/alloc_ctor.pass.cpp    |   27 +-
 .../futures/futures.promise/move_assign.pass.cpp   |   45 +-
 .../futures/futures.promise/move_ctor.pass.cpp     |   33 +-
 .../thread/futures/futures.promise/swap.pass.cpp   |   55 +-
 .../futures/futures.shared_future/dtor.pass.cpp    |   33 +-
 .../futures.task.members/ctor_func_alloc.pass.cpp  |   25 +-
 .../futures/futures.unique_future/dtor.pass.cpp    |   33 +-
 .../func.wrap.func.con/alloc_F.pass.cpp            |   12 +-
 .../nullptr_t_deleter_allocator.pass.cpp           |   11 +-
 .../nullptr_t_deleter_allocator_throw.pass.cpp     |    9 +-
 .../pointer_deleter_allocator.pass.cpp             |   11 +-
 .../pointer_deleter_allocator_throw.pass.cpp       |   13 +-
 .../allocate_shared.pass.cpp                       |    7 +-
 .../reset_pointer_deleter_allocator.pass.cpp       |   21 +-
 libcxx/test/support/test_allocator.h               |  473 +++---
 .../objc/tagged-pointer/TestTaggedPointerCmd.py    |    3 -
 llvm/include/llvm-c/Comdat.h                       |   11 +
 llvm/include/llvm-c/Core.h                         |    2 +
 llvm/include/llvm-c/DebugInfo.h                    |   11 +
 llvm/include/llvm-c/DisassemblerTypes.h            |   10 +
 llvm/include/llvm-c/Error.h                        |   11 +
 llvm/include/llvm-c/ErrorHandling.h                |   10 +
 llvm/include/llvm-c/IRReader.h                     |   11 +
 llvm/include/llvm-c/LLJIT.h                        |   11 +
 llvm/include/llvm-c/Linker.h                       |   11 +
 llvm/include/llvm-c/Orc.h                          |   11 +
 llvm/include/llvm-c/OrcEE.h                        |   11 +
 llvm/include/llvm-c/Support.h                      |   10 +
 llvm/include/llvm-c/TargetMachine.h                |   10 +
 llvm/include/llvm-c/Transforms/PassBuilder.h       |   11 +
 llvm/include/llvm/Analysis/ScalarEvolution.h       |    6 +-
 llvm/include/llvm/Analysis/TargetTransformInfo.h   |   39 +
 .../llvm/Analysis/TargetTransformInfoImpl.h        |   18 +
 llvm/include/llvm/CodeGen/BasicTTIImpl.h           |   91 +-
 llvm/include/llvm/IR/ConstantRange.h               |   13 +
 llvm/include/llvm/IR/DataLayout.h                  |   10 +-
 llvm/lib/Analysis/BasicAliasAnalysis.cpp           |   42 +-
 llvm/lib/Analysis/InstructionSimplify.cpp          |   24 -
 llvm/lib/Analysis/Lint.cpp                         |    2 +
 llvm/lib/Analysis/ScalarEvolution.cpp              |    4 +-
 llvm/lib/Analysis/TargetTransformInfo.cpp          |   18 +
 llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp         |    2 +-
 llvm/lib/CodeGen/AsmPrinter/DIEHash.cpp            |   10 +-
 .../AsmPrinter/DbgEntityHistoryCalculator.cpp      |    4 +-
 llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp          |    2 +-
 llvm/lib/CodeGen/AsmPrinter/EHStreamer.cpp         |    3 +-
 llvm/lib/CodeGen/BreakFalseDeps.cpp                |    2 +-
 .../CodeGen/LiveDebugValues/LiveDebugValues.cpp    |    2 +
 llvm/lib/CodeGen/LivePhysRegs.cpp                  |    4 +-
 llvm/lib/CodeGen/MachineSink.cpp                   |    3 +-
 llvm/lib/CodeGen/ModuloSchedule.cpp                |    8 +-
 llvm/lib/CodeGen/ScheduleDAG.cpp                   |    3 +-
 llvm/lib/CodeGen/ScheduleDAGInstrs.cpp             |    2 +-
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp      |    4 +-
 llvm/lib/IR/ConstantRange.cpp                      |   46 +-
 llvm/lib/IR/DataLayout.cpp                         |    8 +-
 llvm/lib/MC/MachObjectWriter.cpp                   |    2 +-
 llvm/lib/ObjectYAML/COFFYAML.cpp                   |   32 +-
 llvm/lib/Support/Timer.cpp                         |    3 +-
 llvm/lib/Support/VirtualFileSystem.cpp             |    2 +
 llvm/lib/Target/AArch64/AArch64A53Fix835769.cpp    |    2 +-
 llvm/lib/Target/AArch64/AArch64FrameLowering.cpp   |    4 +-
 llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp        |    2 +
 llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |    1 -
 .../Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp |   61 +-
 llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp    |   10 +-
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp             |    9 +-
 llvm/lib/Target/AMDGPU/SIModeRegister.cpp          |    8 +-
 llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp           |    5 +-
 llvm/lib/Target/ARM/ARMISelLowering.cpp            |   15 +-
 llvm/lib/Target/CSKY/AsmParser/CSKYAsmParser.cpp   |    4 +
 llvm/lib/Target/CSKY/CSKY.td                       |   12 +
 llvm/lib/Target/CSKY/CSKYInstrFormats16Instr.td    |  219 +++
 llvm/lib/Target/CSKY/CSKYInstrInfo.td              |    2 +
 llvm/lib/Target/CSKY/CSKYInstrInfo16Instr.td       |  452 ++++++
 llvm/lib/Target/CSKY/CSKYRegisterInfo.td           |   15 +
 llvm/lib/Target/CSKY/CSKYSubtarget.cpp             |    3 +-
 llvm/lib/Target/CSKY/CSKYSubtarget.h               |    4 +
 llvm/lib/Target/CSKY/CSKYTargetMachine.h           |    1 +
 llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp     |    4 +-
 llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp   |    9 +-
 llvm/lib/Target/Hexagon/HexagonGenMux.cpp          |    8 +-
 llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp       |    8 +-
 llvm/lib/Target/Mips/MipsCallLowering.cpp          |    2 +-
 llvm/lib/Target/PowerPC/PPCInstrVSX.td             |    8 +
 llvm/lib/Target/PowerPC/PPCMIPeephole.cpp          |    3 +-
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp        |   48 +-
 llvm/lib/Target/SystemZ/SystemZShortenInst.cpp     |    3 +-
 .../Target/WebAssembly/WebAssemblyAsmPrinter.cpp   |    2 +-
 .../Target/WebAssembly/WebAssemblyCFGStackify.cpp  |    3 +-
 .../Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp |    1 -
 llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp     |   12 +-
 .../Target/X86/X86AvoidStoreForwardingBlocks.cpp   |   15 +-
 llvm/lib/Target/X86/X86CmovConversion.cpp          |    8 +-
 llvm/lib/Target/X86/X86ExpandPseudo.cpp            |    6 +-
 llvm/lib/Target/X86/X86FastISel.cpp                |    4 +-
 llvm/lib/Target/X86/X86FloatingPoint.cpp           |    8 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |   38 +-
 llvm/lib/Target/X86/X86IndirectThunks.cpp          |    2 +-
 llvm/lib/Target/X86/X86InstrControl.td             |   30 +-
 llvm/lib/Target/X86/X86InstrInfo.cpp               |   18 +-
 llvm/lib/Target/X86/X86InstrSSE.td                 |    4 +
 .../X86/X86LoadValueInjectionRetHardening.cpp      |    2 +-
 llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp      |    2 +
 llvm/lib/Target/X86/X86MCInstLower.cpp             |    2 +-
 llvm/lib/Target/X86/X86PadShortFunction.cpp        |    9 +-
 llvm/lib/Target/X86/X86RegisterInfo.cpp            |    8 +-
 llvm/lib/Target/X86/X86SchedBroadwell.td           |    2 +-
 llvm/lib/Target/X86/X86SchedHaswell.td             |    4 +-
 llvm/lib/Target/X86/X86SchedIceLake.td             |    2 +-
 llvm/lib/Target/X86/X86SchedSandyBridge.td         |    2 +-
 llvm/lib/Target/X86/X86SchedSkylakeClient.td       |    2 +-
 llvm/lib/Target/X86/X86SchedSkylakeServer.td       |    2 +-
 llvm/lib/Target/X86/X86ScheduleAtom.td             |    6 +-
 llvm/lib/Target/X86/X86ScheduleZnver1.td           |    2 +-
 llvm/lib/Target/X86/X86ScheduleZnver2.td           |    2 +-
 llvm/lib/Target/X86/X86TargetTransformInfo.cpp     |   28 +-
 llvm/lib/Target/X86/X86VZeroUpper.cpp              |    6 +-
 .../AggressiveInstCombine.cpp                      |    4 +-
 llvm/lib/Transforms/Coroutines/CoroFrame.cpp       |    7 +-
 llvm/lib/Transforms/Coroutines/CoroSplit.cpp       |    5 +-
 llvm/lib/Transforms/IPO/AttributorAttributes.cpp   |    6 +
 llvm/lib/Transforms/IPO/ExtractGV.cpp              |   29 +-
 llvm/lib/Transforms/IPO/FunctionSpecialization.cpp |    2 +
 llvm/lib/Transforms/IPO/GlobalOpt.cpp              |    5 +-
 llvm/lib/Transforms/IPO/IROutliner.cpp             |    2 +
 llvm/lib/Transforms/IPO/SCCP.cpp                   |    2 +
 llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp     |   13 +-
 .../Transforms/InstCombine/InstCombineAddSub.cpp   |    7 +
 .../InstCombine/InstructionCombining.cpp           |   25 +-
 .../Instrumentation/DataFlowSanitizer.cpp          |   19 +-
 llvm/lib/Transforms/Scalar/CallSiteSplitting.cpp   |    2 +-
 llvm/lib/Transforms/Scalar/GuardWidening.cpp       |   29 +-
 llvm/lib/Transforms/Scalar/LoopInterchange.cpp     |    2 +
 llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp  |    2 +
 llvm/lib/Transforms/Utils/CodeExtractor.cpp        |   12 +-
 llvm/lib/Transforms/Utils/InlineFunction.cpp       |   16 +-
 llvm/lib/Transforms/Utils/LoopRotationUtils.cpp    |   15 +-
 llvm/lib/Transforms/Utils/LoopUtils.cpp            |    5 +-
 llvm/lib/Transforms/Utils/SimplifyIndVar.cpp       |    3 +-
 llvm/lib/Transforms/Vectorize/LoopVectorize.cpp    |   10 +-
 llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp    |    1 -
 llvm/test/Analysis/BasicAA/index-size.ll           |   18 +
 .../CostModel/X86/shuffle-replication-i32.ll       |  465 ++++++
 .../CostModel/X86/shuffle-replication-i64.ll       |  409 ++++++
 .../CostModel/X86/shuffle-replication-i8.ll        |  686 ++++-----
 llvm/test/CodeGen/AArch64/fcvt-fixed.ll            | 1227 +++++++++++++---
 .../MIRDebugify/check-line-and-variables.mir       |    2 +-
 llvm/test/CodeGen/MIR/X86/auto-successor.mir       |    8 +-
 llvm/test/CodeGen/MIR/X86/basic-block-liveins.mir  |    6 +-
 .../X86/basic-block-not-at-start-of-line-error.mir |    4 +-
 .../CodeGen/MIR/X86/block-address-operands.mir     |   10 +-
 llvm/test/CodeGen/MIR/X86/branch-probabilities.mir |    2 +-
 llvm/test/CodeGen/MIR/X86/callee-saved-info.mir    |    4 +-
 llvm/test/CodeGen/MIR/X86/cfi-def-cfa-offset.mir   |    2 +-
 llvm/test/CodeGen/MIR/X86/cfi-offset.mir           |    2 +-
 .../X86/constant-pool-item-redefinition-error.mir  |    2 +-
 llvm/test/CodeGen/MIR/X86/constant-pool.mir        |    8 +-
 llvm/test/CodeGen/MIR/X86/constant-value-error.mir |    2 +-
 llvm/test/CodeGen/MIR/X86/dbg-value-list.mir       |    2 +-
 llvm/test/CodeGen/MIR/X86/dead-register-flag.mir   |    2 +-
 .../MIR/X86/def-register-already-tied-error.mir    |    2 +-
 .../MIR/X86/duplicate-memory-operand-flag.mir      |    2 +-
 .../MIR/X86/duplicate-register-flag-error.mir      |    4 +-
 .../MIR/X86/early-clobber-register-flag.mir        |    2 +-
 .../MIR/X86/expected-align-in-memory-operand.mir   |    2 +-
 ...ted-alignment-after-align-in-memory-operand.mir |    2 +-
 .../X86/expected-basic-block-at-start-of-body.mir  |    4 +-
 .../expected-block-reference-in-blockaddress.mir   |    2 +-
 .../MIR/X86/expected-comma-after-cfi-register.mir  |    2 +-
 .../X86/expected-comma-after-memory-operand.mir    |    2 +-
 .../X86/expected-different-implicit-operand.mir    |    2 +-
 .../expected-different-implicit-register-flag.mir  |    2 +-
 ...ected-function-reference-after-blockaddress.mir |    2 +-
 .../expected-global-value-after-blockaddress.mir   |    2 +-
 .../MIR/X86/expected-integer-after-offset-sign.mir |    2 +-
 .../MIR/X86/expected-integer-after-tied-def.mir    |    2 +-
 .../X86/expected-integer-in-successor-weight.mir   |    4 +-
 .../expected-load-or-store-in-memory-operand.mir   |    2 +-
 .../CodeGen/MIR/X86/expected-machine-operand.mir   |    2 +-
 ...expected-metadata-node-after-debug-location.mir |    2 +-
 .../X86/expected-metadata-node-after-exclaim.mir   |    2 +-
 .../X86/expected-metadata-node-in-stack-object.mir |    2 +-
 .../expected-named-register-in-allocation-hint.mir |    2 +-
 ...ted-named-register-in-callee-saved-register.mir |    4 +-
 ...expected-named-register-in-functions-livein.mir |    2 +-
 .../MIR/X86/expected-named-register-livein.mir     |    2 +-
 .../MIR/X86/expected-newline-at-end-of-list.mir    |    4 +-
 .../CodeGen/MIR/X86/expected-number-after-bb.mir   |    2 +-
 .../MIR/X86/expected-offset-after-cfi-operand.mir  |    2 +-
 .../expected-pointer-value-in-memory-operand.mir   |    2 +-
 .../expected-positive-alignment-after-align.mir    |    2 +-
 .../X86/expected-register-after-cfi-operand.mir    |    2 +-
 .../MIR/X86/expected-register-after-flags.mir      |    2 +-
 ...xpected-size-integer-after-memory-operation.mir |    2 +-
 ...pected-size-integer-after-memory-operation2.mir |    2 +-
 .../test/CodeGen/MIR/X86/expected-stack-object.mir |    2 +-
 .../MIR/X86/expected-subregister-after-colon.mir   |    2 +-
 .../CodeGen/MIR/X86/expected-target-flag-name.mir  |    2 +-
 .../MIR/X86/expected-tied-def-after-lparen.mir     |    2 +-
 .../MIR/X86/expected-value-in-memory-operand.mir   |    2 +-
 ...pected-virtual-register-in-functions-livein.mir |    2 +-
 .../CodeGen/MIR/X86/external-symbol-operands.mir   |    2 +-
 .../MIR/X86/fixed-stack-memory-operands.mir        |    2 +-
 .../X86/fixed-stack-object-redefinition-error.mir  |    2 +-
 llvm/test/CodeGen/MIR/X86/fixed-stack-objects.mir  |    2 +-
 .../MIR/X86/frame-info-save-restore-points.mir     |    2 +-
 .../MIR/X86/frame-info-stack-references.mir        |    2 +-
 .../MIR/X86/frame-setup-instruction-flag.mir       |    4 +-
 llvm/test/CodeGen/MIR/X86/function-liveins.mir     |    2 +-
 .../test/CodeGen/MIR/X86/global-value-operands.mir |   12 +-
 llvm/test/CodeGen/MIR/X86/immediate-operands.mir   |    8 +-
 .../CodeGen/MIR/X86/implicit-register-flag.mir     |    8 +-
 llvm/test/CodeGen/MIR/X86/inline-asm-registers.mir |    4 +-
 .../X86/instr-symbols-and-mcsymbol-operands.mir    |    2 +-
 .../MIR/X86/instructions-debug-location.mir        |    8 +-
 .../CodeGen/MIR/X86/invalid-constant-pool-item.mir |    2 +-
 .../CodeGen/MIR/X86/invalid-target-flag-name.mir   |    2 +-
 .../MIR/X86/invalid-tied-def-index-error.mir       |    2 +-
 llvm/test/CodeGen/MIR/X86/jump-table-info.mir      |   20 +-
 .../MIR/X86/jump-table-redefinition-error.mir      |   10 +-
 llvm/test/CodeGen/MIR/X86/killed-register-flag.mir |    8 +-
 .../MIR/X86/large-cfi-offset-number-error.mir      |    2 +-
 .../MIR/X86/large-immediate-operand-error.mir      |    2 +-
 .../CodeGen/MIR/X86/large-index-number-error.mir   |    2 +-
 .../CodeGen/MIR/X86/large-offset-number-error.mir  |    2 +-
 .../MIR/X86/large-size-in-memory-operand-error.mir |    2 +-
 .../test/CodeGen/MIR/X86/liveout-register-mask.mir |    2 +-
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 llvm/test/CodeGen/MIR/X86/virtual-registers.mir    |    8 +-
 .../instruction-mix-remarks-BCTRL_LWZinto_toc.ll   |   16 +
 llvm/test/CodeGen/RISCV/addimm-mulimm.ll           |  104 +-
 .../CodeGen/X86/basic-block-sections-mir-parse.mir |    2 +-
 llvm/test/CodeGen/X86/block-placement.mir          |    2 +-
 llvm/test/CodeGen/X86/bug47278.mir                 |    4 +-
 llvm/test/CodeGen/X86/combine-concatvectors.ll     |   35 +
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 llvm/test/CodeGen/X86/dbg-value-superreg-copy.mir  |    2 +-
 llvm/test/CodeGen/X86/evex-to-vex-compress.mir     |   12 +-
 llvm/test/CodeGen/X86/expand-call-rvmarker.mir     |    8 +-
 llvm/test/CodeGen/X86/expand-vr64-gr64-copy.mir    |    2 +-
 .../X86/fast-regalloc-live-out-debug-values.mir    |    4 +-
 llvm/test/CodeGen/X86/fixup-bw-copy.mir            |   14 +-
 llvm/test/CodeGen/X86/fixup-bw-inst.mir            |   12 +-
 llvm/test/CodeGen/X86/implicit-null-checks.mir     |  120 +-
 .../CodeGen/X86/implicit-null-chk-reg-rewrite.mir  |    4 +-
 llvm/test/CodeGen/X86/instr-symbols.mir            |    2 +-
 llvm/test/CodeGen/X86/invalid-liveness.mir         |    2 +-
 llvm/test/CodeGen/X86/leaFixup32.mir               |   52 +-
 llvm/test/CodeGen/X86/leaFixup64.mir               |  112 +-
 llvm/test/CodeGen/X86/machine-copy-dbgvalue.mir    |    4 +-
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 llvm/test/CodeGen/X86/masked_store_trunc.ll        |    4 +-
 llvm/test/CodeGen/X86/optimize-compare.mir         |    8 +-
 llvm/test/CodeGen/X86/patchpoint-verifiable.mir    |    2 +-
 llvm/test/CodeGen/X86/phielim-undef.mir            |    4 +-
 llvm/test/CodeGen/X86/post-ra-sched-with-debug.mir |    2 +-
 .../test/CodeGen/X86/prologue-epilogue-remarks.mir |    6 +-
 llvm/test/CodeGen/X86/scavenger.mir                |    2 +-
 llvm/test/CodeGen/X86/shuffle-vs-trunc-256.ll      |   16 +-
 llvm/test/CodeGen/X86/tail-merge-after-mbp.mir     |    6 +-
 llvm/test/CodeGen/X86/tied-depbreak.mir            |    2 +-
 llvm/test/CodeGen/X86/twoaddr-dbg-value.mir        |    2 +-
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 .../X86/vector-interleaved-load-i16-stride-4.ll    | 1498 ++++++++++----------
 llvm/test/CodeGen/X86/vector-trunc.ll              |   12 +-
 llvm/test/CodeGen/X86/vselect-zero.ll              |  165 +++
 llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir   |    2 +-
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 .../DebugInfo/MIR/X86/live-debug-values-spill.mir  |    2 +-
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 llvm/test/DebugInfo/MIR/X86/live-debug-values.mir  |    2 +-
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 .../X86/livedebugvalues_loop_within_loop_moved.mir |    2 +-
 ...ivedebugvalues_loop_within_loop_outer_moved.mir |    2 +-
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 llvm/test/DebugInfo/MIR/X86/piece-entryval.mir     |    2 +-
 .../MIR/X86/propagate-entry-value-cross-bbs.mir    |    2 +-
 .../MIR/X86/remove-entry-value-from-loop.mir       |    4 +-
 .../MIR/X86/remove-redundant-dbg-vals.mir          |   12 +-
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 llvm/test/DebugInfo/X86/bbjoin.ll                  |    2 +-
 ...ity_calc_ignores_KILL_instruction_at_return.mir |    2 +-
 ...alc_ignores_KILL_instruction_still_clobbers.mir |    2 +-
 .../test/DebugInfo/X86/dbg_value_list_clobbers.mir |    2 +-
 .../test/DebugInfo/X86/dbg_value_list_emission.mir |    2 +-
 llvm/test/DebugInfo/X86/debug-loc-asan.mir         |    2 +-
 llvm/test/DebugInfo/X86/debug-loc-offset.mir       |    4 +-
 llvm/test/DebugInfo/X86/dw_op_constu.mir           |    6 +-
 llvm/test/DebugInfo/X86/dw_op_minus.mir            |    2 +-
 .../DebugInfo/X86/live-debug-values-constprop.mir  |    8 +-
 .../X86/location-range-inlined-xblock.mir          |    2 +-
 llvm/test/DebugInfo/X86/location-range.mir         |    6 +-
 llvm/test/DebugInfo/X86/pr19307.mir                |    2 +-
 llvm/test/DebugInfo/X86/pr34545.ll                 |    2 +-
 llvm/test/DebugInfo/X86/single-location-2.mir      |    2 +-
 .../X86/single-location-inlined-param.mir          |    4 +-
 .../X86/single-location-interrupted-scope.mir      |    4 +-
 llvm/test/DebugInfo/X86/trim-var-locs.mir          |    2 +-
 llvm/test/MC/CSKY/basic-16bit.s                    |  270 ++++
 llvm/test/Transforms/InstCombine/icmp-custom-dl.ll |   11 +-
 llvm/test/Transforms/InstCombine/icmp.ll           |   11 +-
 .../Transforms/InstCombine/minmax-intrinsics.ll    |   23 +
 llvm/test/Transforms/InstSimplify/compare.ll       |    8 +-
 llvm/test/Transforms/SLPVectorizer/X86/pr52275.ll  |   21 +
 .../test/Transforms/SampleProfile/pseudo-probe.mir |    4 +-
 .../test/tools/llvm-readobj/XCOFF/file-header.test |    4 +-
 .../test/tools/llvm-readobj/XCOFF/relocations.test |   66 +-
 llvm/test/tools/llvm-readobj/XCOFF/sections.test   |    4 +-
 llvm/tools/llvm-objdump/COFFDump.cpp               |    5 +-
 llvm/tools/llvm-readobj/XCOFFDumper.cpp            |   50 +-
 llvm/unittests/CodeGen/InstrRefLDVTest.cpp         |   26 +-
 llvm/unittests/IR/ConstantRangeTest.cpp            |   45 +-
 llvm/unittests/IR/InstructionsTest.cpp             |    3 +-
 .../llvm-exegesis/X86/SnippetRepetitorTest.cpp     |    4 +-
 mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td      |   62 +
 mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp       |  101 +-
 mlir/test/Dialect/OpenMP/invalid.mlir              |  185 +++
 mlir/test/Dialect/OpenMP/ops.mlir                  |  121 ++
 489 files changed, 7176 insertions(+), 3079 deletions(-)
 create mode 100644 flang/lib/Optimizer/CodeGen/DescriptorModel.h
 create mode 100644 llvm/lib/Target/CSKY/CSKYInstrFormats16Instr.td
 create mode 100644 llvm/lib/Target/CSKY/CSKYInstrInfo16Instr.td
 create mode 100644 llvm/test/Analysis/BasicAA/index-size.ll
 create mode 100644 llvm/test/Analysis/CostModel/X86/shuffle-replication-i32.ll
 create mode 100644 llvm/test/Analysis/CostModel/X86/shuffle-replication-i64.ll
 create mode 100644 llvm/test/CodeGen/PowerPC/instruction-mix-remarks-BCTRL_LWZinto_toc.ll
 create mode 100644 llvm/test/MC/CSKY/basic-16bit.s
 create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/pr52275.ll
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_tx1/llvm-master-aarch64-spec2k6-O3 updated (aacfbb953eb7 -> 9b6f264d2b09)