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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allyesconfig in repository toolchain/ci/llvm-project.
from 854b0f0f003 [NFC][X86] Adjust check prefixes in bmi.ll (PR43381) adds 75d2c269211 [Docs] Updates sidebar links adds e75c6b6d48d [Docs] Bug fix for document not included in toctree adds 9ec71175063 [Support] Add a DataExtractor constructor that takes ArrayR [...] adds 63f6066b53d [Attributor] Implement "norecurse" function attribute deduction adds eee532cd5f9 Recommit [SampleFDO] Expose an interface to return the size [...] adds c62136e6748 Test mail. NFC. adds cd629ea0a8e SROA: Check Total Bits of vector type adds 1bfdab52a76 [CodeView] Add pragma push/pop_macro for ARM64_FPSR to enum header adds f4deacf995c [LLDB] Fix compilation for MinGW, remove redundant class na [...] adds 2e25c44dc3f [LLDB] Check for the GCC/MinGW compatible arch defines for [...] adds 5c38730dbd0 [LLDB] Use LLVM_FALLTHROUGH instead of a custom comment adds ed78dc8e437 [LLDB] Use SetErrorStringWithFormatv for cases that use LLV [...] adds 5534a675008 [LLDB] Cast -1 (as invalid socket) to the socket type befor [...] adds c1b0873d421 [Docs] Adds new page for Getting Involved articles adds 4f86528fc1c [Docs] Updates sidebar links adds ac4dda80521 [NFC][InstSimplify] Add exhaustive test coverage for simpli [...] adds e94f156f778 [InstSimplify][NFC] Reorganize simplifyUnsignedRangeCheck() [...] adds baf809811b0 [InstSimplify] simplifyUnsignedRangeCheck(): X >= Y && Y == [...] adds c2ca003baff NFC: Change ObjCQualified*TypesAreCompatible to take ObjCOb [...] adds 5c82608d200 Use _WIN32 instead of _MSC_VER adds 38014c553f0 [X86] Add test memset and memcpy testcases for D67874. NFC adds 1b38002c7da Move classes into anonymous namespaces. NFC. adds a506ed256ae Clang-format: Add Whitesmiths indentation style adds 665ccbff60f [Cost][X86] Add v2i64 truncation costs adds 0b68a825ac1 [Hexagon] Don't dereference dyn_cast<ConstantFPSDNode> resu [...] adds eb2941f10d0 [MIPS] Don't dereference dyn_cast<> Constant results. NFCI. adds 2de9b107fac AMDGPUPrintfRuntimeBinding - silence static analyzer null d [...] adds a56bd6c51e9 [VPlan] Silence static analyzer dyn_cast null dereference w [...] adds 83795907700 [Lanai] LanaiAsmParser - Silence static analyzer dyn_cast n [...] adds a75b947014a [NVPTX] NVPTXLowerAggrCopies - Silence static analyzer dyn_ [...] adds 2e8d5d73992 gn build: Add build files for llvm/lib/Target/AVR
No new revisions were added by this update.
Summary of changes: clang/docs/ClangFormatStyleOptions.rst | 28 ++ clang/include/clang/AST/ASTContext.h | 6 +- clang/include/clang/Format/Format.h | 26 + clang/lib/AST/ASTContext.cpp | 64 +-- clang/lib/Format/ContinuationIndenter.cpp | 5 + clang/lib/Format/Format.cpp | 14 + clang/lib/Format/UnwrappedLineFormatter.cpp | 6 + clang/lib/Sema/SemaDeclObjC.cpp | 4 +- clang/lib/Sema/SemaExpr.cpp | 7 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 4 +- clang/unittests/Format/FormatTest.cpp | 264 ++++++++++ lldb/source/Core/IOHandler.cpp | 2 +- lldb/source/Host/common/Socket.cpp | 8 +- .../Windows/Common/NativeProcessWindows.cpp | 8 +- .../Windows/Common/NativeRegisterContextWindows.h | 2 +- .../Process/Windows/Common/ProcessWindows.cpp | 6 +- .../Windows/Common/RegisterContextWindows.cpp | 2 +- .../Process/Windows/Common/TargetThreadWindows.cpp | 8 +- lldb/tools/lldb-vscode/lldb-vscode.cpp | 5 +- llvm/docs/{index.rst => GettingInvolved.rst} | 554 ++++++++------------- llvm/docs/_templates/indexsidebar.html | 19 +- llvm/docs/index.rst | 212 +------- .../llvm/DebugInfo/CodeView/CodeViewRegisters.def | 7 + llvm/include/llvm/ProfileData/SampleProf.h | 16 + llvm/include/llvm/ProfileData/SampleProfReader.h | 7 + llvm/include/llvm/Support/DataExtractor.h | 5 + llvm/include/llvm/Transforms/IPO/Attributor.h | 49 +- llvm/lib/Analysis/InstructionSimplify.cpp | 18 +- llvm/lib/ProfileData/SampleProfReader.cpp | 30 ++ .../Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp | 5 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 2 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 2 + llvm/lib/Target/Lanai/AsmParser/LanaiAsmParser.cpp | 17 +- llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.cpp | 2 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 2 + llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 4 + llvm/lib/Transforms/IPO/Attributor.cpp | 41 +- llvm/lib/Transforms/Scalar/SROA.cpp | 10 +- .../Transforms/Vectorize/VPlanHCFGTransforms.cpp | 2 +- llvm/test/Analysis/CostModel/X86/arith-fix.ll | 48 +- llvm/test/Analysis/CostModel/X86/arith-overflow.ll | 48 +- llvm/test/Analysis/CostModel/X86/cast.ll | 12 +- llvm/test/Analysis/CostModel/X86/trunc.ll | 102 ++-- llvm/test/CodeGen/X86/memcpy.ll | 412 ++++++++++++--- llvm/test/CodeGen/X86/memset-nonzero.ll | 52 ++ llvm/test/CodeGen/X86/memset-zero.ll | 229 +++++++++ llvm/test/Transforms/FunctionAttrs/norecurse.ll | 108 +++- llvm/test/Transforms/FunctionAttrs/willreturn.ll | 43 +- .../InstSimplify/unsigned-range-checks.ll | 130 +++++ .../test/Transforms/SLPVectorizer/X86/arith-fix.ll | 80 ++- .../SROA/vector-promotion-different-size.ll | 24 + llvm/test/tools/llvm-profdata/show-prof-size.test | 7 + llvm/tools/llvm-profdata/llvm-profdata.cpp | 27 +- llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h | 8 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 24 +- llvm/utils/gn/TODO.txt | 2 +- .../llvm/lib/Target/AVR/AsmParser/BUILD.gn | 23 + .../gn/secondary/llvm/lib/Target/AVR/BUILD.gn | 61 +++ .../llvm/lib/Target/AVR/Disassembler/BUILD.gn | 23 + .../llvm/lib/Target/AVR/MCTargetDesc/BUILD.gn | 64 +++ .../llvm/lib/Target/AVR/TargetInfo/BUILD.gn | 10 + .../utils/gn/secondary/llvm/lib/Target/targets.gni | 3 + 64 files changed, 2087 insertions(+), 932 deletions(-) copy llvm/docs/{index.rst => GettingInvolved.rst} (59%) create mode 100644 llvm/test/Transforms/InstSimplify/unsigned-range-checks.ll create mode 100644 llvm/test/Transforms/SROA/vector-promotion-different-size.ll create mode 100644 llvm/test/tools/llvm-profdata/show-prof-size.test create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/AVR/AsmParser/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/AVR/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/AVR/Disassembler/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/AVR/MCTargetDesc/BUILD.gn create mode 100644 llvm/utils/gn/secondary/llvm/lib/Target/AVR/TargetInfo/BUILD.gn