This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gnu_cross_check_gcc/master-aarch64 in repository toolchain/ci/gcc.
from 37935c01841 Daily bump. adds 7c20a9b738a Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A) and combi [...] adds aa15952d646 tree-optimization/102920 - fix PHI VN with undefined args adds 1a07bc9cda7 Simplify (_Float16) sqrtf((float) a) to .SQRT(a) when a is [...] adds 149e217033f RISC-V: Minimal support of bitmanip extension adds 283b1707f23 RISC-V: Implement instruction patterns for ZBA extension. adds 04a9b554ba1 RISC-V: Cost model for zba extension. adds e596a283e54 RISC-V: Implement instruction patterns for ZBB extension. adds 3329d892eb6 RISC-V: Cost model for zbb extension. adds 26d2818bb73 RISC-V: Use li and rori to load constants. adds 4e1e0d79ecb RISC-V: Implement instruction patterns for ZBS extension. adds 77b84fb0a8e RISC-V: Cost model for ZBS extension.
No new revisions were added by this update.
Summary of changes: gcc/common/config/riscv/riscv-common.c | 10 + gcc/config/i386/sse.md | 52 ++++ gcc/config/riscv/bitmanip.md | 342 +++++++++++++++++++++ gcc/config/riscv/predicates.md | 22 ++ gcc/config/riscv/riscv-opts.h | 10 + gcc/config/riscv/riscv.c | 221 ++++++++++++- gcc/config/riscv/riscv.h | 8 + gcc/config/riscv/riscv.md | 33 +- gcc/config/riscv/riscv.opt | 3 + gcc/match.pd | 6 +- gcc/testsuite/gcc.dg/torture/pr102920.c | 25 ++ .../gcc.target/i386/avx512fp16-complex-fma.c | 18 ++ gcc/testsuite/gcc.target/i386/pr102464-sqrtph.c | 27 ++ gcc/testsuite/gcc.target/i386/pr102464-sqrtsh.c | 23 ++ gcc/testsuite/gcc.target/riscv/zba-adduw.c | 12 + gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c | 19 ++ gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c | 19 ++ gcc/testsuite/gcc.target/riscv/zba-shNadd-03.c | 31 ++ gcc/testsuite/gcc.target/riscv/zba-slliuw.c | 11 + gcc/testsuite/gcc.target/riscv/zba-zextw.c | 10 + .../gcc.target/riscv/zbb-andn-orn-xnor-01.c | 21 ++ .../gcc.target/riscv/zbb-andn-orn-xnor-02.c | 21 ++ gcc/testsuite/gcc.target/riscv/zbb-li-rotr.c | 35 +++ gcc/testsuite/gcc.target/riscv/zbb-min-max.c | 31 ++ gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c | 16 + gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c | 16 + gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c | 17 + gcc/testsuite/gcc.target/riscv/zbbw.c | 25 ++ gcc/testsuite/gcc.target/riscv/zbs-bclr.c | 20 ++ gcc/testsuite/gcc.target/riscv/zbs-bext.c | 20 ++ gcc/testsuite/gcc.target/riscv/zbs-binv.c | 20 ++ gcc/testsuite/gcc.target/riscv/zbs-bset.c | 41 +++ gcc/tree-ssa-sccvn.c | 21 +- gcc/tree-ssa-sccvn.h | 2 +- 34 files changed, 1188 insertions(+), 20 deletions(-) create mode 100644 gcc/config/riscv/bitmanip.md create mode 100644 gcc/testsuite/gcc.dg/torture/pr102920.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512fp16-complex-fma.c create mode 100644 gcc/testsuite/gcc.target/i386/pr102464-sqrtph.c create mode 100644 gcc/testsuite/gcc.target/i386/pr102464-sqrtsh.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-adduw.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-shNadd-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-shNadd-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-shNadd-03.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-slliuw.c create mode 100644 gcc/testsuite/gcc.target/riscv/zba-zextw.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-andn-orn-xnor-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-li-rotr.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-min-max.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-rol-ror-01.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbb-rol-ror-03.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbbw.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bclr.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bext.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-binv.c create mode 100644 gcc/testsuite/gcc.target/riscv/zbs-bset.c