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from dcf0dde488b Asan changes for RISC-V. new 207de83922b PR target/97682 - Fix to reuse t1 register between call add [...]
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Summary of changes: gcc/config/riscv/riscv.c | 23 ++-- gcc/config/riscv/riscv.h | 6 +- gcc/testsuite/g++.target/riscv/pr97682.C | 160 +++++++++++++++++++++++++++ gcc/testsuite/gcc.target/riscv/interrupt-3.c | 4 +- gcc/testsuite/gcc.target/riscv/interrupt-4.c | 4 +- 5 files changed, 181 insertions(+), 16 deletions(-) create mode 100644 gcc/testsuite/g++.target/riscv/pr97682.C