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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allnoconfig in repository toolchain/ci/llvm-project.
from 9682d0d5dcc [ARM] Refactor lower to S[LR]I optimization adds d6936be2ef8 [SveEmitter] Add builtins for svdup and svindex adds e114bdf072d [NFC][AArch64] More cast cost tests adds 9d6064ec49e Revert "[RISCV] Make CanLowerReturn protected for downstrea [...] adds 077d2d6802e [CodeGen][SVE] Add patterns for whole vector predicate select adds 9e32bf550d1 [libcxx testing] Remove ALLOW_RETRIES from sleep_for.pass.cpp adds bf2183374a6 [Target][ARM] Replace re-uses of old VPR values with VPNOTs adds 24bf8063d67 [Target][ARM] Replace outdated getARMVPTBlockMask function adds e143253fa8b DebugCounter.h - remove unused includes. NFC. adds 24ac6a2d7dd FuzzerCLI.h - reduce StringRef.h include to forward declara [...] adds 45aa1b88534 [X86][AVX] Use X86ISD::VPERM2X128 for blend-with-zero if op [...] adds f1f8cffce49 [NFC][AArch64] More casts tests... adds e03394c6a6f [CUDA][HIP] Workaround for resolving host device function a [...] adds 0387df7f02f [X86] combineX86ShuffleChain - use narrowShuffleMaskElts sc [...] adds 7f2db993500 [PATCH] #pragma float_control should be permitted in namesp [...] adds 691e8269959 Revert "[mlir] Revisit std.subview handling of static infor [...] adds 5d7f5ca0e38 Add Linux SVE Ptrace macros. adds f242950fdf7 Fold single-use variables into assert adds 6da5672962c [LLD] Rename iDTable -> idTable, NFC adds 123bee602a2 AMDGPU: Search for new ROCm bitcode library structure adds 14e18457113 HIP: Merge builtin library handling adds 58f1417ebc1 [AMDGPU] Order pos exports before param exports adds 774acdfb8c4 [clangd] Add metrics for selection tree and recovery expressions. adds e9536795a35 Add comment for SelectionDAGBuilder::SL field. adds c8c39185f35 [lld-macho] Re-add dylink-lazy test adds 87b6fd3e02c [lld-macho] Add support for creating and reading reexported dylibs adds 5c707fd97c4 [docs] Corrected inaccuracies in Common Problems section. adds ffcaed32ef1 [Matrix] Check non-dependent elt type before creating DepSi [...] adds bd80a8bb876 [GlobalISel][IRTranslator] New helper function translateCopy. NFC. adds 989be65b11f [GlobalISel][IRTranslator] Fix <1 x Ty> handling in ConstantExprs adds 5c10c6e0128 [PassBuilder] Moved ProfileSummaryAnalysis in buildInlinerP [...] adds b56b1e67e38 [gcov] Default coverage version to '408*' and delete CC1 op [...] adds 25a95f49b07 [gcov][test] Fix clang test adds 3d49d1cfa76 [WebAssembly] Implement pseudo-min/max SIMD instructions adds 93bd696347a [VectorCombine] add test to check for iterative improvements; NFC adds 8c72b0271b8 [CodeGen] Use Align in MachineConstantPool. adds 9f0b736126c [AMDGPU] Add AGPRs to getRegClassForSizeOnBank adds fc373522b04 [arm] Add big-endian version of pcrel fixups for adr instructions adds 01636c1eeac [X86] Remove the v16i8->v16i16 path for MULHS with AVX2. adds e5f602d82ca [ValueTracking] Let propagatesPoison support binops/unaryop [...] adds 9202df35b2f [FileCollector][NFC] Add comments adds bad61548b20 [Reproducers] Serialize process arguments in ProcessInfo adds cd83333fc8f [PowerPC] Fold redundant load immediates of zero and delete [...] adds ce195fb22b5 [libcxx] Re-commit: shared_ptr changes from library fundame [...] adds aa99da5ace4 Avoid binding pointers to "auto&" (by dereferencing the poi [...] adds d9166ad2728 [lldb/Driver] Support terminal resizing adds 661b234cbcf [MLIR] Rename SideEffects.td -> SideEffectInterfaces.td adds 11c8c2a551c [analyzer] SATestBuild.py: Fix support for #NOPREFIX. adds 7a17f3ccd10 [MLIR] Fix dependencies for Analysis libraries adds 6c29073efb0 PR45589: Properly decompose overloaded `&&` and `||` operat [...] adds 32f5ee830b0 [Attributor] Fixup block addresses after rewriting function [...] adds 363393c4b35 [libc++abi] Adjust XFAIL on macOS for bug that was fixed in [...] adds 66055230bf6 [TargetLoweringObjectFileImpl] Produce .text.hot. instead o [...] adds aa1eb5152d9 [X86][ISelLowering] refactor Varargs handling in X86ISelLow [...] adds 59ba19c56e1 [VirtualFileSystem] Add unit test that showcases YAMLVFSWriter bug adds 58bc507b6fe [VirtualFileSystem] Add unit test that showcases another YA [...] adds 56926ae0faa [SampleFDO] Rename llvm-profdata flag -partial-profile to - [...] adds 293c6d38212 Fix buildbots after aa1eb5152d9a5bd588c8479a376fa65cbeabbc9f. adds 0138cc01250 PowerPC: Treat llvm.fma.f* intrinsic as using CTR with SPE adds 1c44430e738 Fix buildbots #2 after aa1eb5152d9a5bd588c8479a376fa65cbeabbc9f. adds 99d60a1d0b3 [GlobalISel] Assign the correct location when combining G_SEXT. adds 473bdaf2e81 [mlir] Move Conversion/StandardToStandard to Dialect/Standa [...] adds a9e85626514 [GIsel] Update a comment and make it more precise. adds f490ca76b0e [x86][CGP] enable target hook to sink funnel shift intrinsi [...] adds 759465ee34c [YAMLVFSWriter] Fix for delimiters adds 452e2fc409d Revert of Revert of [mlir][shape] Tidy up shape.shape_of adds ab22f71dd75 [lldb/Reproducers] Also record directories FileSystem::Collect. adds 71ed66d97fd [AMDGPU] Make v4i64/v4f64/v8i64/v8f64 legal adds 2c861e8a121 [libc++][test] Properly mark libc++-only XFAILs adds e17a47b2d35 [libc][Obvious] Fix deps of few threads targets. adds 759bae956ab [lld-macho] Ignore -platform_version and -syslibroot flags. adds cb22ab74035 Add nomerge function attribute to supress tail merge optimi [...] adds 63c0e72b2f8 [mlir] Revisit std.subview handling of static information. adds 0796b170fb3 Fix error in TestNumThreads.py when frame.GetFunctionName r [...] adds d3eb51f0626 [ValueTracking] Fix crash in isGuaranteedNotToBeUndefOrPois [...] adds 96282b1a0c4 test commit adds 8aa2266fd8d [libcxx] Constrain function assignment operator (2574). adds af48351cc8f [Attributor][FIX] Stabilize the state of AAReturnedValues e [...] adds 302c492cc5d [LLDB] Fix minidebuginfo-set-and-hit-breakpoint.test for ar [...] adds fb2c4d50f14 [mlir] [VectorOps] Implement vector.constant_mask lowering [...] adds 6805a77eb66 [LLDB] Mark some xfails for arm-linux adds 67087a7b765 [LLDB] Fix typo in xfail decorator assert.test adds 272bc25bc14 [LoopReroll] Fix rerolling loop with use outside the loop adds 7d4167430c4 [gcov] Fix simultaneous .gcda creation/lock adds 085234bedc3 [cmake] Update creation of object library dependencies for [...] adds 782a4dd1a47 [PowerPC] Use add instead of addReg in ppc-early-ret pass adds d2a95698501 [mlir][Linalg] Allow reshapes to collapse to a zero-rank tensor. adds 5440d0a12d7 [mlir][Linalg] Add folders and canonicalizers for linalg.re [...] adds e9753822b5a [PowerPC] Respect SDNodeFlags in lowering SELECT_CC adds 49e6c191004 [mlir][StandardToLLVM] Add SinOp to LLVM dialect and loweri [...] adds 6bbad7285c4 [CostModel] Modify BasicTTI getCastInstrCost adds 8ffe8891cd5 [PowerPC] Exploit VSX neg, abs and nabs for f32 adds ad60ff70eb5 [NFC] Code cleanup in TargetInfo.cpp adds eef95f2746c [BrachProbablityInfo] Set edge probabilities at once. NFC. adds e59744fd9b4 [DebugInfo] Fortran module DebugInfo support in LLVM new 678bd84c4df [DebugInfo] Fixes windows bot failure due to a test failure new 524457edbc3 [mips] Fix typo in FileCheck directives - replace \0xa0 cha [...] new cac6a26f381 [TableGen] Fix register class handling in TableGen's DAG IS [...] new 2866c6cad47 [NFC] [PowerPC] Narrow fast-math flags in tests new e25a2601aaa [libc++] [LWG3321] Mark "year_month_day_last::day() specifi [...]
The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang-tools-extra/clangd/Selection.cpp | 17 + .../clangd/unittests/SelectionTests.cpp | 19 + clang/include/clang/Basic/BuiltinsWebAssembly.def | 4 + clang/include/clang/Basic/CodeGenOptions.def | 1 - clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 +- clang/include/clang/Basic/arm_sve.td | 14 +- clang/include/clang/Driver/CC1Options.td | 2 - clang/include/clang/Sema/Sema.h | 9 +- clang/lib/Basic/CodeGenOptions.cpp | 2 +- clang/lib/CodeGen/BackendUtil.cpp | 1 - clang/lib/CodeGen/CGBuiltin.cpp | 36 +- clang/lib/CodeGen/CodeGenFunction.h | 1 + clang/lib/CodeGen/TargetInfo.cpp | 4 +- clang/lib/Driver/ToolChains/AMDGPU.cpp | 183 +++---- clang/lib/Driver/ToolChains/AMDGPU.h | 7 +- clang/lib/Driver/ToolChains/HIP.cpp | 72 +-- clang/lib/Frontend/CompilerInvocation.cpp | 2 - clang/lib/Headers/wasm_simd128.h | 20 + clang/lib/Sema/SemaAttr.cpp | 4 +- clang/lib/Sema/SemaCUDA.cpp | 14 + clang/lib/Sema/SemaConcept.cpp | 121 +++-- clang/lib/Sema/SemaExpr.cpp | 5 - clang/lib/Sema/SemaOverload.cpp | 143 ++++-- clang/lib/Sema/SemaTemplateInstantiateDecl.cpp | 1 + clang/lib/Sema/SemaType.cpp | 10 +- .../CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c | 524 +++++++++++++++++++++ clang/test/CodeGen/builtins-wasm.c | 28 ++ clang/test/CodeGen/code-coverage.c | 8 +- clang/test/CodeGen/fp-floatcontrol-pragma.cpp | 54 +++ .../Inputs/rocm-device-libs/amdgcn/bitcode/hip.bc | 0 .../Inputs/rocm-device-libs/amdgcn/bitcode/ockl.bc | 0 .../bitcode/oclc_correctly_rounded_sqrt_off.bc | 0 .../bitcode/oclc_correctly_rounded_sqrt_on.bc | 0 .../amdgcn/bitcode/oclc_daz_opt_off.bc | 0 .../amdgcn/bitcode/oclc_daz_opt_on.bc | 0 .../amdgcn/bitcode/oclc_finite_only_off.bc | 0 .../amdgcn/bitcode/oclc_finite_only_on.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1010.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1011.bc | 0 .../amdgcn/bitcode/oclc_isa_version_1012.bc | 0 .../amdgcn/bitcode/oclc_isa_version_803.bc | 0 .../amdgcn/bitcode/oclc_isa_version_900.bc | 0 .../amdgcn/bitcode/oclc_unsafe_math_off.bc | 0 .../amdgcn/bitcode/oclc_unsafe_math_on.bc | 0 .../amdgcn/bitcode/oclc_wavefrontsize64_off.bc | 0 .../amdgcn/bitcode/oclc_wavefrontsize64_on.bc | 0 .../Inputs/rocm-device-libs/amdgcn/bitcode/ocml.bc | 0 .../rocm-device-libs/amdgcn/bitcode/opencl.bc | 0 .../Inputs/rocm-device-libs/lib/hip.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/ockl.amdgcn.bc | 0 .../lib/oclc_correctly_rounded_sqrt_off.amdgcn.bc | 0 .../lib/oclc_correctly_rounded_sqrt_on.amdgcn.bc | 0 .../lib/oclc_daz_opt_off.amdgcn.bc | 0 .../rocm-device-libs/lib/oclc_daz_opt_on.amdgcn.bc | 0 .../lib/oclc_finite_only_off.amdgcn.bc | 0 .../lib/oclc_finite_only_on.amdgcn.bc | 0 .../lib/oclc_isa_version_1010.amdgcn.bc | 0 .../lib/oclc_isa_version_1011.amdgcn.bc | 0 .../lib/oclc_isa_version_1012.amdgcn.bc | 0 .../lib/oclc_isa_version_803.amdgcn.bc | 0 .../lib/oclc_isa_version_900.amdgcn.bc | 0 .../lib/oclc_unsafe_math_off.amdgcn.bc | 0 .../lib/oclc_unsafe_math_on.amdgcn.bc | 0 .../lib/oclc_wavefrontsize64_off.amdgcn.bc | 0 .../lib/oclc_wavefrontsize64_on.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/ocml.amdgcn.bc | 0 .../Inputs/rocm-device-libs/lib/opencl.amdgcn.bc | 0 clang/test/Driver/hip-device-libs.hip | 52 +- clang/test/Driver/rocm-device-libs.cl | 68 +-- clang/test/Parser/fp-floatcontrol-syntax.cpp | 8 +- clang/test/SemaCUDA/function-overload.cu | 146 +++++- clang/test/SemaCXX/matrix-type.cpp | 98 ---- clang/test/SemaTemplate/constraints.cpp | 26 + .../test/{SemaCXX => SemaTemplate}/matrix-type.cpp | 121 +++-- clang/utils/analyzer/SATestBuild.py | 5 +- compiler-rt/lib/profile/GCDAProfiling.c | 23 +- .../profile/Posix/instrprof-gcov-parallel.test | 2 - flang/include/flang/Optimizer/Dialect/FIROps.td | 2 +- libc/src/threads/linux/CMakeLists.txt | 2 +- libc/test/src/threads/CMakeLists.txt | 4 - libcxx/include/chrono | 2 + libcxx/include/functional | 2 +- libcxx/include/memory | 128 +++-- .../thread.thread.this/sleep_for.pass.cpp | 51 +- libcxx/test/std/strings/c.strings/cuchar.pass.cpp | 2 +- .../func.search/func.search.bm/default.pass.cpp | 2 +- .../func.search/func.search.bm/hash.pass.cpp | 2 +- .../func.search/func.search.bm/hash.pred.pass.cpp | 2 +- .../func.search/func.search.bm/pred.pass.cpp | 2 +- .../func.search/func.search.bmh/default.pass.cpp | 2 +- .../func.search/func.search.bmh/hash.pass.cpp | 2 +- .../func.search/func.search.bmh/hash.pred.pass.cpp | 2 +- .../func.search/func.search.bmh/pred.pass.cpp | 2 +- .../func.wrap.func.con/F_assign.pass.cpp | 20 + .../util.smartptr.shared/types.pass.cpp | 36 +- .../const_pointer_cast.pass.cpp | 10 +- .../dynamic_pointer_cast.pass.cpp | 10 +- .../reinterpret_pointer_cast.pass.cpp | 52 ++ .../static_pointer_cast.pass.cpp | 16 +- .../util.smartptr.shared.const/default.pass.cpp | 20 +- .../util.smartptr.shared.const/pointer.pass.cpp | 18 +- .../shared_ptr_copy_move.fail.cpp | 50 ++ .../shared_ptr_pointer.pass.cpp | 38 +- .../util.smartptr.shared.const/unique_ptr.pass.cpp | 33 +- .../make_shared.protected.fail.cpp | 3 +- .../util.smartptr.shared.obs/op_arrow.fail.cpp | 36 ++ .../util.smartptr.shared.obs/op_bool.pass.cpp | 21 +- .../{op_bool.pass.cpp => op_bracket.fail.cpp} | 25 +- .../util.smartptr.shared.obs/op_bracket.pass.cpp | 51 ++ .../shared_ptr_Y.pass.cpp | 1 + libcxx/www/cxx1z_status.html | 4 +- libcxx/www/cxx2a_status.html | 2 +- .../test/thread_local_destruction_order.pass.cpp | 17 +- lld/COFF/PDB.cpp | 8 +- lld/COFF/TypeMerger.h | 6 +- lld/MachO/Config.h | 3 +- lld/MachO/Driver.cpp | 45 +- lld/MachO/InputFiles.cpp | 35 +- lld/MachO/InputFiles.h | 11 +- lld/MachO/Options.td | 5 + lld/MachO/SyntheticSections.cpp | 2 +- lld/MachO/Writer.cpp | 45 +- lld/test/MachO/dylink-lazy.s | 59 +++ lld/test/MachO/platform-version.test | 16 + lld/test/MachO/silent-ignore.test | 3 +- lld/test/MachO/sub-library.s | 74 +++ lldb/include/lldb/Core/IOHandler.h | 4 + lldb/include/lldb/Host/Editline.h | 17 +- lldb/include/lldb/Utility/Args.h | 30 ++ lldb/source/Core/Debugger.cpp | 3 + lldb/source/Core/IOHandler.cpp | 6 + lldb/source/Host/common/Editline.cpp | 51 +- lldb/source/Host/common/FileSystem.cpp | 8 +- .../Process/Linux/LinuxPTraceDefines_arm64sve.h | 253 ++++++++++ lldb/source/Utility/Args.cpp | 17 + lldb/source/Utility/ProcessInfo.cpp | 1 + .../load_using_paths/TestLoadUsingPaths.py | 1 + .../thread/num_threads/TestNumThreads.py | 2 + .../API/iohandler/resize/TestIOHandlerResize.py | 36 ++ lldb/test/API/python_api/thread/TestThreadAPI.py | 1 + .../ELF/minidebuginfo-set-and-hit-breakpoint.test | 2 +- lldb/test/Shell/Recognizer/assert.test | 1 + lldb/test/Shell/Reproducer/TestProcessList.test | 21 + lldb/unittests/Utility/ArgsTest.cpp | 31 ++ llvm/cmake/modules/AddLLVM.cmake | 3 +- llvm/docs/GettingStarted.rst | 45 +- llvm/docs/LangRef.rst | 8 + llvm/include/llvm/Analysis/BranchProbabilityInfo.h | 10 + .../llvm/Analysis/TargetTransformInfoImpl.h | 7 +- llvm/include/llvm/Analysis/ValueTracking.h | 8 +- llvm/include/llvm/Bitcode/LLVMBitCodes.h | 1 + llvm/include/llvm/CodeGen/BasicTTIImpl.h | 15 +- .../include/llvm/CodeGen/GlobalISel/IRTranslator.h | 4 + .../GlobalISel/LegalizationArtifactCombiner.h | 2 +- llvm/include/llvm/CodeGen/MachineConstantPool.h | 40 +- llvm/include/llvm/CodeGen/TargetLowering.h | 7 +- llvm/include/llvm/FuzzMutate/FuzzerCLI.h | 3 +- llvm/include/llvm/IR/Attributes.td | 3 + llvm/include/llvm/IR/DIBuilder.h | 9 +- llvm/include/llvm/IR/DebugInfoMetadata.h | 72 +-- llvm/include/llvm/IR/InstrTypes.h | 3 + llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 11 + llvm/include/llvm/ProfileData/GCOV.h | 10 +- llvm/include/llvm/Support/DebugCounter.h | 5 +- llvm/include/llvm/Support/FileCollector.h | 33 +- llvm/include/llvm/Transforms/Instrumentation.h | 4 - llvm/lib/Analysis/BranchProbabilityInfo.cpp | 99 ++-- llvm/lib/Analysis/ValueTracking.cpp | 44 +- llvm/lib/AsmParser/LLLexer.cpp | 1 + llvm/lib/AsmParser/LLParser.cpp | 18 +- llvm/lib/AsmParser/LLToken.h | 1 + llvm/lib/Bitcode/Reader/BitcodeReader.cpp | 2 + llvm/lib/Bitcode/Reader/MetadataLoader.cpp | 14 +- llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 3 + llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 7 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 16 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 5 + llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 65 ++- llvm/lib/CodeGen/MIRParser/MIRParser.cpp | 3 +- llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineFunction.cpp | 10 +- llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp | 4 +- .../lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 2 + llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp | 8 +- llvm/lib/FuzzMutate/FuzzerCLI.cpp | 1 + llvm/lib/IR/AsmWriter.cpp | 2 + llvm/lib/IR/Attributes.cpp | 2 + llvm/lib/IR/DIBuilder.cpp | 8 +- llvm/lib/IR/DebugInfoMetadata.cpp | 18 +- llvm/lib/IR/LLVMContextImpl.h | 19 +- llvm/lib/IR/Verifier.cpp | 1 + llvm/lib/Passes/PassBuilder.cpp | 16 +- llvm/lib/Support/VirtualFileSystem.cpp | 27 +- llvm/lib/Target/AArch64/AArch64FastISel.cpp | 6 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 14 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 6 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 92 ++-- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 26 + llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 39 ++ llvm/lib/Target/AMDGPU/SIInstructions.td | 21 + llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 2 + llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 20 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMBaseInstrInfo.h | 19 - llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 15 +- llvm/lib/Target/ARM/ARMConstantPoolValue.cpp | 8 +- llvm/lib/Target/ARM/ARMConstantPoolValue.h | 14 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 9 +- llvm/lib/Target/ARM/ARMFastISel.cpp | 22 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 2 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 16 +- llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 12 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 18 +- llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp | 20 +- llvm/lib/Target/ARM/MVEVPTBlockPass.cpp | 51 +- llvm/lib/Target/ARM/MVEVPTOptimisationsPass.cpp | 240 +++++++++- llvm/lib/Target/ARM/Thumb2InstrInfo.cpp | 30 ++ llvm/lib/Target/ARM/Thumb2InstrInfo.h | 7 + llvm/lib/Target/ARM/ThumbRegisterInfo.cpp | 4 +- llvm/lib/Target/ARM/Utils/ARMBaseInfo.cpp | 31 ++ llvm/lib/Target/ARM/Utils/ARMBaseInfo.h | 6 + llvm/lib/Target/Mips/MipsConstantIslandPass.cpp | 15 +- llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp | 6 +- llvm/lib/Target/PowerPC/PPCFastISel.cpp | 3 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 10 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 24 +- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 3 + llvm/lib/Target/PowerPC/PPCInstrVSX.td | 18 + llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 19 +- llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp | 1 + llvm/lib/Target/RISCV/RISCVISelLowering.h | 11 +- .../Target/SystemZ/SystemZConstantPoolValue.cpp | 7 +- llvm/lib/Target/SystemZ/SystemZConstantPoolValue.h | 2 +- .../lib/Target/WebAssembly/WebAssemblyInstrSIMD.td | 6 + llvm/lib/Target/X86/X86FastISel.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 432 +++++++++-------- llvm/lib/Target/X86/X86ISelLowering.h | 5 + llvm/lib/Target/X86/X86InstrInfo.cpp | 2 +- llvm/lib/Target/X86/X86InstructionSelector.cpp | 3 +- llvm/lib/Target/XCore/XCoreInstrInfo.cpp | 2 +- llvm/lib/Transforms/IPO/Attributor.cpp | 8 + llvm/lib/Transforms/IPO/AttributorAttributes.cpp | 46 +- .../Transforms/Instrumentation/GCOVProfiling.cpp | 9 +- .../Transforms/Instrumentation/PoisonChecking.cpp | 25 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 3 +- llvm/lib/Transforms/Scalar/LoopRerollPass.cpp | 6 + llvm/lib/Transforms/Utils/BreakCriticalEdges.cpp | 4 +- llvm/lib/Transforms/Utils/CodeExtractor.cpp | 13 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 11 +- llvm/test/Analysis/CostModel/AArch64/cast.ll | 166 ++++++- llvm/test/Analysis/CostModel/ARM/cast.ll | 58 +-- .../CostModel/X86/masked-intrinsic-cost.ll | 2 +- llvm/test/Analysis/ScalarEvolution/nsw.ll | 8 +- llvm/test/Assembler/dimodule.ll | 4 +- llvm/test/Bitcode/DIModule-clang-module.ll | 22 + llvm/test/Bitcode/DIModule-clang-module.ll.bc | Bin 0 -> 1580 bytes llvm/test/Bitcode/DIModule-fortran-module.ll | 34 ++ llvm/test/Bitcode/DIModule-fortran-module.ll.bc | Bin 0 -> 1948 bytes .../AArch64/GlobalISel/arm64-irtranslator.ll | 10 +- .../AArch64/GlobalISel/combine-ext-debugloc.mir | 2 +- .../AArch64/GlobalISel/combine-sext-debugloc.mir | 50 ++ llvm/test/CodeGen/AArch64/select-sve.ll | 134 ++++++ .../AMDGPU/GlobalISel/irtranslator-constantexpr.ll | 24 + llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll | 204 ++++---- llvm/test/CodeGen/AMDGPU/extract_vector_dynelt.ll | 36 +- llvm/test/CodeGen/AMDGPU/idot2.ll | 110 ++--- llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll | 41 +- llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll | 148 +++--- llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exp.ll | 46 ++ llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ubfe.ll | 22 +- llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll | 22 +- llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll | 22 +- llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll | 76 +-- llvm/test/CodeGen/AMDGPU/saddo.ll | 354 +++++++------- llvm/test/CodeGen/AMDGPU/select.f16.ll | 368 ++++++++------- llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll | 32 +- llvm/test/CodeGen/AMDGPU/shift-i128.ll | 456 +++++++++--------- llvm/test/CodeGen/AMDGPU/shift-i64-opts.ll | 10 +- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 98 ++-- llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll | 22 +- llvm/test/CodeGen/AMDGPU/wait.ll | 4 +- llvm/test/CodeGen/PowerPC/combine-fneg.ll | 4 +- .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 4 +- llvm/test/CodeGen/PowerPC/early-ret-verify.mir | 4 +- llvm/test/CodeGen/PowerPC/early-ret.mir | 14 +- llvm/test/CodeGen/PowerPC/fdiv.ll | 2 +- llvm/test/CodeGen/PowerPC/float-logic-ops.ll | 6 +- llvm/test/CodeGen/PowerPC/fma-assoc.ll | 8 +- llvm/test/CodeGen/PowerPC/fma-combine.ll | 24 +- llvm/test/CodeGen/PowerPC/fma-mutate.ll | 2 +- llvm/test/CodeGen/PowerPC/fma-negate.ll | 40 +- llvm/test/CodeGen/PowerPC/fma-precision.ll | 68 +-- llvm/test/CodeGen/PowerPC/fma.ll | 6 + llvm/test/CodeGen/PowerPC/fmf-propagation.ll | 46 +- llvm/test/CodeGen/PowerPC/fold-remove-li.ll | 40 ++ llvm/test/CodeGen/PowerPC/fsub-fneg.ll | 6 +- llvm/test/CodeGen/PowerPC/load-two-flts.ll | 24 +- llvm/test/CodeGen/PowerPC/pow.75.ll | 24 +- llvm/test/CodeGen/PowerPC/ppc64-P9-setb.ll | 20 +- llvm/test/CodeGen/PowerPC/qpx-recipest.ll | 28 +- llvm/test/CodeGen/PowerPC/recipest.ll | 46 +- llvm/test/CodeGen/PowerPC/repeated-fp-divisors.ll | 4 +- llvm/test/CodeGen/PowerPC/save-crbp-ppc32svr4.ll | 3 +- llvm/test/CodeGen/PowerPC/scalar-equal.ll | 42 +- llvm/test/CodeGen/PowerPC/scalar-min-max.ll | 32 +- llvm/test/CodeGen/PowerPC/scalar_cmp.ll | 244 ++++------ llvm/test/CodeGen/PowerPC/spe.ll | 67 +++ llvm/test/CodeGen/PowerPC/vec-min-max.ll | 8 +- .../CodeGen/PowerPC/vsx-fma-mutate-trivial-copy.ll | 6 +- llvm/test/CodeGen/PowerPC/vsx-recip-est.ll | 8 +- llvm/test/CodeGen/Thumb2/mve-pred-not.ll | 14 +- llvm/test/CodeGen/Thumb2/mve-vpt-blocks.ll | 82 +--- llvm/test/CodeGen/Thumb2/mve-vpt-optimisations.mir | 418 +++++++++++++++- llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll | 40 ++ llvm/test/CodeGen/X86/avx-vperm2x128.ll | 10 +- llvm/test/CodeGen/X86/vec_smulo.ll | 147 +++--- llvm/test/CodeGen/X86/vector-fshl-128.ll | 103 ++-- llvm/test/CodeGen/X86/vector-idiv-sdiv-256.ll | 32 +- llvm/test/CodeGen/X86/vector-idiv-sdiv-512.ll | 108 ++--- llvm/test/DebugInfo/X86/Fortran-DIModule.ll | 44 ++ llvm/test/MC/ARM/pcrel-global.s | 2 + llvm/test/MC/Mips/micromips-jump-pc-region.s | 2 +- llvm/test/MC/Mips/mips-jump-pc-region.s | 4 +- llvm/test/MC/WebAssembly/simd-encodings.s | 12 + llvm/test/Other/new-pm-defaults.ll | 4 +- llvm/test/Other/new-pm-thinlto-defaults.ll | 4 +- .../Other/new-pm-thinlto-postlink-pgo-defaults.ll | 4 +- .../new-pm-thinlto-postlink-samplepgo-defaults.ll | 4 +- .../Other/new-pm-thinlto-prelink-pgo-defaults.ll | 4 +- .../new-pm-thinlto-prelink-samplepgo-defaults.ll | 4 +- llvm/test/TableGen/dag-isel-regclass-emit-enum.td | 39 ++ llvm/test/Transforms/Attributor/misc_crash.ll | 33 ++ llvm/test/Transforms/Attributor/returned.ll | 47 +- llvm/test/Transforms/CodeGenPrepare/X86/section.ll | 6 + .../CodeGenPrepare/X86/x86-shuffle-sink.ll | 70 ++- .../test/Transforms/DivRemPairs/PowerPC/pr45885.ll | 24 + .../{return-block.ll => exit-block.ll} | 36 +- llvm/test/Transforms/GCOVProfiling/version.ll | 4 +- llvm/test/Transforms/LoopReroll/external_use.ll | 60 +++ .../Transforms/SLPVectorizer/X86/load-merge.ll | 14 +- llvm/test/Transforms/SimplifyCFG/nomerge.ll | 71 +++ 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mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td | 2 +- mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td | 27 +- mlir/include/mlir/Dialect/Quant/QuantOps.td | 2 +- mlir/include/mlir/Dialect/SCF/SCFOps.td | 2 +- .../mlir/Dialect/SPIRV/SPIRVArithmeticOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVBitOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td | 2 +- .../mlir/Dialect/SPIRV/SPIRVCompositeOps.td | 2 +- .../mlir/Dialect/SPIRV/SPIRVControlFlowOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVGLSLOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVLogicalOps.td | 2 +- mlir/include/mlir/Dialect/SPIRV/SPIRVOps.td | 2 +- .../mlir/Dialect/SPIRV/SPIRVStructureOps.td | 2 +- mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td | 6 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 55 ++- .../StandardOps/Transforms/FuncConversions.h} | 10 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 2 +- mlir/include/mlir/Interfaces/CMakeLists.txt | 2 +- .../{SideEffects.td => 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