This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig in repository toolchain/ci/llvm-project.
from 82f5ee3c3e6 Adds argument attributes for using LLVM's sret and byval at [...] adds 59fce6b0661 [NFC] make clang/test/CodeGen/arm_neon_intrinsics.c resiste [...] adds f88fab50068 [mlir] NFC: fix trivial typos adds acbb3652931 [AST][NFC] Silence GCC warning about multiline comments adds 43043adcfbc Add element-type to the Vector TypeLoc types. adds ebcc8dcb68a [Coverage] Refactor three tests from commit rG9f2967bcfe2f adds bd78f4e9321 [mlir] revert 82f5ee3c3e601daad5 adds 41e31eac14c Fix GCC5 build, require explicit this->... in this call ins [...] adds ee57d30f448 [NFC] Removed unused prefixes from CodeGen/AMDGPU adds d0154456e61 Silence warning: comparison of integers of different signs: [...] adds cf5415c727d [PGO][PGSO] Let unroll hints take precedence over PGSO. adds c9122ddef52 CodeGen: Refactor regallocator command line and target selection adds 5c38ae36c58 [WebAssembly] Fixed byval args missing DWARF DW_AT_LOCATION adds 2230bf99c71 [mlir] replace LLVMIntegerType with built-in integer type adds 906efeec0a4 [mlir] don't match the text produced only in debug mode in [...] adds 4c7148d75cd [SLP] remove opcode identifier for reduction; NFC adds ad55d5c3f32 Simplify vectorcall argument classification of HVAs, NFC adds 6a87e9b08bf [NFC][AMDGPU] Reduce include files dependency. adds abb174bbc10 [OpenMP] Add example in Libomptarget Information docs adds 467e916d303 Fix gcc5 build failure (NFC) adds 3854b81b0fd [Clang][Driver] Fix read-after-free when using /clang: adds 9ae171bcd38 [OpenMP][Docs] Add remarks intro section adds d970a285b85 [OpenMP][Fix] Make the arch selector for x86_64 work adds 36c4dc9b42f [OpenMP][FIX] Ensure the isa trait is evaluated last adds 275f30df8ad [clang] Change builtin object size when subobject is invalid adds 6e7101530da [OpenMP][Docs] Mark finished features as done adds ce7f30b2a87 [llvm-pdbutil] Don't crash when printing unknown CodeView t [...] adds 70b841ac317 [mlir] Adds argument attributes for using LLVM's sret and b [...] adds 0b0f2e6ee0c [OpenMP][FIX] Avoid string literal comparison, use `StringR [...] adds 476db17dcb6 Fix include path for check-gdb-mlir-support to include the [...] adds 9e1aaa9943b Fix check-gdb-mlir-support build after MLIR API changed to [...] adds 1f9b6ef91ff GlobalISel: Add combine for G_UREM by power of 2 adds 63b42a05145 [NFC] clang/test/openMP/target_codegen.cpp should not depen [...] adds 85f86e8a3cf [libc++abi] Simplify __gxx_personality_v0 adds d002cd4e0f1 [test] Move coro-retcon-unreachable.ll into llvm/test adds 1a2eaebc09c [CoroSplit][NewPM] Don't call LazyCallGraph functions to sp [...] adds 3503c856819 Fixup Asserts+!AbiBreakingChecks fallout from db33f85c7124 adds 973c35d3384 [TableGen] Make CodeGenDAGPatterns::getSDNodeNamed take a S [...] adds eaadb41db62 [LLD][COFF] When using PCH.OBJ, ensure func_id records indi [...] adds 274afac9a17 lldb: Add support for DW_AT_ranges on DW_TAG_subprograms adds c01202a7efd [libc++] Fix typo in run-buildbot adds 2cbbc6e87c4 GlobalISel: Fail legalization on narrowing extload below me [...] adds f78d6af7319 [hip] Enable HIP compilation with `<complex`> on MSVC. adds 2ce16810f28 [OpenMP] Always print error messages in libomptarget CUDA plugin adds 15f59711506 [LLDB][RISCV] Add RISC-V ArchSpec and rv32/rv64 variant detection adds b2dafd44ca7 [NewPM][Hexagon] Fix HexagonVectorLoopCarriedReusePass posi [...] adds ff1b6f9ff27 [libc++] Alphabetize generate_feature_test_macro_components [...] adds 9ccf13c36d1 [NewPM][NVPTX] Port NVPTX opt passes adds 087be536fea [NFC][SimplifyCFG] Add a test with cond br on constant w/ i [...] adds 16ab8e5f6db [SimplifyCFG] ConstantFoldTerminator(): handle matching des [...] adds 36593a30a40 [SimplifyCFG] ConstantFoldTerminator(): switch to non-permi [...] adds 8b9a0e6f7ed [NFC][SimlifyCFG] Add some indirectbr-of-blockaddress tests adds b3822728fae [SimplifyCFG] ConstantFoldTerminator(): switch to non-permi [...] adds 1f9b591ee66 [SimplifyCFG] TryToSimplifyUncondBranchFromEmptyBlock(): sw [...] adds f8875c313c3 [NFC][SimplifyCFG] Add test with an unreachable block with [...] adds 7600d7c7be0 [SimplifyCFG] removeUnreachableBlocks(): switch to non-perm [...] adds 6984781df9b [NFC][SimplifyCFG] Add a test with an undef cond branch to [...] adds 05adc73db05 [SimplifyCFG] changeToUnreachable(): switch to non-permissi [...] adds 66189212bbb [SimplifyCFG] MergeBlockIntoPredecessor(): switch to non-pe [...] adds be0a31d13bc [SimplifyCFG] DeleteDeadBlocks(): switch to non-permissive [...] adds f0eba8ce2d4 [SimplifyCFG] changeToCall(): switch to non-permissive DomT [...] adds d59f97bb3a6 [SimplifyCFG] removeUnwindEdge(): switch to non-permissive [...] adds f2f81c554b0 [SimplifyCFG] markAliveBlocks(): switch to non-permissive D [...] adds 946bc50e4cb [RISCV] Define the vfsqrt RVV intrinsics adds 6acfc3a7821 Fix build after eaadb41db6233cf1c9e882d74a31c1f9d6e211ff wh [...] adds 8dddcc762dd [Cloning] Copy metadata of global declarations adds 48baa7f5b11 [clang] Add powerpc64le-none-linux-gnu to gnu toolchain for PPC64 adds 658a1be76ba [builtins] Add COMPILER_RT_BUILTINS_HIDE_SYMBOLS adds b12f26733a4 Revert "Revert "Revert "[analyzer] NFC: Move path diagnosti [...] adds ab814896dc8 [gn build] Port b12f26733a4 adds 2759041786e [gn build] (manually) merge a whole bunch of libc++ header files adds f02e61a8b95 Fix MLIR DRR matching when attributes are interleaved with [...] adds b14ad90b137 [LLD][COFF] Simplify function. NFC. adds 696775d96ec Fix subprogram_ranges.test by explicitly using lld adds 4a3c2ba8904 Fix print-dot-ddg.ll so it doesn't try to write to the sour [...] adds 2ff36e79291 lldb subprogram_ranges.test - remove dependence on temp file name adds 6b0ee02747e Revert "Revert "Revert "Revert "[analyzer] NFC: Move path d [...] adds 495b301de6e [gn build] Port 6b0ee02747e adds 8febb2e0f56 [CodeGen] Remove unused function isCallerPreservedOrConstPh [...] adds 33bf1cad759 [llvm] Use *Set::contains (NFC) adds b934160aaa3 [Target] Use llvm::find_if (NFC) adds f2e05855deb [lldb] Access the ModuleList through iterators where possib [...] adds 57e0cd35628 [lldb] Make DoReadMemory a protected method. adds ae25a397e9d AMDGPU/GlobalISel: Enable sret demotion adds 0ebc1fb29f2 [CMake] Don't enable BUILD_WITH_INSTALL_RPATH when using cu [...] adds 69cf7350628 [NewPM] Don't error when there's an unrecognized pass name adds c102b9697bd [X86] Correct the comments about comparison intrinsics. NFCI. adds 7a91dad9e5f [llvm-readobj] [ARMWinEH] Clearly print an invalid case of [...] adds d1bf26fd943 [AArch64][SVE] Add lowering for llvm abs intrinsic adds 8af859d514f [MachineLoop] New helper isLoopInvariant() adds 8e3230ffa3a [clang][cli] Port DiagnosticOpts to new option parsing system adds 12167632bc5 [VE] Add SVOB intrinsic instruction adds 72fb5ba0790 [LV] Don't sink into replication regions adds 8e3e148c888 Revert "[clang][cli] Port DiagnosticOpts to new option pars [...] adds 6175fcf01f1 [NFC] Update some PPC tests marked as auto-generated adds 2fe625e9abd Fix two pessimizing moves. adds d1b606f897b [VE] Extract & insert vector element isel adds eeba70a463c [VE] Expand single-element BUILD_VECTOR to INSERT_VECTOR_ELT adds 1e7efd397ac [LV] Legalize scalable VF hints adds 38d18d93534 [SVE] Add support to vectorize_width loop pragma for scalab [...] adds ed23229a64a [AArch64] Fix crash caused by invalid vector element type adds b83b7d08730 [clangd] NFC, avoid potential ODR violation. adds c909512fdb9 [clangd] Cleanup a remaining Optional<SymbolID> usage, NFC. adds 99c84af1a25 [VE][NFC] Clean ISel patterns for LSV and LVS adds 00530dee5d1 [compiler-rt] Implement __atomic_is_lock_free adds 32733c347d7 [libc++] Add missing XFAIL to tests that need __atomic_* libcalls adds ed3b1f90611 [clangd] go-to-implementation on a base class jumps to all [...] adds 267ff7901c7 [SLP] limit verifyFunction to debug build (PR48689) adds 9c4b2225b24 Revert "Revert "Revert "Revert "Revert "[analyzer] NFC: Mov [...] adds af7cce2fa4d [AArch64] Add +pauth archictecture option, allowing the v8. [...] adds 7d4a8bc417b [AArch64] Add +flagm archictecture option, allowing the v8. [...] adds 195ffcd890f [MLIR][NFC] remove unnecessary includes form tablegen command adds b0dc54e08a9 [lldb][NFC] Refactor setup code for Clang diagnostics adds 611d3c63f32 [VP] ISD helper functions [VE] isel for vp_add, vp_and adds 657db0c6d41 [gn build] Port 9c4b2225b24 adds bcbdeafa9cb Revert "[SLP]Need shrink the load vector after reordering." adds 0ef2b68ff06 [OpenCL] Documentation for experimental C++ libs adds d012430eee7 [WebAssembly] Change label numbers to variables in test adds 5ead757f1d8 [VE] Support pack_f32p and pack_f32a intrinsic instructions adds 25d882e758c [MLIR][SPIRV] Add `UsableInSpecConstantOp` trait. adds 7b9f541c1ed [X86][SSE] Add tests for unpack(hop(),hop()) adds e97071d7952 [NFC] Renaming PackStack to AlignPackStack adds 0e57084d0ef [SLP][NFC]Add a test for reused shrink check, NFC. adds 4a582d766ae [X86][SSE] Add vphaddd/vphsubd unpack(hop(),hop()) tests adds 268ff38a716 [MLIR][OpenMP] Attribute to include WsLoop upperbound adds 6e2b6351d2c [TableGen] Add the assert statement, step 1 adds 1ae762469fd [ARM] Update and regenerate test checks. NFC adds 7be271537e9 [WebAssembly] Rename wasm_rethrow_in_catch intrinsic/builtin adds d4f2fef7464 [TableGen] Remove unused declaration that caused build failures. adds 84dc9b451bf [mlir:JitRunner] Use custom shared library init/destroy fun [...] adds a36a2864c0d [ARM][LV] Additional loop invariant reduction test. NFC adds 80dee7965df [X86][SSE] Fold unpack(hop(),hop()) -> permute(hop()) adds 740950cf1cd Revert "[mlir:JitRunner] Use custom shared library init/des [...] adds d4af86581e8 [clangd] Fix type printing in the presence of qualifiers adds e185b1dd7b3 [ConstProp] Constant propagation for get.active.lane.mask i [...] adds 2e1bb7940a4 [clangd] Add missing "override" to fix the build. adds dd5165a920f [mlir] replace LLVM dialect float types with built-ins adds 466df1718e4 [libc++] Update generate_feature_test_macro_components.py t [...] adds cb6d53ccdc7 [lldb] Bump the required SWIG version to 3
No new revisions were added by this update.
Summary of changes: clang-tools-extra/clangd/AST.cpp | 24 +- clang-tools-extra/clangd/CodeComplete.cpp | 10 +- clang-tools-extra/clangd/XRefs.cpp | 32 +- clang-tools-extra/clangd/XRefs.h | 4 +- clang-tools-extra/clangd/index/Merge.cpp | 2 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 12 +- .../unittests/tweaks/ExpandAutoTypeTests.cpp | 5 + .../unittests/tweaks/ExtractFunctionTests.cpp | 16 + clang/docs/LanguageExtensions.rst | 14 +- clang/docs/OpenCLSupport.rst | 56 +- clang/docs/OpenMPSupport.rst | 4 +- clang/include/clang/AST/DeclOpenMP.h | 2 +- clang/include/clang/AST/PrettyPrinter.h | 10 + clang/include/clang/AST/TypeLoc.h | 77 +- .../include/clang/Analysis/CrossTUAnalysisHelper.h | 41 - .../clang/Analysis/PathDiagnosticConsumers.def | 50 - clang/include/clang/Basic/Attr.td | 6 +- clang/include/clang/Basic/BuiltinsWebAssembly.def | 2 +- clang/include/clang/Basic/DiagnosticParseKinds.td | 6 + clang/include/clang/CrossTU/CrossTranslationUnit.h | 21 +- clang/include/clang/Sema/Sema.h | 16 +- clang/include/clang/Serialization/ASTBitCodes.h | 4 +- clang/include/clang/Serialization/ASTReader.h | 12 +- .../include/clang/StaticAnalyzer/Core/Analyses.def | 37 + .../clang/StaticAnalyzer/Core/AnalyzerOptions.h | 2 +- .../Core}/PathDiagnosticConsumers.h | 13 +- .../Core/PathSensitive/AnalysisManager.h | 2 +- clang/include/clang/module.modulemap | 1 - clang/lib/AST/AttrImpl.cpp | 11 +- clang/lib/AST/ExprConstant.cpp | 6 +- clang/lib/AST/TypePrinter.cpp | 3 + clang/lib/Analysis/CMakeLists.txt | 7 - .../Analysis/PlistHTMLPathDiagnosticConsumer.cpp | 35 - clang/lib/Basic/Targets/AArch64.cpp | 4 + clang/lib/Basic/Targets/AArch64.h | 2 + clang/lib/CodeGen/CGBuiltin.cpp | 7 +- clang/lib/CodeGen/CGException.cpp | 2 +- clang/lib/CodeGen/CGLoopInfo.cpp | 52 +- clang/lib/CodeGen/CGLoopInfo.h | 7 + clang/lib/CodeGen/TargetInfo.cpp | 62 +- clang/lib/CrossTU/CrossTranslationUnit.cpp | 13 +- clang/lib/Driver/Driver.cpp | 16 +- clang/lib/Driver/ToolChains/Gnu.cpp | 3 +- clang/lib/Frontend/CompilerInvocation.cpp | 2 +- clang/lib/Headers/__clang_hip_cmath.h | 28 + clang/lib/Parse/ParsePragma.cpp | 69 +- clang/lib/Sema/Sema.cpp | 13 +- clang/lib/Sema/SemaAttr.cpp | 92 +- clang/lib/Sema/SemaStmtAttr.cpp | 21 +- clang/lib/Sema/SemaType.cpp | 11 + clang/lib/Sema/TreeTransform.h | 8 +- clang/lib/Serialization/ASTReader.cpp | 50 +- clang/lib/Serialization/ASTWriter.cpp | 16 +- clang/lib/StaticAnalyzer/Core/CMakeLists.txt | 4 + .../Core/HTMLDiagnostics.cpp} | 111 +- .../Core/PlistDiagnostics.cpp} | 62 +- .../Core/SarifDiagnostics.cpp} | 30 +- .../Core/TextDiagnostics.cpp} | 42 +- .../StaticAnalyzer/Frontend/AnalysisConsumer.cpp | 4 +- clang/test/AST/ast-print-pragmas.cpp | 30 + clang/test/CodeGen/arm_neon_intrinsics.c | 60 +- clang/test/CodeGen/builtins-wasm.c | 8 +- clang/test/CodeGen/object-size.c | 10 +- clang/test/CodeGenCXX/pragma-loop-pr27643.cpp | 9 +- clang/test/CodeGenCXX/pragma-loop.cpp | 78 +- clang/test/CodeGenCXX/wasm-eh.cpp | 10 +- clang/test/Driver/cl-options.c | 5 + clang/test/OpenMP/begin_declare_variant_messages.c | 2 +- clang/test/OpenMP/declare_variant_ast_x86_64.c | 10 + clang/test/OpenMP/declare_variant_messages.c | 10 +- clang/test/OpenMP/declare_variant_messages.cpp | 4 +- .../OpenMP/nvptx_declare_variant_name_mangling.cpp | 10 +- clang/test/OpenMP/target_codegen.cpp | 2 +- clang/test/Parser/pragma-loop.cpp | 19 +- clang/test/Sema/Inputs/pragma-align-pack1.h | 11 + .../misleading-pragma-align-pack-diagnostics.c | 19 + clang/test/SemaCXX/vector.cpp | 17 + clang/unittests/Basic/FileEntryTest.cpp | 2 +- compiler-rt/lib/builtins/CMakeLists.txt | 7 +- compiler-rt/lib/builtins/atomic.c | 10 + compiler-rt/test/builtins/Unit/atomic_test.c | 80 ++ debuginfo-tests/CMakeLists.txt | 4 +- .../llvm-prettyprinters/gdb/mlir-support.cpp | 4 +- libcxx/docs/FeatureTestMacroTable.rst | 66 +- libcxx/include/version | 120 +- .../atomic_compare_exchange_strong.pass.cpp | 1 + ...tomic_compare_exchange_strong_explicit.pass.cpp | 1 + .../atomic_compare_exchange_weak.pass.cpp | 1 + .../atomic_compare_exchange_weak_explicit.pass.cpp | 1 + .../atomic_exchange.pass.cpp | 1 + .../atomic_exchange_explicit.pass.cpp | 1 + .../atomics.types.operations.req/atomic_helpers.h | 9 +- .../atomic_init.pass.cpp | 1 + .../atomic_is_lock_free.pass.cpp | 1 + .../atomic_load.pass.cpp | 1 + .../atomic_load_explicit.pass.cpp | 1 + .../atomic_store.pass.cpp | 1 + .../atomic_store_explicit.pass.cpp | 1 + .../atomic_wait.pass.cpp | 1 + .../algorithm.version.pass.cpp | 52 +- .../barrier.version.pass.cpp | 60 + .../support.limits.general/bit.version.pass.cpp | 26 + .../support.limits.general/cmath.version.pass.cpp | 20 + .../compare.version.pass.cpp | 6 +- .../complex.version.pass.cpp | 30 +- .../concepts.version.pass.cpp | 6 +- .../execution.version.pass.cpp | 5 +- .../functional.version.pass.cpp | 42 +- .../iterator.version.pass.cpp | 46 + .../support.limits.general/latch.version.pass.cpp | 60 + .../support.limits.general/memory.version.pass.cpp | 151 +++ .../semaphore.version.pass.cpp | 60 + .../support.limits.general/string.version.pass.cpp | 51 +- .../string_view.version.pass.cpp | 57 +- ...ts.version.pass.cpp => thread.version.pass.cpp} | 36 +- .../support.limits.general/tuple.version.pass.cpp | 26 + .../type_traits.version.pass.cpp | 112 ++ .../utility.version.pass.cpp | 40 +- .../support.limits.general/vector.version.pass.cpp | 26 + .../version.version.pass.cpp | 780 +++++++++++- libcxx/utils/ci/run-buildbot | 2 +- .../generate_feature_test_macro_components.py | 815 +++++++------ libcxxabi/src/cxa_personality.cpp | 105 +- lld/COFF/DebugTypes.cpp | 18 +- lld/COFF/DebugTypes.h | 3 +- lld/test/COFF/Inputs/precomp-ghash-obj1.obj | Bin 0 -> 3263 bytes lld/test/COFF/Inputs/precomp-ghash-obj2.obj | Bin 0 -> 2413 bytes lld/test/COFF/Inputs/precomp-ghash-precomp.obj | Bin 0 -> 64047 bytes lld/test/COFF/precomp-ghash.test | 53 + lld/test/wasm/debuginfo.test | 6 +- lldb/cmake/modules/FindLuaAndSwig.cmake | 4 +- lldb/cmake/modules/FindPythonAndSwig.cmake | 4 +- lldb/docs/resources/build.rst | 2 +- lldb/include/lldb/Core/ModuleList.h | 20 +- lldb/include/lldb/Target/Process.h | 58 +- lldb/include/lldb/Utility/ArchSpec.h | 9 + lldb/include/lldb/Utility/Iterable.h | 2 +- lldb/source/Breakpoint/Breakpoint.cpp | 7 +- lldb/source/Commands/CommandObjectTarget.cpp | 162 ++- lldb/source/Core/ModuleList.cpp | 4 - lldb/source/Core/SearchFilter.cpp | 39 +- .../Darwin-Kernel/DynamicLoaderDarwinKernel.cpp | 4 +- .../Hexagon-DYLD/HexagonDYLDRendezvous.cpp | 2 +- .../MacOSX-DYLD/DynamicLoaderDarwin.cpp | 8 +- .../MacOSX-DYLD/DynamicLoaderMacOS.cpp | 26 +- .../MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp | 7 +- .../DynamicLoader/Static/DynamicLoaderStatic.cpp | 6 +- .../ExpressionParser/Clang/ClangASTSource.cpp | 15 +- .../Clang/ClangExpressionParser.cpp | 21 +- lldb/source/Plugins/JITLoader/GDB/JITLoaderGDB.cpp | 4 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntime.cpp | 7 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 5 +- .../AppleObjCTrampolineHandler.cpp | 10 +- .../MemoryHistory/asan/MemoryHistoryASan.cpp | 9 +- .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 14 + .../SymbolFile/DWARF/DWARFDebugInfoEntry.cpp | 12 +- .../Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h | 2 +- lldb/source/Target/Process.cpp | 7 +- lldb/source/Utility/ArchSpec.cpp | 9 + lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml | 24 + .../SymbolFile/DWARF/Inputs/subprogram_ranges.s | 159 +++ .../Shell/SymbolFile/DWARF/subprogram_ranges.test | 19 + llvm/cmake/modules/AddLLVM.cmake | 17 +- llvm/docs/TableGen/ProgRef.rst | 43 +- llvm/include/llvm/Analysis/LoopAccessAnalysis.h | 6 + .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 4 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 6 + llvm/include/llvm/CodeGen/ISDOpcodes.h | 9 + llvm/include/llvm/CodeGen/MachineLoopInfo.h | 6 + llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 4 - llvm/include/llvm/CodeGen/TargetPassConfig.h | 6 +- llvm/include/llvm/Frontend/OpenMP/OMPKinds.def | 20 +- llvm/include/llvm/IR/IntrinsicsRISCV.td | 22 +- llvm/include/llvm/IR/IntrinsicsVE.td | 13 + llvm/include/llvm/IR/IntrinsicsWebAssembly.td | 3 +- llvm/include/llvm/IR/PassInstrumentation.h | 2 - llvm/include/llvm/IR/ValueHandle.h | 2 + llvm/include/llvm/Support/AArch64TargetParser.def | 2 + llvm/include/llvm/Support/AArch64TargetParser.h | 2 + llvm/include/llvm/Support/TaskQueue.h | 2 +- llvm/include/llvm/TableGen/Record.h | 10 + llvm/include/llvm/Target/GlobalISel/Combine.td | 9 +- .../Vectorize/LoopVectorizationLegality.h | 4 + llvm/lib/Analysis/ConstantFolding.cpp | 20 + llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 2 + llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 7 + llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 1 + llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 6 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 22 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 9 +- llvm/lib/CodeGen/MachineLICM.cpp | 50 +- llvm/lib/CodeGen/MachineLoopInfo.cpp | 56 + llvm/lib/CodeGen/MachineRegisterInfo.cpp | 7 - llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 35 + .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 6 +- llvm/lib/CodeGen/TargetPassConfig.cpp | 20 +- llvm/lib/Frontend/OpenMP/OMPContext.cpp | 10 +- llvm/lib/IR/PassInstrumentation.cpp | 8 - llvm/lib/IR/Verifier.cpp | 2 +- llvm/lib/Passes/PassBuilder.cpp | 8 - llvm/lib/Support/AArch64TargetParser.cpp | 4 + llvm/lib/Support/AMDGPUMetadata.cpp | 1 - llvm/lib/TableGen/TGLexer.cpp | 1 + llvm/lib/TableGen/TGLexer.h | 4 +- llvm/lib/TableGen/TGParser.cpp | 119 +- llvm/lib/TableGen/TGParser.h | 3 + llvm/lib/Target/AArch64/AArch64.td | 24 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 2 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 40 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 3 + llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 2 +- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 14 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 6 +- llvm/lib/Target/AArch64/AArch64Subtarget.h | 10 +- llvm/lib/Target/AArch64/AArch64SystemOperands.td | 2 +- .../AArch64/GISel/AArch64InstructionSelector.cpp | 4 +- llvm/lib/Target/AArch64/SVEInstrFormats.td | 8 +- llvm/lib/Target/AMDGPU/AMDGPU.h | 2 - llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | 15 - llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h | 15 +- llvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp | 5 +- .../Target/AMDGPU/AMDGPUAnnotateKernelFeatures.cpp | 19 +- .../Target/AMDGPU/AMDGPUAnnotateUniformValues.cpp | 3 - llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.cpp | 4 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 22 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 23 +- llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp | 55 +- llvm/lib/Target/AMDGPU/AMDGPUCallLowering.h | 5 +- llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 23 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUExportClustering.h | 3 +- llvm/lib/Target/AMDGPU/AMDGPUGlobalISelUtils.h | 3 +- .../Target/AMDGPU/AMDGPUHSAMetadataStreamer.cpp | 5 - llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h | 3 - llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 32 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 31 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 13 +- llvm/lib/Target/AMDGPU/AMDGPUInline.cpp | 8 - .../Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp | 10 +- llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h | 3 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 16 +- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 9 +- .../lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp | 3 - llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h | 3 + llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp | 18 +- llvm/lib/Target/AMDGPU/AMDGPULibFunc.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp | 5 +- .../Target/AMDGPU/AMDGPULowerKernelArguments.cpp | 23 +- .../Target/AMDGPU/AMDGPULowerKernelAttributes.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp | 2 - .../Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp | 19 - llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp | 3 +- llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h | 1 - llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp | 1 - llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.h | 4 - llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.cpp | 2 - llvm/lib/Target/AMDGPU/AMDGPUMacroFusion.h | 3 +- .../AMDGPU/AMDGPUOpenCLEnqueuedBlockLowering.cpp | 5 - llvm/lib/Target/AMDGPU/AMDGPUPTNote.h | 7 +- llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp | 4 - llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.h | 1 - .../Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp | 7 +- .../Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp | 6 +- .../Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp | 15 +- llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp | 39 - .../Target/AMDGPU/AMDGPUPropagateAttributes.cpp | 8 - llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp | 9 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 2 +- .../Target/AMDGPU/AMDGPURewriteOutArguments.cpp | 19 - llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 37 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h | 12 +- llvm/lib/Target/AMDGPU/AMDGPUTargetObjectFile.cpp | 9 +- .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 59 +- llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 35 +- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 1 + llvm/lib/Target/AMDGPU/AMDGPUUnifyMetadata.cpp | 5 - llvm/lib/Target/AMDGPU/AMDILCFGStructurizer.cpp | 26 - llvm/lib/Target/AMDGPU/AMDKernelCodeT.h | 8 +- .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 29 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 31 +- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 7 - llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp | 13 - llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp | 17 +- llvm/lib/Target/AMDGPU/GCNILPSched.cpp | 1 - llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp | 20 - llvm/lib/Target/AMDGPU/GCNIterativeScheduler.h | 6 - llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp | 13 - llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 5 - llvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp | 6 - llvm/lib/Target/AMDGPU/GCNRegPressure.cpp | 22 +- llvm/lib/Target/AMDGPU/GCNRegPressure.h | 8 +- llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp | 5 - .../AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp | 5 +- .../AMDGPU/MCTargetDesc/AMDGPUELFObjectWriter.cpp | 6 - .../AMDGPU/MCTargetDesc/AMDGPUELFStreamer.cpp | 3 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUELFStreamer.h | 6 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 6 +- .../AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h | 2 +- .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp | 8 +- .../AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.h | 12 - .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 30 +- .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.h | 18 +- .../AMDGPU/MCTargetDesc/R600MCCodeEmitter.cpp | 9 +- .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 14 - llvm/lib/Target/AMDGPU/R600AsmPrinter.cpp | 1 - llvm/lib/Target/AMDGPU/R600ClauseMergePass.cpp | 10 - .../lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 26 - llvm/lib/Target/AMDGPU/R600Defines.h | 2 - llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp | 17 - llvm/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp | 13 - llvm/lib/Target/AMDGPU/R600FrameLowering.cpp | 4 - llvm/lib/Target/AMDGPU/R600FrameLowering.h | 1 - llvm/lib/Target/AMDGPU/R600ISelLowering.cpp | 34 +- llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 24 - llvm/lib/Target/AMDGPU/R600MachineScheduler.cpp | 6 - .../AMDGPU/R600OpenCLImageTypeLoweringPass.cpp | 15 - .../Target/AMDGPU/R600OptimizeVectorRegisters.cpp | 20 - llvm/lib/Target/AMDGPU/R600Packetizer.cpp | 6 - llvm/lib/Target/AMDGPU/R600RegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/SIAddIMGInit.cpp | 7 - llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp | 22 +- llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp | 27 - llvm/lib/Target/AMDGPU/SIFixVGPRCopies.cpp | 2 - llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 8 - llvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp | 6 - llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 8 +- llvm/lib/Target/AMDGPU/SIFrameLowering.h | 1 - llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 62 +- llvm/lib/Target/AMDGPU/SIISelLowering.h | 14 +- llvm/lib/Target/AMDGPU/SIInsertHardClauses.cpp | 2 +- llvm/lib/Target/AMDGPU/SIInsertSkips.cpp | 20 - llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp | 29 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 38 +- llvm/lib/Target/AMDGPU/SIInstrInfo.h | 17 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 23 - llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 18 - llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp | 8 - llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp | 18 +- llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp | 13 - llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h | 17 +- llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp | 19 - llvm/lib/Target/AMDGPU/SIMachineScheduler.h | 8 +- llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp | 21 +- llvm/lib/Target/AMDGPU/SIModeRegister.cpp | 12 - llvm/lib/Target/AMDGPU/SIOptimizeExecMasking.cpp | 6 - .../Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp | 2 - llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp | 27 - llvm/lib/Target/AMDGPU/SIPostRABundler.cpp | 4 - llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp | 7 - llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp | 3 - llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 28 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.h | 19 +- .../Target/AMDGPU/SIRemoveShortExecBranches.cpp | 2 - llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp | 10 - llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp | 19 - llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp | 2 + llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.h | 5 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 30 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 19 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.cpp | 6 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUPALMetadata.h | 3 +- .../Target/AMDGPU/Utils/AMDKernelCodeTUtils.cpp | 4 +- llvm/lib/Target/AMDGPU/Utils/AMDKernelCodeTUtils.h | 2 +- llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 7 +- llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.cpp | 14 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 8 +- llvm/lib/Target/NVPTX/NVPTX.h | 19 + llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 31 +- llvm/lib/Target/NVPTX/NVPTXTargetMachine.h | 2 + llvm/lib/Target/NVPTX/NVVMIntrRange.cpp | 40 +- llvm/lib/Target/NVPTX/NVVMReflect.cpp | 15 +- llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td | 33 +- llvm/lib/Target/VE/VEISelLowering.cpp | 201 ++- llvm/lib/Target/VE/VEISelLowering.h | 2 + llvm/lib/Target/VE/VEInstrInfo.td | 14 +- llvm/lib/Target/VE/VEInstrIntrinsicVL.td | 39 +- llvm/lib/Target/VE/VEInstrPatternsVec.td | 67 +- llvm/lib/Target/VE/VVPNodes.def | 10 +- .../WebAssembly/WebAssemblyDebugValueManager.cpp | 14 +- .../WebAssembly/WebAssemblyExplicitLocals.cpp | 4 + .../Target/WebAssembly/WebAssemblyISelLowering.cpp | 4 +- .../Target/WebAssembly/WebAssemblyInstrControl.td | 6 +- .../WebAssembly/WebAssemblyTargetMachine.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 24 +- llvm/lib/Target/X86/X86InstructionSelector.cpp | 7 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 36 +- llvm/lib/Transforms/IPO/FunctionAttrs.cpp | 4 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 2 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 2 +- .../Instrumentation/ControlHeightReduction.cpp | 18 +- llvm/lib/Transforms/Scalar/JumpThreading.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopRerollPass.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopUnrollPass.cpp | 8 +- llvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp | 3 - llvm/lib/Transforms/Utils/BasicBlockUtils.cpp | 18 +- llvm/lib/Transforms/Utils/CloneModule.cpp | 15 +- llvm/lib/Transforms/Utils/Local.cpp | 136 ++- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 106 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 31 +- llvm/lib/Transforms/Vectorize/VPlan.cpp | 8 + llvm/lib/Transforms/Vectorize/VPlan.h | 5 + llvm/test/Analysis/DDG/print-dot-ddg.ll | 8 +- .../AArch64/aarch64-dup-ext-vectortype-crash.ll | 16 + .../CodeGen/AArch64/sve-fixed-length-int-arith.ll | 310 +++++ llvm/test/CodeGen/AArch64/sve-int-arith.ll | 83 ++ .../AMDGPU/GlobalISel/combine-urem-pow-2.mir | 156 +++ .../CodeGen/AMDGPU/GlobalISel/function-returns.ll | 69 +- .../GlobalISel/irtranslator-call-return-values.ll | 256 ++++ .../AMDGPU/GlobalISel/legalize-sextload-global.mir | 20 + .../AMDGPU/GlobalISel/legalize-zextload-global.mir | 20 + llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i32.ll | 59 +- llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll | 394 +----- llvm/test/CodeGen/AMDGPU/trunc-store-i1.ll | 4 +- llvm/test/CodeGen/AMDGPU/uaddsat.ll | 6 +- llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll | 4 +- .../AMDGPU/unstructured-cfg-def-use-issue.ll | 3 +- llvm/test/CodeGen/AMDGPU/unsupported-calls.ll | 4 +- llvm/test/CodeGen/AMDGPU/usubsat.ll | 6 +- llvm/test/CodeGen/AMDGPU/v_mac.ll | 6 +- llvm/test/CodeGen/AMDGPU/v_madak_f16.ll | 4 +- .../CodeGen/AMDGPU/vccz-corrupt-bug-workaround.mir | 2 +- llvm/test/CodeGen/AMDGPU/vector-alloca.ll | 10 +- llvm/test/CodeGen/AMDGPU/vgpr-spill.mir | 2 +- llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll | 4 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 4 +- llvm/test/CodeGen/AMDGPU/xnor.ll | 10 +- llvm/test/CodeGen/AMDGPU/zero_extend.ll | 4 +- llvm/test/CodeGen/ARM/arm-shrink-wrapping.ll | 289 +++-- llvm/test/CodeGen/ARM/indexed-mem.ll | 245 +++- llvm/test/CodeGen/NVPTX/intrinsic-old.ll | 5 + .../test/CodeGen/NVPTX/nvvm-reflect-module-flag.ll | 3 +- llvm/test/CodeGen/NVPTX/nvvm-reflect.ll | 4 +- llvm/test/CodeGen/PowerPC/lsr-ctrloop.ll | 50 +- llvm/test/CodeGen/PowerPC/maddld.ll | 281 +++-- .../PowerPC/no-ctr-loop-if-exit-in-nested-loop.ll | 50 +- llvm/test/CodeGen/PowerPC/noPermuteFormasking.ll | 7 + llvm/test/CodeGen/PowerPC/ppc-32bit-shift.ll | 29 +- llvm/test/CodeGen/PowerPC/pr33547.ll | 63 +- llvm/test/CodeGen/PowerPC/pr35688.ll | 51 +- llvm/test/CodeGen/PowerPC/scalar-rounding-ops.ll | 60 +- llvm/test/CodeGen/PowerPC/tls-pie-xform.ll | 51 +- llvm/test/CodeGen/PowerPC/vec_constants.ll | 35 +- llvm/test/CodeGen/PowerPC/vec_int_ext.ll | 187 ++- llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll | 512 ++++++++ llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll | 698 +++++++++++ llvm/test/CodeGen/VE/VELIntrinsics/pack.ll | 41 + llvm/test/CodeGen/VE/VELIntrinsics/svob.ll | 19 + .../VE/Vector/expand_single_elem_build_vec.ll | 13 + llvm/test/CodeGen/VE/Vector/extract_elt.ll | 192 +++ llvm/test/CodeGen/VE/Vector/insert_elt.ll | 209 ++++ llvm/test/CodeGen/VE/Vector/vp_add.ll | 33 +- llvm/test/CodeGen/VE/Vector/vp_and.ll | 32 +- llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll | 154 ++- llvm/test/CodeGen/WebAssembly/dbgvalue.ll | 2 +- llvm/test/CodeGen/WebAssembly/exception.ll | 6 +- llvm/test/CodeGen/WebAssembly/wasmehprepare.ll | 16 +- llvm/test/CodeGen/X86/horizontal-shuffle-2.ll | 233 ++++ llvm/test/MC/AArch64/armv8.4a-flag.s | 18 +- llvm/test/MC/WebAssembly/debug-byval-struct.ll | 116 ++ llvm/test/Other/copy-metadata-of-declaration.ll | 10 + llvm/test/Other/print-before-after.ll | 4 +- llvm/test/TableGen/assert.td | 98 ++ .../Coroutines}/coro-retcon-unreachable.ll | 1 + .../InstSimplify/ConstProp/active-lane-mask.ll | 300 +++++ .../Transforms/LoopUnroll/unroll-opt-attribute.ll | 34 + .../LoopVectorize/AArch64/scalable-vf-hint.ll | 368 ++++++ .../LoopVectorize/ARM/mve-reduction-types.ll | 51 + .../LoopVectorize/first-order-recurrence.ll | 232 ++++ .../Transforms/LoopVectorize/metadata-width.ll | 2 +- .../optimal-epilog-vectorization-limitations.ll | 24 - .../optimal-epilog-vectorization-scalable.ll | 27 + .../scalable-loop-unpredicated-body-scalar-tail.ll | 9 +- .../Transforms/LoopVectorize/scalable-vf-hint.ll | 33 + .../SLPVectorizer/X86/shrink_after_reorder.ll | 49 +- llvm/test/Transforms/SimplifyCFG/branch-fold.ll | 70 +- .../change-to-unreachable-matching-successor.ll | 16 + llvm/test/Transforms/SimplifyCFG/indirectbr.ll | 186 ++- .../SimplifyCFG/unreachable-matching-successor.ll | 16 + llvm/test/tools/llvm-cov/Inputs/branch-c-general.c | 260 ++++ llvm/test/tools/llvm-cov/branch-c-general.c | 311 ----- llvm/test/tools/llvm-cov/branch-c-general.test | 166 +++ llvm/test/tools/llvm-cov/branch-export-json.test | 4 +- llvm/test/tools/llvm-cov/branch-export-lcov.test | 4 +- llvm/test/tools/llvm-cov/branch-noShowBranch.test | 4 +- .../tools/llvm-pdbutil/Inputs/unknown-record.obj | Bin 0 -> 3284 bytes llvm/test/tools/llvm-pdbutil/unknown-records.test | 3 + .../tools/llvm-readobj/COFF/arm64-packed-unwind.s | 2 +- llvm/tools/llvm-pdbutil/DumpOutputStyle.cpp | 16 +- llvm/tools/llvm-pdbutil/FormatUtil.cpp | 7 +- llvm/tools/llvm-pdbutil/FormatUtil.h | 2 +- llvm/tools/llvm-readobj/ARMWinEHPrinter.cpp | 10 +- llvm/tools/opt/opt.cpp | 2 + llvm/unittests/IR/ValueHandleTest.cpp | 5 +- llvm/unittests/Support/DataExtractorTest.cpp | 3 +- llvm/unittests/Support/TargetParserTest.cpp | 2 + llvm/unittests/Transforms/Vectorize/VPlanTest.cpp | 36 + llvm/utils/TableGen/CodeGenDAGPatterns.cpp | 2 +- llvm/utils/TableGen/CodeGenDAGPatterns.h | 2 +- .../utils/gn/secondary/clang/lib/Analysis/BUILD.gn | 5 - .../clang/lib/StaticAnalyzer/Core/BUILD.gn | 4 + llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 53 +- mlir/cmake/modules/AddMLIR.cmake | 2 +- mlir/docs/ConversionToLLVMDialect.md | 46 +- mlir/docs/Dialects/LLVM.md | 26 +- mlir/docs/Dialects/Linalg.md | 4 +- mlir/docs/Dialects/Vector.md | 10 +- mlir/docs/LLVMDialectMemRefConvention.md | 92 +- mlir/docs/SPIRVToLLVMDialectConversion.md | 236 ++-- mlir/docs/Tutorials/Toy/Ch-6.md | 30 +- mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp | 12 +- mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp | 12 +- mlir/include/mlir-c/Support.h | 2 +- .../mlir/Conversion/SPIRVToLLVM/SPIRVToLLVMPass.h | 2 +- .../StandardToLLVM/ConvertStandardToLLVM.h | 24 +- mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td | 4 +- mlir/include/mlir/Dialect/Async/IR/AsyncOps.td | 2 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td | 13 +- mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td | 48 +- mlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h | 70 +- mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td | 4 +- mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td | 9 +- mlir/include/mlir/Dialect/SCF/SCFOps.td | 4 +- .../mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td | 36 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td | 2 + mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td | 20 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVCastOps.td | 9 +- .../mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td | 6 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td | 2 +- .../mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td | 66 +- mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h | 6 + mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 2 +- .../mlir/Dialect/StandardOps/Transforms/Passes.td | 2 +- mlir/include/mlir/Dialect/Tosa/Utils/QuantUtils.h | 2 +- mlir/include/mlir/Dialect/Vector/VectorOps.td | 2 +- mlir/include/mlir/IR/ImplicitLocOpBuilder.h | 4 +- mlir/include/mlir/IR/OpDefinition.h | 2 +- mlir/include/mlir/Parser.h | 2 +- mlir/include/mlir/Pass/PassRegistry.h | 6 +- mlir/include/mlir/Support/IndentedOstream.h | 2 +- .../include/mlir/Target/LLVMIR/ModuleTranslation.h | 2 +- mlir/include/mlir/Target/LLVMIR/TypeTranslation.h | 2 +- mlir/include/mlir/Transforms/Bufferize.h | 2 +- .../Dialect/LLVMIR/CPU/X86/test-inline-asm.mlir | 8 +- .../LLVMIR/CPU/test-vector-reductions-fp.mlir | 70 +- .../LLVMIR/CPU/test-vector-reductions-int.mlir | 62 +- mlir/lib/Analysis/AffineStructures.cpp | 2 +- mlir/lib/Bindings/Python/IRModules.cpp | 2 +- mlir/lib/CAPI/Transforms/Passes.cpp | 2 +- mlir/lib/Conversion/AsyncToLLVM/AsyncToLLVM.cpp | 40 +- .../GPUCommon/ConvertKernelFuncToBlob.cpp | 2 +- .../GPUCommon/ConvertLaunchFuncToRuntimeCalls.cpp | 18 +- mlir/lib/Conversion/GPUCommon/GPUOpsLowering.h | 4 +- .../GPUCommon/IndexIntrinsicsOpLowering.h | 13 +- .../Conversion/GPUCommon/OpToFuncCallLowering.h | 11 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 12 +- .../GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp | 40 +- mlir/lib/Conversion/PDLToPDLInterp/Predicate.h | 2 +- .../SPIRVToLLVM/ConvertLaunchFuncToLLVMCalls.cpp | 4 +- mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp | 8 +- .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 50 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 25 +- .../Dialect/Async/Transforms/AsyncParallelFor.cpp | 2 +- mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp | 116 +- mlir/lib/Dialect/LLVMIR/IR/LLVMTypeSyntax.cpp | 77 +- mlir/lib/Dialect/LLVMIR/IR/LLVMTypes.cpp | 70 +- mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp | 11 +- mlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp | 8 +- mlir/lib/Dialect/LLVMIR/IR/TypeDetail.h | 25 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 5 +- .../Dialect/Linalg/Transforms/Sparsification.cpp | 2 +- mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp | 3 +- mlir/lib/Dialect/PDL/IR/PDL.cpp | 2 +- mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp | 18 +- mlir/lib/Dialect/SPIRV/IR/SPIRVTypes.cpp | 2 +- .../Linking/ModuleCombiner/ModuleCombiner.cpp | 10 +- mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 3 +- .../Dialect/StandardOps/Transforms/ExpandOps.cpp | 4 +- .../Tosa/Transforms/TosaMakeBroadcastable.cpp | 2 +- mlir/lib/Dialect/Vector/VectorOps.cpp | 2 +- mlir/lib/ExecutionEngine/JitRunner.cpp | 16 +- mlir/lib/IR/AsmPrinter.cpp | 4 +- mlir/lib/Rewrite/ByteCode.h | 2 +- mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp | 16 +- mlir/lib/Target/LLVMIR/ModuleTranslation.cpp | 16 +- mlir/lib/Target/LLVMIR/TypeTranslation.cpp | 36 +- mlir/lib/Target/SPIRV/Serialization.cpp | 2 +- mlir/lib/Transforms/BufferUtils.cpp | 2 +- mlir/lib/Transforms/Utils/FoldUtils.cpp | 6 +- mlir/lib/Transforms/Utils/LoopUtils.cpp | 3 +- mlir/lib/Transforms/Utils/RegionUtils.cpp | 2 +- mlir/test/Bindings/Python/ir_attributes.py | 2 +- mlir/test/Bindings/Python/ir_operation.py | 6 +- .../Conversion/AsyncToLLVM/convert-to-llvm.mlir | 11 +- .../lower-launch-func-to-gpu-runtime-calls.mlir | 10 +- .../Conversion/GPUCommon/memory-attrbution.mlir | 120 +- .../GPUToCUDA/lower-nvvm-kernel-to-cubin.mlir | 2 +- mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir | 238 ++-- mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir | 194 +-- .../GPUToROCm/lower-rocdl-kernel-to-hsaco.mlir | 2 +- .../test/Conversion/GPUToVulkan/invoke-vulkan.mlir | 80 +- .../Conversion/OpenMPToLLVM/convert-to-llvmir.mlir | 18 +- .../SPIRVToLLVM/arithmetic-ops-to-llvm.mlir | 38 +- .../SPIRVToLLVM/bitwise-ops-to-llvm.mlir | 222 ++-- .../Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir | 44 +- .../SPIRVToLLVM/comparison-ops-to-llvm.mlir | 68 +- .../SPIRVToLLVM/constant-op-to-llvm.mlir | 16 +- .../SPIRVToLLVM/control-flow-ops-to-llvm.mlir | 32 +- .../Conversion/SPIRVToLLVM/func-ops-to-llvm.mlir | 10 +- .../Conversion/SPIRVToLLVM/glsl-ops-to-llvm.mlir | 70 +- .../SPIRVToLLVM/logical-ops-to-llvm.mlir | 12 +- .../SPIRVToLLVM/lower-host-to-llvm-calls.mlir | 8 +- .../Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir | 66 +- .../Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir | 28 +- .../Conversion/SPIRVToLLVM/shift-ops-to-llvm.mlir | 36 +- .../SPIRVToLLVM/spirv-types-to-llvm.mlir | 12 +- .../StandardToLLVM/calling-convention.mlir | 40 +- .../StandardToLLVM/convert-argattrs.mlir | 4 +- .../StandardToLLVM/convert-dynamic-memref-ops.mlir | 464 +++---- .../Conversion/StandardToLLVM/convert-funcs.mlir | 18 +- .../StandardToLLVM/convert-static-memref-ops.mlir | 440 +++---- .../StandardToLLVM/convert-to-llvmir.mlir | 1281 ++++++++++---------- .../StandardToLLVM/standard-to-llvm.mlir | 168 +-- .../VectorToLLVM/vector-mask-to-llvm.mlir | 18 +- .../VectorToLLVM/vector-reduction-to-llvm.mlir | 32 +- .../Conversion/VectorToLLVM/vector-to-llvm.mlir | 962 +++++++-------- .../Conversion/VectorToROCDL/vector-to-rocdl.mlir | 8 +- mlir/test/Dialect/GPU/invalid.mlir | 20 +- mlir/test/Dialect/GPU/multiple-all-reduce.mlir | 4 +- mlir/test/Dialect/GPU/outlining.mlir | 4 +- mlir/test/Dialect/LLVMIR/dialect-cast.mlir | 101 +- mlir/test/Dialect/LLVMIR/func.mlir | 46 +- mlir/test/Dialect/LLVMIR/global.mlir | 82 +- mlir/test/Dialect/LLVMIR/invalid.mlir | 344 +++--- mlir/test/Dialect/LLVMIR/legalize-for-export.mlir | 12 +- mlir/test/Dialect/LLVMIR/nvvm.mlir | 96 +- mlir/test/Dialect/LLVMIR/rocdl.mlir | 218 ++-- mlir/test/Dialect/LLVMIR/roundtrip.mlir | 468 +++---- mlir/test/Dialect/LLVMIR/terminator.mlir | 2 +- mlir/test/Dialect/LLVMIR/types-invalid.mlir | 43 +- mlir/test/Dialect/LLVMIR/types.mlir | 102 +- mlir/test/Dialect/Linalg/llvm.mlir | 188 +-- mlir/test/Dialect/OpenMP/ops.mlir | 12 +- mlir/test/Dialect/SPIRV/IR/types.mlir | 4 +- mlir/test/Target/arm-sve.mlir | 6 +- mlir/test/Target/avx512.mlir | 28 +- mlir/test/Target/import.ll | 124 +- mlir/test/Target/llvmir-intrinsics.mlir | 220 ++-- mlir/test/Target/llvmir-invalid.mlir | 18 +- mlir/test/Target/llvmir-types.mlir | 52 +- mlir/test/Target/llvmir.mlir | 972 +++++++-------- mlir/test/Target/nvvmir.mlir | 66 +- mlir/test/Target/openmp-llvm.mlir | 98 +- mlir/test/Target/rocdl.mlir | 140 +-- mlir/test/Transforms/test-convert-call-op.mlir | 6 +- mlir/test/lib/Transforms/TestConvertCallOp.cpp | 3 +- mlir/test/mlir-cpu-runner/bare_ptr_call_conv.mlir | 2 +- mlir/test/mlir-cpu-runner/simple.mlir | 58 +- mlir/test/mlir-tblgen/rewriter-indexing.td | 3 + mlir/tools/mlir-tblgen/RewriterGen.cpp | 12 +- openmp/docs/design/Runtimes.rst | 79 ++ openmp/docs/remarks/OptimizationRemarks.rst | 25 + openmp/libomptarget/plugins/cuda/src/rtl.cpp | 123 +- 669 files changed, 16793 insertions(+), 9893 deletions(-) delete mode 100644 clang/include/clang/Analysis/CrossTUAnalysisHelper.h delete mode 100644 clang/include/clang/Analysis/PathDiagnosticConsumers.def rename clang/include/clang/{Analysis => StaticAnalyzer/Core}/PathDiagnosticConsume [...] delete mode 100644 clang/lib/Analysis/PlistHTMLPathDiagnosticConsumer.cpp rename clang/lib/{Analysis/HTMLPathDiagnosticConsumer.cpp => StaticAnalyzer/Core/H [...] rename clang/lib/{Analysis/PlistPathDiagnosticConsumer.cpp => StaticAnalyzer/Core/ [...] rename clang/lib/{Analysis/SarifPathDiagnosticConsumer.cpp => StaticAnalyzer/Core/ [...] rename clang/lib/{Analysis/TextPathDiagnosticConsumer.cpp => StaticAnalyzer/Core/T [...] create mode 100644 clang/test/OpenMP/declare_variant_ast_x86_64.c create mode 100644 clang/test/Sema/Inputs/pragma-align-pack1.h create mode 100644 clang/test/Sema/misleading-pragma-align-pack-diagnostics.c create mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] create mode 100644 libcxx/test/std/language.support/support.limits/support.limits. [...] copy libcxx/test/std/language.support/support.limits/support.limits.general/{conce [...] create mode 100644 lld/test/COFF/Inputs/precomp-ghash-obj1.obj create mode 100644 lld/test/COFF/Inputs/precomp-ghash-obj2.obj create mode 100644 lld/test/COFF/Inputs/precomp-ghash-precomp.obj create mode 100644 lld/test/COFF/precomp-ghash.test create mode 100644 lldb/test/Shell/ObjectFile/ELF/riscv-arch.yaml create mode 100644 lldb/test/Shell/SymbolFile/DWARF/Inputs/subprogram_ranges.s create mode 100644 lldb/test/Shell/SymbolFile/DWARF/subprogram_ranges.test create mode 100644 llvm/test/CodeGen/AArch64/aarch64-dup-ext-vectortype-crash.ll create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/combine-urem-pow-2.mir create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv32.ll create mode 100644 llvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll create mode 100644 llvm/test/CodeGen/VE/VELIntrinsics/pack.ll create mode 100644 llvm/test/CodeGen/VE/VELIntrinsics/svob.ll create mode 100644 llvm/test/CodeGen/VE/Vector/expand_single_elem_build_vec.ll create mode 100644 llvm/test/CodeGen/VE/Vector/extract_elt.ll create mode 100644 llvm/test/CodeGen/VE/Vector/insert_elt.ll create mode 100644 llvm/test/CodeGen/X86/horizontal-shuffle-2.ll create mode 100644 llvm/test/MC/WebAssembly/debug-byval-struct.ll create mode 100644 llvm/test/Other/copy-metadata-of-declaration.ll create mode 100644 llvm/test/TableGen/assert.td rename {clang/test/CodeGenCoroutines => llvm/test/Transforms/Coroutines}/coro-retc [...] create mode 100644 llvm/test/Transforms/InstSimplify/ConstProp/active-lane-mask.ll create mode 100644 llvm/test/Transforms/LoopVectorize/AArch64/scalable-vf-hint.ll create mode 100644 llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization [...] create mode 100644 llvm/test/Transforms/LoopVectorize/scalable-vf-hint.ll create mode 100644 llvm/test/Transforms/SimplifyCFG/change-to-unreachable-matching [...] create mode 100644 llvm/test/Transforms/SimplifyCFG/unreachable-matching-successor.ll create mode 100644 llvm/test/tools/llvm-cov/Inputs/branch-c-general.c delete mode 100644 llvm/test/tools/llvm-cov/branch-c-general.c create mode 100644 llvm/test/tools/llvm-cov/branch-c-general.test create mode 100644 llvm/test/tools/llvm-pdbutil/Inputs/unknown-record.obj create mode 100644 llvm/test/tools/llvm-pdbutil/unknown-records.test