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unknown user pushed a change to branch devel/omp/gcc-10 in repository gcc.
from f64f0899ba1 amdgcn: Switch to HSACO v3 binary format adds 32f2eef94c2 Daily bump. adds 7d249d84e4c testsuite: Add offloading_enabled check and use it for xfai [...] adds 32c348ce3ef arm: Fix the wrong code-gen generated by MVE vector load/st [...] adds 1aabb312fa0 arm: Fix unintentional fall throughs in arm.c adds aac5ae14436 arm: Correct the grouping of operands in MVE vector scatter [...] adds 29e9bc108f2 arm: Fix the MVE ACLE vbicq intrinsics. adds f00c9e9793d Daily bump. adds 1bab254fd30 c++: ICE with IMPLICIT_CONV_EXPR in array subscript [PR95508] adds 55838f7fbd6 PR fortran/95088 - Buffer overflows with PDTs, submodules a [...] adds ad3f0ec1a80 [HSA] Avoid ICE when "HSA does not implement indirect calls" adds a2b187c1391 hurd: libgcc unwinding support over signal trampolines adds 61c896d84bd Add 'dg-do run' to 'libgomp.fortran/use_device_ptr-optional [...] adds 934a5fa582f Daily bump. adds 824d48ecb9a [PATCH][GCC] arm: Fix MVE scalar shift intrinsics code-gen. adds dccc54d2501 [PATCH][GCC] arm: Fix the MVE ACLE vaddq_m polymorphic variants. adds 0c7d18d51a8 forwprop: simplify_vector_constructor follow-up fix [PR95713] adds 541e8c4dac1 Correctly identify stfs if prefixed adds 6e81b0cf4ff identify lfs prefixed case PR95347 new 2831ef4459a Merge remote-tracking branch 'origin/releases/gcc-10' into [...]
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Summary of changes: gcc/ChangeLog | 141 +++ gcc/DATESTAMP | 2 +- gcc/config/arm/arm-protos.h | 3 + gcc/config/arm/arm.c | 106 +- gcc/config/arm/arm.h | 8 +- gcc/config/arm/arm_mve.h | 80 +- gcc/config/arm/constraints.md | 23 +- gcc/config/arm/mve.md | 1054 ++++++++++++-------- gcc/config/arm/predicates.md | 24 + gcc/config/rs6000/rs6000.c | 70 +- gcc/cp/ChangeLog | 8 + gcc/cp/constexpr.c | 13 + gcc/cp/cp-tree.h | 2 + gcc/cp/typeck.c | 2 +- gcc/fortran/ChangeLog | 9 + gcc/fortran/class.c | 14 +- gcc/hsa-gen.c | 9 +- gcc/testsuite/ChangeLog | 116 +++ .../c-c++-common/goacc/kernels-alias-ipa-pta-2.c | 3 +- .../c-c++-common/goacc/kernels-alias-ipa-pta-4.c | 5 +- .../c-c++-common/goacc/kernels-alias-ipa-pta.c | 3 +- .../c-c++-common/gomp/hsa-indirect-call-1.c | 24 + gcc/testsuite/g++.dg/template/conv16.C | 17 + gcc/testsuite/gcc.dg/pr95713.c | 15 + .../arm/mve/intrinsics/mve_scalar_shifts1.c | 40 + .../arm/mve/intrinsics/mve_scalar_shifts2.c | 35 + .../arm/mve/intrinsics/mve_scalar_shifts3.c | 28 + .../arm/mve/intrinsics/mve_scalar_shifts4.c | 34 + .../gcc.target/arm/mve/intrinsics/mve_vaddq_m.c | 48 + .../arm/mve/intrinsics/mve_vector_float2.c | 13 +- .../gcc.target/arm/mve/intrinsics/mve_vldr.c | 61 ++ .../gcc.target/arm/mve/intrinsics/mve_vldr_z.c | 73 ++ .../arm/mve/intrinsics/mve_vstore_scatter_base.c | 67 ++ .../arm/mve/intrinsics/mve_vstore_scatter_base_p.c | 69 ++ .../arm/mve/intrinsics/mve_vstore_scatter_offset.c | 215 ++++ .../mve/intrinsics/mve_vstore_scatter_offset_p.c | 216 ++++ .../intrinsics/mve_vstore_scatter_shifted_offset.c | 141 +++ .../mve_vstore_scatter_shifted_offset_p.c | 142 +++ .../gcc.target/arm/mve/intrinsics/mve_vstr.c | 43 + .../gcc.target/arm/mve/intrinsics/mve_vstr_p.c | 42 + .../gcc.target/arm/mve/intrinsics/vbicq_f16.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_f32.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_n_s16.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_n_s32.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_n_u16.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_n_u32.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_s16.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_s32.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_s8.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_u16.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_u32.c | 1 + .../gcc.target/arm/mve/intrinsics/vbicq_u8.c | 1 + .../gcc.target/arm/mve/intrinsics/vld1q_f16.c | 5 +- .../gcc.target/arm/mve/intrinsics/vld1q_f32.c | 5 +- .../gcc.target/arm/mve/intrinsics/vld1q_s16.c | 5 +- .../gcc.target/arm/mve/intrinsics/vld1q_s32.c | 5 +- .../gcc.target/arm/mve/intrinsics/vld1q_s8.c | 5 +- .../gcc.target/arm/mve/intrinsics/vld1q_u16.c | 5 +- .../gcc.target/arm/mve/intrinsics/vld1q_u32.c | 5 +- .../gcc.target/arm/mve/intrinsics/vld1q_u8.c | 5 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_f16.c | 6 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_f32.c | 6 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_s16.c | 6 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_s32.c | 6 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_s8.c | 6 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_u16.c | 6 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_u32.c | 6 +- .../gcc.target/arm/mve/intrinsics/vld1q_z_u8.c | 6 +- .../gcc.target/arm/mve/intrinsics/vldrbq_s8.c | 3 +- .../gcc.target/arm/mve/intrinsics/vldrbq_u8.c | 3 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_s8.c | 4 +- .../gcc.target/arm/mve/intrinsics/vldrbq_z_u8.c | 4 +- .../arm/mve/intrinsics/vldrdq_gather_base_wb_s64.c | 5 +- .../arm/mve/intrinsics/vldrdq_gather_base_wb_u64.c | 5 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_s64.c | 6 +- .../mve/intrinsics/vldrdq_gather_base_wb_z_u64.c | 6 +- .../gcc.target/arm/mve/intrinsics/vldrhq_f16.c | 3 +- .../gcc.target/arm/mve/intrinsics/vldrhq_s16.c | 3 +- .../gcc.target/arm/mve/intrinsics/vldrhq_s32.c | 3 +- .../gcc.target/arm/mve/intrinsics/vldrhq_u16.c | 3 +- .../gcc.target/arm/mve/intrinsics/vldrhq_u32.c | 3 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_f16.c | 4 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_s16.c | 4 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_s32.c | 4 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_u16.c | 4 +- .../gcc.target/arm/mve/intrinsics/vldrhq_z_u32.c | 4 +- .../gcc.target/arm/mve/intrinsics/vldrwq_f32.c | 3 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_f32.c | 5 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_s32.c | 5 +- .../arm/mve/intrinsics/vldrwq_gather_base_wb_u32.c | 5 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_f32.c | 5 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_s32.c | 5 +- .../mve/intrinsics/vldrwq_gather_base_wb_z_u32.c | 5 +- .../gcc.target/arm/mve/intrinsics/vldrwq_s32.c | 3 +- .../gcc.target/arm/mve/intrinsics/vldrwq_u32.c | 3 +- .../gcc.target/arm/mve/intrinsics/vldrwq_z_f32.c | 4 +- .../gcc.target/arm/mve/intrinsics/vldrwq_z_s32.c | 4 +- .../gcc.target/arm/mve/intrinsics/vldrwq_z_u32.c | 4 +- .../arm/mve/intrinsics/vuninitializedq_float.c | 6 +- .../arm/mve/intrinsics/vuninitializedq_float1.c | 6 +- .../arm/mve/intrinsics/vuninitializedq_int.c | 8 +- .../arm/mve/intrinsics/vuninitializedq_int1.c | 8 +- gcc/testsuite/gfortran.dg/pr95088.f90 | 31 + gcc/testsuite/lib/target-supports.exp | 6 + gcc/tree-ssa-forwprop.c | 11 +- libgcc/ChangeLog | 9 + libgcc/config.host | 8 +- libgcc/config/i386/gnu-unwind.h | 107 ++ libgomp/ChangeLog | 15 + .../libgomp.fortran/use_device_ptr-optional-3.f90 | 1 + 110 files changed, 2856 insertions(+), 600 deletions(-) create mode 100644 gcc/testsuite/c-c++-common/gomp/hsa-indirect-call-1.c create mode 100644 gcc/testsuite/g++.dg/template/conv16.C create mode 100644 gcc/testsuite/gcc.dg/pr95713.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_scalar_shifts1.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_scalar_shifts2.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_scalar_shifts3.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_scalar_shifts4.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vaddq_m.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldr.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vldr_z.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_base.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_ [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_ [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_ [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_ [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstore_scatter_ [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstr.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/mve_vstr_p.c create mode 100644 gcc/testsuite/gfortran.dg/pr95088.f90 create mode 100644 libgcc/config/i386/gnu-unwind.h