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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-next-defconfig in repository toolchain/ci/llvm-project.
from 54acc20e6da [PATCH] Reland [Clang] Un-break scan-build after integrated [...] adds 050e1a3c268 [AArch64] Don't rename registers with pseudo defs in Ld/St opt. adds 7adf83beece [InstCombine] Fix worklist management in DSE (PR44552) adds b5cdee9bdce [PGO][PGSO] Update BFI in CodeGenPrepare::optimizeSelectInst. adds 1f98c2b586e [clang-tidy] Disable Checks on If constexpr statements in t [...] adds d64ca7abe19 [SLP] Add a test showing miscompilation in AltOpcode support adds 029140ee1ca [SLP] Don't allow Div/Rem as alternate opcodes adds 6c9da109c9c [mlir] Fix compilation with VS2019. adds 3e429b691ec [cmake] Fix clang builds with BUILD_SHARED=ON and CLANG_LIN [...] adds ba92233ce22 Revert "[cmake] Fix clang builds with BUILD_SHARED=ON and C [...] adds 85ee70e8645 Clang] Fix expansion of response files in -Wp after integra [...] adds 5d37ce7e19c [LLD][COFF] Enable linking of __declspec(selectany) symbols [...] adds 8634a82910e [RISCV] Fix evaluating %pcrel_lo against global and weak symbols adds a3982a59ce3 [test] Fix lld/test/ELF/riscv-pcrel-hilo-error.s after D73211
No new revisions were added by this update.
Summary of changes: .../clang-tidy/bugprone/BranchCloneCheck.cpp | 3 +- .../readability/BracesAroundStatementsCheck.cpp | 5 +- ...bugprone-branch-clone-if-constexpr-template.cpp | 58 +++++++++ ...es-around-statements-constexpr-if-templates.cpp | 48 ++++++++ clang/include/clang/Driver/Driver.h | 2 +- clang/test/Driver/Wp-args.c | 10 ++ clang/tools/driver/driver.cpp | 22 ++-- lld/COFF/InputFiles.cpp | 11 ++ lld/test/COFF/comdat-gcc-compatibility.s | 13 +++ lld/test/ELF/riscv-pcrel-hilo-error.s | 6 + llvm/include/llvm/MC/MCAsmBackend.h | 8 ++ llvm/include/llvm/MC/MCFixupKindInfo.h | 5 +- llvm/lib/CodeGen/CodeGenPrepare.cpp | 1 + llvm/lib/MC/MCAssembler.cpp | 7 ++ .../Target/AArch64/AArch64LoadStoreOptimizer.cpp | 13 +++ .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 97 ++++++++++------ .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.h | 14 ++- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp | 69 +---------- llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h | 7 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 7 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 18 ++- .../test/CodeGen/AArch64/stp-opt-with-renaming.mir | 33 ++++++ llvm/test/CodeGen/X86/cmov-into-branch.ll | 25 ++++ llvm/test/MC/RISCV/pcrel-fixups.s | 74 ++++++++++-- llvm/test/MC/RISCV/pcrel-lo12-invalid.s | 2 + llvm/test/MC/RISCV/rv32i-aliases-valid.s | 7 +- llvm/test/MC/RISCV/rv32i-valid.s | 7 +- llvm/test/MC/RISCV/rv64i-aliases-valid.s | 8 +- llvm/test/Transforms/InstCombine/pr44552.ll | 59 ++++++++++ .../SLPVectorizer/X86/no_alternate_divrem.ll | 129 +++++++++++++++++++++ mlir/include/mlir/IR/Attributes.h | 7 +- 31 files changed, 631 insertions(+), 144 deletions(-) create mode 100644 clang-tools-extra/test/clang-tidy/checkers/bugprone-branch-clon [...] create mode 100644 clang-tools-extra/test/clang-tidy/checkers/readability-braces-a [...] create mode 100644 lld/test/COFF/comdat-gcc-compatibility.s create mode 100644 llvm/test/Transforms/InstCombine/pr44552.ll create mode 100644 llvm/test/Transforms/SLPVectorizer/X86/no_alternate_divrem.ll