[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig updated (4e636156ef2 -> 7f9a94e1f88)

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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/llvm-project.

from 4e636156ef2 [sanitizers][windows] FIX: Rtl-Heap Interception and tests adds 0e344e9dc5f [LoopPred] Stylistic improvement to recently added NE/EQ no [...] adds 947bfe73fc2 [WebAssembly] Make sret parameter work with AddMissingPrototypes adds 18301fa82bf [PowerPC][MachinePipeliner][NFC] Add a testcase for Phi bug. adds cbd64f7648f [MachinePipeliner] Fix Phi refers to Phi in same stage in 1 [...] adds 25ab27e6ef8 [PowerPC][NFC] remove redundant function isVFReg(). adds 1931ed73c3d [PowerPC][Peephole] Combine extsw and sldi after instructio [...] adds 818d748a45a [AMDGPU] Always use s_memtime for readcyclecounter adds c776dc0b600 [AMDGPU] Added td definitions for HW regs adds 619e39bc729 [NFC][PowerPC] Fixed unused variable 'NewInstr'. adds 92fb5f2e479 [LLD] NFC: Fixed GCC warning in ELF/Arch/RISCV.cpp adds f21eeafcd9c [BPF] Preserve debuginfo array/union/struct type/access index adds e085b40e9c4 Revert "[BPF] Preserve debuginfo array/union/struct type/ac [...] adds c6caddb73d4 [LoopInfo] Update getExitEdges to accept vector of pairs fo [...] adds 048493f882f [BPF] Preserve debuginfo array/union/struct type/access index adds 592f44a7e75 Prepare for making SwitchInstProfUpdateWrapper strict adds 77bb3a486fa [Loop Peeling] Add support for peeling of loops with multip [...] adds c117be6fc62 [ELF][test] Rename tail-merge-string-align2.s to merge-stri [...] adds 50e7f45b280 [ELF] Assert sizeof(SymbolUnion) <= 80 adds 12aca5de026 Reland "[LiveDebugValues] Emit the debug entry values" adds b2a549d7cf9 Add AlignConsecutiveMacros to the clang release notes adds 0adbe77566d Remove trailing whitespaces in the Language Extensions doc adds 09329ce6c4b [NFC][PowerPC] Added a test to show current codegen of MachinePRE adds 9bebc65d796 Revert r364515 and r364524 adds 336f3e16011 Fixing @llvm.memcpy not honoring volatile. This is explicit [...] adds 564daa01fcf [llvm-profdata] Don't make the output overwrite the input file. adds 4363edb0e84 [docs][llvm-dwarfdump] Make some option descriptions cleare [...] adds 456fc4fa6dc Retire VS2015 Support adds 1fb97c90365 dummy variable extraction on a function scope adds 6f6e5d85de9 Retire VS2015 Support adds 59029017a66 [LegalizeTypes] Fix saturation bug for smul.fix.sat adds 051a6a1c33e [SelectionDAG] Simplify some calls to getSetCCResultType. NFC adds 189355f3ee5 [CMake] Remove old lldb_setup_framework_rpaths_in_tool() adds e9298dc9027 [CMake] Don't initialize LLVM_INSTALL_TOOLCHAIN_ONLY in App [...] adds e5b868d6a3c [CMake] Polish a comment adds cc0203e06d8 Fixed assertion adds 65d7511f384 [docs][llvm-nm] Improve some wording adds e0831dac0c3 [RISCV] Fix RISCVTTIImpl::getIntImmCost for immediates wher [...] adds f717148b3a7 Enhance abseil-faster-strsplit-delimiter to handle other no [...] adds eb79b25b440 [ASTImporter] Added visibility context check for EnumDecl. adds 7e3b22758d1 Revert rL365355 : [Syntax] Introduce syntax trees adds 9b3f38f9908 Reland r365355: [Syntax] Introduce syntax trees adds 01eaae6dd12 [DwarfDebug] Dump call site debug info adds 60afa49abed OpaquePtr: add Type parameter to Loads analysis API. adds c1e0ea97653 [NFC][AsmPrinter] Fix the formatting for the rL365467 adds 4bc20fa1494 OpaquePtr: Update polly's calls to Loads.h API adds e995ce5498f [ADT] Enable ArrayRef/StringRef is_assignable tests on MSVC adds 13b204fee1e OpaquePtr: pass type to CreateLoad. NFC. adds a50bbfc4702 [NFC] [X86] Fix scan-build complaining adds 8447b419a7c [docs][llvm-objdump] Make some wording improvements/simplif [...] adds 00df4d92eda [mips] Implement sgt/sgtu pseudo instructions with immediat [...] adds 2fa6b546356 [mips] Implement sge/sgeu pseudo instructions adds 480e8ad2173 [CodeGen] AccelTable - remove non-constexpr (MSVC) Atom defs adds e7a67bf8ceb lld-link: Stop accepting /natvis and /fastfail in .drectve [...] adds 51dad4196e5 [Syntax] Move roles into a separate enum adds 04615341e48 [ItaniumMangle] Refactor long double/__float128 mangling an [...] adds 62410356849 gn build: Merge r365453 adds 9b7ffc4e55b AMDGPU/GlobalISel: Select G_MERGE_VALUES adds 872f38be7e9 AMDGPU/GlobalISel: Select G_UNMERGE_VALUES adds e6d10f97dd8 AMDGPU/GlobalISel: Select G_SUB adds e509af3cd6c [OPENMP]Fix the float point semantics handling on the device. adds 8b8eee5904c AMDGPU/GlobalISel: Make s16 G_ICMP legal adds 6bdb92d833a AMDGPU/GlobalISel: Improve regbankselect for icmp s16 adds 4dd5755d018 AMDGPU/GlobalISel: Legalize more concat_vectors adds e0a3ee79c5f [docs][llvm-dwarfdump] Fix wording adds 743754501b3 [libclang] Fix hang in release / assertion in debug when ev [...] adds 85ad662dfd5 AMDGPU/GlobalISel: Fix test adds dbb6d01d340 [MIPS GlobalISel] Regbanks for G_SELECT. Select i64, f32 an [...] adds fdd761af159 AMDGPU/GlobalISel: Prepare some tests for store selection adds be20e36107c [MIPS GlobalISel] Register bank select for G_PHI. Select i64 phi adds fb453353dab [InferFunctionAttrs] add more tests for derefenceable; NFC adds 781e3aff8c6 [ARM] Add test for MVE and no floats. NFC adds d9555730658 [HardwareLoops] NFC - move hardware loop checking code to i [...] adds b1e511bf5a4 Ignore trailing NullStmts in StmtExprs for GCC compatibility. adds b00d5f732cd [OpenCL][Sema] Fix builtin rewriting adds d36e130a86d [OpenCL][Sema] Improve address space support for blocks adds e625eb9defc [NFC] Added tests for D64285 adds d050e456317 [ADT] Remove MSVC-only "no two-phase name lookup" typename path. adds d3d88d08b5d [BPF] Support for compile once and run everywhere adds 57603cbde8b [DAGCombine] LoadedSlice - keep getOffsetFromBase() uint64_ [...] adds a448ed99dfd [libunwind] Fix Unwind-EHABI.cpp:getByte on big-endian targets adds 901d91e5f0f [NFC] Fixed tests adds 623282f0dd7 [mips] Explicitly select `mips32r2` CPU for test cases requ [...] adds e3892d84e0c [mips] Show error in case of using FP64 mode on pre MIPS32R2 CPU adds d088720edad Revert Revert Devirtualize destructor of final class. adds 6616e269a69 [AArch64][GlobalISel] Optimize conditional branches followe [...] adds 114d2db49b1 [RISCV] Fix ICE in isDesirableToCommuteWithShift adds b2d24bd5400 [AMDGPU] Created a sub-register class for the return addres [...] adds 521f77e6351 [TSan] Improve handling of stack pointer mangling in {set,l [...] adds ce84e6ae8ea Make pdbdump-objfilename test work again adds c9c55cf89b0 Rename llvm/test/tools/llvm-pdbdump to llvm/test/tools/llvm [...] adds 329c0320406 [unittest] Add bogus register info. adds 0efac296f14 Remove a comment that has been obsolete since r327679 adds abffae3a563 [ObjC] Add a warning for implicit conversions of a constant [...] adds 65f964c23eb Add lit.local.cfg to llvm-objdump tests adds 06fef0b359b Revert "[HardwareLoops] NFC - move hardware loop checking c [...] adds 077df019184 AMDGPU: Fix test failing since r365512 adds 5a458d6ada3 [clangd] Show documentation in hover, and fetch docs from i [...] adds 5f4d7c9d4f2 [InstCombine] add tests for trunc(load); NFC adds 837ae69f8b9 [Object][XCOFF] Add support for 64-bit file header and sect [...] adds 22b2c3d6511 [AMDGPU] gfx908 target adds 631b5f7dc0e [lldb, windows] Update two more locations that use LaunchTh [...] adds 2ea514c5662 [lldb-suite] Skip TestMachCore on Windows adds 0cfd75a07d0 [AMDGPU] gfx908 clang target adds 9cf71d10f82 [unittest] Add the missing bogus machine register info init [...] adds 3ce33947d4f gn build: Merge r365503. adds 2f760c44e6c [clangd] Rewrite of logic to rebuild the background index s [...] adds a1b2a27a384 [BPF] Fix a typo in the file name adds 20ecec6116b [lldb, windows] Include WindowsError instead of ErrorHandli [...] adds 95176d72c7e Revert "[TSan] Improve handling of stack pointer mangling i [...] adds 210314ae8c5 Try to appease the Windows build bots. adds f47a313e717 Add a transform pass to make the executable semantics of po [...] adds 6a4c2e4f0a9 [ThinLTO] only emit used or referenced CFI records to index adds 3b38b92541d [PoisonChecking] Add validation rules for "exact" on sdiv/udiv adds 294f37561ab [X86] LowerToHorizontalOp - use count_if to count non-UNDEF [...] adds f09d54ed2a7 Boilerplate for producing XCOFF object files from the Power [...] adds 3dbd7e98d86 [PoisonCheker] Support for out of bounds operands on shifts [...] adds 2d739940466 [libFuzzer] Include FuzzedDataProvider.h in the test withou [...] adds 3fbd8fda9a0 [OpenMP] Simplify getFloatTypeSemantics adds 9e77d0c6df1 [AMDGPU] gfx908 register file changes adds 51c2b99eff1 [lld][WebAssembly] Fix name of data section in PIC mode adds c236eeaf7d8 Fix build error for VC STL, use llvm::make_unique adds 84a1f073634 [X86][AMDGPU][DAGCombiner] Move call to allowsMemoryAccess [...] adds a6548d04375 [PoisonChecking] Flesh out complete todo list for full coverage adds 1366262b74d hwasan: Improve precision of checks using short granule tags. adds 5ca39e828c8 [SLP] Optimize getSpillCost(); NFCI adds 9abe8c48052 [lld][WebAssembly] Report undefined symbols during scanRelocations adds c11c43b64f3 [TSan] Refine longjmp key management on Darwin adds 9e04b532dfe [CXX] Exercise all paths through these tests. adds 8777df5270a De-templatize non-dependent VS macro logic, NFC adds 9b28d9c3318 Use the Itanium C++ ABI for the pipe_builtin.cl test adds fa9b96aeab8 XFAIL clang/test/Headers/max_align.c on i686 adds 90148db02a5 [Docs] Replace SVN revisions with lldb versions adds ba9eb483184 Reland "[TSan] Improve handling of stack pointer mangling i [...] adds 695f7821e2d [lldb_test_suite] Fix lldb test suite targeting remote Android adds 97d6fcce4ec build: use multiple `install` rather than building up a list adds 50d7f46460e [AMDGPU] gfx908 mAI instructions, MC part adds c5f8aa8bea6 [llvm-objdump] Keep warning for --disassemble-functions in [...] adds d6c15b661ab [Profile] Support raw/indexed profiles larger than 4GB adds 14a4495155c GlobalISel: Combine unmerge of merge with intermediate cast adds 269b9f940ff [lldb] Quick Fix: IRExecutionUnit check pointer before access it adds 9eb4b96be02 Add lldb type unit support to the release notes adds fa7eea9e4ec gn build: Merge r365531. adds d9f7162d4bf gn build: Merge r365541. adds 3ea053ad505 gn build: Merge r365532. adds 67a06d94954 gn build: Merge r365536. adds 1e9eae95afa [AMDGPU] gfx908 v_pk_fmac_f16 support adds 31babea94a3 [clang] DirectoryWatcher adds 3f1a34546cf AMDGPU/GlobalISel: Fix legality for G_BUILD_VECTOR adds 9145f265b0e [clangd] fix assert in test after r365531. adds 1ae60797cd9 [X86] Don't form extloads in combineExtInVec unless the loa [...] adds daf801bb115 [docs][Remarks] Add documentation for remarks in LLVM adds 4586a19da86 [MS] Treat ignored explicit calling conventions as an expli [...] adds 1a697aa6072 [Bitcode] Explicitly include Bitstream/BitCodes.h and Bitst [...] adds abce8c457dd Revert [clang] DirectoryWatcher adds 27cf6664437 [analyzer] CastValueChecker: Model casts adds b1843e130ad GlobalISel: Implement lower for G_FCOPYSIGN adds 6a29680efb0 Revert "[analyzer] CastValueChecker: Model casts" adds 693936ab8fe [analyzer] CastValueChecker: Model casts adds d0ba79fe7bf AMDGPU/GlobalISel: Add support for wide loads >= 256-bits adds 9c147bd40bc [Driver] Add float-divide-by-zero back to supported sanitiz [...] adds cc418a3af45 [Support] Move llvm::MemoryBuffer to sys::fs::file_t adds 50f70de5577 [X86] Limit getTargetConstantFromNode to only work on Norma [...] adds e856c0465d1 [analyzer] CastValueChecker: Remove a dump() adds 7f9a94e1f88 [ubsan][test] Restore float-divide-by-zero test

No new revisions were added by this update.

Summary of changes: .../abseil/FasterStrsplitDelimiterCheck.cpp | 24 +- clang-tools-extra/clangd/CMakeLists.txt | 1 + clang-tools-extra/clangd/ClangdServer.cpp | 9 +- clang-tools-extra/clangd/ClangdServer.h | 4 - clang-tools-extra/clangd/FormattedString.cpp | 34 +- clang-tools-extra/clangd/XRefs.cpp | 46 +- clang-tools-extra/clangd/XRefs.h | 3 +- clang-tools-extra/clangd/index/Background.cpp | 63 +- clang-tools-extra/clangd/index/Background.h | 6 +- .../clangd/index/BackgroundRebuild.cpp | 137 +++ clang-tools-extra/clangd/index/BackgroundRebuild.h | 99 +++ .../clangd/refactor/tweaks/CMakeLists.txt | 1 + .../clangd/refactor/tweaks/ExtractVariable.cpp | 243 +++++ .../clangd/test/background-index.test | 2 +- clang-tools-extra/clangd/tool/ClangdMain.cpp | 9 - .../clangd/unittests/BackgroundIndexTests.cpp | 113 ++- .../clangd/unittests/FormattedStringTests.cpp | 17 +- clang-tools-extra/clangd/unittests/TweakTests.cpp | 142 ++- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 51 +- .../abseil-faster-strsplit-delimiter.cpp | 25 + .../HardwareAssistedAddressSanitizerDesign.rst | 64 +- clang/docs/LanguageExtensions.rst | 55 +- clang/docs/ReleaseNotes.rst | 2 + clang/include/clang/AST/Stmt.h | 25 +- clang/include/clang/Basic/Builtins.def | 4 + clang/include/clang/Basic/Cuda.h | 1 + clang/include/clang/Basic/DiagnosticGroups.td | 6 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 4 + clang/include/clang/Basic/Sanitizers.h | 2 +- clang/include/clang/Basic/TargetInfo.h | 8 +- .../clang/StaticAnalyzer/Checkers/Checkers.td | 17 +- .../Core/PathSensitive/CheckerContext.h | 11 + clang/include/clang/Tooling/Syntax/Nodes.h | 17 +- clang/include/clang/Tooling/Syntax/Tree.h | 18 +- clang/lib/AST/ASTContext.cpp | 10 +- clang/lib/AST/ASTImporter.cpp | 2 + clang/lib/AST/ItaniumMangle.cpp | 31 +- clang/lib/Basic/Cuda.cpp | 5 + clang/lib/Basic/Targets.cpp | 13 - clang/lib/Basic/Targets.h | 4 - clang/lib/Basic/Targets/AArch64.cpp | 10 +- clang/lib/Basic/Targets/AArch64.h | 2 - clang/lib/Basic/Targets/AMDGPU.cpp | 6 + clang/lib/Basic/Targets/ARM.cpp | 2 - clang/lib/Basic/Targets/NVPTX.cpp | 1 + clang/lib/Basic/Targets/OSTargets.cpp | 79 ++ clang/lib/Basic/Targets/OSTargets.h | 63 +- clang/lib/Basic/Targets/PPC.h | 11 +- clang/lib/Basic/Targets/SystemZ.h | 2 +- clang/lib/Basic/Targets/X86.h | 4 +- clang/lib/CodeGen/CGBuilder.h | 15 + clang/lib/CodeGen/CGBuiltin.cpp | 26 +- clang/lib/CodeGen/CGExpr.cpp | 49 +- clang/lib/CodeGen/CGExprCXX.cpp | 30 +- clang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp | 2 + clang/lib/CodeGen/CGStmt.cpp | 68 +- clang/lib/CodeGen/CodeGenFunction.h | 4 + clang/lib/Driver/SanitizerArgs.cpp | 16 +- clang/lib/Driver/ToolChain.cpp | 1 + clang/lib/Parse/ParseStmt.cpp | 14 +- clang/lib/Sema/SemaChecking.cpp | 42 + clang/lib/Sema/SemaDeclAttr.cpp | 22 +- clang/lib/Sema/SemaExpr.cpp | 8 +- clang/lib/Sema/SemaExprCXX.cpp | 15 +- clang/lib/Sema/TreeTransform.h | 4 +- clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt | 1 + .../StaticAnalyzer/Checkers/CastValueChecker.cpp | 190 ++++ clang/lib/Tooling/Syntax/BuildTree.cpp | 10 +- clang/lib/Tooling/Syntax/Nodes.cpp | 6 +- clang/lib/Tooling/Syntax/Tree.cpp | 16 +- clang/test/AST/ast-dump-stmt.c | 10 + clang/test/Analysis/cast-value.cpp | 137 +++ clang/test/Analysis/return-value-guaranteed.cpp | 2 +- .../dcl.dcl/basic.namespace/namespace.udecl/p4.cpp | 1 + clang/test/CodeGen/bpf-preserve-access-index-2.c | 22 + clang/test/CodeGen/bpf-preserve-access-index.c | 22 + clang/test/CodeGen/calling-conv-ignored.c | 45 + clang/test/CodeGen/exprs.c | 10 + clang/test/CodeGenCXX/devirtualize-dtor-final.cpp | 23 + clang/test/CodeGenCXX/float128-declarations.cpp | 10 +- clang/test/CodeGenOpenCL/amdgpu-features.cl | 2 + clang/test/CodeGenOpenCL/builtins.cl | 2 +- clang/test/CodeGenOpenCL/pipe_builtin.cl | 4 +- clang/test/CodeGenOpenCL/to_addr_builtin.cl | 2 +- clang/test/Driver/amdgpu-macros.cl | 7 + clang/test/Driver/amdgpu-mcpu.cl | 2 + clang/test/Driver/cuda-bad-arch.cu | 2 + clang/test/Driver/fsanitize-blacklist.c | 1 + clang/test/Driver/fsanitize-coverage.c | 1 + clang/test/Driver/fsanitize.c | 14 + clang/test/Driver/sanitizer-ld.c | 5 + clang/test/Headers/max_align.c | 2 +- clang/test/Index/evaluate-cursor.cpp | 11 + clang/test/Modules/check-for-sanitizer-feature.cpp | 2 +- clang/test/OpenMP/nvptx_asm_delayed_diags.c | 6 +- .../test/OpenMP/nvptx_unsupported_type_codegen.cpp | 8 +- .../Sema/objc-bool-constant-conversion-fixit.m | 40 + clang/test/Sema/objc-bool-constant-conversion.m | 38 + clang/test/Sema/statements.c | 18 + clang/test/SemaCXX/class.cpp | 1 + clang/test/SemaCXX/linkage2.cpp | 2 +- clang/test/SemaCXX/statements.cpp | 15 + clang/tools/libclang/CIndex.cpp | 2 + clang/unittests/AST/ASTImporterVisibilityTest.cpp | 65 ++ clang/unittests/Tooling/Syntax/TreeTest.cpp | 12 +- clang/www/get_started.html | 2 +- compiler-rt/lib/fuzzer/tests/CMakeLists.txt | 2 + .../fuzzer/tests/FuzzedDataProviderUnittest.cpp | 2 +- compiler-rt/lib/hwasan/hwasan_allocator.cpp | 79 +- compiler-rt/lib/hwasan/hwasan_checks.h | 33 +- compiler-rt/lib/hwasan/hwasan_flags.inc | 26 - compiler-rt/lib/hwasan/hwasan_report.cpp | 122 ++- compiler-rt/lib/hwasan/hwasan_report.h | 2 +- compiler-rt/lib/tsan/rtl/tsan_platform_linux.cc | 60 +- compiler-rt/lib/tsan/rtl/tsan_platform_mac.cc | 11 +- .../test/hwasan/TestCases/heap-buffer-overflow.c | 37 +- .../test/hwasan/TestCases/random-align-right.c | 35 - compiler-rt/test/hwasan/TestCases/stack-oob.c | 3 +- compiler-rt/test/hwasan/TestCases/tail-magic.c | 16 +- .../test/ubsan/TestCases/Integer/div-zero.cpp | 1 + libcxx/src/CMakeLists.txt | 32 +- libunwind/src/Unwind-EHABI.cpp | 4 + lld/COFF/Driver.cpp | 4 +- lld/ELF/Arch/RISCV.cpp | 3 +- lld/ELF/Symbols.h | 5 + ...merge-string-align2.s => merge-string-align2.s} | 0 lld/test/wasm/undefined-data.ll | 3 +- lld/test/wasm/undefined.ll | 5 +- lld/wasm/InputFiles.cpp | 18 +- lld/wasm/Relocations.cpp | 33 +- lld/wasm/SymbolTable.cpp | 13 - lld/wasm/SymbolTable.h | 2 - lld/wasm/Writer.cpp | 11 +- lldb/cmake/caches/Apple-lldb-base.cmake | 1 - lldb/cmake/modules/AddLLDB.cmake | 39 - lldb/cmake/modules/LLDBFramework.cmake | 3 +- lldb/docs/use/python-reference.rst | 13 +- .../android/platform/TestDefaultCacheLineSize.py | 2 +- lldb/packages/Python/lldbsuite/test/decorators.py | 8 + .../postmortem/mach-core/TestMachCore.py | 5 +- .../Python/lldbsuite/test/make/Android.rules | 3 +- lldb/source/Expression/IRExecutionUnit.cpp | 6 +- lldb/source/Host/common/ThreadLauncher.cpp | 2 +- lldb/source/Host/windows/HostProcessWindows.cpp | 4 +- .../Process/Windows/Common/DebuggerThread.cpp | 32 +- llvm/cmake/modules/CheckCompilerVersion.cmake | 5 +- llvm/docs/AMDGPUUsage.rst | 6 +- llvm/docs/CodeGenerator.rst | 14 - llvm/docs/CommandGuide/llvm-dwarfdump.rst | 24 +- llvm/docs/CommandGuide/llvm-nm.rst | 28 +- llvm/docs/CommandGuide/llvm-objdump.rst | 22 +- llvm/docs/GettingStarted.rst | 4 +- llvm/docs/GettingStartedVS.rst | 4 +- llvm/docs/LangRef.rst | 3 + llvm/docs/ReleaseNotes.rst | 8 + llvm/docs/Remarks.rst | 305 +++++++ llvm/docs/index.rst | 3 + llvm/include/llvm/Analysis/Loads.h | 22 +- llvm/include/llvm/Analysis/LoopInfo.h | 2 +- llvm/include/llvm/BinaryFormat/ELF.h | 1 + llvm/include/llvm/BinaryFormat/Magic.h | 1 + llvm/include/llvm/BinaryFormat/XCOFF.h | 30 + llvm/include/llvm/CodeGen/AccelTable.h | 24 - .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 3 + .../GlobalISel/LegalizationArtifactCombiner.h | 58 +- .../llvm/CodeGen/GlobalISel/LegalizerHelper.h | 1 + llvm/include/llvm/CodeGen/GlobalISel/Utils.h | 9 +- llvm/include/llvm/CodeGen/MachineInstr.h | 7 + llvm/include/llvm/CodeGen/MachineOperand.h | 5 + llvm/include/llvm/CodeGen/TargetInstrInfo.h | 6 + llvm/include/llvm/CodeGen/TargetLowering.h | 15 +- llvm/include/llvm/CodeGen/TargetRegisterInfo.h | 4 +- llvm/include/llvm/IR/IntrinsicsAMDGPU.td | 84 ++ llvm/include/llvm/MC/MCAsmInfoXCOFF.h | 25 + llvm/include/llvm/MC/MCContext.h | 23 + llvm/include/llvm/MC/MCObjectFileInfo.h | 1 + llvm/include/llvm/MC/MCSection.h | 2 +- llvm/include/llvm/MC/MCSectionXCOFF.h | 56 ++ llvm/include/llvm/MC/MCXCOFFObjectWriter.h | 41 + llvm/include/llvm/MC/MCXCOFFStreamer.h | 33 + llvm/include/llvm/Object/Binary.h | 4 +- llvm/include/llvm/Object/ObjectFile.h | 2 +- llvm/include/llvm/Object/XCOFFObjectFile.h | 112 ++- llvm/include/llvm/Support/FileSystem.h | 68 +- llvm/include/llvm/Support/MemoryBuffer.h | 4 +- llvm/include/llvm/Support/TargetParser.h | 1 + llvm/include/llvm/Support/TargetRegistry.h | 9 +- .../Transforms/Instrumentation/PoisonChecking.h | 25 + llvm/lib/Analysis/Loads.cpp | 29 +- llvm/lib/Analysis/MemDerefPrinter.cpp | 5 +- llvm/lib/Analysis/ValueTracking.cpp | 3 +- llvm/lib/BinaryFormat/Magic.cpp | 2 + llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp | 2 + llvm/lib/Bitcode/Writer/BitcodeWriter.cpp | 30 +- llvm/lib/CodeGen/AsmPrinter/AccelTable.cpp | 20 - llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp | 114 ++- llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.h | 18 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 187 +++- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h | 16 + llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp | 36 +- llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h | 11 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 4 + llvm/lib/CodeGen/AsmPrinter/DwarfUnit.h | 2 + llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 62 ++ llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 78 ++ llvm/lib/CodeGen/GlobalISel/Utils.cpp | 12 +- llvm/lib/CodeGen/LiveDebugValues.cpp | 137 ++- llvm/lib/CodeGen/MachinePipeliner.cpp | 2 +- llvm/lib/CodeGen/MachineVerifier.cpp | 2 +- llvm/lib/CodeGen/RegisterCoalescer.cpp | 87 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 25 +- llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 3 +- .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp | 12 +- .../CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 3 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 43 +- .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 6 +- llvm/lib/CodeGen/TargetInstrInfo.cpp | 40 + llvm/lib/CodeGen/TargetRegisterInfo.cpp | 14 + llvm/lib/DebugInfo/DWARF/DWARFDie.cpp | 1 + llvm/lib/IR/DebugInfoMetadata.cpp | 9 +- llvm/lib/IR/Instruction.cpp | 2 + llvm/lib/IR/Instructions.cpp | 5 +- llvm/lib/LTO/Caching.cpp | 9 +- llvm/lib/LTO/LTOModule.cpp | 3 +- llvm/lib/LTO/ThinLTOCodeGenerator.cpp | 7 +- llvm/lib/MC/CMakeLists.txt | 5 + llvm/lib/MC/MCAsmBackend.cpp | 4 + llvm/lib/MC/MCAsmInfoXCOFF.cpp | 18 + llvm/lib/MC/MCContext.cpp | 35 + llvm/lib/MC/MCObjectFileInfo.cpp | 13 +- llvm/lib/MC/MCSectionXCOFF.cpp | 33 + llvm/lib/MC/MCXCOFFObjectTargetWriter.cpp | 16 + llvm/lib/MC/MCXCOFFStreamer.cpp | 59 ++ llvm/lib/MC/XCOFFObjectWriter.cpp | 94 ++ llvm/lib/Object/ArchiveWriter.cpp | 13 +- llvm/lib/Object/Binary.cpp | 1 + llvm/lib/Object/ObjectFile.cpp | 4 +- llvm/lib/Object/SymbolicFile.cpp | 1 + llvm/lib/Object/XCOFFObjectFile.cpp | 410 +++++---- llvm/lib/ObjectYAML/ELFYAML.cpp | 1 + llvm/lib/Passes/PassBuilder.cpp | 1 + llvm/lib/Passes/PassRegistry.def | 1 + llvm/lib/ProfileData/InstrProfReader.cpp | 4 +- llvm/lib/Support/FileOutputBuffer.cpp | 3 +- llvm/lib/Support/MemoryBuffer.cpp | 87 +- llvm/lib/Support/TargetParser.cpp | 4 +- llvm/lib/Support/Unix/Path.inc | 49 +- llvm/lib/Support/VirtualFileSystem.cpp | 27 +- llvm/lib/Support/Windows/Path.inc | 82 +- llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp | 71 +- .../Target/AArch64/AArch64PreLegalizerCombiner.cpp | 2 + llvm/lib/Target/AMDGPU/AMDGPU.td | 68 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 29 +- .../Target/AMDGPU/AMDGPUGenRegisterBankInfo.def | 72 ++ llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 13 +- llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h | 3 +- .../Target/AMDGPU/AMDGPUInstructionSelector.cpp | 107 ++- llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h | 4 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 60 +- llvm/lib/Target/AMDGPU/AMDGPURegAsmNames.inc.cpp | 240 +++++ llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 187 +++- llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h | 3 + llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.cpp | 5 +- llvm/lib/Target/AMDGPU/AMDGPURegisterInfo.td | 2 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 5 + llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 25 + .../Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 219 ++++- .../AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 124 ++- .../AMDGPU/Disassembler/AMDGPUDisassembler.h | 11 + llvm/lib/Target/AMDGPU/GCNProcessors.td | 4 + .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 51 ++ .../Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h | 6 + .../AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.h | 6 + .../AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp | 2 + .../Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 30 +- llvm/lib/Target/AMDGPU/SIDefines.h | 18 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 41 +- llvm/lib/Target/AMDGPU/SIInstrFormats.td | 5 + llvm/lib/Target/AMDGPU/SIInstrInfo.h | 8 + llvm/lib/Target/AMDGPU/SIInstrInfo.td | 66 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 63 +- llvm/lib/Target/AMDGPU/SIRegisterInfo.td | 347 +++++++- llvm/lib/Target/AMDGPU/SMInstructions.td | 11 - llvm/lib/Target/AMDGPU/SOPInstructions.td | 6 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 14 + llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 6 + llvm/lib/Target/AMDGPU/VOP2Instructions.td | 10 +- llvm/lib/Target/AMDGPU/VOP3Instructions.td | 24 +- llvm/lib/Target/AMDGPU/VOP3PInstructions.td | 110 +++ llvm/lib/Target/AMDGPU/VOPInstructions.td | 31 + llvm/lib/Target/BPF/BPF.h | 5 + llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp | 482 ++++++++++ llvm/lib/Target/BPF/BPFAsmPrinter.cpp | 20 +- llvm/lib/Target/BPF/BPFCORE.h | 24 + llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp | 163 ++++ llvm/lib/Target/BPF/BPFTargetMachine.cpp | 12 + llvm/lib/Target/BPF/BTF.h | 63 +- llvm/lib/Target/BPF/BTFDebug.cpp | 489 +++++++++- llvm/lib/Target/BPF/BTFDebug.h | 63 +- llvm/lib/Target/BPF/CMakeLists.txt | 2 + llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp | 159 ++++ llvm/lib/Target/Mips/Mips64InstrInfo.td | 28 + llvm/lib/Target/Mips/MipsInstrInfo.td | 46 + llvm/lib/Target/Mips/MipsLegalizerInfo.cpp | 4 +- llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp | 79 +- llvm/lib/Target/Mips/MipsSubtarget.cpp | 5 + .../lib/Target/PowerPC/MCTargetDesc/CMakeLists.txt | 1 + .../Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp | 14 + .../Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 6 + .../lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h | 10 +- .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 25 + .../Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h | 3 + .../PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp | 29 + llvm/lib/Target/PowerPC/P9InstrResources.td | 6 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 11 + llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 15 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 12 +- llvm/lib/Target/PowerPC/PPCMIPeephole.cpp | 73 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 2 +- llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp | 4 +- .../WebAssemblyAddMissingPrototypes.cpp | 11 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 37 +- llvm/lib/Target/X86/X86ISelLowering.h | 4 +- llvm/lib/Target/X86/X86InstrInfo.cpp | 94 +- llvm/lib/Target/X86/X86InstrInfo.h | 3 + llvm/lib/Transforms/IPO/ArgumentPromotion.cpp | 52 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 2 +- .../InstCombine/InstCombineLoadStoreAlloca.cpp | 6 +- llvm/lib/Transforms/Instrumentation/CMakeLists.txt | 1 + .../Instrumentation/HWAddressSanitizer.cpp | 98 +- .../Transforms/Instrumentation/PoisonChecking.cpp | 357 ++++++++ llvm/lib/Transforms/Scalar/LICM.cpp | 4 +- llvm/lib/Transforms/Scalar/LoopPredication.cpp | 16 +- llvm/lib/Transforms/Scalar/MergeICmps.cpp | 2 +- llvm/lib/Transforms/Scalar/SROA.cpp | 16 +- .../Transforms/Scalar/TailRecursionElimination.cpp | 2 +- llvm/lib/Transforms/Utils/LoopUnroll.cpp | 5 +- llvm/lib/Transforms/Utils/LoopUnrollPeel.cpp | 49 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 16 +- llvm/lib/XRay/InstrumentationMap.cpp | 3 +- llvm/lib/XRay/Profile.cpp | 3 +- llvm/lib/XRay/Trace.cpp | 3 +- .../AArch64/GlobalISel/localizer-arm64-tti.ll | 5 +- .../AArch64/GlobalISel/prelegalizercombiner-br.mir | 81 ++ .../test/CodeGen/AArch64/hwasan-check-memaccess.ll | 28 +- llvm/test/CodeGen/AArch64/speculation-hardening.ll | 11 +- .../artifact-combiner-unmerge-values.mir | 484 ++++++++++ .../CodeGen/AMDGPU/GlobalISel/inst-select-add.mir | 11 +- .../GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-bitcast.mir | 19 +- .../GlobalISel/inst-select-concat-vectors.mir | 735 +++++++++++++++ .../AMDGPU/GlobalISel/inst-select-constant.mir | 17 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir | 25 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fadd.mir | 12 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir | 11 +- .../AMDGPU/GlobalISel/inst-select-fptoui.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-implicit-def.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-inttoptr.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 30 + .../AMDGPU/GlobalISel/inst-select-maxnum.mir | 16 +- .../AMDGPU/GlobalISel/inst-select-merge-values.mir | 565 ++++++++++++ .../AMDGPU/GlobalISel/inst-select-minnum.mir | 16 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir | 8 +- .../AMDGPU/GlobalISel/inst-select-sitofp.mir | 10 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir | 70 ++ .../GlobalISel/inst-select-unmerge-values.mir | 231 +++++ .../CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir | 19 +- .../AMDGPU/GlobalISel/legalize-build-vector.mir | 120 +++ .../AMDGPU/GlobalISel/legalize-concat-vectors.mir | 85 ++ .../CodeGen/AMDGPU/GlobalISel/legalize-fabs.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir | 22 +- .../AMDGPU/GlobalISel/legalize-fcanonicalize.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fcmp.mir | 99 ++- .../AMDGPU/GlobalISel/legalize-fcopysign.mir | 811 +++++++++++++---- .../CodeGen/AMDGPU/GlobalISel/legalize-fma.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fneg.mir | 22 +- .../CodeGen/AMDGPU/GlobalISel/legalize-frint.mir | 36 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fsqrt.mir | 30 +- .../CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir | 30 +- .../CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir | 766 ++++++++++++---- .../CodeGen/AMDGPU/GlobalISel/legalize-load.mir | 30 + .../CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir | 19 +- .../CodeGen/AMDGPU/GlobalISel/legalize-phi.mir | 11 +- .../CodeGen/AMDGPU/GlobalISel/legalize-shl.mir | 19 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smax.mir | 25 +- .../CodeGen/AMDGPU/GlobalISel/legalize-smin.mir | 25 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umax.mir | 25 +- .../CodeGen/AMDGPU/GlobalISel/legalize-umin.mir | 25 +- .../AMDGPU/GlobalISel/regbankselect-icmp.mir | 308 ++++++- .../AMDGPU/GlobalISel/regbankselect-icmp.s16.mir | 83 ++ .../AMDGPU/GlobalISel/regbankselect-load.mir | 488 ++++++++++ .../CodeGen/AMDGPU/call-graph-register-usage.ll | 22 +- .../CodeGen/AMDGPU/call-preserved-registers.ll | 10 +- llvm/test/CodeGen/AMDGPU/callee-frame-setup.ll | 55 +- .../CodeGen/AMDGPU/callee-special-input-sgprs.ll | 5 +- llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll | 4 +- .../AMDGPU/cross-block-use-is-not-abi-copy.ll | 64 +- llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll | 3 + .../CodeGen/AMDGPU/elf-header-flags-sram-ecc.ll | 7 + llvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll | 2 + llvm/test/CodeGen/AMDGPU/ipra-regmask.ll | 6 +- llvm/test/CodeGen/AMDGPU/llvm.log.f16.ll | 10 +- llvm/test/CodeGen/AMDGPU/llvm.log10.f16.ll | 10 +- llvm/test/CodeGen/AMDGPU/load-lo16.ll | 8 +- llvm/test/CodeGen/AMDGPU/nested-calls.ll | 10 +- llvm/test/CodeGen/AMDGPU/readcyclecounter.ll | 27 +- llvm/test/CodeGen/AMDGPU/spill-before-exec.mir | 2 +- llvm/test/CodeGen/AMDGPU/wave32.ll | 8 +- llvm/test/CodeGen/BPF/BTF/binary-format.ll | 44 +- llvm/test/CodeGen/BPF/BTF/extern-global-var.ll | 12 +- llvm/test/CodeGen/BPF/BTF/filename.ll | 24 +- llvm/test/CodeGen/BPF/BTF/func-func-ptr.ll | 30 +- llvm/test/CodeGen/BPF/BTF/func-non-void.ll | 30 +- llvm/test/CodeGen/BPF/BTF/func-source.ll | 24 +- llvm/test/CodeGen/BPF/BTF/func-typedef.ll | 39 +- llvm/test/CodeGen/BPF/BTF/func-unused-arg.ll | 28 +- llvm/test/CodeGen/BPF/BTF/func-void.ll | 20 +- llvm/test/CodeGen/BPF/BTF/local-var.ll | 20 +- llvm/test/CodeGen/BPF/BTF/map-def.ll | 120 +++ llvm/test/CodeGen/BPF/BTF/ptr-prune-type.ll | 84 ++ .../CodeGen/BPF/BTF/static-var-derived-type.ll | 12 +- llvm/test/CodeGen/BPF/BTF/static-var-inited-sec.ll | 12 +- llvm/test/CodeGen/BPF/BTF/static-var-inited.ll | 12 +- .../CodeGen/BPF/BTF/static-var-readonly-sec.ll | 12 +- llvm/test/CodeGen/BPF/BTF/static-var-readonly.ll | 12 +- llvm/test/CodeGen/BPF/BTF/static-var-sec.ll | 12 +- .../CodeGen/BPF/BTF/static-var-zerolen-array.ll | 12 +- llvm/test/CodeGen/BPF/BTF/static-var.ll | 12 +- llvm/test/CodeGen/BPF/CORE/offset-reloc-basic.ll | 186 ++++ .../CodeGen/BPF/CORE/offset-reloc-multilevel.ll | 197 +++++ .../BPF/CORE/offset-reloc-struct-anonymous.ll | 213 +++++ .../CodeGen/BPF/CORE/offset-reloc-struct-array.ll | 216 +++++ llvm/test/CodeGen/BPF/CORE/offset-reloc-union.ll | 220 +++++ .../patchable-extern-char.ll} | 60 +- .../patchable-extern-uint.ll} | 67 +- .../patchable-extern-ulonglong.ll} | 68 +- llvm/test/CodeGen/BPF/reloc-btf-2.ll | 2 +- .../Mips/GlobalISel/instruction-select/select.mir | 152 +++- .../test/CodeGen/Mips/GlobalISel/legalizer/phi.mir | 233 ++++- .../CodeGen/Mips/GlobalISel/legalizer/select.mir | 110 +++ llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll | 69 +- .../test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll | 56 ++ .../CodeGen/Mips/GlobalISel/regbankselect/phi.mir | 222 ++++- .../Mips/GlobalISel/regbankselect/select.mir | 117 +++ llvm/test/CodeGen/Mips/abiflags32.ll | 9 +- llvm/test/CodeGen/Mips/cconv/callee-saved-fpxx1.ll | 6 +- llvm/test/CodeGen/Mips/cconv/return-hard-float.ll | 30 +- llvm/test/CodeGen/Mips/cfi_offset.ll | 4 +- llvm/test/CodeGen/Mips/fp-contract.ll | 9 +- llvm/test/CodeGen/Mips/fp64a.ll | 6 +- llvm/test/CodeGen/Mips/msa/2r.ll | 4 +- llvm/test/CodeGen/Mips/msa/2r_vector_scalar.ll | 4 +- llvm/test/CodeGen/Mips/msa/2rf.ll | 4 +- llvm/test/CodeGen/Mips/msa/2rf_exup.ll | 4 +- llvm/test/CodeGen/Mips/msa/2rf_float_int.ll | 4 +- llvm/test/CodeGen/Mips/msa/2rf_fq.ll | 4 +- llvm/test/CodeGen/Mips/msa/2rf_int_float.ll | 4 +- llvm/test/CodeGen/Mips/msa/2rf_tq.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-a.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-b.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-c.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-d.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-i.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-m.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-p.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-s.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r-v.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r_4r.ll | 4 +- llvm/test/CodeGen/Mips/msa/3r_4r_widen.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf_4rf.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf_4rf_q.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf_exdo.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf_float_int.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf_int_float.ll | 4 +- llvm/test/CodeGen/Mips/msa/3rf_q.ll | 4 +- llvm/test/CodeGen/Mips/msa/arithmetic.ll | 4 +- llvm/test/CodeGen/Mips/msa/arithmetic_float.ll | 4 +- .../CodeGen/Mips/msa/basic_operations_float.ll | 18 +- llvm/test/CodeGen/Mips/msa/bit.ll | 4 +- llvm/test/CodeGen/Mips/msa/bitcast.ll | 4 +- llvm/test/CodeGen/Mips/msa/bitwise.ll | 4 +- llvm/test/CodeGen/Mips/msa/bmzi_bmnzi.ll | 2 +- llvm/test/CodeGen/Mips/msa/compare.ll | 4 +- llvm/test/CodeGen/Mips/msa/compare_float.ll | 4 +- llvm/test/CodeGen/Mips/msa/elm_copy.ll | 4 +- llvm/test/CodeGen/Mips/msa/elm_cxcmsa.ll | 4 +- llvm/test/CodeGen/Mips/msa/elm_insv.ll | 4 +- llvm/test/CodeGen/Mips/msa/elm_move.ll | 4 +- llvm/test/CodeGen/Mips/msa/elm_shift_slide.ll | 4 +- llvm/test/CodeGen/Mips/msa/endian.ll | 4 +- llvm/test/CodeGen/Mips/msa/frameindex.ll | 6 +- llvm/test/CodeGen/Mips/msa/i10.ll | 4 +- llvm/test/CodeGen/Mips/msa/i5-a.ll | 4 +- llvm/test/CodeGen/Mips/msa/i5-b.ll | 4 +- llvm/test/CodeGen/Mips/msa/i5-c.ll | 4 +- llvm/test/CodeGen/Mips/msa/i5-m.ll | 4 +- llvm/test/CodeGen/Mips/msa/i5-s.ll | 6 +- llvm/test/CodeGen/Mips/msa/i5_ld_st.ll | 4 +- llvm/test/CodeGen/Mips/msa/i8.ll | 4 +- llvm/test/CodeGen/Mips/msa/immediates-bad.ll | 2 +- llvm/test/CodeGen/Mips/msa/immediates.ll | 3 +- llvm/test/CodeGen/Mips/msa/inline-asm.ll | 2 +- .../CodeGen/Mips/msa/llvm-stress-s1704963983.ll | 4 +- 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llvm/test/CodeGen/Mips/stack-alignment.ll | 2 +- llvm/test/CodeGen/PowerPC/aix-xcoff-basic.ll | 37 + .../PowerPC/combine-sext-and-shl-after-isel.ll | 134 ++- llvm/test/CodeGen/PowerPC/machine-pre.ll | 55 ++ llvm/test/CodeGen/PowerPC/sms-phi.ll | 34 + llvm/test/CodeGen/RISCV/add-before-shl.ll | 19 + llvm/test/CodeGen/Thumb2/mve-nofloat.ll | 139 +++ llvm/test/CodeGen/WebAssembly/add-prototypes.ll | 11 + .../CodeGen/X86/merge-consecutive-stores-nt.ll | 24 +- llvm/test/CodeGen/X86/smul_fix_sat.ll | 2 +- llvm/test/CodeGen/X86/vector-shuffle-128-v4.ll | 16 +- ...volatile-memstores-nooverlapping-load-stores.ll | 83 ++ .../MIR/X86/avoid-single-entry-value-location.mir | 67 ++ .../MIR/X86/dbgcall-site-interpretation.mir | 200 +++++ .../MIR/X86/dbgcall-site-lea-interpretation.mir | 140 +++ llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir | 79 ++ .../DebugInfo/MIR/X86/debug-call-site-param.mir | 158 ++++ .../MIR/X86/multiple-param-dbg-value-entry.mir | 83 ++ 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| 46 + llvm/test/MC/Mips/macro-sge.s | 43 + llvm/test/MC/Mips/macro-sge64.s | 29 + llvm/test/MC/Mips/macro-sgt.s | 24 + llvm/test/MC/Mips/macro-sgt64.s | 25 + llvm/test/Object/AMDGPU/elf-header-flags-mach.yaml | 27 +- .../ThinLTO/X86/Inputs/cfi-icall-only-bazqux.ll | 24 + llvm/test/ThinLTO/X86/cfi-icall-only-defuse.ll | 56 ++ .../ConstantHoisting/RISCV/immediates.ll | 11 +- .../InferFunctionAttrs/dereferenceable.ll | 60 +- llvm/test/Transforms/InstCombine/trunc-load.ll | 73 ++ llvm/test/Transforms/InstSimplify/ashr-lshr.ll | 304 +++++++ .../llvm-dwarfdump/X86/stats-dbg-callsite-info.ll | 76 ++ .../llvm-objdump/X86/macho-build-version.yaml | 2 +- .../llvm-objdump/X86/warn-missing-disasm-func.test | 12 +- llvm/test/tools/llvm-objdump/lit.local.cfg | 1 + .../Inputs/ClassLayoutTest.cpp | 0 .../Inputs/ClassLayoutTest.pdb | Bin .../Inputs/ComplexPaddingTest.cpp | 0 .../Inputs/ComplexPaddingTest.pdb | Bin .../Inputs/FPOTest.pdb | Bin .../Inputs/FilterTest.cpp | 0 .../Inputs/FilterTest.pdb | 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clang-tools-extra/clangd/refactor/tweaks/ExtractVariable.cpp create mode 100644 clang/lib/StaticAnalyzer/Checkers/CastValueChecker.cpp create mode 100644 clang/test/Analysis/cast-value.cpp create mode 100644 clang/test/CodeGen/bpf-preserve-access-index-2.c create mode 100644 clang/test/CodeGen/bpf-preserve-access-index.c create mode 100644 clang/test/CodeGen/calling-conv-ignored.c create mode 100644 clang/test/CodeGenCXX/devirtualize-dtor-final.cpp create mode 100644 clang/test/Sema/objc-bool-constant-conversion-fixit.m create mode 100644 clang/test/Sema/objc-bool-constant-conversion.m delete mode 100644 compiler-rt/test/hwasan/TestCases/random-align-right.c rename lld/test/ELF/{tail-merge-string-align2.s => merge-string-align2.s} (100%) create mode 100644 llvm/docs/Remarks.rst create mode 100644 llvm/include/llvm/MC/MCAsmInfoXCOFF.h create mode 100644 llvm/include/llvm/MC/MCSectionXCOFF.h create mode 100644 llvm/include/llvm/MC/MCXCOFFObjectWriter.h create mode 100644 llvm/include/llvm/MC/MCXCOFFStreamer.h create mode 100644 llvm/include/llvm/Transforms/Instrumentation/PoisonChecking.h create mode 100644 llvm/lib/MC/MCAsmInfoXCOFF.cpp create mode 100644 llvm/lib/MC/MCSectionXCOFF.cpp create mode 100644 llvm/lib/MC/MCXCOFFObjectTargetWriter.cpp create mode 100644 llvm/lib/MC/MCXCOFFStreamer.cpp create mode 100644 llvm/lib/MC/XCOFFObjectWriter.cpp create mode 100644 llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp create mode 100644 llvm/lib/Target/BPF/BPFCORE.h create mode 100644 llvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp create mode 100644 llvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp create mode 100644 llvm/lib/Transforms/Instrumentation/PoisonChecking.cpp create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-br.mir create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-v [...] create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir create mode 100644 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llvm/test/CodeGen/BPF/{BTF/extern-global-var.ll => CORE/patchable-extern-uint [...] copy llvm/test/CodeGen/BPF/{BTF/extern-global-var.ll => CORE/patchable-extern-ulon [...] create mode 100644 llvm/test/CodeGen/PowerPC/aix-xcoff-basic.ll create mode 100644 llvm/test/CodeGen/PowerPC/machine-pre.ll create mode 100644 llvm/test/CodeGen/PowerPC/sms-phi.ll create mode 100644 llvm/test/CodeGen/Thumb2/mve-nofloat.ll create mode 100644 llvm/test/CodeGen/X86/volatile-memstores-nooverlapping-load-stores.ll create mode 100644 llvm/test/DebugInfo/MIR/X86/avoid-single-entry-value-location.mir create mode 100644 llvm/test/DebugInfo/MIR/X86/dbgcall-site-interpretation.mir create mode 100644 llvm/test/DebugInfo/MIR/X86/dbgcall-site-lea-interpretation.mir create mode 100644 llvm/test/DebugInfo/MIR/X86/dbginfo-entryvals.mir create mode 100644 llvm/test/DebugInfo/MIR/X86/debug-call-site-param.mir create mode 100644 llvm/test/DebugInfo/MIR/X86/multiple-param-dbg-value-entry.mir delete mode 100644 llvm/test/DebugInfo/MIR/X86/regcoalescing-clears-dead-dbgvals.mir create mode 100644 llvm/test/DebugInfo/PDB/Inputs/objfilename.yaml create mode 100644 llvm/test/DebugInfo/PDB/pdbdump-objfilename.test delete mode 100644 llvm/test/DebugInfo/PDB/pdbdump-objfilename.yaml create mode 100644 llvm/test/Instrumentation/PoisonChecking/basic-flag-validation.ll create mode 100644 llvm/test/Instrumentation/PoisonChecking/ub-checks.ll create mode 100644 llvm/test/MC/AMDGPU/accvgpr-altnames.s create mode 100644 llvm/test/MC/AMDGPU/mai-err.s create mode 100644 llvm/test/MC/AMDGPU/mai.s create mode 100644 llvm/test/MC/AMDGPU/xdl-insts-gfx908.s create mode 100644 llvm/test/MC/Disassembler/AMDGPU/mai.txt create mode 100644 llvm/test/MC/Disassembler/AMDGPU/xdl-insts-gfx908.txt create mode 100644 llvm/test/MC/Mips/macro-sge.s create mode 100644 llvm/test/MC/Mips/macro-sge64.s create mode 100644 llvm/test/MC/Mips/macro-sgt.s create mode 100644 llvm/test/MC/Mips/macro-sgt64.s create mode 100644 llvm/test/ThinLTO/X86/Inputs/cfi-icall-only-bazqux.ll create mode 100644 llvm/test/ThinLTO/X86/cfi-icall-only-defuse.ll create mode 100644 llvm/test/Transforms/InstCombine/trunc-load.ll create mode 100644 llvm/test/Transforms/InstSimplify/ashr-lshr.ll create mode 100644 llvm/test/tools/llvm-dwarfdump/X86/stats-dbg-callsite-info.ll create mode 100644 llvm/test/tools/llvm-objdump/lit.local.cfg rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/ClassLayoutTest.cpp (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/ClassLayoutTest.pdb (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/ComplexPaddingTest.cp [...] rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/ComplexPaddingTest.pd [...] rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/FPOTest.pdb (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/FilterTest.cpp (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/FilterTest.pdb (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/InjectedSource.pdb (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/LoadAddressTest.cpp (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/LoadAddressTest.pdb (100%) rename llvm/test/tools/{llvm-pdbdump => llvm-pdbutil}/Inputs/PrettyFuncDumperTest. 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