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from 2a4ee57b043 testsuite: fix c23-constexpr-2a.c test to use dg-do run new 94b9ffbdd9a aarch64: Forbid F64MM permutes in streaming mode new e1b17a0cfd3 aarch64: Move ENTRY_VHSDF to aarch64-simd-pragma-builtins.def new ede97598e2c aarch64: Record separate streaming and non-streaming ISA re [...] new a00a0e34b8a aarch64: Require SVE2 and/or SME2 for SVE FAMINMAX intrinsics
The 4 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: gcc/config.gcc | 2 +- gcc/config/aarch64/aarch64-builtins.cc | 142 ++++++++++----------- gcc/config/aarch64/aarch64-protos.h | 87 ++++++++++++- .../aarch64/aarch64-simd-pragma-builtins.def | 14 +- gcc/config/aarch64/aarch64-sve-builtins-base.cc | 4 - gcc/config/aarch64/aarch64-sve-builtins-base.def | 36 ++---- gcc/config/aarch64/aarch64-sve-builtins-sme.def | 30 ++--- gcc/config/aarch64/aarch64-sve-builtins-sve2.cc | 4 + gcc/config/aarch64/aarch64-sve-builtins-sve2.def | 48 +++---- gcc/config/aarch64/aarch64-sve-builtins.cc | 51 +++++--- gcc/config/aarch64/aarch64-sve-builtins.h | 13 +- .../g++.target/aarch64/sve/aarch64-ssve.exp | 6 + .../gcc.target/aarch64/sve/acle/asm/trn1q_bf16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn1q_f16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn1q_f32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn1q_f64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn1q_s16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn1q_s32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn1q_s64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn1q_s8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn1q_u16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn1q_u32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn1q_u64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn1q_u8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn2q_bf16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn2q_f16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn2q_f32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn2q_f64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn2q_s16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn2q_s32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn2q_s64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn2q_s8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn2q_u16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn2q_u32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn2q_u64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/trn2q_u8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp1q_bf16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp1q_f16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp1q_f32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp1q_f64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp1q_s16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp1q_s32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp1q_s64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp1q_s8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp1q_u16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp1q_u32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp1q_u64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp1q_u8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp2q_bf16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp2q_f16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp2q_f32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp2q_f64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp2q_s16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp2q_s32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp2q_s64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp2q_s8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp2q_u16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp2q_u32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp2q_u64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/uzp2q_u8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip1q_bf16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip1q_f16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip1q_f32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip1q_f64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip1q_s16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip1q_s32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip1q_s64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip1q_s8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip1q_u16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip1q_u32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip1q_u64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip1q_u8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip2q_bf16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip2q_f16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip2q_f32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip2q_f64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip2q_s16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip2q_s32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip2q_s64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip2q_s8.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip2q_u16.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip2q_u32.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip2q_u64.c | 1 + .../gcc.target/aarch64/sve/acle/asm/zip2q_u8.c | 1 + .../gcc.target/aarch64/sve/acle/general/amin_1.c | 9 ++ .../gcc.target/aarch64/sve2/acle/asm/amax_f16.c | 5 +- .../gcc.target/aarch64/sve2/acle/asm/amax_f32.c | 5 +- .../gcc.target/aarch64/sve2/acle/asm/amax_f64.c | 5 +- .../gcc.target/aarch64/sve2/acle/asm/amin_f16.c | 5 +- .../gcc.target/aarch64/sve2/acle/asm/amin_f32.c | 5 +- .../gcc.target/aarch64/sve2/acle/asm/amin_f64.c | 5 +- 91 files changed, 362 insertions(+), 186 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/amin_1.c