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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-arm-stable-allnoconfig in repository toolchain/ci/llvm-project.
from d5159b99105d MLIR can't support -Bsymbolic link option, fail at CMake t [...] adds 9e084f4194e6 Fix building with GCC 12: adds 8be24d19fefa [MergeICmps] Don't merge icmps derived from pointers with [...] adds 162f3f18c945 [Aarch64] Correct register class for pseudo instructions adds 93edfb23b18b [SLP][NFC]Add a test to show an issue with incorrectly ext [...] adds 32bb956916e3 Bad SLPVectorization shufflevector replacement, resulting [...] adds 9dc7d6d5e326 [SystemZ] Give the EXRL_Pseudo a size value of 6 bytes.
No new revisions were added by this update.
Summary of changes: .../Target/AArch64/AArch64ExpandPseudoInsts.cpp | 1 + llvm/lib/Target/AArch64/AArch64InstrInfo.td | 32 ++++---- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 2 +- llvm/lib/Target/SystemZ/SystemZInstrInfo.td | 2 +- llvm/lib/Transforms/Scalar/MergeICmps.cpp | 4 + llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 25 ++++-- .../CodeGen/AArch64/GlobalISel/select-add-low.mir | 4 +- .../AArch64/GlobalISel/select-blockaddress.mir | 5 +- .../AArch64/GlobalISel/select-gv-with-offset.mir | 2 +- .../select-jump-table-brjt-constrain.mir | 2 +- .../AArch64/GlobalISel/select-jump-table-brjt.mir | 2 +- .../CodeGen/AArch64/GlobalISel/select-static.mir | 4 +- llvm/test/CodeGen/AArch64/GlobalISel/select.mir | 8 +- llvm/test/CodeGen/AArch64/elim-dead-mi.mir | 10 +-- llvm/test/CodeGen/AArch64/loop-sink.mir | 6 +- .../Transforms/MergeICmps/X86/addressspaces.ll | 94 ++++++++++++++++++++++ .../SLPVectorizer/X86/extract_in_tree_user.ll | 34 +++++++- 17 files changed, 191 insertions(+), 46 deletions(-) create mode 100644 llvm/test/Transforms/MergeICmps/X86/addressspaces.ll