[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (2e25d75aaa2 -> 66007664531)

23 Jan 2020


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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig
in repository toolchain/ci/llvm-project.
from  2e25d75aaa2 [AArch64][GlobalISel] Fix llvm.returnaddress(0) selection w [...]
      adds  c9a39a896c9 [lldb] Add a display name to ClangASTContext instances
      adds  3a906a9f4e6 [VE] i<N> and fp32/64 arguments, return values and constants
      adds  de51559fa68 [Concepts] Fix incorrect recovery in TryAnnotateTypeConstraint
      adds  a133cbaad5b [clang][index] Index the injected class name types.
      adds  3593b5b3e9c [llvm-as] Fix assembling of index with multiple summaries s [...]
      adds  5d4e8997571 [clangd] Handle the missing injectedClassNameType in targetDecl.
      adds  935729e4c63 Change the googlemock link
      adds  0157a74bec3 [lldb] Fix an asan error from 27df2d9f556c
      adds  7984b47401f [mlir][orc] unbreak MLIR ExecutionEngine after ORC changes
      adds  45538b5fb28 [Concepts] Fix bug when referencing function parameters in  [...]
      adds  c04b9ba5958 [ARM][MVE] Clear MaskedInsts vector
      adds  eaa594f4ec5 [llvm-readobj] - Rewrite gnuhash.test test to stop using pr [...]
      adds  1d549e68d4a [Doc] Update requirements for masked load/store
      adds  5be8b2ec4a0 [llvm-exegesis] Serial snippet: Restrict the set of back-to [...]
      adds  889a4f55c91 [lldb] s/lldb/%lldb in two tests
      adds  0957233320e [Alignment][NFC] Use Align with CreateMaskedStore
      adds  e57a9abc4b0 [Concepts] Placeholder constraints and abbreviated templates
      adds  67d4c9924c1 Add support for (expressing) vscale.
      adds  7b81c3f8793 Revert "[Concepts] Fix bug when referencing function parame [...]
      adds  9570f1e5a61 [clangd] Do not duplicate TemplatedDecls in findExplicitReferences
      adds  e727f39ec0b [LLD][ELF][ARM] Don't apply --fix-cortex-a8 to relocatable links.
      adds  cdcc4f2a44b [AArch64][SVE] Add intrinsic for non-faulting loads
      adds  c42fe24754f [lld/ELF] PR44498: Support input filename in double quote
      adds  3d7177acd75 [lldb/DWARF] Remove one more auto-dwo method
      adds  201c646b2b9 Remove extra ';' to fix Wpedantic. NFCI.
      adds  963f2681869 [X86][SSE] combineExtractWithShuffle - pull out repeated ex [...]
      adds  178562fb352 [mlir] Enable specifying verify on OpInterface
      adds  4460cb5bcd7 [mlir][spirv] Add lowering for composite std.constant.
      adds  ecc7dae50c4 Extend misc-misplaced-const to detect using declarations as [...]
      adds  2accdb6ae19 [llvm-mca][NFC] Regenerate tests @HEAD.
      adds  c784e5451b2 Use SelectionDAG::getShiftAmountConstant(). NFCI.
      adds  80656fd7aef [SelectionDAG] getShiftAmountConstant - assert the type is  [...]
      adds  c0f53ed8066 [InstCombine] add tests for fneg+fadd; NFC
      adds  64e95282012 AMDGPU: Fix missing immarg on llvm.amdgcn.interp.mov
      adds  b94d3b9b77a AMDGPU/GlobalISel: RegBankSelect interp intrinsics
      adds  e3b15ed376f Revert "Extend misc-misplaced-const to detect using declara [...]
      adds  4481eefbe84 [ASTImporter] Properly delete decls from SavedImportPaths
      adds  9c928649a08 AMDGPU: Fix interaction of tfe and d16
      adds  a722cbf77cc AMDGPU/GlobalISel: Handle atomic_inc/atomic_dec
      adds  70096ca111e AMDGPU/GlobalISel: Fix RegbankSelect for llvm.amdgcn.fmul.legacy
      adds  e0f0d0e55cc [MachineScheduler] Allow clustering mem ops with complex addresses
      adds  4cf16efe497 [AArch64][SVE] Add patterns for unpredicated load/store to  [...]
      adds  0b83e14804c [ARM] MVE Gather Scatter cost model tests. NFC
      adds  e9c198278e2 [ARM] Basic gather scatter cost model
      adds  dc69265eea8 [VE] setcc isel patterns
      adds  0ade2abdb01 [InstCombine] fneg(X + C) --> -C - X
      adds  968561bcdc3 Unconditionally enable lvalue function designators; NFC
      adds  a174f0da62f AMDGPU/GlobalISel: Add pre-legalize combiner pass
      adds  bcd91778fe7 AMDGPU: Do binop of select of constant fold in AMDGPUCodeGe [...]
      adds  2fe500ab5bb AMDGPU: Look through casted selects to constant fold bin ops
      adds  e93e1b621c4 AMDGPU: Fix typo
      adds  83b67526d5c [VE] select and selectcc patterns
      adds  9dc9f7ca145 [lldb/Target] Sort CMakeLists (NFC)
      adds  e3d352c5411 AMDGPU/GlobalISel: Fold constant offset vector extract indexes
      adds  04a151710e8 [mlir] Swap use of to_vector() with lookupValues() in LLVMI [...]
      adds  3524d4412cf AMDGPU/GlobalISel: Fix RegBankSelect for G_INSERT_VECTOR_ELT
      adds  d1dbb5e4718 AMDGPU/GlobalISel: Select G_INSERT_VECTOR_ELT
      adds  3215f7c7a81 [compiler-rt] [builtins] Fix clear_cache_test to work with  [...]
      adds  349f6bb873d [gn build] (manually) port a174f0da62f
      adds  52ec7379adf AMDGPU/GlobalISel: Fold add of constant into G_INSERT_VECTOR_ELT
      adds  a14aa7dabde [X86][SSE] combineExtractWithShuffle - extract(bictcast(sca [...]
      adds  0cb274de397 [RISCV] Support ABI checking with per function target-features
      adds  bb562d1af0e AMDGPU/GlobalISel: Keep G_BITCAST out of waterfall loop
      adds  0bf434ccd56 AMDGPU: Fix element size assertion
      adds  a8ff6c0b097 [AArch64] Add test for DWARF return address signing
      adds  ddbc728828c [PGO][PGSO] Update BFI in CodeGenPrepare::optimizeSelectInst.
      adds  dd09ec1208b AMDGPU/GlobalISel: Select llvm.amdgcn.mov.dpp8
      adds  c05f23e409a AMDGPU/GlobalISel: Select llvm.amdgcn.mov.dpp
      adds  fb8a3d18340 Regenerate test/CodeGen/ARM/vext.ll. NFC.
      adds  2d0fcf786c5 Precommit NFC part of DAGCombiner change. NFC.
      adds  45a4aaea7fd [NFC][XCOFF] Refactor Csect creation into TargetLoweringObjectFile
      adds  1192d7b2547 AMDGPU/GlobalISel: Handle 16-bank LDS llvm.amdgcn.interp.p1.f16
      adds  300997c41a0 [AArch64] Don't rename registers with pseudo defs in Ld/St opt.
      adds  fd98eccf984 [gn build] [win] produce symbolized stack frames in release [...]
      adds  dfe9f130e07 Revert "Unconditionally enable lvalue function designators; NFC"
      adds  990acd450cf [scudo][standalone] Reduce Android region sizes to 128MB
      adds  5114d55dde4 [Flang] add some cmake code to allow for out-of-tree buildi [...]
      adds  bfcfa53c3df Revert "[gn build] [win] produce symbolized stack frames in [...]
      adds  cd470717d15 Revert "[DA][TTI][AMDGPU] Add option to select GPUDA with TTI"
      adds  58991ba7737 [ARM] Mark MVE loads/store as not having side effects
      adds  5340434c94c [X86][SSE] combineExtractWithShuffle - extract(bitcast(broa [...]
      adds  635cbef5056 [CMake][Fuchsia] Disable in-process cc1
      adds  1e4764e1032 Add a comment about when we can remove this construct; NFC.
      adds  c2a250e1c43 [Concepts] Fix bug when referencing function parameters in  [...]
      adds  8f21acbf52b [gn build] reformat all build files again
      adds  90cfbb81674 Add LLVM_VALUE_FUNCTION to Optional::map(); NFC
      adds  1b8eab179db AMDGPU/R600: Emit rodata in text segment
      adds  eec36909c18 [mlir] Add baseAttr to TypedArrayAttrBase.
      adds  efb130fc930 [LoopDeletion] Teach LoopDeletion to preserve MemorySSA if  [...]
      adds  8edf037aebd Add a bit of documentation on attribute spellings that were [...]
      adds  84c5f196370 Extend misc-misplaced-const to detect using declarations as [...]
      adds  38c68047b04 [SVE] Pass Scalable argument to VectorType::get in Bitcode Reader
      adds  363d27c871f [x86] fold vperm2x128 to concat of 128-bit high half vectors
      adds  8ded83ff7e0 [llvm-cov] Add support for -skip-functions to lcov
      adds  15f1d5d1442 [libFuzzer] Add INFO output when LLVMFuzzerCustomMutator is found.
      adds  7dc49f77ee5 R600: Fix failing testcase
      adds  89c8866c041 Convert AssertTrue( A == B) to AssertEqual(A, B) in TestObj [...]
      adds  31662e67e08 [lldb/Util] Fix lldb-repro now it doesn't take a path to lldb
      adds  536612df4b4 [lldb/Test] Use lit's capabilities to skip lldb-repro tests.
      adds  8401698fb57 [lldb/Reproducer] Correctly instrument enum values
      adds  90f58eaeff5 [ODRHash] Factor out functionality for CXXRecord ODR diagno [...]
      adds  ed80c86c885 [PatternMatch] Add m_APInt/m_APFloat matchers accepting undef
      adds  68d7f06092e Clang] Fix expansion of response files in -Wp after integra [...]
      adds  9aa816a816b [PowerPC] Collect some CallLowering arguments into a struct. [NFC]
      adds  efba7ed05e5 [PatternMatch] Make m_c_ICmp swap the predicate (PR42801)
      adds  f55b033c028 [TestStdModuleSysroot] Only run locally.
      adds  5bb8d28e61c [mlir][Linalg] Add tensor support to Linalg EDSC Builders
      adds  16b9410caa3 [X86] Cast to __v4hi instead of __m64 in the implementation [...]
      adds  80c34f94acd [InstCombine] Add test for PR44529; NFC
      adds  0b83c5a78fa [InstCombine] Combine neg of shl of sub (PR44529)
      adds  b32013baec1 [www] Update cxx_status page to list changes on the Clang 1 [...]
      adds  4c2b0a63661 [lldb/Utility] Don't forward directories to the file collector
      adds  6ae61f7675d [lldb/Test] Skip script interpreter tests reading from stdi [...]
      adds  6baf31b7c1e [LoopIdiomRecognize] Reduce variable scope. [NFCI]
      adds  b5b6126d97e [IndVarSimplify] Cleanup spaces and reduce variable scope [NFCI]
      adds  1f45914b428 Embed a zero-length /dev/null in darwin-debug for the speci [...]
      adds  0e9374e3740 [nfc][libomptarget] Remove SHARED annotation from local variables
      adds  df839cfda09 [cmake] Fix clang builds with BUILD_SHARED=ON and CLANG_LIN [...]
      adds  4751e4f8c24 Revert "[cmake] Fix clang builds with BUILD_SHARED=ON and C [...]
      adds  c4144caf9b8 [lldb/Reproducer] Disable buffering of stdout during replay
      adds  adc4faf532b [IndVarSimplify] Teach IndVarSimplify to preserve MemorySSA.
      adds  39ae86ab72d [AArch64TTI] AArch64 supports NT vector stores through STNP.
      adds  83a093b8ecc [lldb/Reproducer] Mark some driver tests  as unsupported fo [...]
      adds  d42baff45d9 Replace old-style cast of null pointer with nullptr
      adds  9be5c135388 [lldb/Test] Add check-lldb-repro target
      adds  9b5a9f2fab1 [lldb/Test] Fix type in add_lit_testsuite
      adds  48490e3247a [lldb/Docs] Document testing strategies for the reproducers
      adds  3f5976c97db [RISCV] Fix evaluating %pcrel_lo against global and weak symbols
      adds  cf2b498d284 [llvm/Transforms] Fix warning: private field 'MSSA' is not used
      adds  ddfe8751b16 [test] Fix lld/test/ELF/riscv-pcrel-hilo-error.s after D73211
      adds  f14f2a85680 [LV] Fix predication for branches with matching true and fa [...]
      adds  4d14772f5c2 AMDGPU/GlobalISel: Remove redundant or patterns
      adds  e0502563778 AMDGPU/GlobalISel: Fix generated wave64 checks
      adds  45f630d729e [libcxx] [test] Don't assert that moved-from containers wit [...]
      adds  53a28bd8917 [LICM] NFC. Remove AST caching infrastructure
      adds  5e017c12d22 [DWARF] Allow empty address range tables.
      adds  dcff3961c2d [DWARF] Return Error from DWARFDebugArangeSet::extract().
      adds  d6f39cfed06 [DWARF] Make dwarf::getUnitLengthFieldByteSize() constexpr. NFC.
      adds  a0f367f792a [DWARF] Make dwarf::getDwarfOffsetByteSize() a free function. NFC.
      adds  6332990721d [DWARF] Support DWARF64 in DWARFDebugArangeSet.
      adds  ed9851a0a68 [DWARF] Better detect errors in Address Range Tables.
      adds  1b15965932c [gn build] Port dcff3961c2d
      adds  15ac7277143 Fix build bot failures.
      adds  6fc9e601494 NFC. Remove obsolete SimpleAnalysis infrastructure
       new  66007664531 NFC. Add PR44320 IR test case.
The 1 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 .../bugprone/ReservedIdentifierCheck.cpp           |    2 +-
 .../clang-tidy/misc/MisplacedConstCheck.cpp        |   38 +-
 clang-tools-extra/clangd/FindTarget.cpp            |   12 +
 .../clangd/unittests/FindTargetTests.cpp           |   66 +-
 .../clang-tidy/checks/misc-misplaced-const.rst     |   21 +-
 .../clang-tidy/checkers/misc-misplaced-const.c     |    6 +-
 .../clang-tidy/checkers/misc-misplaced-const.cpp   |   58 +-
 clang/cmake/caches/Fuchsia-stage2.cmake            |    1 +
 clang/docs/InternalsManual.rst                     |   12 +-
 clang/include/clang/AST/ASTContext.h               |    7 +-
 clang/include/clang/AST/ASTNodeTraverser.h         |    4 +-
 clang/include/clang/AST/DeclTemplate.h             |   43 +-
 clang/include/clang/AST/PropertiesBase.td          |    2 +
 clang/include/clang/AST/RecursiveASTVisitor.h      |   14 +-
 clang/include/clang/AST/TemplateBase.h             |    7 +-
 clang/include/clang/AST/Type.h                     |   74 +-
 clang/include/clang/AST/TypeLoc.h                  |  138 +-
 clang/include/clang/AST/TypeProperties.td          |   11 +-
 clang/include/clang/Basic/DiagnosticParseKinds.td  |    2 +
 clang/include/clang/Basic/DiagnosticSemaKinds.td   |   12 +-
 clang/include/clang/Driver/Driver.h                |    2 +-
 clang/include/clang/Sema/DeclSpec.h                |   72 +-
 clang/include/clang/Sema/Scope.h                   |    6 +
 clang/include/clang/Sema/ScopeInfo.h               |   20 +-
 clang/include/clang/Sema/Sema.h                    |   47 +-
 clang/lib/AST/ASTContext.cpp                       |  152 +-
 clang/lib/AST/ASTImporter.cpp                      |   22 +-
 clang/lib/AST/ASTStructuralEquivalence.cpp         |   26 +-
 clang/lib/AST/DeclTemplate.cpp                     |   45 +-
 clang/lib/AST/ODRHash.cpp                          |    7 +
 clang/lib/AST/TemplateBase.cpp                     |    2 +-
 clang/lib/AST/TextNodeDumper.cpp                   |    5 +
 clang/lib/AST/Type.cpp                             |   36 +-
 clang/lib/AST/TypeLoc.cpp                          |   95 +
 clang/lib/AST/TypePrinter.cpp                      |   29 +-
 clang/lib/CodeGen/CGBuiltin.cpp                    |   25 +-
 clang/lib/Headers/xmmintrin.h                      |    4 +-
 clang/lib/Index/IndexTypeSourceInfo.cpp            |    5 +
 clang/lib/Parse/ParseCXXInlineMethods.cpp          |    4 +-
 clang/lib/Parse/ParseDecl.cpp                      |   73 +-
 clang/lib/Parse/ParseDeclCXX.cpp                   |    2 +
 clang/lib/Parse/ParseTemplate.cpp                  |   10 +-
 clang/lib/Parse/ParseTentative.cpp                 |   21 +
 clang/lib/Parse/Parser.cpp                         |   24 +
 clang/lib/Sema/DeclSpec.cpp                        |    9 +
 clang/lib/Sema/Sema.cpp                            |   15 +
 clang/lib/Sema/SemaDecl.cpp                        |   39 +-
 clang/lib/Sema/SemaDeclCXX.cpp                     |   47 +
 clang/lib/Sema/SemaLambda.cpp                      |    3 +-
 clang/lib/Sema/SemaTemplate.cpp                    |  190 +-
 clang/lib/Sema/SemaTemplateDeduction.cpp           |   77 +-
 clang/lib/Sema/SemaTemplateInstantiateDecl.cpp     |   16 +-
 clang/lib/Sema/SemaType.cpp                        |  229 +-
 clang/lib/Sema/TreeTransform.h                     |  137 +-
 clang/lib/Serialization/ASTReader.cpp              | 1439 +++++++------
 clang/lib/Serialization/ASTReaderDecl.cpp          |   22 +-
 clang/lib/Serialization/ASTWriter.cpp              |   12 +
 clang/lib/Serialization/ASTWriterDecl.cpp          |    4 +
 .../AST/ast-dump-record-definition-data-json.cpp   |   57 +-
 clang/test/CXX/dcl/dcl.fct/p17.cpp                 |  260 +++
 .../CXX/dcl/dcl.spec/dcl.type/dcl.spec.auto/p6.cpp |   44 +
 .../expr.prim.lambda.closure/p3.cpp                |    6 +-
 clang/test/CXX/temp/temp.param/p10-2a.cpp          |   25 +-
 clang/test/Driver/Wp-args.c                        |   10 +
 .../Parser/cxx2a-placeholder-type-constraint.cpp   |   26 +
 clang/test/SemaCXX/cxx1y-generic-lambdas.cpp       |    2 +-
 .../SemaTemplate/instantiate-requires-clause.cpp   |   10 +
 .../ms-delayed-default-template-args.cpp           |    3 +-
 clang/tools/driver/driver.cpp                      |   22 +-
 clang/unittests/Index/IndexTests.cpp               |   21 +
 clang/www/cxx_dr_status.html                       |    8 +-
 clang/www/cxx_status.html                          |   38 +-
 clang/www/make_cxx_dr_status                       |   12 +-
 compiler-rt/lib/fuzzer/FuzzerDriver.cpp            |    5 +-
 .../lib/scudo/standalone/allocator_config.h        |    8 +-
 compiler-rt/test/builtins/Unit/clear_cache_test.c  |   47 +-
 compiler-rt/test/fuzzer/fuzzer-custommutator.test  |    2 +
 libcxx/src/locale.cpp                              |    4 +-
 .../associative/map/map.cons/move_assign.pass.cpp  |    2 +-
 .../multimap/multimap.cons/move_assign.pass.cpp    |    2 +-
 .../multiset/multiset.cons/move_assign.pass.cpp    |    2 +-
 .../associative/set/set.cons/move_assign.pass.cpp  |    2 +-
 .../sequences/vector.bool/assign_move.pass.cpp     |    2 +-
 lld/Common/Strings.cpp                             |   26 +-
 lld/ELF/Driver.cpp                                 |    3 +-
 lld/ELF/LinkerScript.h                             |    2 +-
 lld/ELF/ScriptParser.cpp                           |   17 +-
 lld/ELF/SymbolTable.cpp                            |    2 +-
 lld/include/lld/Common/Strings.h                   |   46 +-
 lld/test/ELF/arm-fix-cortex-a8-recognize.s         |   10 +
 lld/test/ELF/linkerscript/filename-spec.s          |    4 +-
 lld/test/ELF/riscv-pcrel-hilo-error.s              |    6 +
 lldb/docs/resources/reproducers.rst                |   25 +
 lldb/include/lldb/Host/FileSystem.h                |    1 +
 lldb/include/lldb/Symbol/ClangASTContext.h         |   15 +-
 .../lldb/Utility/ReproducerInstrumentation.h       |   11 +-
 .../sysroot/TestStdModuleSysroot.py                |    1 +
 .../comp_dir_symlink/TestCompDirSymLink.py         |   20 +-
 .../lang/objc/objc-stepping/TestObjCStepping.py    |   54 +-
 lldb/source/Host/common/FileSystem.cpp             |   12 +-
 lldb/source/Host/posix/FileSystemPosix.cpp         |    2 +-
 .../ExpressionParser/Clang/ClangASTSource.cpp      |   97 +-
 .../Clang/ClangExpressionParser.cpp                |    3 +-
 .../Clang/ClangModulesDeclVendor.cpp               |    4 +-
 .../ObjC/AppleObjCRuntime/AppleObjCDeclVendor.cpp  |    7 +-
 .../AppleObjCTypeEncodingParser.cpp                |    7 +-
 .../Plugins/SymbolFile/DWARF/DWARFDebugInfo.cpp    |    2 +-
 lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp |    3 -
 .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp   |   88 +-
 .../Plugins/SymbolFile/DWARF/SymbolFileDWARF.h     |    7 +
 lldb/source/Symbol/ClangASTContext.cpp             |   19 +-
 lldb/source/Target/CMakeLists.txt                  |    4 +-
 lldb/source/Utility/ReproducerInstrumentation.cpp  |    5 +
 lldb/test/Shell/CMakeLists.txt                     |   14 +
 lldb/test/Shell/Driver/LocalLLDBInit.test          |    2 +
 lldb/test/Shell/Driver/TestCore.test               |    2 +
 lldb/test/Shell/Driver/TestFile.test               |    2 +
 lldb/test/Shell/Driver/TestRepl.test               |    2 +
 .../ObjectFile/ELF/PT_LOAD-overlap-PT_TLS.yaml     |    2 +-
 .../ObjectFile/ELF/PT_TLS-overlap-PT_LOAD.yaml     |    2 +-
 lldb/test/Shell/Process/TestEnvironment.test       |    1 +
 lldb/test/Shell/Quit/TestQuitExitCode-30.test      |    1 +
 lldb/test/Shell/Quit/TestQuitExitCode30.test       |    1 +
 lldb/test/Shell/Quit/TestQuitExitCodeHexA.test     |    1 +
 lldb/test/Shell/Reproducer/lit.local.cfg           |    2 +-
 .../test/Shell/ScriptInterpreter/Lua/bindings.test |    2 +
 .../Lua/convenience_variables.test                 |    1 +
 .../Shell/ScriptInterpreter/Python/crashlog.test   |    1 +
 .../Python/scripted_breakpoint.test                |    1 +
 lldb/test/Shell/lit.cfg.py                         |    2 +-
 lldb/tools/darwin-debug/CMakeLists.txt             |    2 +-
 lldb/unittests/Symbol/TestClangASTContext.cpp      |   13 +-
 .../SymbolFile/DWARF/DWARFASTParserClangTests.cpp  |    2 +-
 .../TestingSupport/Symbol/ClangTestUtils.h         |    3 +-
 lldb/utils/lldb-repro/lldb-repro.py                |   14 +-
 llvm/docs/LangRef.rst                              |   33 +-
 llvm/docs/TestingGuide.rst                         |    2 +-
 llvm/include/llvm/ADT/Optional.h                   |    2 +-
 .../llvm/Analysis/LegacyDivergenceAnalysis.h       |    3 +-
 llvm/include/llvm/Analysis/LoopPass.h              |   39 -
 llvm/include/llvm/Analysis/MemoryLocation.h        |    7 +
 llvm/include/llvm/Analysis/TargetTransformInfo.h   |    6 -
 .../llvm/Analysis/TargetTransformInfoImpl.h        |    2 -
 llvm/include/llvm/BinaryFormat/Dwarf.h             |   19 +-
 llvm/include/llvm/CodeGen/BasicTTIImpl.h           |    2 -
 llvm/include/llvm/CodeGen/ISDOpcodes.h             |    5 +
 llvm/include/llvm/CodeGen/SelectionDAG.h           |    7 +
 llvm/include/llvm/CodeGen/TargetInstrInfo.h        |   22 +-
 .../llvm/CodeGen/TargetLoweringObjectFileImpl.h    |    9 +
 .../llvm/DebugInfo/DWARF/DWARFDebugArangeSet.h     |    9 +-
 llvm/include/llvm/IR/Constants.h                   |    4 +
 llvm/include/llvm/IR/IRBuilder.h                   |   12 +-
 llvm/include/llvm/IR/Intrinsics.td                 |    5 +
 llvm/include/llvm/IR/IntrinsicsAArch64.td          |    8 +
 llvm/include/llvm/IR/IntrinsicsAMDGPU.td           |    2 +-
 llvm/include/llvm/IR/PatternMatch.h                |   96 +-
 llvm/include/llvm/MC/MCAsmBackend.h                |    8 +
 llvm/include/llvm/MC/MCFixupKindInfo.h             |    5 +-
 llvm/include/llvm/MC/MCObjectFileInfo.h            |    6 +
 llvm/include/llvm/Support/Compiler.h               |    3 +-
 .../include/llvm/Target/TargetLoweringObjectFile.h |   21 +
 llvm/include/llvm/Target/TargetSelectionDAG.td     |    1 +
 llvm/include/llvm/Transforms/Utils/LoopUtils.h     |    7 +-
 llvm/lib/Analysis/ConstantFolding.cpp              |    3 +-
 llvm/lib/Analysis/InstructionSimplify.cpp          |    6 -
 llvm/lib/Analysis/LegacyDivergenceAnalysis.cpp     |    9 +-
 llvm/lib/Analysis/Loads.cpp                        |    4 +-
 llvm/lib/Analysis/LoopPass.cpp                     |   37 +-
 llvm/lib/Analysis/TargetTransformInfo.cpp          |    4 -
 llvm/lib/Analysis/ValueTracking.cpp                |    4 -
 llvm/lib/AsmParser/LLParser.cpp                    |   11 +-
 llvm/lib/Bitcode/Reader/BitcodeReader.cpp          |   12 +-
 llvm/lib/CodeGen/CodeGenPrepare.cpp                |   25 +
 llvm/lib/CodeGen/MachineScheduler.cpp              |   69 +-
 llvm/lib/CodeGen/ScalarizeMaskedMemIntrin.cpp      |   30 +-
 llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp      |   37 +-
 .../CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp  |    8 +
 llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h      |    1 +
 llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp     |   27 +-
 .../CodeGen/SelectionDAG/SelectionDAGBuilder.cpp   |   10 +
 .../CodeGen/SelectionDAG/SelectionDAGDumper.cpp    |    1 +
 llvm/lib/CodeGen/TargetInstrInfo.cpp               |   12 +
 llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp  |   30 +
 llvm/lib/DebugInfo/DWARF/DWARFContext.cpp          |    7 +-
 llvm/lib/DebugInfo/DWARF/DWARFDebugArangeSet.cpp   |  216 +-
 llvm/lib/DebugInfo/DWARF/DWARFDebugAranges.cpp     |    6 +-
 llvm/lib/IR/AutoUpgrade.cpp                        |    9 +-
 llvm/lib/IR/IRBuilder.cpp                          |   14 +-
 llvm/lib/MC/MCAssembler.cpp                        |    7 +
 llvm/lib/MC/MCObjectFileInfo.cpp                   |    7 +
 llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp    |   39 +
 llvm/lib/Target/AArch64/AArch64ISelLowering.cpp    |  129 +-
 llvm/lib/Target/AArch64/AArch64ISelLowering.h      |    4 +
 llvm/lib/Target/AArch64/AArch64InstrFormats.td     |    2 +
 llvm/lib/Target/AArch64/AArch64InstrInfo.cpp       |   64 +-
 llvm/lib/Target/AArch64/AArch64InstrInfo.h         |   11 +-
 llvm/lib/Target/AArch64/AArch64InstrInfo.td        |    7 +
 .../Target/AArch64/AArch64LoadStoreOptimizer.cpp   |   13 +
 llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td     |  109 +
 .../Target/AArch64/AArch64TargetTransformInfo.h    |   18 +
 llvm/lib/Target/AArch64/SVEInstrFormats.td         |   15 +-
 llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h    |    1 +
 llvm/lib/Target/AMDGPU/AMDGPU.h                    |    4 +
 llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp    |   80 +
 llvm/lib/Target/AMDGPU/AMDGPUCombine.td            |   15 +
 llvm/lib/Target/AMDGPU/AMDGPUGISel.td              |   10 +-
 .../Target/AMDGPU/AMDGPUGenRegisterBankInfo.def    |   15 +-
 .../Target/AMDGPU/AMDGPUInstructionSelector.cpp    |  153 +-
 llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |    3 +
 llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp     |   20 +
 llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h       |    4 +
 .../Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp   |  149 ++
 llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp  |  202 +-
 llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp     |    7 +
 .../Target/AMDGPU/AMDGPUTargetTransformInfo.cpp    |   10 -
 llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h |    1 -
 llvm/lib/Target/AMDGPU/CMakeLists.txt              |    3 +
 llvm/lib/Target/AMDGPU/SIISelLowering.cpp          |  153 +-
 llvm/lib/Target/AMDGPU/SIInstrInfo.cpp             |  131 +-
 llvm/lib/Target/AMDGPU/SIInstrInfo.h               |   16 +-
 llvm/lib/Target/AMDGPU/SIInstructions.td           |   20 +-
 llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp    |    2 +-
 llvm/lib/Target/AMDGPU/VOP1Instructions.td         |   13 +-
 llvm/lib/Target/ARM/ARMInstrMVE.td                 |    2 +
 llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp     |   61 +
 llvm/lib/Target/ARM/ARMTargetTransformInfo.h       |    3 +
 llvm/lib/Target/ARM/MVETailPredication.cpp         |    1 +
 llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp       |   13 +-
 llvm/lib/Target/Hexagon/HexagonInstrInfo.h         |    9 +-
 llvm/lib/Target/Lanai/LanaiInstrInfo.cpp           |   13 +-
 llvm/lib/Target/Lanai/LanaiInstrInfo.h             |    9 +-
 llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp          |   82 +-
 llvm/lib/Target/PowerPC/PPCISelLowering.cpp        |  266 ++-
 llvm/lib/Target/PowerPC/PPCISelLowering.h          |   38 +-
 llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp |   13 +
 .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp  |   97 +-
 .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.h    |   14 +-
 llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp |   69 +-
 llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCExpr.h   |    7 +-
 llvm/lib/Target/RISCV/RISCVISelLowering.cpp        |   14 +
 llvm/lib/Target/RISCV/Utils/RISCVBaseInfo.cpp      |   11 +-
 llvm/lib/Target/VE/VECallingConv.td                |   30 +-
 llvm/lib/Target/VE/VEISelLowering.cpp              |   21 +-
 llvm/lib/Target/VE/VEISelLowering.h                |    6 +
 llvm/lib/Target/VE/VEInstrFormats.td               |    4 +-
 llvm/lib/Target/VE/VEInstrInfo.cpp                 |    8 +-
 llvm/lib/Target/VE/VEInstrInfo.td                  |  590 +++++-
 llvm/lib/Target/VE/VERegisterInfo.cpp              |   36 +-
 llvm/lib/Target/VE/VERegisterInfo.td               |   52 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |   80 +-
 llvm/lib/Target/X86/X86InstrInfo.cpp               |   10 +-
 llvm/lib/Target/X86/X86InstrInfo.h                 |    9 +-
 .../Transforms/InstCombine/InstCombineAddSub.cpp   |    8 +-
 .../Transforms/InstCombine/InstCombineAndOrXor.cpp |    5 -
 .../Transforms/InstCombine/InstCombineCalls.cpp    |    2 +-
 .../Transforms/InstCombine/InstCombineCompares.cpp |   56 +-
 .../Transforms/InstCombine/InstCombineInternal.h   |    1 +
 .../InstCombine/InstructionCombining.cpp           |   17 +
 .../Transforms/Instrumentation/MemorySanitizer.cpp |   11 +-
 llvm/lib/Transforms/Scalar/IndVarSimplify.cpp      |  103 +-
 llvm/lib/Transforms/Scalar/LICM.cpp                |  117 +-
 llvm/lib/Transforms/Scalar/LoopDeletion.cpp        |   22 +-
 llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp  |    8 +-
 llvm/lib/Transforms/Scalar/LoopUnswitch.cpp        |    8 -
 llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp  |    4 -
 llvm/lib/Transforms/Utils/LoopUtils.cpp            |   37 +-
 llvm/lib/Transforms/Vectorize/LoopVectorize.cpp    |    8 +-
 .../CostModel/ARM/mve-gather-scatter-cost.ll       |  511 +++++
 .../thinlto-multiple-summaries-for-guid.ll         |   12 +
 llvm/test/Bitcode/vscale-round-trip.ll             |   49 +
 .../sign-return-address-cfi-negate-ra-state.ll     |   35 +
 llvm/test/CodeGen/AArch64/spillfill-sve.ll         |  189 ++
 .../test/CodeGen/AArch64/stp-opt-with-renaming.mir |   33 +
 .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll     |  182 ++
 llvm/test/CodeGen/AArch64/sve-vscale.ll            |  200 ++
 .../CodeGen/AMDGPU/GlobalISel/extractelement.ll    |  194 +-
 .../CodeGen/AMDGPU/GlobalISel/insertelement.ll     | 2181 ++++++++++++++++++++
 .../GlobalISel/inst-select-extract-vector-elt.mir  |   72 +-
 .../GlobalISel/inst-select-insert-vector-elt.mir   |  626 ++++++
 .../CodeGen/AMDGPU/GlobalISel/inst-select-or.mir   |    8 +-
 .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll    | 1824 ++++++++++++++++
 .../AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll    | 1928 +++++++++++++++++
 .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll    |    4 +-
 .../AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll    |    4 +-
 .../AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll |  116 ++
 .../AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll       |   72 +
 .../AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp8.ll      |    1 +
 .../GlobalISel/regbankselect-amdgcn.atomic.dec.mir |   80 -
 .../GlobalISel/regbankselect-amdgcn.atomic.inc.mir |   80 -
 .../regbankselect-amdgcn.fmul.legacy.mir           |   66 +
 .../GlobalISel/regbankselect-amdgcn.interp.mov.mir |   39 +
 .../regbankselect-amdgcn.interp.p1.f16.mir         |   43 +
 .../GlobalISel/regbankselect-amdgcn.interp.p1.mir  |   79 +
 .../regbankselect-amdgcn.interp.p2.f16.mir         |   49 +
 .../GlobalISel/regbankselect-amdgcn.interp.p2.mir  |   48 +
 .../regbankselect-extract-vector-elt.mir           |  112 +-
 .../GlobalISel/regbankselect-insert-vector-elt.mir |  165 +-
 .../amdgpu-codegenprepare-fold-binop-select.ll     |  494 +++++
 llvm/test/CodeGen/AMDGPU/dagcombine-select.ll      |   21 +-
 llvm/test/CodeGen/AMDGPU/global-constant.ll        |    6 +
 llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll     |  410 ++++
 .../CodeGen/AMDGPU/r600-constant-array-fixup.ll    |    6 +-
 .../CodeGen/AMDGPU/select-fabs-fneg-extract.ll     |    4 +-
 llvm/test/CodeGen/ARM/vext.ll                      |   42 +-
 .../CodeGen/RISCV/subtarget-features-std-ext.ll    |   11 +-
 .../Thumb2/LowOverheadLoops/clear-maskedinsts.ll   |  145 ++
 .../Thumb2/LowOverheadLoops/mve-float-loops.ll     |    2 +-
 llvm/test/CodeGen/VE/cast.ll                       |  972 +++++++++
 llvm/test/CodeGen/VE/constants.ll                  |  355 ++++
 llvm/test/CodeGen/VE/constants_i64.ll              |  157 --
 llvm/test/CodeGen/VE/max.ll                        |  199 ++
 llvm/test/CodeGen/VE/min.ll                        |  199 ++
 llvm/test/CodeGen/VE/select.ll                     |   57 +
 llvm/test/CodeGen/VE/selectccf32.ll                |  217 ++
 llvm/test/CodeGen/VE/selectccf32c.ll               |  116 ++
 llvm/test/CodeGen/VE/selectccf32i.ll               |  241 +++
 llvm/test/CodeGen/VE/selectccf64.ll                |  189 ++
 llvm/test/CodeGen/VE/selectccf64c.ll               |  102 +
 llvm/test/CodeGen/VE/selectccf64i.ll               |  201 ++
 llvm/test/CodeGen/VE/selectcci32.ll                |  197 ++
 llvm/test/CodeGen/VE/selectcci32c.ll               |  116 ++
 llvm/test/CodeGen/VE/selectcci32i.ll               |  211 ++
 llvm/test/CodeGen/VE/selectcci64.ll                |  169 ++
 llvm/test/CodeGen/VE/selectcci64c.ll               |  102 +
 llvm/test/CodeGen/VE/selectcci64i.ll               |  183 ++
 llvm/test/CodeGen/VE/setccf32.ll                   |  187 ++
 llvm/test/CodeGen/VE/setccf32i.ll                  |  211 ++
 llvm/test/CodeGen/VE/setccf64.ll                   |  187 ++
 llvm/test/CodeGen/VE/setccf64i.ll                  |  199 ++
 llvm/test/CodeGen/VE/setcci32.ll                   |  121 ++
 llvm/test/CodeGen/VE/setcci32i.ll                  |  131 ++
 llvm/test/CodeGen/VE/setcci64.ll                   |  121 ++
 llvm/test/CodeGen/VE/setcci64i.ll                  |  131 ++
 llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll   |   20 +-
 llvm/test/CodeGen/X86/bitcast-vector-bool.ll       |  211 +-
 llvm/test/CodeGen/X86/cmov-into-branch.ll          |   25 +
 llvm/test/CodeGen/X86/oddsubvector.ll              |   94 +-
 llvm/test/CodeGen/X86/scalar_widen_div.ll          |   20 +-
 llvm/test/CodeGen/X86/vector-idiv-v2i32.ll         |   36 +-
 llvm/test/CodeGen/X86/x86-interleaved-access.ll    |  114 +-
 llvm/test/DebugInfo/X86/dwarfdump-debug-aranges.s  |   86 +
 llvm/test/MC/RISCV/pcrel-fixups.s                  |   74 +-
 llvm/test/MC/RISCV/pcrel-lo12-invalid.s            |    2 +
 llvm/test/MC/RISCV/rv32i-aliases-valid.s           |    7 +-
 llvm/test/MC/RISCV/rv32i-valid.s                   |    7 +-
 llvm/test/MC/RISCV/rv64i-aliases-valid.s           |    8 +-
 llvm/test/ObjectYAML/MachO/DWARF-debug_abbrev.yaml |   12 -
 llvm/test/ObjectYAML/MachO/DWARF-debug_str.yaml    |   12 -
 llvm/test/ObjectYAML/MachO/DWARF-pubsections.yaml  |   12 -
 .../MachO/DWARF2-AddrSize8-FormValues.yaml         |   12 -
 .../test/ObjectYAML/MachO/DWARF5-abbrevValues.yaml |   12 -
 llvm/test/Transforms/InstCombine/fneg.ll           |  126 ++
 llvm/test/Transforms/InstCombine/sub.ll            |   42 +
 llvm/test/Transforms/LCSSA/pr44320.ll              |   56 +
 .../AArch64/nontemporal-load-store.ll              |  259 +++
 .../LoopVectorize/pr44488-predication.ll           |   79 +
 llvm/test/Verifier/AMDGPU/intrinsic-immarg.ll      |   18 +-
 .../test/tools/llvm-cov/export_functions-lcov.test |    8 +
 .../tools/llvm-dwarfdump/X86/debug_aranges-error.s |   21 +
 .../llvm-mca/X86/Znver2/partial-reg-update-2.s     |    1 +
 .../llvm-mca/X86/Znver2/partial-reg-update-3.s     |    7 +-
 .../llvm-mca/X86/Znver2/partial-reg-update-4.s     |   11 +-
 .../llvm-mca/X86/Znver2/partial-reg-update-5.s     |   10 +-
 .../llvm-mca/X86/Znver2/partial-reg-update-6.s     |   30 +-
 .../llvm-mca/X86/Znver2/partial-reg-update-7.s     |    1 +
 .../tools/llvm-mca/X86/Znver2/partial-reg-update.s |    1 +
 .../test/tools/llvm-mca/X86/Znver2/resources-adx.s |   17 +-
 .../test/tools/llvm-mca/X86/Znver2/resources-aes.s |   10 +-
 .../tools/llvm-mca/X86/Znver2/resources-avx1.s     |    4 +-
 .../tools/llvm-mca/X86/Znver2/resources-avx2.s     |    2 +-
 .../tools/llvm-mca/X86/Znver2/resources-clzero.s   |    4 +-
 .../tools/llvm-mca/X86/Znver2/resources-cmov.s     |   98 +-
 .../test/tools/llvm-mca/X86/Znver2/resources-fma.s |    4 +-
 .../tools/llvm-mca/X86/Znver2/resources-fsgsbase.s |    2 +-
 .../tools/llvm-mca/X86/Znver2/resources-lzcnt.s    |    2 +-
 .../test/tools/llvm-mca/X86/Znver2/resources-mmx.s |   98 +-
 .../tools/llvm-mca/X86/Znver2/resources-mwaitx.s   |    6 +-
 .../tools/llvm-mca/X86/Znver2/resources-popcnt.s   |   12 +-
 .../test/tools/llvm-mca/X86/Znver2/resources-sha.s |   12 +-
 .../tools/llvm-mca/X86/Znver2/resources-sse1.s     |  130 +-
 .../tools/llvm-mca/X86/Znver2/resources-sse2.s     |  268 +--
 .../tools/llvm-mca/X86/Znver2/resources-sse3.s     |   10 +-
 .../tools/llvm-mca/X86/Znver2/resources-sse41.s    |   92 +-
 .../tools/llvm-mca/X86/Znver2/resources-sse42.s    |    2 +-
 .../tools/llvm-mca/X86/Znver2/resources-sse4a.s    |    2 +-
 .../tools/llvm-mca/X86/Znver2/resources-ssse3.s    |   40 +-
 .../tools/llvm-mca/X86/Znver2/resources-x86_32.s   |    4 +-
 .../tools/llvm-mca/X86/Znver2/resources-x86_64.s   |   20 +-
 .../test/tools/llvm-mca/X86/Znver2/resources-x87.s |  130 +-
 .../llvm-readobj/ELF/Inputs/gnuhash.so.elf-i386    |  Bin 1080 -> 0 bytes
 .../llvm-readobj/ELF/Inputs/gnuhash.so.elf-ppc     |  Bin 1204 -> 0 bytes
 .../llvm-readobj/ELF/Inputs/gnuhash.so.elf-ppc64   |  Bin 1784 -> 0 bytes
 .../llvm-readobj/ELF/Inputs/gnuhash.so.elf-x86_64  |  Bin 1616 -> 0 bytes
 llvm/test/tools/llvm-readobj/ELF/gnuhash.test      |  153 +-
 .../obj2yaml/macho-DWARF-debug_aranges-error.yaml} |   32 +-
 llvm/tools/llvm-cov/CoverageExporterLcov.cpp       |   14 +-
 llvm/tools/llvm-exegesis/lib/Target.h              |    7 +
 llvm/tools/llvm-exegesis/lib/X86/Target.cpp        |   59 +-
 llvm/tools/obj2yaml/dwarf2yaml.cpp                 |   14 +-
 llvm/tools/obj2yaml/macho2yaml.cpp                 |   14 +-
 llvm/tools/obj2yaml/obj2yaml.cpp                   |    2 +-
 llvm/tools/obj2yaml/obj2yaml.h                     |    4 +-
 llvm/unittests/DebugInfo/DWARF/CMakeLists.txt      |    1 +
 .../DebugInfo/DWARF/DWARFDebugArangeSetTest.cpp    |  192 ++
 llvm/unittests/IR/PatternMatch.cpp                 |   74 +
 llvm/unittests/Target/ARM/MachineInstrTest.cpp     |   86 +
 .../tools/llvm-exegesis/X86/TargetTest.cpp         |    7 +
 .../clang-tools-extra/clangd/test/BUILD.gn         |    3 +-
 .../gn/secondary/clang-tools-extra/test/BUILD.gn   |    3 +-
 llvm/utils/gn/secondary/clang/test/BUILD.gn        |    3 +-
 .../gn/secondary/compiler-rt/test/hwasan/BUILD.gn  |    3 +-
 llvm/utils/gn/secondary/lld/test/BUILD.gn          |    3 +-
 .../gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn   |   11 +
 llvm/utils/gn/secondary/llvm/test/BUILD.gn         |    3 +-
 .../llvm/unittests/DebugInfo/DWARF/BUILD.gn        |    1 +
 .../gn/secondary/llvm/utils/benchmark/BUILD.gn     |    4 +-
 mlir/CMakeLists.txt                                |   34 +-
 mlir/cmake/modules/AddMLIR.cmake                   |   27 +
 mlir/cmake/modules/CMakeLists.txt                  |   67 +
 mlir/docs/OpDefinitions.md                         |    4 +
 mlir/include/mlir/Analysis/InferTypeOpInterface.h  |    8 +-
 mlir/include/mlir/Analysis/InferTypeOpInterface.td |    4 +
 mlir/include/mlir/Dialect/Linalg/EDSC/Builders.h   |   54 +-
 mlir/include/mlir/EDSC/Builders.h                  |    1 +
 mlir/include/mlir/IR/OpBase.td                     |    8 +-
 mlir/include/mlir/TableGen/OpInterfaces.h          |    3 +
 mlir/lib/Analysis/InferTypeOpInterface.cpp         |   14 +
 .../StandardToSPIRV/ConvertStandardToSPIRV.cpp     |   47 +-
 mlir/lib/Dialect/Linalg/EDSC/Builders.cpp          |   29 +-
 mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp           |   34 +
 mlir/lib/ExecutionEngine/ExecutionEngine.cpp       |    6 +-
 mlir/lib/TableGen/OpInterfaces.cpp                 |    6 +
 .../Conversion/StandardToSPIRV/std-to-spirv.mlir   |   12 +
 mlir/test/EDSC/builder-api-test.cpp                |   43 +
 mlir/test/lib/TestDialect/TestPatterns.cpp         |   20 -
 mlir/test/mlir-tblgen/llvm-intrinsics.td           |    1 +
 mlir/test/mlir-tblgen/return-types.mlir            |    2 -
 mlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp      |    6 +-
 mlir/tools/mlir-tblgen/OpInterfacesGen.cpp         |   14 +
 .../deviceRTLs/common/src/reduction.cu             |    6 +-
 440 files changed, 23796 insertions(+), 4212 deletions(-)
 create mode 100644 clang/test/CXX/dcl/dcl.fct/p17.cpp
 create mode 100644 clang/test/CXX/dcl/dcl.spec/dcl.type/dcl.spec.auto/p6.cpp
 create mode 100644 clang/test/Parser/cxx2a-placeholder-type-constraint.cpp
 create mode 100644 llvm/lib/Target/AMDGPU/AMDGPUCombine.td
 create mode 100644 llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
 create mode 100644 llvm/test/Analysis/CostModel/ARM/mve-gather-scatter-cost.ll
 create mode 100644 llvm/test/Assembler/thinlto-multiple-summaries-for-guid.ll
 create mode 100644 llvm/test/Bitcode/vscale-round-trip.ll
 create mode 100644 llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll
 create mode 100644 llvm/test/CodeGen/AArch64/spillfill-sve.ll
 create mode 100644 llvm/test/CodeGen/AArch64/sve-intrinsics-loads-nf.ll
 create mode 100644 llvm/test/CodeGen/AArch64/sve-vscale.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.interp.p1.f16.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp8.ll
 delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.atomic [...]
 delete mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.atomic [...]
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fmul.l [...]
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp [...]
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp [...]
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p1.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp [...]
 create mode 100644 llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.interp.p2.mir
 create mode 100644 llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-fold-binop-select.ll
 create mode 100644 llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
 create mode 100644 llvm/test/CodeGen/Thumb2/LowOverheadLoops/clear-maskedinsts.ll
 create mode 100644 llvm/test/CodeGen/VE/cast.ll
 create mode 100644 llvm/test/CodeGen/VE/constants.ll
 delete mode 100644 llvm/test/CodeGen/VE/constants_i64.ll
 create mode 100644 llvm/test/CodeGen/VE/max.ll
 create mode 100644 llvm/test/CodeGen/VE/min.ll
 create mode 100644 llvm/test/CodeGen/VE/select.ll
 create mode 100644 llvm/test/CodeGen/VE/selectccf32.ll
 create mode 100644 llvm/test/CodeGen/VE/selectccf32c.ll
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[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (2e25d75aaa2 -> 66007664531)