[Tcwg-commits] [gcc] branch master updated (f2170a379b0 -> 532e9e2402a)

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unknown user pushed a change to branch master in repository gcc.

from f2170a379b0 [ARM][GCC][3/4x]: MVE intrinsics with quaternary operands. new 532e9e2402a [ARM][GCC][4/4x]: MVE intrinsics with quaternary operands.

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Summary of changes: gcc/ChangeLog | 192 ++ gcc/config/arm/arm_mve.h | 2096 ++++++++++++++------ gcc/config/arm/arm_mve_builtins.def | 31 + gcc/config/arm/mve.md | 499 ++++- gcc/testsuite/ChangeLog | 67 + .../gcc.target/arm/mve/intrinsics/vabdq_m_f16.c | 24 + .../gcc.target/arm/mve/intrinsics/vabdq_m_f32.c | 24 + .../gcc.target/arm/mve/intrinsics/vaddq_m_f16.c | 24 + .../gcc.target/arm/mve/intrinsics/vaddq_m_f32.c | 24 + .../gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c | 24 + .../gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c | 24 + .../intrinsics/{vandq_m_u16.c => vandq_m_f16.c} | 14 +- .../mve/intrinsics/{vandq_m_s8.c => vandq_m_f32.c} | 14 +- .../intrinsics/{vbicq_m_u16.c => vbicq_m_f16.c} | 14 +- .../mve/intrinsics/{vbicq_m_s8.c => vbicq_m_f32.c} | 14 +- .../{vbrsrq_m_n_s16.c => vbrsrq_m_n_f16.c} | 14 +- .../{vbrsrq_m_n_u32.c => vbrsrq_m_n_f32.c} | 14 +- .../arm/mve/intrinsics/vcaddq_rot270_m_f16.c | 24 + .../arm/mve/intrinsics/vcaddq_rot270_m_f32.c | 24 + .../arm/mve/intrinsics/vcaddq_rot90_m_f16.c | 24 + .../arm/mve/intrinsics/vcaddq_rot90_m_f32.c | 24 + .../{vcvtbq_m_f16_f32.c => vcmlaq_m_f16.c} | 11 +- .../intrinsics/{vabsq_m_f32.c => vcmlaq_m_f32.c} | 11 +- .../arm/mve/intrinsics/vcmlaq_rot180_m_f16.c | 24 + .../arm/mve/intrinsics/vcmlaq_rot180_m_f32.c | 24 + .../arm/mve/intrinsics/vcmlaq_rot270_m_f16.c | 24 + .../arm/mve/intrinsics/vcmlaq_rot270_m_f32.c | 24 + .../arm/mve/intrinsics/vcmlaq_rot90_m_f16.c | 24 + .../arm/mve/intrinsics/vcmlaq_rot90_m_f32.c | 24 + .../gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c | 24 + .../gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c | 24 + .../arm/mve/intrinsics/vcmulq_rot180_m_f16.c | 24 + .../arm/mve/intrinsics/vcmulq_rot180_m_f32.c | 24 + .../arm/mve/intrinsics/vcmulq_rot270_m_f16.c | 24 + .../arm/mve/intrinsics/vcmulq_rot270_m_f32.c | 24 + .../arm/mve/intrinsics/vcmulq_rot90_m_f16.c | 24 + .../arm/mve/intrinsics/vcmulq_rot90_m_f32.c | 24 + .../{vcvtq_m_s16_f16.c => vcvtq_m_n_s16_f16.c} | 5 +- .../{vcvtq_m_s32_f32.c => vcvtq_m_n_s32_f32.c} | 5 +- .../{vcvtq_m_u16_f16.c => vcvtq_m_n_u16_f16.c} | 5 +- .../{vcvtq_m_u32_f32.c => vcvtq_m_n_u32_f32.c} | 5 +- .../intrinsics/{veorq_m_s16.c => veorq_m_f16.c} | 14 +- .../intrinsics/{veorq_m_s16.c => veorq_m_f32.c} | 14 +- .../{vcvtbq_m_f16_f32.c => vfmaq_m_f16.c} | 11 +- .../intrinsics/{vabsq_m_f32.c => vfmaq_m_f32.c} | 11 +- .../{vcvtbq_m_f16_f32.c => vfmaq_m_n_f16.c} | 11 +- .../intrinsics/{vabsq_m_f32.c => vfmaq_m_n_f32.c} | 11 +- .../{vcvtbq_m_f16_f32.c => vfmasq_m_n_f16.c} | 11 +- .../intrinsics/{vabsq_m_f32.c => vfmasq_m_n_f32.c} | 11 +- .../{vcvtbq_m_f16_f32.c => vfmsq_m_f16.c} | 11 +- .../intrinsics/{vabsq_m_f32.c => vfmsq_m_f32.c} | 11 +- .../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c | 24 + .../gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c | 24 + .../gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c | 24 + .../gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c | 24 + .../gcc.target/arm/mve/intrinsics/vmulq_m_f16.c | 24 + .../gcc.target/arm/mve/intrinsics/vmulq_m_f32.c | 24 + .../gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c | 24 + .../gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c | 24 + .../intrinsics/{vornq_m_s16.c => vornq_m_f16.c} | 14 +- .../intrinsics/{vornq_m_s16.c => vornq_m_f32.c} | 14 +- .../intrinsics/{vorrq_m_s16.c => vorrq_m_f16.c} | 14 +- .../intrinsics/{vorrq_m_s16.c => vorrq_m_f32.c} | 14 +- .../gcc.target/arm/mve/intrinsics/vsubq_m_f16.c | 24 + .../gcc.target/arm/mve/intrinsics/vsubq_m_f32.c | 24 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c | 24 + .../gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c | 24 + 67 files changed, 3254 insertions(+), 793 deletions(-) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vabdq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vaddq_m_n_f32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vandq_m_u16.c => vandq_m_f16.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vandq_m_s8.c => vandq_m_f32.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_u16.c => vbicq_m_f16.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbicq_m_s8.c => vbicq_m_f32.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbrsrq_m_n_s16.c => vbrsrq_m_n_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vbrsrq_m_n_u32.c => vbrsrq_m_n_f [...] create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot270_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcaddq_rot90_m_f32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtbq_m_f16_f32.c => vcmlaq_m_f [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabsq_m_f32.c => vcmlaq_m_f32.c} (50%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot180_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot270_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmlaq_rot90_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot180_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot270_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vcmulq_rot90_m_f32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_s16_f16.c => vcvtq_m_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_s32_f32.c => vcvtq_m_n_s [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_u16_f16.c => vcvtq_m_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtq_m_u32_f32.c => vcvtq_m_n_u [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{veorq_m_s16.c => veorq_m_f16.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{veorq_m_s16.c => veorq_m_f32.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtbq_m_f16_f32.c => vfmaq_m_f1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabsq_m_f32.c => vfmaq_m_f32.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtbq_m_f16_f32.c => vfmaq_m_n_ [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabsq_m_f32.c => vfmaq_m_n_f32.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtbq_m_f16_f32.c => vfmasq_m_n [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabsq_m_f32.c => vfmasq_m_n_f32. [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vcvtbq_m_f16_f32.c => vfmsq_m_f1 [...] copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vabsq_m_f32.c => vfmsq_m_f32.c} (50%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmaxnmq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vminnmq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vmulq_m_n_f32.c copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vornq_m_s16.c => vornq_m_f16.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vornq_m_s16.c => vornq_m_f32.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_s16.c => vorrq_m_f16.c} (50%) copy gcc/testsuite/gcc.target/arm/mve/intrinsics/{vorrq_m_s16.c => vorrq_m_f32.c} (50%) create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_f32.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f16.c create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/vsubq_m_n_f32.c