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from b70fae7bdc7 [SelectionDAG] Support promotion of the FPOWI integer operand new 94f81107690 [RISCV] Implement RV64D codegen
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Summary of changes: lib/Target/RISCV/RISCVISelLowering.cpp | 11 +- lib/Target/RISCV/RISCVInstrInfoD.td | 23 ++ test/CodeGen/RISCV/double-arith.ll | 167 +++++++++++++ test/CodeGen/RISCV/double-bitmanip-dagcombines.ll | 28 +++ test/CodeGen/RISCV/double-br-fcmp.ll | 278 ++++++++++++++++++++++ test/CodeGen/RISCV/double-convert.ll | 180 ++++++++++++++ test/CodeGen/RISCV/double-fcmp.ll | 134 +++++++++++ test/CodeGen/RISCV/double-imm.ll | 27 +++ test/CodeGen/RISCV/double-intrinsics.ll | 217 +++++++++++++++++ test/CodeGen/RISCV/double-mem.ll | 83 +++++++ test/CodeGen/RISCV/double-select-fcmp.ll | 215 +++++++++++++++++ test/CodeGen/RISCV/double-stack-spill-restore.ll | 24 ++ test/CodeGen/RISCV/rv64d-double-convert.ll | 130 ++++++++++ 13 files changed, 1513 insertions(+), 4 deletions(-) create mode 100644 test/CodeGen/RISCV/rv64d-double-convert.ll