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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-mainline-allnoconfig in repository toolchain/ci/llvm-project.
from 88c70ec68e4 Include omitted word in comment. adds 7bd7878d222 [ValueTracking] Explicitly specify intersection type; NFC adds 6e9157d5885 [ValueTracking] Use ConstantRange methods; NFC adds 2f9c1732b82 [X86] Split the VEX_WPrefix in X86Inst tablegen class into [...] adds f19f991b7f1 [X86] Use VEX_WIG for VPINSRB/W and VPEXTRB/W to match what [...] adds 53ee783c6e3 [X86] Have EVEX2VEX tablegenerator use HasVEX_L and HasEVEX [...] adds e043dadcad2 [X86] Remove check on isAsmParserOnly from EVEX2VEX tablege [...] adds 93b497a61d2 [DebugInfo] Remove redundant DebugLocEntry::MergeValues() f [...] adds 9837f54843d Breakpad: Parse Stack CFI records adds c60d09597c6 [CMake] Move configuration of LLVM_CXX_STD to HandleLLVMOpt [...] adds ff12913b638 Minidump: use string parsing functionality from llvm adds 2316429d04c [asan_symbolize] Move argument parser epilog text into scri [...] adds e16434a0497 [CMake] Fix accidentally swapped input/output parameters of [...] adds 721b8d1557a Add missing space between \btrue adds 30d3c58b811 [PowerPC] fix trivial typos in comment, NFC adds f432fa6eee8 De-template SymbolTable::addShared. adds 7e01ce2ed15 Fix doxygen warning about function argument adds 26ca5a57bc4 Remove unneeded #ifdef SWIGs adds 5cca2c25a7d [ASTImporter] Fix in ASTImporter::Import_New(const Decl *) adds a30ba452c67 Fix Wdocumentation warning. NFCI. adds 2028ae975c6 [DebugInfo] Pass all values in DebugLocEntry's constructor, NFC adds c0e8231cdd9 [RISCV][NFC] Refactor RISC-V ABI lowering tests in preparat [...] adds 563f35ab2da [llvm-rtdyld] Fix missing include on MSVC builds. adds fa3eb120108 [RISCV][NFC] Minor fixup for r357989 adds 345eacd5552 [TargetLowering] SimplifyDemandedBits - call SimplifyDemand [...] adds 91542e14c77 [RISCV] Unbreak test from r357989 adds 965c5812f43 ClangTidy: Avoid mixing stdout with stderror when dealing w [...] adds 949570ce39d [RISCV] Fix range check for HI20/LO12/RVC_LUI relocations adds 00100b5d0d1 [RISCV] Rewrite tests to use llvm-mc/llvm-objdump adds 23e23836d5d Move tests in r357996 to correct location within monorepo adds 03c3e0d3bf0 Improve hashing for time profiler adds 55f79ef9fec [TargetLowering] SimplifyDemandedBits - Remove GetDemandedS [...] adds 11cf3972925 [InstCombine] add more testcases for canonicalize (-X s/ Y) [...] adds 820b90318fb NFC: Refactor library-specific mappings of scalar maths fun [...] adds 32b65345c57 Add support for detection of devtoolset-8 adds a230bb5fc04 [InstCombine] add tests/comments for negate+sdiv; NFC adds af5834596bf gn build: Fix Windows builds after r357797 adds f62dcea7ed6 [InstCombine] prevent possible miscompile with negate+sdiv [...] adds fa26c20eba9 Fixed comment as pointed out by post-commit review of D59845 adds d469954d61e [InstCombine] auto-generate complete test checks; NFC adds 7563b65ad40 [InstCombine] add tests for sdiv-by-int-min; NFC adds c90045bf109 [CMake] Fix statically linking in libcxxabi if built separately adds d5173f5acf4 [InstCombine] add tests for sdiv with negated dividend and [...] adds 7e2b15382c2 [scudo][standalone] Add flags & related parsers adds 9b22c469ca2 [DWARF] DWARFDebugLine: replace Sequence::orderByLowPC with [...] adds 49d9d17a77c [InstCombine] prevent possible miscompile with sdiv+negate [...] adds 10edd2b79d0 [ValueTracking] Use computeConstantRange() in signed add ov [...] adds 913ba8eeb41 Revert LIS handling in MachineDCE adds 366f4d45c00 [OPENMP]Allow allocate directive on parameters. adds 1383a916894 [InstCombine] [InstCombine] Canonicalize (-X s/ Y) to -(X s/ Y). adds 2fb32253754 [pstl][NFC] Move the ParallelSTLConfig template to the cmak [...] adds d7cc0ec5819 [TargetLowering] SimplifyDemandedBits - add ISD::INSERT_SUB [...] adds 4b2323d1a3d [ValueTracking] Use computeConstantRange() for signed sub o [...] adds a1c44941f36 Update modulemaps for Analysis/VecFuncs.def. adds 6bafd5b3f70 [PDB Docs] Clarifications and fixes for DBI Stream. adds 19f52bde599 [TSan][libdispatch] Replace CFRunLoop with dispatch_semapho [...] adds 202c9b99e00 Remove the unit at a time option Removes the code from opt [...] adds eda3b9326e1 [InstCombine] Restructure OptimizeOverflowCheck; NFC adds 2f5e9de8d1f Revert "[InstCombine] [InstCombine] Canonicalize (-X s/ Y) [...] adds 61e77b11d1b [DAGCombiner][X86][SystemZ] Canonicalize SSUBO with immedia [...] adds f7433f96235 [pstl][CMake] Install CMake export files adds 8e2871cd2c2 [X86] Add support for {vex2}, {vex3}, and {evex} to the ass [...] adds ba55a40fd07 [AArch64] Add test case to show missed opportunity to remov [...] adds c176b708e45 [InstCombine] Add with.overflow always overflow tests; NFC adds 2b523f81625 [GlobalISel][AArch64] Allow CallLowering to handle types wh [...] adds 92d74f19cf4 [AArch64][GlobalISel] Add legalization for some vector G_SH [...] adds 888dd5d198c [AArch64][GlobalISel] Legalize vector G_ICMP. adds 9bf092d7198 [AArch64][GlobalISel] Add isel support for vector G_ICMP an [...] adds 60f83544bb3 [X86] Fix a dangling StringRef issue introduced in r358029. adds d1ba3b13f83 [LLVM-C] Add Section and Symbol Iterator Accessors for Obje [...] adds bec0a45ddce [LLVM-C] Add Bindings to Access an Instruction's DebugLoc adds 50f726d73a4 [LLVM-C] Correct The Current Debug Location Accessors adds 7143224272a [X86] Add VEX_LIG to scalar VEX/EVEX instructions that were [...] adds 9ca3a95f798 [X86] Support the EVEX versions vcvt(t)ss2si and vcvt(t)sd2 [...] adds a49c95e02aa [Sparc] Fix incorrect MI insertion position for spilling f128. adds 5f2b5cd85e5 [llvm-objdump] Accept and ignore --wide/-w adds f8a74c18ec8 [lldb-server] Introduce Socket::Initialize and Terminate to [...] adds 7d4ad143715 [llvm-objdump] Don't print trailing space in dumpBytes adds 391d5caa106 [X86] Move the 2 byte VEX optimization for MOV instructions [...] adds 9ca9d32b6be [ObjC][ARC] Convert the retainRV marker that is passed as a [...] adds 60c3a3b6d0f [CodeGen][ObjC] Emit the retainRV marker as a module flag i [...] adds 0c01607bbff Rename a variable and add a comment.
No new revisions were added by this update.
Summary of changes: .../clang-tidy/tool/run-clang-tidy.py | 1 + clang/include/clang/AST/ASTImporter.h | 2 +- clang/lib/AST/ASTImporter.cpp | 2 +- clang/lib/CodeGen/CGObjC.cpp | 12 +- clang/lib/Driver/ToolChains/Gnu.cpp | 1 + clang/lib/Sema/SemaOpenMP.cpp | 3 - clang/test/CodeGen/riscv32-ilp32-abi.c | 53 + clang/test/CodeGen/riscv32-ilp32-ilp32f-abi.c | 53 + ...v32-abi.c => riscv32-ilp32-ilp32f-ilp32d-abi.c} | 23 +- clang/test/CodeGen/riscv64-lp64-abi.c | 32 + clang/test/CodeGen/riscv64-lp64-lp64f-abi.c | 32 + ...iscv64-abi.c => riscv64-lp64-lp64f-lp64d-abi.c} | 11 +- clang/test/CodeGenObjC/arc-unsafeclaim.m | 3 +- clang/test/OpenMP/allocate_codegen.cpp | 14 + compiler-rt/lib/asan/scripts/asan_symbolize.py | 8 +- compiler-rt/lib/scudo/standalone/CMakeLists.txt | 5 + compiler-rt/lib/scudo/standalone/flags.cc | 57 + compiler-rt/lib/scudo/standalone/flags.h | 30 + compiler-rt/lib/scudo/standalone/flags.inc | 50 + compiler-rt/lib/scudo/standalone/flags_parser.cc | 163 + compiler-rt/lib/scudo/standalone/flags_parser.h | 56 + compiler-rt/lib/scudo/standalone/interface.h | 29 + .../lib/scudo/standalone/tests/CMakeLists.txt | 1 + .../lib/scudo/standalone/tests/flags_test.cc | 119 + compiler-rt/test/tsan/Darwin/gcd-after.mm | 23 +- compiler-rt/test/tsan/Darwin/gcd-async-norace.mm | 17 +- compiler-rt/test/tsan/Darwin/gcd-async-race.mm | 17 +- compiler-rt/test/tsan/Darwin/gcd-barrier-race.mm | 13 +- compiler-rt/test/tsan/Darwin/gcd-barrier.mm | 16 +- compiler-rt/test/tsan/Darwin/gcd-blocks.mm | 21 +- libcxx/lib/CMakeLists.txt | 4 +- lld/ELF/Arch/RISCV.cpp | 25 +- lld/ELF/InputFiles.cpp | 11 +- lld/ELF/InputFiles.h | 14 +- lld/ELF/SymbolTable.cpp | 32 +- lld/ELF/SymbolTable.h | 6 +- lld/test/ELF/riscv-branch.s | 32 + lld/test/ELF/riscv-branch.test | 118 - lld/test/ELF/riscv-call.s | 32 + lld/test/ELF/riscv-call.test | 94 - lld/test/ELF/riscv-hi20-lo12.s | 40 + lld/test/ELF/riscv-hi20-lo12.test | 85 - lld/test/ELF/riscv-jal-error.test | 92 - lld/test/ELF/riscv-jal.s | 34 + lld/test/ELF/riscv-jal.test | 160 - lld/test/ELF/riscv-pcrel-hilo.s | 41 + lld/test/ELF/riscv-pcrel-hilo.test | 102 - lldb/include/lldb/API/SBDefines.h | 4 - lldb/include/lldb/API/SBStructuredData.h | 12 +- lldb/include/lldb/API/SBTarget.h | 2 +- lldb/include/lldb/API/SBThread.h | 17 +- lldb/include/lldb/API/SBThreadPlan.h | 10 +- lldb/include/lldb/Core/Address.h | 2 - lldb/include/lldb/Core/SourceManager.h | 4 - lldb/include/lldb/Host/Socket.h | 3 + lldb/include/lldb/Target/Process.h | 6 - lldb/lit/Modules/Breakpad/sections.test | 2 +- lldb/scripts/interface/SBFrame.i | 3 - lldb/source/API/SBThread.cpp | 16 +- lldb/source/API/SBThreadPlan.cpp | 7 +- lldb/source/Host/common/Socket.cpp | 27 + .../Initialization/SystemInitializerCommon.cpp | 7 + .../ObjectFile/Breakpad/BreakpadRecords.cpp | 54 +- .../Plugins/ObjectFile/Breakpad/BreakpadRecords.h | 18 +- .../ObjectFile/Breakpad/ObjectFileBreakpad.cpp | 3 - .../Plugins/Platform/Windows/PlatformWindows.cpp | 7 +- .../Plugins/Process/minidump/MinidumpParser.cpp | 42 +- .../Plugins/Process/minidump/MinidumpParser.h | 2 - .../Plugins/Process/minidump/MinidumpTypes.cpp | 37 - .../Plugins/Process/minidump/MinidumpTypes.h | 5 - .../Plugins/Process/minidump/ProcessMinidump.cpp | 38 +- lldb/unittests/Host/MainLoopTest.cpp | 12 +- lldb/unittests/Host/SocketAddressTest.cpp | 19 +- lldb/unittests/Host/SocketTest.cpp | 12 +- .../ObjectFile/Breakpad/BreakpadRecordsTest.cpp | 24 +- .../Process/gdb-remote/GDBRemoteTestUtils.cpp | 18 +- .../Process/minidump/MinidumpParserTest.cpp | 131 +- llvm/CMakeLists.txt | 10 - llvm/cmake/modules/HandleLLVMOptions.cmake | 12 +- llvm/docs/PDB/DbiStream.rst | 99 +- llvm/include/llvm-c/Core.h | 35 +- llvm/include/llvm-c/DebugInfo.h | 16 + llvm/include/llvm-c/Object.h | 74 +- llvm/include/llvm/Analysis/VecFuncs.def | 173 + .../include/llvm/CodeGen/GlobalISel/CallLowering.h | 4 + .../llvm/CodeGen/GlobalISel/LegalizerInfo.h | 35 +- llvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h | 6 +- llvm/include/llvm/IR/DIBuilder.h | 12 +- .../llvm/Transforms/IPO/PassManagerBuilder.h | 1 - llvm/include/llvm/module.modulemap | 1 + llvm/lib/Analysis/TargetLibraryInfo.cpp | 143 +- llvm/lib/Analysis/ValueTracking.cpp | 33 +- llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h | 23 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 69 +- llvm/lib/CodeGen/DeadMachineInstructionElim.cpp | 30 +- llvm/lib/CodeGen/GlobalISel/CallLowering.cpp | 54 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 8 + llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 84 +- llvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp | 42 +- .../RuntimeDyld/RuntimeDyldChecker.cpp | 2 +- llvm/lib/IR/AutoUpgrade.cpp | 12 +- llvm/lib/IR/Core.cpp | 12 +- llvm/lib/IR/DebugInfo.cpp | 11 + llvm/lib/MC/MCInstPrinter.cpp | 6 +- llvm/lib/Object/Object.cpp | 28 + llvm/lib/Support/TimeProfiler.cpp | 35 +- llvm/lib/Target/AArch64/AArch64CallLowering.cpp | 63 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 261 +- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 39 +- llvm/lib/Target/ARM/ARMCallLowering.cpp | 2 + llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 2 +- llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp | 6 +- llvm/lib/Target/PowerPC/PPCISelLowering.h | 4 +- llvm/lib/Target/Sparc/SparcRegisterInfo.cpp | 4 +- llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp | 196 +- llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 3 +- .../Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 3 +- llvm/lib/Target/X86/X86CallLowering.cpp | 2 + llvm/lib/Target/X86/X86InstrAVX512.td | 84 +- llvm/lib/Target/X86/X86InstrFormats.td | 21 +- llvm/lib/Target/X86/X86InstrSSE.td | 89 +- llvm/lib/Target/X86/X86RegisterInfo.td | 11 - .../Transforms/InstCombine/InstCombineAddSub.cpp | 9 +- .../Transforms/InstCombine/InstCombineCompares.cpp | 59 +- .../InstCombine/InstCombineMulDivRem.cpp | 21 +- llvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp | 11 +- llvm/test/Bitcode/upgrade-objcretainrelease.ll | 4 +- .../CodeGen/AArch64/GlobalISel/legalize-select.mir | 10 +- .../CodeGen/AArch64/GlobalISel/legalize-shift.mir | 31 + .../AArch64/GlobalISel/legalize-vector-icmp.mir | 1922 +++++++++++ .../GlobalISel/legalizer-info-validation.mir | 4 +- .../CodeGen/AArch64/GlobalISel/ret-vec-promote.ll | 16 + .../AArch64/GlobalISel/select-vector-icmp.mir | 3350 ++++++++++++++++++++ .../AArch64/GlobalISel/select-vector-shift.mir | 120 + .../CodeGen/AArch64/GlobalISel/vec-s16-param.ll | 28 + llvm/test/CodeGen/AArch64/tbz-tbnz.ll | 21 + llvm/test/CodeGen/AMDGPU/bswap.ll | 98 +- .../test/CodeGen/AMDGPU/dce-disjoint-intervals.mir | 38 + .../CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll | 5 +- .../test/CodeGen/ARM/GlobalISel/arm-unsupported.ll | 2 +- llvm/test/CodeGen/SPARC/fp128.ll | 23 + llvm/test/CodeGen/SystemZ/int-ssub-07.ll | 6 +- llvm/test/CodeGen/X86/avx512-mask-op.ll | 27 +- llvm/test/CodeGen/X86/sub-with-overflow.ll | 3 +- llvm/test/CodeGen/X86/urem-seteq-vec-nonsplat.ll | 96 +- llvm/test/CodeGen/X86/xaluo.ll | 29 +- llvm/test/MC/X86/AVX-32.s | 4 + llvm/test/MC/X86/AVX512F_SCALAR-32.s | 1392 ++++---- llvm/test/MC/X86/AVX512F_SCALAR-64.s | 176 +- llvm/test/MC/X86/x86_64-avx-encoding.s | 104 + llvm/test/MC/X86/x86_errors.s | 12 + llvm/test/Transforms/InstCombine/and2.ll | 2 +- llvm/test/Transforms/InstCombine/div.ll | 185 +- llvm/test/Transforms/InstCombine/icmp-add.ll | 2 +- llvm/test/Transforms/InstCombine/minmax-fold.ll | 2 +- .../Transforms/InstCombine/sadd-with-overflow.ll | 3 +- .../Transforms/InstCombine/saturating-add-sub.ll | 10 +- llvm/test/Transforms/InstCombine/sdiv-1.ll | 39 +- .../Transforms/InstCombine/sdiv-canonicalize.ll | 11 + .../Transforms/InstCombine/ssub-with-overflow.ll | 6 +- llvm/test/Transforms/InstCombine/sub.ll | 4 +- llvm/test/Transforms/InstCombine/with_overflow.ll | 79 + .../Transforms/ObjCARC/contract-marker-funclet.ll | 5 +- llvm/test/Transforms/ObjCARC/contract-marker.ll | 4 +- llvm/test/Transforms/ObjCARC/contract-testcases.ll | 4 +- llvm/tools/llvm-c-test/object.c | 52 +- llvm/tools/llvm-objdump/llvm-objdump.cpp | 10 +- llvm/tools/llvm-rtdyld/llvm-rtdyld.cpp | 1 + llvm/tools/opt/opt.cpp | 6 - llvm/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp | 57 +- llvm/utils/TableGen/X86RecognizableInstr.cpp | 32 +- llvm/utils/TableGen/X86RecognizableInstr.h | 10 +- llvm/utils/gn/build/BUILD.gn | 4 +- pstl/CMakeLists.txt | 42 +- pstl/{ => cmake}/ParallelSTLConfig.cmake.in | 8 +- 175 files changed, 9594 insertions(+), 2798 deletions(-) create mode 100644 clang/test/CodeGen/riscv32-ilp32-abi.c create mode 100644 clang/test/CodeGen/riscv32-ilp32-ilp32f-abi.c rename clang/test/CodeGen/{riscv32-abi.c => riscv32-ilp32-ilp32f-ilp32d-abi.c} (95%) create mode 100644 clang/test/CodeGen/riscv64-lp64-abi.c create mode 100644 clang/test/CodeGen/riscv64-lp64-lp64f-abi.c rename clang/test/CodeGen/{riscv64-abi.c => riscv64-lp64-lp64f-lp64d-abi.c} (98%) create mode 100644 compiler-rt/lib/scudo/standalone/flags.cc create mode 100644 compiler-rt/lib/scudo/standalone/flags.h create mode 100644 compiler-rt/lib/scudo/standalone/flags.inc create mode 100644 compiler-rt/lib/scudo/standalone/flags_parser.cc create mode 100644 compiler-rt/lib/scudo/standalone/flags_parser.h create mode 100644 compiler-rt/lib/scudo/standalone/interface.h create mode 100644 compiler-rt/lib/scudo/standalone/tests/flags_test.cc create mode 100644 lld/test/ELF/riscv-branch.s delete mode 100644 lld/test/ELF/riscv-branch.test create mode 100644 lld/test/ELF/riscv-call.s delete mode 100644 lld/test/ELF/riscv-call.test create mode 100644 lld/test/ELF/riscv-hi20-lo12.s delete mode 100644 lld/test/ELF/riscv-hi20-lo12.test delete mode 100644 lld/test/ELF/riscv-jal-error.test create mode 100644 lld/test/ELF/riscv-jal.s delete mode 100644 lld/test/ELF/riscv-jal.test create mode 100644 lld/test/ELF/riscv-pcrel-hilo.s delete mode 100644 lld/test/ELF/riscv-pcrel-hilo.test create mode 100644 llvm/include/llvm/Analysis/VecFuncs.def create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-icmp.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/select-vector-icmp.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/vec-s16-param.ll create mode 100644 llvm/test/CodeGen/AMDGPU/dce-disjoint-intervals.mir rename pstl/{ => cmake}/ParallelSTLConfig.cmake.in (71%)