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from 9c1ed63e4c6 [PATCH] [RISC-V] Fix shift type for RVV interleaved stepped [...] new 81d738275f4 RISC-V: testsuite: Skip tests providing -march/-mcpu for IL [...]
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Summary of changes: gcc/testsuite/gcc.target/riscv/mcpu-xt-c908.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-xt-c908v.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-xt-c910.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-xt-c910v2.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-xt-c920.c | 2 +- gcc/testsuite/gcc.target/riscv/mcpu-xt-c920v2.c | 2 +- gcc/testsuite/gcc.target/riscv/pr118241.c | 2 +- gcc/testsuite/gcc.target/riscv/pr120223.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/base/pr119164.c | 2 +- 9 files changed, 9 insertions(+), 9 deletions(-)