This is an automated email from the git hooks/post-receive script.
unknown user pushed a change to branch master in repository llvm.
from 47eab8f7fa1 [DAGCombine] Cleanup visitEXTRACT_SUBVECTOR. NFCI. new 09f8a0f6a0c [AMDGPU] gfx1010 VOP3 and VOP3P implementation new 05a31451d24 [AArch64][GlobalISel] Select G_BSWAP for vectors of s32 and s64 new 4db70c21dc6 [X86][AVX] Fold extract_subvector(broadcast(x)) -> broadcas [...]
The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: lib/Target/AArch64/AArch64InstructionSelector.cpp | 37 +++ lib/Target/AArch64/AArch64LegalizerInfo.cpp | 2 +- lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 9 + lib/Target/AMDGPU/SIInstrInfo.cpp | 2 + lib/Target/AMDGPU/VOP3Instructions.td | 338 ++++++++++++++------- lib/Target/AMDGPU/VOP3PInstructions.td | 34 +++ lib/Target/X86/X86ISelLowering.cpp | 7 + test/CodeGen/AArch64/GlobalISel/select-bswap.mir | 76 ++++- test/CodeGen/AArch64/arm64-rev.ll | 4 + test/CodeGen/AMDGPU/preserve-hi16.ll | 96 ++++++ test/CodeGen/X86/avx512-hadd-hsub.ll | 6 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 2 +- test/CodeGen/X86/vector-fshl-rot-256.ll | 14 +- test/CodeGen/X86/vector-fshl-rot-512.ll | 16 +- test/CodeGen/X86/vector-fshr-rot-256.ll | 14 +- test/CodeGen/X86/vector-fshr-rot-512.ll | 16 +- test/CodeGen/X86/vector-rotate-256.ll | 12 +- test/CodeGen/X86/vector-rotate-512.ll | 8 +- test/MC/AMDGPU/reg-syntax-extra.s | 13 +- 19 files changed, 550 insertions(+), 156 deletions(-) create mode 100644 test/CodeGen/AMDGPU/preserve-hi16.ll