This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-project.
from 1bf0c993758 [ValueTracking][SVE] Fix isGEPKnownNonNull for scalable vector. adds 5267f5e6b4c [mlir] Add a hook to PatternRewriter to allow for patterns [...] adds 586565c514e [InstCombine] add tests for bool math; NFC adds be9e3d94165 [InstCombine] reduce demand-limited bool math to logic, part 2 adds 661c950630f [NFC][Attr TableGen] Emit Spelling Enum for Attr types if there >1 adds 768ead0a6ca [libc] Add a new rule `add_object`. adds 3d9e6c42f8c [libc++] Use env to set the tool's environment on Darwin adds 080dd10f7df Move RDF from Hexagon to Codegen adds 5555c04ba9f [gn build] Port 080dd10f7df adds 526c51e6fdc [DwarfDebug] Fix an assertion error when emitting call site [...] adds 51b78a3e06d [libc++] Bugfix to std::binomial_distribution<int> adds 2bd1ca28c1f [ELF][test] Delete unneeded --no-threads adds 17566573b29 [libc] Resolve race condition in sub-process test runner. adds a72ae99cf9d [SCCP] Split up callsite handling, only propagate result on [...] adds c48442c9f38 PR45207: Fix crash if constrained-type-specifier annotation [...] adds 36b8d02c8df [pstl] A hot fix for exclusive_scan (+ lost enable_if in de [...] adds 83989e69415 Don't call anyone lazy in the documentation. adds 1458bb92dff [lit] NFC: Fix typo in log statement adds c45eaeabb77 [Clang] Undef attribute for global variables adds 68224c19522 [TargetLowering] Only demand a rotation's modulo amount bits adds d177c36e5c4 Add some libc++ revisions to .git-blame-ignore-revs adds 7aa28995e87 [lldb/PlatformDarwin] Be more robust in computing the SDK p [...] adds 6a38e0e4f51 [MC] Recalculate fragment offsets after relaxation adds a4ef2a71d38 [libc++] Move some misplaced compile-time flags adds 9a65d683e02 [mlir] Add target for Shape dialect adds a2920c4ea99 [codegen] Fix one more case where `getGlobalDecl` should be [...] adds 31b7f0ed6a9 [clangd] Extend findTarget()'s dependent name heuristic to [...] adds 1d19b153955 Fix arm build broken by D74361 by dropping align from filec [...] adds 363dd3f394b [mlir][NFC] Rename QuantOps to Quant adds 4d60f47b082 [mlir][NFC] Renamed VectorOps to Vector adds 3829d85cc61 [lldb/PlatformDarwin] Return POSIX path from FindXcodeConte [...] adds cc691f3384c Disable loader-uninitialized tests on Windows adds 68f163df0ec [AMDGPU] Print DWARF register numbers in AMDGPUInstPrinter adds a11b3304188 [lldb/Bindings] Check that process isn't None before callin [...] adds c9b454a1b7e AMDGPU/GlobalISel: Fix verifier errors on image atomics adds f2f8bdc2b16 Fix `-Wunused-variable` warning. NFC. adds a9e05d5711a [libc] Add AOR testing dependencies for buildbot workers. adds 4e0fe038f43 Revert "Avoid emitting unreachable SP adjustments after `throw`" adds ab2dcff309f Support repeated machine outlining adds 7b166d51823 Revert "Support repeated machine outlining" adds 7ca473a27bd [MLIR] Add support for out of tree external projects using MLIR adds 2fae7878d55 [mlir][Vector] Mostly-NFC - Restructure options for lowerin [...] adds 3145427dd73 [mlir][NFC] Replace all usages of PatternMatchResult with L [...] adds bd0ca2627cf [mlir] Update DRR patterns to notify the rewriter why a pat [...] adds d577193c0f7 [DAGCombine] Respect the uses when combine FMA for a*b+/-c*d adds e7a811b3193 PR45133: Don't crash if the active member of a union change [...] adds 34d0d6ba74f [mlir][DialectConversion] Print the operation being legaliz [...] adds 9bca8fc4cf5 Revert "AMDGPU/GlobalISel: Fully handle 0 dmask case during [...] adds 4d35055635a [libc] Add sigaction adds 974d649f8ea CET for Exception Handle adds c3df69faa03 [Alignment][NFC] Deprecate getTransientStackAlignment adds bd763e2cf7c [clang] Fix crash on visiting null nestedNameSpecifier. adds ef56b55e129 [NFC][ARM] Add thumb triple to test adds 5672ae8d868 [SCCP] Use constant ranges for select, if cond is overdefined. adds cda2b0769f5 [InstCombine][X86] Tests for variable but in-range per-elem [...] adds 8d019cda851 Fix ac1d23ed7de01fb3 interaction with gold plugin adds 28c5d97beec [ARM,MVE] Add intrinsics and isel for MVE integer VMLA. adds 928776de923 [ARM,MVE] Add intrinsics for the VQDMLAH family. adds c5b81466c2b Reland D75470 [SVE] Auto-generate builtins and header for svld1. adds f4e495a18e8 [InstCombine][X86] simplifyX86varShift - convert variable i [...] adds 0db7244295b [SCCP] Precommit some additional tests for integer ranges. adds a0a3a9c5a83 [DebugInfo] Fix multi-byte entry values in call site values adds 940ba1465b2 Fix possible assertion when using PBQP with debug info adds 4788ca450fe [AArch64][SVE] Change pointer type of nontemporal load/stor [...] adds 9bdcd9bf443 [llvm][SVE] Addressing mode for FF/NF loads. adds b09cce07c7e [OPENMP50]Codegen for detach clause. adds db31e2e1e6c [lldb/Target] Support more than 2 symbols in StackFrameRecognizer adds a8901a03544 [mlir] NFC: Fix trivial typos in documents adds 6739805e24c [ARM] Track epilogue instructions with FrameDestroy flag (NFC) adds 4cf01ed75e3 [hip] Revise `GlobalDecl` constructors. NFC. adds 2aaafaf5005 [NFC] Add missing REQUIRES clause to a test adds 96b70809d95 [NFC][PowerPC] Add a new MIR file to test if-converter pass adds d000655a8cd [Alignment][NFC] Deprecate getMaxAlignment adds 73cea83a6f5 [IPRA][ARM] Spill extra registers at -Oz adds 85334b030a6 [NFCI][SCEV] Avoid recursion in SCEVExpander::isHighCostExp [...] adds f3e297d90fc Fix build with gcc 7.5 by adding a "redundant move" adds 4d506da91c4 Fix `warning: extra ‘;’` (NFC) adds 24c2e61362a [InstCombine][X86] Add additional demandedelts style test f [...] adds 3481062bc68 [lldb] [testsuite] Enable forgotten -gsplit-dwarf for 2 testfiles adds c21866476e1 [PowerPC][AIX] Implement by-val caller arguments in a singl [...] adds ef64ba83119 [InstCombine] GEPOperator::accumulateConstantOffset does no [...] adds dd12826808f [Syntax] Build template declaration nodes adds 9f981e9adf9 Reland "[gn build] (manually) port 8b409eaba" adds 06150e8356c [ValueTracking] Add computeKnownBits DemandedElts support t [...] adds f57290ec57d [gn build] add rebase changes that should have been in 9f98 [...] adds d1a7bfca743 [AMDGPU] Fix AMDGPUUnifyDivergentExitNodes adds ea4597eef10 Reapply "AMDGPU/GlobalISel: Fully handle 0 dmask case durin [...] adds 4ea1baf6a0e AMDGPU: Initial, crude support for indirect calls adds fc2a5ef9c87 [NFC][PowerPC] Update test adds 642a424bc49 [gn build] remove a workaround that is no longer needed adds 04a309dd0be [libc] Adding memcpy implementation for x86_64 adds 881f5b5a7b2 Revert "[Syntax] Build template declaration nodes" adds e13d153c1b5 [ARM,MVE] Add intrinsics for the VQDMLAD family. adds e6a74803d4e [VPlan] Use underlying value for printing, if available. adds 0d896278c81 Support repeated machine outlining adds 1cc09dcefcc Add missing module map entry. adds 1e4ee0bfc52 [Dominators] Fixup comments in GenericDominatorTreeConstruc [...] adds dc5f9826396 [GlobalISel] Port some basic undef combines from DAGCombiner.cpp adds 9c6458ecf8c [InstSimplify] Add bitreverse/bswap vector tests new 746bd860c9c Replace get*Alignment() methods with get*Align() equivalents. new e009fad342c [PowerPC] Remove UB from PPCInstrInfo when handling rotates [...] new f8e8f0a6038 [TSan] Support pointer authentication in setjmp/longjmp int [...] new 6f79f80e6e4 [HIP] Fix duplicate clang -cc1 options on MSVC toolchain new 1010c44b4c0 [ValueTracking] Add computeKnownBits DemandedElts support t [...]
The 5 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: .git-blame-ignore-revs | 6 + clang-tools-extra/clangd/FindTarget.cpp | 6 + clang-tools-extra/clangd/unittests/XRefsTests.cpp | 8 + clang/docs/HowToSetupToolingForLLVM.rst | 2 +- clang/include/clang/AST/GlobalDecl.h | 22 +- clang/include/clang/Basic/Attr.td | 6 + clang/include/clang/Basic/AttrDocs.td | 23 + clang/include/clang/Basic/BuiltinsAArch64.def | 13 - clang/include/clang/Basic/BuiltinsSVE.def | 20 + clang/include/clang/Basic/CMakeLists.txt | 10 +- clang/include/clang/Basic/DiagnosticASTKinds.td | 3 + clang/include/clang/Basic/DiagnosticSemaKinds.td | 11 + clang/include/clang/Basic/TargetBuiltins.h | 49 ++ clang/include/clang/Basic/arm_mve.td | 61 ++ clang/include/clang/Basic/arm_sve.td | 125 ++++ clang/include/clang/module.modulemap | 1 + clang/lib/AST/DeclBase.cpp | 5 +- clang/lib/AST/Expr.cpp | 2 +- clang/lib/AST/ExprConstant.cpp | 35 +- clang/lib/AST/ItaniumMangle.cpp | 10 +- clang/lib/AST/Mangle.cpp | 2 +- clang/lib/Basic/Targets/AArch64.cpp | 4 + clang/lib/CodeGen/CGBuiltin.cpp | 105 ++-- clang/lib/CodeGen/CGDecl.cpp | 4 +- clang/lib/CodeGen/CGExpr.cpp | 4 +- clang/lib/CodeGen/CGOpenMPRuntime.cpp | 37 +- clang/lib/CodeGen/CodeGenFunction.h | 1 + clang/lib/CodeGen/CodeGenModule.cpp | 11 +- clang/lib/CodeGen/CodeGenModule.h | 3 - clang/lib/Driver/ToolChains/MSVC.cpp | 6 +- clang/lib/Parse/ParseDecl.cpp | 2 +- clang/lib/Sema/SemaDecl.cpp | 35 ++ clang/lib/Sema/SemaDeclAttr.cpp | 4 + clang/lib/Sema/SemaTemplate.cpp | 5 +- clang/test/CodeGen/arm-mve-intrinsics/ternary.c | 645 ++++++++++++++++++++ clang/test/CodeGen/arm-mve-intrinsics/vqdmlad.c | 677 +++++++++++++++++++++ clang/test/CodeGen/attr-loader-uninitialized.c | 25 + .../test/CodeGenCXX/attr-loader-uninitialized.cpp | 30 + clang/test/Driver/hip-options.hip | 5 + ...pragma-attribute-supported-attributes-list.test | 1 + clang/test/OpenMP/task_codegen.c | 12 +- clang/test/Parser/cxx-template-decl.cpp | 6 + clang/test/Sema/attr-loader-uninitialized.c | 37 ++ clang/test/Sema/attr-loader-uninitialized.cpp | 60 ++ clang/test/SemaCXX/constant-expression-cxx2a.cpp | 35 ++ clang/test/SemaTemplate/undeclared-template.cpp | 9 + clang/utils/TableGen/ClangAttrEmitter.cpp | 2 +- clang/utils/TableGen/SveEmitter.cpp | 664 +++++++++++++++++++- clang/utils/TableGen/TableGen.cpp | 18 + clang/utils/TableGen/TableGenBackends.h | 3 + compiler-rt/lib/tsan/rtl/tsan_platform_mac.cpp | 8 + libc/CMakeLists.txt | 1 + libc/cmake/modules/LLVMLibCCheckCpuFeatures.cmake | 180 +++--- libc/cmake/modules/LLVMLibCRules.cmake | 81 ++- libc/cmake/modules/cpu_features/check_avx.cpp | 8 - libc/cmake/modules/cpu_features/check_avx512f.cpp | 8 - .../modules/cpu_features/check_cpu_features.cpp.in | 29 + libc/cmake/modules/cpu_features/check_sse.cpp | 8 - libc/cmake/modules/cpu_features/check_sse2.cpp | 8 - libc/config/linux/api.td | 19 + libc/config/linux/signal.h.in | 4 + libc/lib/CMakeLists.txt | 2 + libc/spec/posix.td | 18 +- libc/spec/stdc.td | 1 - libc/src/signal/linux/CMakeLists.txt | 33 + libc/src/signal/linux/__restore.cpp | 20 + libc/src/signal/linux/sigaction.cpp | 56 ++ libc/src/signal/sigaction.h | 22 + libc/src/string/CMakeLists.txt | 63 +- libc/src/string/memcpy.cpp | 22 + libc/src/string/memcpy.h | 21 + libc/src/string/memcpy_arch_specific.h.def | 65 ++ libc/src/string/memory_utils/CMakeLists.txt | 7 +- libc/src/string/memory_utils/memcpy_utils.h | 100 +++ libc/src/string/memory_utils/utils.h | 7 +- libc/src/string/x86/CMakeLists.txt | 4 + libc/src/string/x86/memcpy_arch_specific.h.inc | 35 ++ libc/test/src/signal/CMakeLists.txt | 15 + libc/test/src/signal/sigaction_test.cpp | 66 ++ libc/test/src/string/CMakeLists.txt | 21 + libc/test/src/string/memcpy_test.cpp | 53 ++ libc/test/src/string/memory_utils/CMakeLists.txt | 7 + .../src/string/memory_utils/memcpy_utils_test.cpp | 208 +++++++ libc/test/src/string/memory_utils/utils_test.cpp | 8 + libc/utils/buildbot/Dockerfile | 3 + libc/utils/testutils/ExecuteFunctionUnix.cpp | 8 +- libcxx/include/random | 5 + .../rand.dist.bern.bin/eval.pass.cpp | 141 +++++ libcxx/utils/libcxx/test/config.py | 6 +- lld/test/ELF/arm-thumb-interwork-notfunc.s | 3 +- lld/test/ELF/linkerscript/eh-frame-merge.s | 2 +- lld/test/ELF/mips-micro-jal.s | 2 +- lldb/bindings/interface/SBAddress.i | 2 +- lldb/include/lldb/Target/StackFrameRecognizer.h | 14 +- lldb/packages/Python/lldbsuite/test/lldbutil.py | 2 +- lldb/source/Commands/CommandObjectFrame.cpp | 41 +- lldb/source/Commands/Options.td | 3 +- .../ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp | 3 +- .../Plugins/Platform/MacOSX/PlatformDarwin.cpp | 247 +++++--- .../Plugins/Platform/MacOSX/PlatformDarwin.h | 26 +- .../Plugins/Platform/MacOSX/PlatformMacOSX.cpp | 92 +-- lldb/source/Target/AssertFrameRecognizer.cpp | 24 +- lldb/source/Target/StackFrameRecognizer.cpp | 51 +- .../frame/recognizer/TestFrameRecognizer.py | 62 +- lldb/test/API/commands/frame/recognizer/main.m | 5 +- .../Shell/SymbolFile/DWARF/debug-types-basic.test | 2 +- .../SymbolFile/DWARF/debug-types-expressions.test | 8 +- lldb/unittests/Platform/PlatformDarwinTest.cpp | 63 ++ lldb/unittests/Target/StackFrameRecognizerTest.cpp | 3 +- .../LLJITWithLazyReexports.cpp | 2 +- llvm/examples/ThinLtoJIT/ThinLtoJIT.cpp | 2 +- llvm/examples/ThinLtoJIT/ThinLtoModuleIndex.cpp | 2 +- .../llvm/Analysis/ScalarEvolutionExpander.h | 16 +- llvm/include/llvm/CodeGen/DIE.h | 19 +- .../llvm/CodeGen/GlobalISel/CombinerHelper.h | 13 + llvm/include/llvm/CodeGen/MachineFrameInfo.h | 8 +- llvm/include/llvm/CodeGen/MachineRegisterInfo.h | 13 +- .../Hexagon => include/llvm/CodeGen}/RDFGraph.h | 0 .../Hexagon => include/llvm/CodeGen}/RDFLiveness.h | 0 .../llvm/CodeGen}/RDFRegisters.h | 0 llvm/include/llvm/CodeGen/TargetFrameLowering.h | 13 +- llvm/include/llvm/IR/IntrinsicsAArch64.td | 13 +- llvm/include/llvm/IR/IntrinsicsARM.td | 26 + .../llvm/Support/GenericDomTreeConstruction.h | 40 +- llvm/include/llvm/Target/GlobalISel/Combine.td | 31 +- llvm/lib/Analysis/ScalarEvolutionExpander.cpp | 48 +- llvm/lib/Analysis/ValueTracking.cpp | 31 +- llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp | 9 +- llvm/lib/CodeGen/CMakeLists.txt | 3 + llvm/lib/CodeGen/CalcSpillWeights.cpp | 9 +- llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp | 31 + llvm/lib/CodeGen/MIRPrinter.cpp | 2 +- llvm/lib/CodeGen/MachineFrameInfo.cpp | 19 +- llvm/lib/CodeGen/MachineOutliner.cpp | 47 +- llvm/lib/CodeGen/MachineRegisterInfo.cpp | 50 +- llvm/lib/CodeGen/PrologEpilogInserter.cpp | 51 +- llvm/lib/{Target/Hexagon => CodeGen}/RDFGraph.cpp | 10 +- .../{Target/Hexagon => CodeGen}/RDFLiveness.cpp | 6 +- .../{Target/Hexagon => CodeGen}/RDFRegisters.cpp | 2 +- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 25 +- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 9 + llvm/lib/CodeGen/TargetRegisterInfo.cpp | 4 +- llvm/lib/IR/DebugInfoMetadata.cpp | 4 +- llvm/lib/IR/Operator.cpp | 5 + llvm/lib/MC/MCAssembler.cpp | 8 +- llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 3 +- llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 10 + llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 4 +- llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td | 55 +- llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h | 5 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 20 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 71 +-- .../AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 17 +- .../AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp | 14 +- .../Target/AMDGPU/MCTargetDesc/AMDGPUMCAsmInfo.cpp | 1 + llvm/lib/Target/AMDGPU/SIFrameLowering.cpp | 7 +- llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 42 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 12 +- llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp | 11 +- llvm/lib/Target/ARM/ARMFrameLowering.cpp | 341 +++++++++-- llvm/lib/Target/ARM/ARMFrameLowering.h | 9 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 63 +- llvm/lib/Target/ARM/ARMISelLowering.h | 1 + llvm/lib/Target/ARM/ARMInstrMVE.td | 130 ++-- llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp | 2 +- llvm/lib/Target/ARM/Thumb1FrameLowering.cpp | 25 +- llvm/lib/Target/AVR/AVRISelLowering.cpp | 24 +- llvm/lib/Target/Hexagon/CMakeLists.txt | 3 - llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 8 +- llvm/lib/Target/Hexagon/HexagonISelDAGToDAG.cpp | 10 +- llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp | 6 +- llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp | 6 +- llvm/lib/Target/Hexagon/RDFCopy.cpp | 6 +- llvm/lib/Target/Hexagon/RDFCopy.h | 6 +- llvm/lib/Target/Hexagon/RDFDeadCode.cpp | 4 +- llvm/lib/Target/Hexagon/RDFDeadCode.h | 4 +- llvm/lib/Target/Lanai/LanaiFrameLowering.cpp | 4 +- llvm/lib/Target/Mips/MipsSEFrameLowering.cpp | 6 +- llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp | 4 +- llvm/lib/Target/NVPTX/NVPTXPrologEpilogPass.cpp | 31 +- llvm/lib/Target/PowerPC/PPCFrameLowering.cpp | 35 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 90 ++- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 2 +- llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp | 2 +- llvm/lib/Target/RISCV/RISCVFrameLowering.cpp | 14 +- llvm/lib/Target/Sparc/SparcFrameLowering.cpp | 11 +- .../WebAssembly/WebAssemblyFrameLowering.cpp | 6 +- llvm/lib/Target/X86/X86FrameLowering.cpp | 22 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 6 + llvm/lib/Target/X86/X86IndirectBranchTracking.cpp | 13 +- llvm/lib/Target/XCore/XCoreFrameLowering.cpp | 9 +- .../Transforms/InstCombine/InstCombineCalls.cpp | 22 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 31 +- llvm/lib/Transforms/Scalar/SCCP.cpp | 189 +++--- llvm/lib/Transforms/Vectorize/VPlan.cpp | 22 +- llvm/lib/Transforms/Vectorize/VPlan.h | 20 + llvm/lib/Transforms/Vectorize/VPlanValue.h | 2 + llvm/test/Analysis/CostModel/ARM/select.ll | 38 +- .../CodeGen/AArch64/GlobalISel/arm64-fallback.ll | 10 - .../GlobalISel/prelegalizercombiner-undef.mir | 168 +++++ llvm/test/CodeGen/AArch64/funnel-shift-rot.ll | 2 +- .../CodeGen/AArch64/machine-outliner-iterative.mir | 149 +++++ .../CodeGen/AArch64/sve-intrinsics-loads-ff.ll | 192 ++++++ .../CodeGen/AArch64/sve-intrinsics-loads-nf.ll | 273 +++++++++ llvm/test/CodeGen/AArch64/sve-intrinsics-loads.ll | 42 +- llvm/test/CodeGen/AArch64/sve-intrinsics-stores.ll | 42 +- ...ed-non-temporal-ldst-addressing-mode-reg-imm.ll | 76 ++- ...ed-non-temporal-ldst-addressing-mode-reg-reg.ll | 77 ++- .../legalize-llvm.amdgcn.image.atomic.dim.a16.ll | 4 +- llvm/test/CodeGen/AMDGPU/indirect-call.ll | 201 ++++++ .../CodeGen/AMDGPU/multi-divergent-exit-region.ll | 40 ++ llvm/test/CodeGen/AMDGPU/update-phi.ll | 2 - .../CodeGen/ARM/ipra-extra-spills-exceptions.ll | 149 +++++ llvm/test/CodeGen/ARM/ipra-extra-spills.ll | 406 ++++++++++++ llvm/test/CodeGen/Generic/csw-debug-assert.ll | 64 ++ llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir | 4 +- llvm/test/CodeGen/PowerPC/aix-byval-param.ll | 16 - .../CodeGen/PowerPC/aix-cc-byval-limitation1.ll | 16 + .../CodeGen/PowerPC/aix-cc-byval-limitation2.ll | 16 + .../CodeGen/PowerPC/aix-cc-byval-limitation3.ll | 16 + llvm/test/CodeGen/PowerPC/aix-cc-byval.ll | 206 +++++++ llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll | 146 +++++ .../CodeGen/PowerPC/convert-rr-to-ri-instrs.mir | 54 ++ llvm/test/CodeGen/PowerPC/fma-precision.ll | 27 +- llvm/test/CodeGen/PowerPC/ifcvt.mir | 53 ++ llvm/test/CodeGen/PowerPC/recipest.ll | 9 +- llvm/test/CodeGen/PowerPC/rotl-2.ll | 2 - llvm/test/CodeGen/SystemZ/rot-01.ll | 4 +- llvm/test/CodeGen/SystemZ/rot-02.ll | 6 +- llvm/test/CodeGen/SystemZ/shift-04.ll | 12 +- llvm/test/CodeGen/SystemZ/shift-08.ll | 12 +- llvm/test/CodeGen/Thumb2/ifcvt-minsize.ll | 13 +- llvm/test/CodeGen/Thumb2/mve-intrinsics/ternary.ll | 591 ++++++++++++++++++ llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmlad.ll | 589 ++++++++++++++++++ llvm/test/CodeGen/Thumb2/thumb2-ror.ll | 4 +- llvm/test/CodeGen/X86/combine-rotates.ll | 66 +- .../CodeGen/X86/indirect-branch-tracking-eh.ll | 31 + llvm/test/CodeGen/X86/noreturn-call-win64.ll | 58 -- llvm/test/CodeGen/X86/vector-fshl-rot-512.ll | 62 +- llvm/test/CodeGen/X86/vector-fshr-rot-512.ll | 50 +- .../AArch64/dbgcall-site-float-entry-value.ll | 49 ++ llvm/test/DebugInfo/AMDGPU/print-reg-name.s | 12 +- llvm/test/DebugInfo/AMDGPU/register-mapping.s | 37 -- .../DebugInfo/MIR/X86/callsite-stack-value.mir | 68 +++ llvm/test/MC/X86/relax-offset.s | 13 + .../InstCombine/X86/x86-vector-shifts.ll | 116 ++++ llvm/test/Transforms/InstCombine/add.ll | 126 ++++ llvm/test/Transforms/InstCombine/gep-vector.ll | 21 + llvm/test/Transforms/InstSimplify/bitreverse.ll | 51 +- llvm/test/Transforms/InstSimplify/bswap.ll | 57 +- .../PowerPC/p8-unrolling-legalize-vectors.ll | 198 +++++- .../SCCP/binaryops-range-special-cases.ll | 103 ++++ llvm/test/Transforms/SCCP/ip-ranges-select.ll | 95 +++ llvm/test/Transforms/SCCP/ipsccp-range-crashes.ll | 195 ++++++ llvm/test/Transforms/SCCP/range-and.ll | 39 +- llvm/test/Transforms/SCCP/select.ll | 30 +- llvm/tools/gold/gold-plugin.cpp | 2 +- .../Transforms/Vectorize/VPlanHCFGTest.cpp | 37 ++ llvm/unittests/Transforms/Vectorize/VPlanTest.cpp | 32 +- .../secondary/clang/include/clang/Basic/BUILD.gn | 15 + llvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn | 2 + llvm/utils/gn/secondary/clang/lib/CodeGen/BUILD.gn | 1 + llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn | 3 + .../gn/secondary/llvm/lib/Target/Hexagon/BUILD.gn | 3 - llvm/utils/lit/lit/main.py | 2 +- llvm/utils/lit/tests/selecting.py | 2 +- mlir/cmake/modules/CMakeLists.txt | 41 +- mlir/cmake/modules/MLIRConfig.cmake.in | 35 ++ mlir/docs/CreatingADialect.md | 2 +- mlir/docs/DialectConversion.md | 2 +- mlir/docs/Dialects/SPIR-V.md | 2 +- mlir/docs/Dialects/Vector.md | 6 +- mlir/docs/LangRef.md | 2 +- mlir/docs/OpDefinitions.md | 2 +- mlir/docs/QuickstartRewrites.md | 8 +- mlir/docs/RationaleLinalgDialect.md | 4 +- mlir/docs/Tutorials/Toy/Ch-3.md | 6 +- mlir/docs/Tutorials/Toy/Ch-5.md | 4 +- mlir/examples/toy/Ch3/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch4/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch5/mlir/LowerToAffineLoops.cpp | 22 +- mlir/examples/toy/Ch5/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch6/mlir/LowerToAffineLoops.cpp | 22 +- mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp | 4 +- mlir/examples/toy/Ch6/mlir/ToyCombine.cpp | 6 +- mlir/examples/toy/Ch7/mlir/LowerToAffineLoops.cpp | 22 +- mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp | 4 +- mlir/examples/toy/Ch7/mlir/ToyCombine.cpp | 6 +- .../Conversion/VectorToLLVM/ConvertVectorToLLVM.h | 2 +- mlir/include/mlir/Dialect/CMakeLists.txt | 4 +- mlir/include/mlir/Dialect/FxpMathOps/FxpMathOps.td | 2 +- .../Linalg/Transforms/LinalgTransformPatterns.td | 10 +- .../Dialect/{QuantOps => Quant}/CMakeLists.txt | 0 .../Dialect/{QuantOps => Quant}/FakeQuantSupport.h | 8 +- .../mlir/Dialect/{QuantOps => Quant}/Passes.h | 6 +- .../mlir/Dialect/{QuantOps => Quant}/QuantOps.h | 10 +- .../mlir/Dialect/{QuantOps => Quant}/QuantOps.td | 8 +- .../Dialect/{QuantOps => Quant}/QuantOpsBase.td | 6 +- .../mlir/Dialect/{QuantOps => Quant}/QuantTypes.h | 6 +- .../Dialect/{QuantOps => Quant}/QuantizeUtils.h | 6 +- .../Dialect/{QuantOps => Quant}/UniformSupport.h | 8 +- mlir/include/mlir/Dialect/SPIRV/SPIRVCastOps.td | 2 +- mlir/include/mlir/Dialect/Shape/IR/CMakeLists.txt | 6 +- mlir/include/mlir/Dialect/Shape/IR/Shape.h | 3 +- mlir/include/mlir/Dialect/Shape/IR/ShapeOps.td | 70 ++- .../Dialect/{VectorOps => Vector}/CMakeLists.txt | 0 .../Dialect/{VectorOps => Vector}/EDSC/Builders.h | 2 +- .../{VectorOps => Vector}/EDSC/Intrinsics.h | 10 +- .../mlir/Dialect/{VectorOps => Vector}/VectorOps.h | 22 +- .../Dialect/{VectorOps => Vector}/VectorOps.td | 6 +- .../VectorTransformPatterns.td | 0 .../{VectorOps => Vector}/VectorTransforms.h | 6 +- .../Dialect/{VectorOps => Vector}/VectorUtils.h | 6 +- mlir/include/mlir/IR/PatternMatch.h | 64 +- mlir/include/mlir/InitAllDialects.h | 8 +- mlir/include/mlir/InitAllPasses.h | 2 +- .../include/mlir/Quantizer/Support/Configuration.h | 2 +- mlir/include/mlir/Quantizer/Support/Metadata.h | 2 +- mlir/include/mlir/Transforms/DialectConversion.h | 24 +- .../AffineToStandard/AffineToStandard.cpp | 88 +-- .../GPUCommon/IndexIntrinsicsOpLowering.h | 6 +- .../Conversion/GPUCommon/OpToFuncCallLowering.h | 6 +- .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 12 +- .../Conversion/GPUToSPIRV/ConvertGPUToSPIRV.cpp | 60 +- mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp | 65 +- .../lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp | 14 +- .../LoopToStandard/ConvertLoopToStandard.cpp | 32 +- mlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp | 16 +- .../StandardToLLVM/ConvertStandardToLLVM.cpp | 195 +++--- .../StandardToSPIRV/ConvertStandardToSPIRV.cpp | 70 +-- .../StandardToSPIRV/LegalizeStandardForSPIRV.cpp | 24 +- mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt | 2 +- .../VectorToLLVM/ConvertVectorToLLVM.cpp | 126 ++-- .../VectorToLoops/ConvertVectorToLoops.cpp | 14 +- mlir/lib/Dialect/AffineOps/AffineOps.cpp | 16 +- mlir/lib/Dialect/CMakeLists.txt | 6 +- mlir/lib/Dialect/FxpMathOps/IR/FxpMathOps.cpp | 2 +- .../FxpMathOps/Transforms/LowerUniformRealMath.cpp | 30 +- .../FxpMathOps/Transforms/UniformKernelUtils.h | 6 +- .../Dialect/GPU/Transforms/AllReduceLowering.cpp | 6 +- mlir/lib/Dialect/Linalg/Transforms/CMakeLists.txt | 2 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 10 +- .../Dialect/Linalg/Transforms/LinalgToLoops.cpp | 22 +- .../Dialect/Linalg/Transforms/LinalgTransforms.cpp | 2 +- .../lib/Dialect/{QuantOps => Quant}/CMakeLists.txt | 0 .../Dialect/{QuantOps => Quant}/IR/QuantOps.cpp | 8 +- .../Dialect/{QuantOps => Quant}/IR/QuantTypes.cpp | 2 +- .../Dialect/{QuantOps => Quant}/IR/TypeDetail.h | 0 .../Dialect/{QuantOps => Quant}/IR/TypeParser.cpp | 4 +- .../Transforms/ConvertConst.cpp | 28 +- .../Transforms/ConvertSimQuant.cpp | 16 +- .../{QuantOps => Quant}/Utils/FakeQuantSupport.cpp | 4 +- .../{QuantOps => Quant}/Utils/QuantizeUtils.cpp | 4 +- .../{QuantOps => Quant}/Utils/UniformSupport.cpp | 2 +- mlir/lib/Dialect/SPIRV/SPIRVCanonicalization.cpp | 39 +- mlir/lib/Dialect/SPIRV/SPIRVLowering.cpp | 10 +- .../DecorateSPIRVCompositeTypeLayoutPass.cpp | 12 +- .../SPIRV/Transforms/LowerABIAttributesPass.cpp | 12 +- mlir/lib/Dialect/Shape/CMakeLists.txt | 11 +- mlir/lib/Dialect/Shape/DialectRegistration.cpp | 13 - mlir/lib/Dialect/Shape/IR/Shape.cpp | 116 ++++ mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 102 ++-- .../Dialect/{VectorOps => Vector}/CMakeLists.txt | 6 +- .../{VectorOps => Vector}/EDSC/Builders.cpp | 6 +- .../Dialect/{VectorOps => Vector}/VectorOps.cpp | 34 +- .../{VectorOps => Vector}/VectorTransforms.cpp | 180 +++--- .../Dialect/{VectorOps => Vector}/VectorUtils.cpp | 6 +- mlir/lib/IR/PatternMatch.cpp | 2 +- .../lib/Quantizer/Configurations/FxpMathConfig.cpp | 4 +- mlir/lib/Quantizer/Support/UniformConstraints.cpp | 2 +- .../Transforms/AddDefaultStatsTestPass.cpp | 4 +- .../Transforms/InferQuantizedTypesPass.cpp | 4 +- .../Transforms/RemoveInstrumentationPass.cpp | 8 +- mlir/lib/Transforms/CMakeLists.txt | 2 +- mlir/lib/Transforms/DialectConversion.cpp | 27 +- mlir/lib/Transforms/Vectorize.cpp | 4 +- .../Dialect/{QuantOps => Quant}/canonicalize.mlir | 0 .../Dialect/{QuantOps => Quant}/convert-const.mlir | 0 .../convert-fakequant-invalid.mlir | 0 .../{QuantOps => Quant}/convert-fakequant.mlir | 0 .../{QuantOps => Quant}/parse-any-invalid.mlir | 0 .../Dialect/{QuantOps => Quant}/parse-any.mlir | 0 .../{QuantOps => Quant}/parse-ops-invalid.mlir | 0 .../Dialect/{QuantOps => Quant}/parse-ops.mlir | 0 .../{QuantOps => Quant}/parse-uniform-invalid.mlir | 0 .../Dialect/{QuantOps => Quant}/parse-uniform.mlir | 0 .../Dialect/{QuantOps => Quant}/quant_region.mlir | 0 mlir/test/Dialect/Shape/ops.mlir | 58 ++ .../{VectorOps => Vector}/canonicalize.mlir | 0 .../Dialect/{VectorOps => Vector}/invalid.mlir | 0 mlir/test/Dialect/{VectorOps => Vector}/ops.mlir | 0 .../vector-contract-transforms.mlir | 2 +- .../vector-slices-transforms.mlir | 0 .../{VectorOps => Vector}/vector-transforms.mlir | 0 mlir/test/EDSC/CMakeLists.txt | 4 +- mlir/test/EDSC/builder-api-test.cpp | 4 +- .../TestVectorTransformPatterns.td | 4 +- mlir/test/lib/Dialect/SPIRV/TestAvailability.cpp | 40 +- mlir/test/lib/TestDialect/TestDialect.cpp | 6 +- mlir/test/lib/TestDialect/TestPatterns.cpp | 60 +- mlir/test/lib/Transforms/CMakeLists.txt | 2 +- mlir/test/lib/Transforms/TestVectorTransforms.cpp | 18 +- .../test/lib/Transforms/TestVectorizationUtils.cpp | 2 +- mlir/tools/mlir-tblgen/RewriterGen.cpp | 81 ++- .../{QuantOps => Quant}/QuantizationUtilsTest.cpp | 6 +- pstl/include/pstl/internal/glue_numeric_defs.h | 2 +- pstl/include/pstl/internal/glue_numeric_impl.h | 18 +- pstl/test/std/numerics/numeric.ops/scan.fail.cpp | 38 ++ 408 files changed, 12052 insertions(+), 2561 deletions(-) create mode 100644 clang/include/clang/Basic/BuiltinsSVE.def create mode 100644 clang/test/CodeGen/arm-mve-intrinsics/vqdmlad.c create mode 100644 clang/test/CodeGen/attr-loader-uninitialized.c create mode 100644 clang/test/CodeGenCXX/attr-loader-uninitialized.cpp create mode 100644 clang/test/Sema/attr-loader-uninitialized.c create mode 100644 clang/test/Sema/attr-loader-uninitialized.cpp create mode 100644 clang/test/SemaTemplate/undeclared-template.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_avx.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_avx512f.cpp create mode 100644 libc/cmake/modules/cpu_features/check_cpu_features.cpp.in delete mode 100644 libc/cmake/modules/cpu_features/check_sse.cpp delete mode 100644 libc/cmake/modules/cpu_features/check_sse2.cpp create mode 100644 libc/src/signal/linux/__restore.cpp create mode 100644 libc/src/signal/linux/sigaction.cpp create mode 100644 libc/src/signal/sigaction.h create mode 100644 libc/src/string/memcpy.cpp create mode 100644 libc/src/string/memcpy.h create mode 100644 libc/src/string/memcpy_arch_specific.h.def create mode 100644 libc/src/string/memory_utils/memcpy_utils.h create mode 100644 libc/src/string/x86/CMakeLists.txt create mode 100644 libc/src/string/x86/memcpy_arch_specific.h.inc create mode 100644 libc/test/src/signal/sigaction_test.cpp create mode 100644 libc/test/src/string/memcpy_test.cpp create mode 100644 libc/test/src/string/memory_utils/memcpy_utils_test.cpp rename llvm/{lib/Target/Hexagon => include/llvm/CodeGen}/RDFGraph.h (100%) rename llvm/{lib/Target/Hexagon => include/llvm/CodeGen}/RDFLiveness.h (100%) rename llvm/{lib/Target/Hexagon => include/llvm/CodeGen}/RDFRegisters.h (100%) rename llvm/lib/{Target/Hexagon => CodeGen}/RDFGraph.cpp (99%) rename llvm/lib/{Target/Hexagon => CodeGen}/RDFLiveness.cpp (99%) rename llvm/lib/{Target/Hexagon => CodeGen}/RDFRegisters.cpp (99%) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir create mode 100644 llvm/test/CodeGen/AArch64/machine-outliner-iterative.mir create mode 100644 llvm/test/CodeGen/AMDGPU/indirect-call.ll create mode 100644 llvm/test/CodeGen/ARM/ipra-extra-spills-exceptions.ll create mode 100644 llvm/test/CodeGen/ARM/ipra-extra-spills.ll create mode 100644 llvm/test/CodeGen/Generic/csw-debug-assert.ll delete mode 100644 llvm/test/CodeGen/PowerPC/aix-byval-param.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation1.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation2.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation3.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix-cc-byval.ll create mode 100644 llvm/test/CodeGen/PowerPC/aix64-cc-byval.ll create mode 100644 llvm/test/CodeGen/PowerPC/ifcvt.mir create mode 100644 llvm/test/CodeGen/Thumb2/mve-intrinsics/vqdmlad.ll create mode 100644 llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll create mode 100644 llvm/test/DebugInfo/AArch64/dbgcall-site-float-entry-value.ll delete mode 100644 llvm/test/DebugInfo/AMDGPU/register-mapping.s create mode 100644 llvm/test/DebugInfo/MIR/X86/callsite-stack-value.mir create mode 100644 llvm/test/MC/X86/relax-offset.s create mode 100644 llvm/test/Transforms/SCCP/binaryops-range-special-cases.ll create mode 100644 llvm/test/Transforms/SCCP/ipsccp-range-crashes.ll create mode 100644 mlir/cmake/modules/MLIRConfig.cmake.in rename mlir/include/mlir/Dialect/{QuantOps => Quant}/CMakeLists.txt (100%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/FakeQuantSupport.h (94%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/Passes.h (92%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/QuantOps.h (76%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/QuantOps.td (98%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/QuantOpsBase.td (95%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/QuantTypes.h (99%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/QuantizeUtils.h (94%) rename mlir/include/mlir/Dialect/{QuantOps => Quant}/UniformSupport.h (97%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/CMakeLists.txt (100%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/EDSC/Builders.h (97%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/EDSC/Intrinsics.h (69%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/VectorOps.h (79%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/VectorOps.td (99%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/VectorTransformPatterns.td (100%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/VectorTransforms.h (95%) rename mlir/include/mlir/Dialect/{VectorOps => Vector}/VectorUtils.h (97%) rename mlir/lib/Dialect/{QuantOps => Quant}/CMakeLists.txt (100%) rename mlir/lib/Dialect/{QuantOps => Quant}/IR/QuantOps.cpp (94%) rename mlir/lib/Dialect/{QuantOps => Quant}/IR/QuantTypes.cpp (99%) rename mlir/lib/Dialect/{QuantOps => Quant}/IR/TypeDetail.h (100%) rename mlir/lib/Dialect/{QuantOps => Quant}/IR/TypeParser.cpp (99%) rename mlir/lib/Dialect/{QuantOps => Quant}/Transforms/ConvertConst.cpp (86%) rename mlir/lib/Dialect/{QuantOps => Quant}/Transforms/ConvertSimQuant.cpp (92%) rename mlir/lib/Dialect/{QuantOps => Quant}/Utils/FakeQuantSupport.cpp (98%) rename mlir/lib/Dialect/{QuantOps => Quant}/Utils/QuantizeUtils.cpp (98%) rename mlir/lib/Dialect/{QuantOps => Quant}/Utils/UniformSupport.cpp (98%) delete mode 100644 mlir/lib/Dialect/Shape/DialectRegistration.cpp create mode 100644 mlir/lib/Dialect/Shape/IR/Shape.cpp rename mlir/lib/Dialect/{VectorOps => Vector}/CMakeLists.txt (70%) rename mlir/lib/Dialect/{VectorOps => Vector}/EDSC/Builders.cpp (91%) rename mlir/lib/Dialect/{VectorOps => Vector}/VectorOps.cpp (98%) rename mlir/lib/Dialect/{VectorOps => Vector}/VectorTransforms.cpp (92%) rename mlir/lib/Dialect/{VectorOps => Vector}/VectorUtils.cpp (98%) rename mlir/test/Dialect/{QuantOps => Quant}/canonicalize.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/convert-const.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/convert-fakequant-invalid.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/convert-fakequant.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/parse-any-invalid.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/parse-any.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/parse-ops-invalid.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/parse-ops.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/parse-uniform-invalid.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/parse-uniform.mlir (100%) rename mlir/test/Dialect/{QuantOps => Quant}/quant_region.mlir (100%) create mode 100644 mlir/test/Dialect/Shape/ops.mlir rename mlir/test/Dialect/{VectorOps => Vector}/canonicalize.mlir (100%) rename mlir/test/Dialect/{VectorOps => Vector}/invalid.mlir (100%) rename mlir/test/Dialect/{VectorOps => Vector}/ops.mlir (100%) rename mlir/test/Dialect/{VectorOps => Vector}/vector-contract-transforms.mlir (99%) rename mlir/test/Dialect/{VectorOps => Vector}/vector-slices-transforms.mlir (100%) rename mlir/test/Dialect/{VectorOps => Vector}/vector-transforms.mlir (100%) rename mlir/unittests/Dialect/{QuantOps => Quant}/QuantizationUtilsTest.cpp (97%) create mode 100644 pstl/test/std/numerics/numeric.ops/scan.fail.cpp