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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_gcc_check_bootstrap/master-aarch64-check_bootstrap in repository toolchain/ci/binutils-gdb.
from aa95b2d438 gdb: Add aliases for read_core_file_mappings callbacks adds 486f9e20e0 gdb/nat/linux-osdata.c: fix build on gcc-12 (string overfow) adds 65e4a99a26 RISC-V: Support rvv extension with released version 1.0. adds c9dcc18f8d elfedit: Add --output-abiversion option to update ABIVERSION adds 1aed145ad6 Expose the BTI BTYPE more explicitly in the registers adds 0df670bbe0 [gdb/build, s390x] Fix build after gdbarch_tdep changes adds ee9e412f14 Fix the linker script parser so that it will recognise the P [...] adds ef6379e16d Set the default DLL chracteristics to 0 for Cygwin based targets. adds 57f02370a1 aarch64: [SME] Add +sme option to -march adds 971eda7341 aarch64: [SME] Add SME instructions adds 7bb5f07c8a aarch64: [SME] Add MOV and MOVA instructions adds 1cad938de5 aarch64: [SME] Add ZERO instruction adds 01a4d08220 aarch64: [SME] Add LD1x, ST1x, LDR and STR instructions adds 3dd032c5fb aarch64: [SME] Add SME mode selection and state access instructions adds 8f1bfdb448 aarch64: [SME] Add new SME system registers adds d3de086010 aarch64: [SME] SVE2 instructions added to support SME adds bd97e65f87 Automatic date update in version.in adds da05b70e56 RISC-V: Add mininal support for z[fdq]inx adds de83e5142d RISC-V: Add instructions and operand set for z[fdq]inx adds 273a32ac65 RISC-V: Add testcases for z[fdq]inx
No new revisions were added by this update.
Summary of changes: bfd/ChangeLog | 6 + bfd/elf.c | 11 +- bfd/elfxx-riscv.c | 97 +- bfd/version.h | 2 +- binutils/NEWS | 2 + binutils/doc/binutils.texi | 12 + binutils/elfedit.c | 56 +- binutils/testsuite/binutils-all/elfedit-6.d | 15 + binutils/testsuite/binutils-all/elfedit.exp | 1 + gas/NEWS | 2 + gas/config/tc-aarch64.c | 696 +++- gas/config/tc-riscv.c | 424 ++- gas/doc/c-aarch64.texi | 6 + gas/testsuite/gas/aarch64/sme-2-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-2-illegal.l | 27 + gas/testsuite/gas/aarch64/sme-2-illegal.s | 32 + gas/testsuite/gas/aarch64/sme-2.d | 43 + gas/testsuite/gas/aarch64/sme-2.s | 52 + gas/testsuite/gas/aarch64/sme-2a.d | 29 + gas/testsuite/gas/aarch64/sme-2a.s | 26 + gas/testsuite/gas/aarch64/sme-3-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-3-illegal.l | 11 + gas/testsuite/gas/aarch64/sme-3-illegal.s | 14 + gas/testsuite/gas/aarch64/sme-3.d | 31 + gas/testsuite/gas/aarch64/sme-3.s | 31 + gas/testsuite/gas/aarch64/sme-3a.d | 29 + gas/testsuite/gas/aarch64/sme-3a.s | 26 + gas/testsuite/gas/aarch64/sme-4-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-4-illegal.l | 29 + gas/testsuite/gas/aarch64/sme-4-illegal.s | 32 + gas/testsuite/gas/aarch64/sme-4.d | 71 + gas/testsuite/gas/aarch64/sme-4.s | 95 + gas/testsuite/gas/aarch64/sme-5-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-5-illegal.l | 51 + gas/testsuite/gas/aarch64/sme-5-illegal.s | 52 + gas/testsuite/gas/aarch64/sme-5.d | 93 + gas/testsuite/gas/aarch64/sme-5.s | 101 + gas/testsuite/gas/aarch64/sme-6-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-6-illegal.l | 45 + gas/testsuite/gas/aarch64/sme-6-illegal.s | 46 + gas/testsuite/gas/aarch64/sme-6.d | 85 + gas/testsuite/gas/aarch64/sme-6.s | 86 + gas/testsuite/gas/aarch64/sme-7-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-7-illegal.l | 33 + gas/testsuite/gas/aarch64/sme-7-illegal.s | 39 + gas/testsuite/gas/aarch64/sme-7.d | 27 + gas/testsuite/gas/aarch64/sme-7.s | 27 + gas/testsuite/gas/aarch64/sme-8-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-8-illegal.l | 7 + gas/testsuite/gas/aarch64/sme-8-illegal.s | 9 + gas/testsuite/gas/aarch64/sme-8.d | 27 + gas/testsuite/gas/aarch64/sme-8.s | 28 + gas/testsuite/gas/aarch64/sme-9-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-9-illegal.l | 83 + gas/testsuite/gas/aarch64/sme-9-illegal.s | 25 + gas/testsuite/gas/aarch64/sme-9.d | 73 + gas/testsuite/gas/aarch64/sme-9.s | 86 + gas/testsuite/gas/aarch64/sme-f64.d | 31 + gas/testsuite/gas/aarch64/sme-f64.s | 32 + gas/testsuite/gas/aarch64/sme-i64.d | 117 + gas/testsuite/gas/aarch64/sme-i64.s | 135 + gas/testsuite/gas/aarch64/sme-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-illegal.l | 95 + gas/testsuite/gas/aarch64/sme-illegal.s | 117 + gas/testsuite/gas/aarch64/sme-sysreg-illegal.d | 3 + gas/testsuite/gas/aarch64/sme-sysreg-illegal.l | 3 + gas/testsuite/gas/aarch64/sme-sysreg-illegal.s | 3 + gas/testsuite/gas/aarch64/sme-sysreg.d | 29 + gas/testsuite/gas/aarch64/sme-sysreg.s | 23 + gas/testsuite/gas/aarch64/sme.d | 93 + gas/testsuite/gas/aarch64/sme.s | 123 + gas/testsuite/gas/riscv/march-imply-v.d | 6 + .../gas/riscv/priv-reg-fail-version-1p10.d | 2 +- .../gas/riscv/priv-reg-fail-version-1p11.d | 2 +- .../gas/riscv/priv-reg-fail-version-1p9p1.d | 2 +- gas/testsuite/gas/riscv/priv-reg-version-1p10.d | 7 + gas/testsuite/gas/riscv/priv-reg-version-1p11.d | 7 + gas/testsuite/gas/riscv/priv-reg-version-1p9p1.d | 7 + gas/testsuite/gas/riscv/priv-reg.s | 9 + .../gas/riscv/vector-insns-fail-zve32xf.d | 3 + .../gas/riscv/vector-insns-fail-zve32xf.l | 225 ++ gas/testsuite/gas/riscv/vector-insns-fail-zvl.d | 3 + gas/testsuite/gas/riscv/vector-insns-fail-zvl.l | 2 + gas/testsuite/gas/riscv/vector-insns-vmsgtvx.d | 29 + gas/testsuite/gas/riscv/vector-insns-vmsgtvx.s | 9 + gas/testsuite/gas/riscv/vector-insns-zero-imm.d | 17 + gas/testsuite/gas/riscv/vector-insns-zero-imm.s | 8 + gas/testsuite/gas/riscv/vector-insns.d | 1666 ++++++++++ gas/testsuite/gas/riscv/vector-insns.s | 1883 +++++++++++ gas/testsuite/gas/riscv/zdinx.d | 41 + gas/testsuite/gas/riscv/zdinx.s | 33 + gas/testsuite/gas/riscv/zfinx.d | 39 + gas/testsuite/gas/riscv/zfinx.s | 31 + gas/testsuite/gas/riscv/zqinx.d | 43 + gas/testsuite/gas/riscv/zqinx.s | 35 + gdb/features/aarch64-core.c | 1 + gdb/features/aarch64-core.xml | 3 + gdb/nat/linux-osdata.c | 13 +- gdb/s390-linux-nat.c | 2 +- include/opcode/aarch64.h | 38 +- include/opcode/riscv-opc.h | 1296 ++++++++ include/opcode/riscv.h | 61 + ld/ChangeLog | 12 + ld/emultempl/pe.em | 13 +- ld/emultempl/pep.em | 7 +- ld/ldgram.y | 4 + opcodes/aarch64-asm-2.c | 377 +-- opcodes/aarch64-asm.c | 194 ++ opcodes/aarch64-asm.h | 6 + opcodes/aarch64-dis-2.c | 3392 ++++++++++++-------- opcodes/aarch64-dis.c | 189 +- opcodes/aarch64-dis.h | 6 + opcodes/aarch64-opc-2.c | 30 +- opcodes/aarch64-opc.c | 202 +- opcodes/aarch64-opc.h | 41 +- opcodes/aarch64-tbl.h | 190 ++ opcodes/riscv-dis.c | 71 + opcodes/riscv-opc.c | 1122 ++++++- 118 files changed, 13321 insertions(+), 1820 deletions(-) create mode 100644 binutils/testsuite/binutils-all/elfedit-6.d create mode 100644 gas/testsuite/gas/aarch64/sme-2-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-2-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-2-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-2.d create mode 100644 gas/testsuite/gas/aarch64/sme-2.s create mode 100644 gas/testsuite/gas/aarch64/sme-2a.d create mode 100644 gas/testsuite/gas/aarch64/sme-2a.s create mode 100644 gas/testsuite/gas/aarch64/sme-3-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-3-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-3-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-3.d create mode 100644 gas/testsuite/gas/aarch64/sme-3.s create mode 100644 gas/testsuite/gas/aarch64/sme-3a.d create mode 100644 gas/testsuite/gas/aarch64/sme-3a.s create mode 100644 gas/testsuite/gas/aarch64/sme-4-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-4-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-4-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-4.d create mode 100644 gas/testsuite/gas/aarch64/sme-4.s create mode 100644 gas/testsuite/gas/aarch64/sme-5-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-5-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-5-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-5.d create mode 100644 gas/testsuite/gas/aarch64/sme-5.s create mode 100644 gas/testsuite/gas/aarch64/sme-6-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-6-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-6-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-6.d create mode 100644 gas/testsuite/gas/aarch64/sme-6.s create mode 100644 gas/testsuite/gas/aarch64/sme-7-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-7-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-7-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-7.d create mode 100644 gas/testsuite/gas/aarch64/sme-7.s create mode 100644 gas/testsuite/gas/aarch64/sme-8-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-8-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-8-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-8.d create mode 100644 gas/testsuite/gas/aarch64/sme-8.s create mode 100644 gas/testsuite/gas/aarch64/sme-9-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-9-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-9-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-9.d create mode 100644 gas/testsuite/gas/aarch64/sme-9.s create mode 100644 gas/testsuite/gas/aarch64/sme-f64.d create mode 100644 gas/testsuite/gas/aarch64/sme-f64.s create mode 100644 gas/testsuite/gas/aarch64/sme-i64.d create mode 100644 gas/testsuite/gas/aarch64/sme-i64.s create mode 100644 gas/testsuite/gas/aarch64/sme-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg-illegal.d create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg-illegal.l create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg-illegal.s create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg.d create mode 100644 gas/testsuite/gas/aarch64/sme-sysreg.s create mode 100644 gas/testsuite/gas/aarch64/sme.d create mode 100644 gas/testsuite/gas/aarch64/sme.s create mode 100644 gas/testsuite/gas/riscv/march-imply-v.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-fail-zve32xf.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-fail-zve32xf.l create mode 100644 gas/testsuite/gas/riscv/vector-insns-fail-zvl.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-fail-zvl.l create mode 100644 gas/testsuite/gas/riscv/vector-insns-vmsgtvx.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-vmsgtvx.s create mode 100644 gas/testsuite/gas/riscv/vector-insns-zero-imm.d create mode 100644 gas/testsuite/gas/riscv/vector-insns-zero-imm.s create mode 100644 gas/testsuite/gas/riscv/vector-insns.d create mode 100644 gas/testsuite/gas/riscv/vector-insns.s create mode 100644 gas/testsuite/gas/riscv/zdinx.d create mode 100644 gas/testsuite/gas/riscv/zdinx.s create mode 100644 gas/testsuite/gas/riscv/zfinx.d create mode 100644 gas/testsuite/gas/riscv/zfinx.s create mode 100644 gas/testsuite/gas/riscv/zqinx.d create mode 100644 gas/testsuite/gas/riscv/zqinx.s