This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-stable-allnoconfig in repository toolchain/ci/llvm-project.
from b375f28b0ec [X86][AVX] lowerShuffleAsLanePermuteAndSHUFP - only set the [...] adds 66e39067edb [X86][AVX] Use lowerShuffleAsLanePermuteAndSHUFP to lower b [...] adds 065eefcfe96 [AMDGPU] Regenerate shl shift tests adds a888277897f [MIPS] Regenerate shl/lshr shift tests adds ad201691d5c Fix "pointer is null" static analyzer warnings. NFCI. adds ebd26cc8c43 [PowerPC] Delete PPCDarwinAsmPrinter and PPCMCAsmInfoDarwin adds de797ccdd74 [NFC] Fix compilation of CrashRecoveryContext.cpp on mingw adds 7fa5290d5bd __patchable_function_entries: don't use linkage field 'uniq [...] adds 241f330d6ba [AMDGPU] Add gfx8 assembler and disassembler test cases adds 2bfee35cb86 [MC][ELF] Emit a relocation if target is defined in the sam [...] adds ada22c804cd Fix "pointer is null" static analyzer warning. NFCI. adds 54b2914accb Fix "pointer is null" static analyzer warnings. NFCI. adds 0113cf193f0 [RISCV] Check register class for AMO memory operands adds a6342c247a1 [SCEV] accurate range for addrecexpr with nuw flag adds 1ad1308b69b [clangd] Assert that the testcases in FindExplicitReference [...] adds 79a09d8bf4d [clangd] Show template arguments in type hierarchy when possible adds a10527cd373 AMDGPU/GlobalISel: Copy type when inserting readfirstlane adds 555e7ee04cb AMDGPU/GlobalISel: Don't use XEXEC class for SGPRs adds 3c868cbbda7 AMDGPU: Split test function adds 52aaf4a2757 [X86] Use SDNPOptInGlue instead of SDNPInGlue on a couple SDNodes. adds c958639098a [DWARF5][DebugInfo]: Added support for DebugInfo generation [...] adds 6d6a4590c5d [DWARF5][clang]: Added support for DebugInfo generation for [...] adds 07028b5a878 [SCEV] Follow up of D71563: addressing post commit comment. NFC. adds 9d3e78e704f [NFC] Update loop.decrement.reg intrinsic comment adds 3cad8ada494 Add zero_extendi and sign_extendi to intrinsic namespace adds ddf044290ed [lldb] Mark several tests as not dependent on debug info adds c9babcbda77 [RISCV] Collect Statistics on Compressed Instructions adds 734aa1d133f [clangd] Publish xref for macros from Index and AST. adds e45fcfc3aa5 Revert "[DWARF5][clang]: Added support for DebugInfo genera [...] adds 96b8e1ac467 [lldb] Fix eh-frame-small-fde test for changes in lld adds 10c11e4e2d0 This option allows selecting the TLS size in the local exec [...] adds add04b96538 ARMLowOverheadLoops: return earlier to avoid printing irrel [...] new b6ffa2fe125 [DebugInfo][Support] Replace DWARFDataExtractor size function new af4adb07cd1 [lldb][NFC] Use range-based for loops in IRInterpreter new bf7225888a9 [lldb] Fix lookup of symbols with the same address range bu [...] new 7f1cf7d5f65 [X86] Fix MSVC "truncation from 'int' to 'bool'" warning. NFCI. new 8f49204f26e [SelectionDAG] ComputeKnownBits - minimum leading/trailing [...] new 804dd672276 [llvm-exegesis][mips] Expand loadImmediate() new b96ec492d34 [clangd] Remove raw string literals in macros new 7efc7ca8edf [X86][SSE] Add knownbits test showing missing getValidMinim [...] new ef5debac430 [SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmo [...]
The 9 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.
Summary of changes: clang-tools-extra/clangd/XRefs.cpp | 126 +- .../clangd/unittests/FindTargetTests.cpp | 10 +- .../clangd/unittests/FormattedStringTests.cpp | 28 +- .../clangd/unittests/TypeHierarchyTests.cpp | 102 +- clang-tools-extra/clangd/unittests/XRefsTests.cpp | 49 +- clang/include/clang/Basic/CodeGenOptions.def | 3 + clang/include/clang/Basic/SourceManager.h | 1 + clang/include/clang/Driver/Options.td | 3 + clang/lib/AST/VTableBuilder.cpp | 4 +- clang/lib/CodeGen/BackendUtil.cpp | 1 + clang/lib/Driver/ToolChains/Clang.cpp | 13 + clang/lib/Frontend/CompilerInvocation.cpp | 2 + .../lib/StaticAnalyzer/Checkers/CStringChecker.cpp | 17 +- clang/test/Driver/tls-size.c | 26 + .../ELF/global-offset-table-position-aarch64.s | 2 +- lldb/include/lldb/Symbol/Symtab.h | 24 +- .../apropos/with-process/TestAproposWithProcess.py | 1 + .../command/nested_alias/TestNestedAlias.py | 1 + .../command/script_alias/TestCommandScriptAlias.py | 1 + .../calculator_mode/TestCalculatorMode.py | 1 + .../process/attach-resume/TestAttachResume.py | 1 + .../TestLaunchWithShellExpand.py | 1 + .../test/commands/statistics/basic/TestStats.py | 2 +- .../target/create-no-such-arch/TestNoSuchArch.py | 1 + .../hello_watchlocation/TestWatchLocation.py | 1 + .../hello_watchpoint/TestMyFirstWatchpoint.py | 1 + .../step_over_watchpoint/TestStepOverWatchpoint.py | 1 + .../TestWatchedVarHitWhenInScope.py | 1 + .../watchpoint_commands/TestWatchpointCommands.py | 1 + .../command/TestWatchpointCommandLLDB.py | 1 + .../command/TestWatchpointCommandPython.py | 1 + .../condition/TestWatchpointConditionCmd.py | 1 + .../watchpoint_disable/TestWatchpointDisable.py | 1 + .../watchpoint_events/TestWatchpointEvents.py | 1 + .../TestValueOfVectorVariable.py | 1 + .../TestWatchLocationWithWatchSet.py | 1 + .../lldbsuite/test/lang/c/offsetof/TestOffsetof.py | 3 +- .../test/lang/cpp/offsetof/TestOffsetofCpp.py | 3 +- .../test/python_api/debugger/TestDebuggerAPI.py | 2 +- .../TestDefaultConstructorForAPIObjects.py | 36 +- .../lldbsuite/test/python_api/event/TestEvents.py | 1 + .../findvalue_duplist/TestSBFrameFindValue.py | 1 + .../python_api/formatters/TestFormattersSBAPI.py | 1 + .../test/python_api/process/TestProcessAPI.py | 1 + .../test/python_api/process/io/TestProcessIO.py | 1 + .../python_api/rdar-12481949/Test-rdar-12481949.py | 1 + .../lldbsuite/test/python_api/sbdata/TestSBData.py | 1 + .../sbvalue_persist/TestSBValuePersist.py | 1 + .../test/python_api/signals/TestSignalsAPI.py | 1 + .../value/linked_list/TestValueAPILinkedList.py | 1 + .../python_api/watchpoint/TestSetWatchpoint.py | 1 + .../watchpoint/TestWatchpointIgnoreCount.py | 1 + .../python_api/watchpoint/TestWatchpointIter.py | 1 + .../condition/TestWatchpointConditionAPI.py | 1 + .../watchlocation/TestSetWatchlocation.py | 1 + .../watchlocation/TestTargetWatchAddress.py | 1 + lldb/source/Expression/IRInterpreter.cpp | 28 +- .../Plugins/ObjectFile/ELF/ObjectFileELF.cpp | 2 + lldb/source/Symbol/Symtab.cpp | 2 +- lldb/test/Shell/SymbolFile/Inputs/symbol-binding.s | 22 + lldb/test/Shell/SymbolFile/symbol-binding.test | 22 + lldb/test/Shell/Unwind/Inputs/eh-frame-small-fde.s | 11 +- llvm/include/llvm/CodeGen/CommandFlags.inc | 5 + .../llvm/DebugInfo/DWARF/DWARFDataExtractor.h | 2 - llvm/include/llvm/IR/Intrinsics.td | 4 +- llvm/include/llvm/Support/DataExtractor.h | 7 +- llvm/include/llvm/Target/TargetOptions.h | 3 + llvm/lib/Analysis/ScalarEvolution.cpp | 28 +- llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp | 39 +- llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp | 8 + llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 14 + llvm/lib/MC/ELFObjectWriter.cpp | 22 +- llvm/lib/Support/CrashRecoveryContext.cpp | 3 +- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 130 +- llvm/lib/Target/AArch64/AArch64ISelLowering.h | 2 + llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 11 + llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 2 + llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp | 2 +- llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp | 1 + .../Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.cpp | 27 - .../lib/Target/PowerPC/MCTargetDesc/PPCMCAsmInfo.h | 7 - .../PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp | 4 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 164 - llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 13 + llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp | 6 + llvm/lib/Target/RISCV/RISCVInstrInfoA.td | 2 +- .../Target/X86/Disassembler/X86Disassembler.cpp | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 12 + llvm/lib/Target/X86/X86InstrFPStack.td | 4 +- .../test/Analysis/ScalarEvolution/range_nw_flag.ll | 4 +- ...rm64-tls-execs.ll => arm64-tls-initial-exec.ll} | 45 - llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll | 106 + .../hoist-and-by-const-from-lshr-in-eqcmp-zero.ll | 9 +- .../hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 4 +- .../CodeGen/AArch64/patchable-function-entry.ll | 1 + .../AMDGPU/GlobalISel/inst-select-amdgcn.class.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-anyext.mir | 2 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-build-vector.mir | 10 +- .../GlobalISel/inst-select-concat-vectors.mir | 54 +- .../AMDGPU/GlobalISel/inst-select-constant.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir | 4 +- .../GlobalISel/inst-select-extract-vector-elt.mir | 32 +- .../AMDGPU/GlobalISel/inst-select-extract.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fabs.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-fceil.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-fmaxnum.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-fminnum.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir | 28 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-implicit-def.mir | 4 +- .../AMDGPU/GlobalISel/inst-select-insert.mir | 20 +- .../GlobalISel/inst-select-intrinsic-trunc.mir | 2 +- .../AMDGPU/GlobalISel/inst-select-inttoptr.mir | 7 +- .../GlobalISel/inst-select-load-constant.mir | 16 +- .../AMDGPU/GlobalISel/inst-select-load-smrd.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-merge-values.mir | 34 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-phi.mir | 6 +- .../AMDGPU/GlobalISel/inst-select-ptr-add.mir | 30 +- .../AMDGPU/GlobalISel/inst-select-ptr-mask.mir | 22 +- .../AMDGPU/GlobalISel/inst-select-ptrtoint.mir | 6 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir | 4 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir | 10 +- .../AMDGPU/GlobalISel/inst-select-trunc.mir | 8 +- .../GlobalISel/inst-select-unmerge-values.mir | 14 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir | 4 +- .../regbankselect-amdgcn.ds.gws.init.mir | 8 +- .../regbankselect-amdgcn.ds.gws.sema.v.mir | 4 +- .../regbankselect-amdgcn.ds.ordered.add.mir | 8 +- .../regbankselect-amdgcn.ds.ordered.swap.mir | 8 +- .../GlobalISel/regbankselect-amdgcn.readlane.mir | 8 +- .../GlobalISel/regbankselect-amdgcn.s.sendmsg.mir | 4 +- .../regbankselect-amdgcn.s.sendmsghalt.mir | 4 +- .../GlobalISel/regbankselect-amdgcn.writelane.mir | 14 +- llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll | 44 +- llvm/test/CodeGen/AMDGPU/shl.ll | 1712 ++++++++-- llvm/test/CodeGen/AMDGPU/shl.v2i16.ll | 9 +- llvm/test/CodeGen/AMDGPU/write_register.ll | 20 +- .../hoist-and-by-const-from-lshr-in-eqcmp-zero.ll | 64 +- .../hoist-and-by-const-from-shl-in-eqcmp-zero.ll | 27 +- llvm/test/CodeGen/BPF/shifts.ll | 2 +- llvm/test/CodeGen/Mips/llvm-ir/lshr.ll | 258 +- llvm/test/CodeGen/Mips/llvm-ir/shl.ll | 246 +- llvm/test/CodeGen/PowerPC/hello-reloc.s | 140 - llvm/test/CodeGen/X86/avx-unpack.ll | 8 +- llvm/test/CodeGen/X86/avx2-shift.ll | 10 +- llvm/test/CodeGen/X86/avx2-vector-shifts.ll | 10 +- .../CodeGen/X86/avx512-shuffles/partial_permute.ll | 98 +- llvm/test/CodeGen/X86/combine-shl.ll | 32 + .../hoist-and-by-const-from-lshr-in-eqcmp-zero.ll | 30 +- llvm/test/CodeGen/X86/subvector-broadcast.ll | 4 +- llvm/test/CodeGen/X86/vector-fshl-128.ll | 19 +- llvm/test/CodeGen/X86/vector-fshl-rot-128.ll | 21 +- llvm/test/CodeGen/X86/vector-fshr-128.ll | 15 +- llvm/test/CodeGen/X86/vector-fshr-rot-128.ll | 19 +- llvm/test/CodeGen/X86/vector-rotate-128.ll | 21 +- llvm/test/CodeGen/X86/vector-shift-lshr-128.ll | 5 +- llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll | 10 +- llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll | 129 +- llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll | 26 +- llvm/test/DebugInfo/X86/debug-info-auto-return.ll | 70 + llvm/test/MC/AMDGPU/gfx8_asm_all.s | 159 + llvm/test/MC/ARM/thumb1-branch-reloc.s | 12 +- llvm/test/MC/ARM/thumb2-beq-fixup.s | 1 + llvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt | 3405 +++++++++++++++++++- llvm/test/MC/ELF/relax.s | 33 - llvm/test/MC/ELF/target-in-same-section.s | 39 + llvm/test/MC/MachO/PowerPC/coal-sections-powerpc.s | 46 - llvm/test/MC/MachO/PowerPC/lit.local.cfg | 2 - llvm/test/MC/PowerPC/ppc-separator.s | 10 - llvm/test/MC/RISCV/rva-aliases-invalid.s | 22 + llvm/test/MC/X86/align-branch-64-2a.s | 2 +- llvm/test/MC/X86/align-branch-64-2b.s | 2 +- llvm/test/MC/X86/align-branch-64-2c.s | 2 +- llvm/test/tools/llvm-exegesis/Mips/latency-GPR64.s | 11 + llvm/tools/llvm-exegesis/lib/Mips/Target.cpp | 75 +- llvm/unittests/Support/DataExtractorTest.cpp | 9 + .../tools/llvm-exegesis/Mips/TargetTest.cpp | 65 +- mlir/include/mlir/EDSC/Intrinsics.h | 2 + mlir/test/EDSC/builder-api-test.cpp | 26 + 187 files changed, 6689 insertions(+), 2004 deletions(-) create mode 100644 clang/test/Driver/tls-size.c create mode 100644 lldb/test/Shell/SymbolFile/Inputs/symbol-binding.s create mode 100644 lldb/test/Shell/SymbolFile/symbol-binding.test rename llvm/test/CodeGen/AArch64/{arm64-tls-execs.ll => arm64-tls-initial-exec.ll} (59%) create mode 100644 llvm/test/CodeGen/AArch64/arm64-tls-local-exec.ll delete mode 100644 llvm/test/CodeGen/PowerPC/hello-reloc.s create mode 100644 llvm/test/DebugInfo/X86/debug-info-auto-return.ll delete mode 100644 llvm/test/MC/ELF/relax.s create mode 100644 llvm/test/MC/ELF/target-in-same-section.s delete mode 100644 llvm/test/MC/MachO/PowerPC/coal-sections-powerpc.s delete mode 100644 llvm/test/MC/MachO/PowerPC/lit.local.cfg delete mode 100644 llvm/test/MC/PowerPC/ppc-separator.s create mode 100644 llvm/test/tools/llvm-exegesis/Mips/latency-GPR64.s