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from cbf381f3e1a Merge trunk 444655b6f02 c++: cp_tree_equal cleanups new 0ecda01a121 Cleanup unnecessary or stale changes adds c9a02768403 arm: Add vld1_lane_bf16 + vldq_lane_bf16 intrinsics adds d65303b6994 arm: Add vst1_lane_bf16 + vstq_lane_bf16 intrinsics adds 890076673d4 arm: Add vld1_bf16 + vld1q_bf16 intrinsics adds 6170a793b7f arm: Add vst1_bf16 + vst1q_bf16 intrinsics adds 1528f34341b arm: Add vldN_lane_bf16 + vldNq_lane_bf16 intrisics adds ed62f3668b5 arm: Add vstN_lane_bf16 + vstNq_lane_bf16 intrisics adds 104ca9cfa60 Save some memory at debug stream-in time adds c229693ba6f AArch64: Add FLAG for compare intrinsics [PR94442] adds 60be12c32cb AArch64: Add FLAG for AES/SHA/SM3/SM4 intrinsics [PR94442] adds d8909271a2b libcpp: unbreak bootstrap adds 23ac7a009ec Fix PR97205 adds 6ff95a6eefb Cleanup of a merge mistake in fold-const.c adds f620e64a6f1 c++: Disable -Winit-list-lifetime in unevaluated operand [PR97632] adds c2856ceec2e c++: Tweaks for value_dependent_expression_p. adds 220929c0677 Tweaks to ranger cache adds ea7df355ca4 More Ranger cache tweaks adds d0d8a165805 middle-end/97579 - fix VEC_COND_EXPR ISEL optab query adds c5b49c3e092 tree-optimization/97623 - limit PRE hoist insertion adds abe93733a26 PR target/96342 Change field "simdlen" into poly_uint64 adds 19859d6ba6b Add setup.cfg for pytest. new 84ed8d2c889 gcc-changelog/git_email.py: Support older unidiff modules new 082a7b23909 cpplib: Fix off-by-one error new 770ec066b8b c++: Make extern-C mismatch an error new 1c8b8efa5be c++: A couple of template instantiation cleanups new cee45e49126 c++: Directly fixup deferred eh-specs new 3553c658533 aarch64: intrinsics extract half of bf16 vector new ec4d374ece6 Sync the aarch64-vx7r2 libgcc config with that of Linux new 9ba95047e47 Add dg-require-effective-target fpic to gcc.target/powerpc tests new 8bd9a00f434 cpplib: EOF in pragmas new 5b01425ec20 c++: Small pt.c cleanups new f4a0e873be8 i386: Fix ix86_function_arg_regno_p to return correct SSE r [...] new 78f2f08ac8f c++: Refactor clone copying new a52bf016433 c++: using-decl instantiation new dbce8dbd1b8 Merge trunk a52bf016433 c++: using-decl instantiation
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Summary of changes: ChangeLog.modules | 14 ++ contrib/gcc-changelog/git_email.py | 5 +- contrib/gcc-changelog/setup.cfg | 2 + gcc/ChangeLog | 16 ++ gcc/cfgexpand.c | 43 +++-- gcc/cgraph.h | 6 +- gcc/config/aarch64/aarch64-simd-builtins.def | 76 +++++---- gcc/config/aarch64/aarch64-simd.md | 21 +++ gcc/config/aarch64/aarch64.c | 30 ++-- gcc/config/aarch64/arm_neon.h | 14 ++ gcc/config/arm/arm-builtins.c | 3 + gcc/config/arm/arm_neon.h | 166 ++++++++++++++++++ gcc/config/arm/arm_neon_builtins.def | 42 ++--- gcc/config/arm/iterators.md | 2 +- gcc/config/i386/i386.c | 28 ++- gcc/config/i386/i386.h | 4 +- gcc/cp/class.c | 4 +- gcc/cp/constexpr.c | 5 + gcc/cp/decl.c | 14 +- gcc/cp/init.c | 2 +- gcc/cp/pt.c | 5 +- gcc/doc/cppopts.texi | 7 - gcc/doc/invoke.texi | 5 + gcc/dwarf2out.c | 1 + gcc/fold-const.c | 5 - gcc/gengtype.c | 1 + gcc/gimple-isel.cc | 5 +- gcc/gimple-range-cache.cc | 188 +++++++++++++++------ gcc/gimple-range-cache.h | 21 ++- gcc/gimple-range.cc | 24 +-- gcc/omp-simd-clone.c | 70 +++++--- gcc/params.opt | 4 + gcc/poly-int-types.h | 8 + gcc/poly-int.h | 57 +++++++ gcc/testsuite/ChangeLog | 10 ++ gcc/testsuite/g++.dg/warn/Winit-list4.C | 15 ++ gcc/testsuite/gcc.c-torture/compile/pr97205.c | 7 + .../{bfcvtnq2-untied.c => bf16_get-be.c} | 21 ++- .../{bfcvtnq2-untied.c => bf16_get.c} | 19 ++- .../advsimd-intrinsics/vld2_lane_bf16_indices_1.c | 2 +- .../advsimd-intrinsics/vld2q_lane_bf16_indices_1.c | 2 +- .../advsimd-intrinsics/vld3_lane_bf16_indices_1.c | 2 +- .../advsimd-intrinsics/vld3q_lane_bf16_indices_1.c | 2 +- .../advsimd-intrinsics/vld4_lane_bf16_indices_1.c | 2 +- .../advsimd-intrinsics/vld4q_lane_bf16_indices_1.c | 2 +- .../advsimd-intrinsics/vst2_lane_bf16_indices_1.c | 2 +- .../advsimd-intrinsics/vst2q_lane_bf16_indices_1.c | 2 +- .../advsimd-intrinsics/vst3_lane_bf16_indices_1.c | 2 +- .../advsimd-intrinsics/vst3q_lane_bf16_indices_1.c | 2 +- .../advsimd-intrinsics/vst4_lane_bf16_indices_1.c | 2 +- .../advsimd-intrinsics/vst4q_lane_bf16_indices_1.c | 2 +- gcc/testsuite/gcc.target/arm/simd/vld1_bf16_1.c | 29 ++++ .../gcc.target/arm/simd/vld1_lane_bf16_1.c | 21 +++ .../gcc.target/arm/simd/vld1_lane_bf16_indices_1.c | 17 ++ .../arm/simd/vld1q_lane_bf16_indices_1.c | 17 ++ .../gcc.target/arm/simd/vldn_lane_bf16_1.c | 73 ++++++++ gcc/testsuite/gcc.target/arm/simd/vst1_bf16_1.c | 29 ++++ .../gcc.target/arm/simd/vst1_lane_bf16_1.c | 21 +++ .../gcc.target/arm/simd/vst1_lane_bf16_indices_1.c | 15 ++ .../gcc.target/arm/simd/vstn_lane_bf16_1.c | 73 ++++++++ .../arm/simd/vstq1_lane_bf16_indices_1.c | 15 ++ gcc/testsuite/gcc.target/powerpc/pr67789.c | 1 + gcc/testsuite/gcc.target/powerpc/pr83629.c | 1 + gcc/testsuite/gcc.target/powerpc/pr84112.c | 3 +- gcc/tree-ssa-pre.c | 7 +- gcc/tree-vect-stmts.c | 43 ++--- libcpp/files.c | 8 - libcpp/include/cpplib.h | 1 - libcpp/mkdeps.c | 36 ++-- libgcc/config.host | 1 + 70 files changed, 1098 insertions(+), 307 deletions(-) create mode 100644 contrib/gcc-changelog/setup.cfg create mode 100644 gcc/testsuite/g++.dg/warn/Winit-list4.C create mode 100644 gcc/testsuite/gcc.c-torture/compile/pr97205.c copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{bfcvtnq2-untied.c => bf1 [...] copy gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/{bfcvtnq2-untied.c => bf1 [...] create mode 100644 gcc/testsuite/gcc.target/arm/simd/vld1_bf16_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vld1_lane_bf16_indices_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vld1q_lane_bf16_indices_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vldn_lane_bf16_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vst1_bf16_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vst1_lane_bf16_indices_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vstn_lane_bf16_1.c create mode 100644 gcc/testsuite/gcc.target/arm/simd/vstq1_lane_bf16_indices_1.c