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from 4cff794ca18 Bail out early during gimplify_asm_expr [PR121391] new 6485b105655 RISC-V: Fix vendor intrinsic tests for disabled multilib co [...]
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Summary of changes: .../xandesvector/non-policy/non-overloaded/andes_vector.h} | 8 ++++---- .../xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c | 2 +- .../xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c | 2 +- .../rvv/xandesvector/non-policy/overloaded/andes_vector.h} | 8 ++++---- .../rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c | 2 +- .../rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c | 2 +- .../rvv/xandesvector/policy/non-overloaded/andes_vector.h} | 6 +++--- .../rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c | 2 +- .../rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c | 2 +- .../riscv/rvv/xandesvector/policy/overloaded/andes_vector.h} | 6 +++--- .../rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c | 2 +- .../rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c | 2 +- .../riscv/{riscv_vector.h => rvv/xsfvector/sifive_vector.h} | 6 +++--- .../gcc.target/riscv/rvv/xtheadvector/riscv_th_vector.h | 11 +++++++++++ .../base => gcc.target/riscv/rvv/xtheadvector}/riscv_vector.h | 0 15 files changed, 36 insertions(+), 25 deletions(-) copy gcc/testsuite/{gcc.dg/vect/costmodel/riscv/rvv/riscv_vector.h => gcc.target/r [...] copy gcc/testsuite/{gcc.dg/vect/costmodel/riscv/rvv/riscv_vector.h => gcc.target/r [...] copy gcc/testsuite/{gcc.dg/vect/costmodel/riscv/rvv/riscv_vector.h => gcc.target/r [...] copy gcc/testsuite/{gcc.dg/vect/costmodel/riscv/rvv/riscv_vector.h => gcc.target/r [...] copy gcc/testsuite/gcc.target/riscv/{riscv_vector.h => rvv/xsfvector/sifive_vector [...] create mode 100644 gcc/testsuite/gcc.target/riscv/rvv/xtheadvector/riscv_th_vector.h copy gcc/testsuite/{g++.target/riscv/rvv/base => gcc.target/riscv/rvv/xtheadvector [...]