[Tcwg-commits] [toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (42a68c9adac -> 78cb0defe9a)

17 Dec 2018


      This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig
in repository toolchain/ci/llvm-monorepo.
from  42a68c9adac [InstCombined] Add more tests for cttz/ctlz + icmp; NFC
      adds  2218c1a36d2 [InstCombine] Regenerate test checks; NFC
      adds  364b4121bf4 Revert "[InstCombine] Regenerate test checks; NFC"
      adds  4d716e0786b Clarify a few minor details.
      adds  922b1395dfc [X86] Autogenerate complete checks. NFC
      adds  1235cfe7c12 [X86] Remove truncation handling from EmitTest. Replace it  [...]
      adds  e9c3495a0ea Add a description of the similar packets defined in the gdb [...]
      adds  91c3f1a83c6 Regenerate test (merges X86+X64 cases). NFCI.
      adds  a8930e2a29c [InstCombine] Make cttz/ctlz knownbits tests more robust; NFC
      adds  8cc77c8fff1 [X86] Pull out constant splat rotation detection.
      adds  b9830b81ec3 [analyzer] Fix some expressions staying live too long. Add  [...]
      adds  8caa83ed6ec [InstCombine] Regenerate test checks; NFC
      adds  1d2eaaae29c [InstCombine] Add cttz/ctlz + select non-bitwidth tests; NFC
      adds  220c7f6ca2a [EarlyCSE] If DI can't be salvaged, mark it as unavailable.
      adds  b9fa2fabe72 [gn build] Add build files for opt and its dependency Trans [...]
      adds  8c171c58ef3 [Power9][NFC]Make pre-inc-disable case more robust
      adds  526c280e93b Speculatively re-apply "[analyzer] MoveChecker: Add checks  [...]
      adds  f9e6ce74f70 [analyzer] MoveChecker: Add an option to suppress warnings  [...]
      adds  887630dca55 [analyzer] MoveChecker: Enable by default as cplusplus.Move.
      adds  bb7c6938424 [Power9][NFC]update vabsd case for better dumping
      adds  85eb13c011b [X86] Fix bad operand lookup for cmov introduced in r349315
      adds  6b0aa3e66aa [X86] Add test case for PR39968. NFC
      adds  f46dbdd2936 [llvm-mca] Move llvm-mca library to llvm/lib/MCA.
      adds  79372b4c3b9 DebugInfo: Assume an absence of ranges or high_pc on a CU m [...]
      adds  eb82b096fa9 [Docs] Expand -fstack-protector and -fstack-protector-all
      adds  822a940c1d5 Reverting bitfield size to attempt to fix a windows buildbot
      adds  d8b871514a6 [ELF][ARM] Add support for architecture v6m thunks
      adds  344f393ab2a [AArch64] Re-run load/store optimizer after aggressive tail [...]
      adds  7925cc61248 [AArch64][libunwind] Unwinding support for return address s [...]
      adds  5e1c4a0df57 Revert rC349281 '[analyzer][MallocChecker][NFC] Document an [...]
      adds  efd6a9fa48a Revert rCTE349288 'Fix a lit test failure after MallocCheck [...]
      adds  ef8fb2ca7eb Fix "enumeral mismatch in conditional expression" gcc7 warn [...]
      adds  07b8f137f5c Fix "enumeral mismatch in conditional expression" gcc7 warn [...]
      adds  f68ce4dda7e Revert rC349281 '[analyzer][MallocChecker][NFC] Document an [...]
      adds  6aa84cf44da [clangd] Only reduce priority of a thread for indexing.
      adds  cb89eba52cb [MIPS GlobalISel] Lower G_UADDE and narrowScalar G_ADD
      adds  79dfad91f71 [AggressiveInstCombine] add test for rotate insertion point; NFC
      adds  4e5c2ac3397 [clangd] Change diskbackedstorage to be atomic
      adds  97e75290728 [ASTImporter] Fix redecl chain of classes and class templates
      adds  ceee07edc21 Regenerate test in prep for SimplifyDemandedBits improvements.
      adds  f9003ddad8f [ASTImporter] Add importer specific lookup
      adds  b9256d3e369 [MCA] Don't assume that createMCInstrAnalysis() always retu [...]
      adds  dd76b25e40f Revert "DebugInfo: Assume an absence of ranges or high_pc o [...]
      adds  ce6c13e638a [MCA] Add support for BeginGroup/EndGroup.
      adds  311fd2b640c ARM: use acquire/release instruction variants when available.
      adds  01cbbbcd752 [MIPS GlobalISel] Remove switch statement (fix r349346 for MSVC)
      adds  3313b6f4b86 Build ASTImporterTest.cpp with /bigobj on MSVC builds to ke [...]
      adds  6920f81f3f8 [libcxx] Speeding up partition_point/lower_bound/upper_bound
      adds  5957a70a2d3 [MS Demangler] Add a helper function to print a Node as a string.
      adds  c540e233490 [Clang AST Context] Add a few helper functions.
      adds  3f9f2e11716 [PDB] Add some helper functions for working with scopes.
      adds  5784aa55a20 [CodeComplete] Fix test failure on different host and targe [...]
      adds  8b7a6e99759 Add missing include file.
      adds  dd8ec2d89c4 Expect Clang diagnostics in std::launder test
      adds  6d8d5ed352a FastIsel: take care to update iterators when removing instr [...]
      adds  07a262c5472 Make crashlog.py work when a .dSYM is present, but a binary [...]
      adds  975edaf725b Make crashlog.py work or binaries with spaces in their names
      adds  18a04fb1b8a [AMDGPU][MC][DOC] Updated AMD GPU assembler description
      adds  ebffece6aa2 [InstSimplify] Simplify saturating add/sub + icmp
       new  c7dce0c41ba [AMDGPU][MC][DOC] A fix for build failure in r349368
       new  78cb0defe9a [Driver] Fix --repl argument.
The 2 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 clang-tools-extra/clangd/Threading.cpp             |    4 +-
 clang-tools-extra/clangd/Threading.h               |    2 +-
 clang-tools-extra/clangd/index/Background.cpp      |   86 +-
 clang-tools-extra/clangd/index/Background.h        |    5 +-
 .../clangd/index/BackgroundIndexStorage.cpp        |   41 +-
 .../test/clang-tidy/static-analyzer.cpp            |    2 +-
 clang/docs/LibASTMatchersReference.html            |   10 +
 clang/docs/analyzer/DebugChecks.rst                |    5 +-
 clang/include/clang/AST/ASTImporter.h              |   25 +-
 clang/include/clang/AST/ASTImporterLookupTable.h   |   75 +
 clang/include/clang/ASTMatchers/ASTMatchers.h      |   11 +
 .../clang/Analysis/Analyses/LiveVariables.h        |    8 +-
 clang/include/clang/CrossTU/CrossTranslationUnit.h |    3 +
 clang/include/clang/Driver/Options.td              |   13 +-
 .../clang/StaticAnalyzer/Checkers/Checkers.td      |    9 +-
 clang/lib/AST/ASTImporter.cpp                      |  509 +++--
 clang/lib/AST/ASTImporterLookupTable.cpp           |  129 ++
 clang/lib/AST/CMakeLists.txt                       |    1 +
 clang/lib/AST/DeclBase.cpp                         |    4 +-
 clang/lib/ASTMatchers/ASTMatchersInternal.cpp      |    2 +
 clang/lib/ASTMatchers/Dynamic/Registry.cpp         |    1 +
 clang/lib/Analysis/LiveVariables.cpp               |   48 +
 clang/lib/CrossTU/CrossTranslationUnit.cpp         |   13 +-
 clang/lib/Frontend/ASTMerge.cpp                    |   11 +-
 clang/lib/Sema/SemaDeclAttr.cpp                    |    7 +-
 clang/lib/Sema/SemaDeclCXX.cpp                     |   34 +-
 clang/lib/Sema/SemaStmtAttr.cpp                    |    7 +-
 .../lib/StaticAnalyzer/Checkers/DebugCheckers.cpp  |   19 +
 .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp  | 1148 ++++-------
 clang/lib/StaticAnalyzer/Checkers/MoveChecker.cpp  |  230 ++-
 .../expected-plists/NewDelete-path-notes.cpp.plist |   20 +-
 .../Malloc+MismatchedDeallocator+NewDelete.cpp     |    2 +-
 clang/test/Analysis/NewDelete-checker-test.cpp     |    2 +-
 clang/test/Analysis/NewDelete-path-notes.cpp       |    8 +-
 clang/test/Analysis/dtor.cpp                       |    2 +-
 clang/test/Analysis/live-stmts.cpp                 |  167 ++
 clang/test/Analysis/mismatched-iterator.cpp        |    5 +-
 clang/test/Analysis/use-after-move.cpp             |  540 +++--
 clang/unittests/AST/ASTImporterTest.cpp            | 1301 ++++++++++--
 clang/unittests/AST/CMakeLists.txt                 |    4 +
 clang/unittests/AST/StructuralEquivalenceTest.cpp  |   71 +
 clang/unittests/Sema/CodeCompleteTest.cpp          |   27 +-
 .../algorithms.partition_point.bench.cpp           |  124 ++
 libcxx/include/algorithm                           |   34 +-
 .../test/libcxx/algorithms/half_positive.pass.cpp  |   56 +
 .../ptr.launder/launder.types.fail.cpp             |    2 +
 libunwind/src/DwarfInstructions.hpp                |   10 +-
 libunwind/src/DwarfParser.hpp                      |   11 +
 lld/ELF/Thunks.cpp                                 |   97 +-
 lld/test/ELF/arm-thumb-nov6thunk.s                 |   39 -
 lld/test/ELF/arm-thumb-thunk-v6m.s                 |   61 +
 lldb/docs/lldb-platform-packets.txt                |   36 +-
 lldb/examples/python/crashlog.py                   |   83 +-
 lldb/include/lldb/Symbol/ClangASTContext.h         |    4 +
 lldb/include/lldb/Symbol/ClangUtil.h               |    6 +
 lldb/lit/Python/crashlog.test                      |   99 +
 lldb/source/Symbol/ClangASTContext.cpp             |   31 +-
 lldb/source/Symbol/ClangUtil.cpp                   |    8 +
 lldb/tools/driver/Driver.cpp                       |   11 +-
 lldb/tools/driver/Options.td                       |   16 +-
 llvm/CODE_OWNERS.TXT                               |    2 +-
 llvm/docs/AMDGPU/AMDGPUAsmGFX7.rst                 | 1411 +++++++++++++
 llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst                 | 1846 +++++++++++++++++
 llvm/docs/AMDGPU/AMDGPUAsmGFX9.rst                 | 2102 ++++++++++++++++++++
 llvm/docs/AMDGPU/gfx7_addr_buf.rst                 |   24 +
 llvm/docs/AMDGPU/gfx7_addr_ds.rst                  |   17 +
 llvm/docs/AMDGPU/gfx7_addr_flat.rst                |   17 +
 llvm/docs/AMDGPU/gfx7_addr_mimg.rst                |   21 +
 llvm/docs/AMDGPU/gfx7_attr.rst                     |   30 +
 llvm/docs/AMDGPU/gfx7_base_smem_addr.rst           |   17 +
 llvm/docs/AMDGPU/gfx7_base_smem_buf.rst            |   17 +
 llvm/docs/AMDGPU/gfx7_bimm16.rst                   |   14 +
 llvm/docs/AMDGPU/gfx7_bimm32.rst                   |   14 +
 llvm/docs/AMDGPU/gfx7_data_buf_atomic128.rst       |   21 +
 llvm/docs/AMDGPU/gfx7_data_buf_atomic32.rst        |   21 +
 llvm/docs/AMDGPU/gfx7_data_buf_atomic64.rst        |   21 +
 llvm/docs/AMDGPU/gfx7_data_mimg_atomic_cmp.rst     |   27 +
 llvm/docs/AMDGPU/gfx7_data_mimg_atomic_reg.rst     |   26 +
 llvm/docs/AMDGPU/gfx7_data_mimg_store.rst          |   18 +
 llvm/docs/AMDGPU/gfx7_dst_buf_128.rst              |   17 +
 llvm/docs/AMDGPU/gfx7_dst_buf_64.rst               |   17 +
 llvm/docs/AMDGPU/gfx7_dst_buf_96.rst               |   17 +
 llvm/docs/AMDGPU/gfx7_dst_buf_lds.rst              |   21 +
 llvm/docs/AMDGPU/gfx7_dst_flat_atomic32.rst        |   19 +
 llvm/docs/AMDGPU/gfx7_dst_flat_atomic64.rst        |   19 +
 llvm/docs/AMDGPU/gfx7_dst_mimg_gather4.rst         |   17 +
 llvm/docs/AMDGPU/gfx7_dst_mimg_regular.rst         |   20 +
 llvm/docs/AMDGPU/gfx7_fimm32.rst                   |   14 +
 llvm/docs/AMDGPU/gfx7_hwreg.rst                    |   60 +
 llvm/docs/AMDGPU/gfx7_label.rst                    |   30 +
 llvm/docs/AMDGPU/gfx7_mod.rst                      |   14 +
 llvm/docs/AMDGPU/gfx7_msg.rst                      |   72 +
 llvm/docs/AMDGPU/gfx7_offset_buf.rst               |   17 +
 llvm/docs/AMDGPU/gfx7_offset_smem.rst              |   21 +
 llvm/docs/AMDGPU/gfx7_opt.rst                      |   14 +
 llvm/docs/AMDGPU/gfx7_param.rst                    |   22 +
 llvm/docs/AMDGPU/gfx7_ret.rst                      |   14 +
 llvm/docs/AMDGPU/gfx7_rsrc_buf.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_rsrc_mimg.rst                |   17 +
 llvm/docs/AMDGPU/gfx7_samp_mimg.rst                |   17 +
 llvm/docs/AMDGPU/gfx7_sdst128_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx7_sdst256_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx7_sdst32_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_sdst32_1.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_sdst32_2.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_sdst512_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx7_sdst64_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_sdst64_1.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_simm16.rst                   |   14 +
 llvm/docs/AMDGPU/gfx7_src32_0.rst                  |   17 +
 llvm/docs/AMDGPU/gfx7_src32_1.rst                  |   17 +
 llvm/docs/AMDGPU/gfx7_src32_2.rst                  |   17 +
 llvm/docs/AMDGPU/gfx7_src32_3.rst                  |   17 +
 llvm/docs/AMDGPU/gfx7_src64_0.rst                  |   17 +
 llvm/docs/AMDGPU/gfx7_src64_1.rst                  |   17 +
 llvm/docs/AMDGPU/gfx7_src64_2.rst                  |   17 +
 llvm/docs/AMDGPU/gfx7_src_exp.rst                  |   28 +
 llvm/docs/AMDGPU/gfx7_ssrc32_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_ssrc32_1.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_ssrc32_2.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_ssrc32_3.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_ssrc32_4.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_ssrc64_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_ssrc64_1.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_ssrc64_2.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_ssrc64_3.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_tgt.rst                      |   24 +
 llvm/docs/AMDGPU/gfx7_type_dev.rst                 |   14 +
 llvm/docs/AMDGPU/gfx7_uimm16.rst                   |   14 +
 llvm/docs/AMDGPU/gfx7_vcc_64.rst                   |   17 +
 llvm/docs/AMDGPU/gfx7_vdata128_0.rst               |   17 +
 llvm/docs/AMDGPU/gfx7_vdata32_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx7_vdata64_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx7_vdata96_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx7_vdst128_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx7_vdst32_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_vdst64_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_vdst96_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_vsrc128_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx7_vsrc32_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_vsrc64_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx7_waitcnt.rst                  |   55 +
 llvm/docs/AMDGPU/gfx8_addr_buf.rst                 |   22 +
 llvm/docs/AMDGPU/gfx8_addr_ds.rst                  |   17 +
 llvm/docs/AMDGPU/gfx8_addr_flat.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_addr_mimg.rst                |   21 +
 llvm/docs/AMDGPU/gfx8_attr.rst                     |   30 +
 llvm/docs/AMDGPU/gfx8_base_smem_addr.rst           |   17 +
 llvm/docs/AMDGPU/gfx8_base_smem_buf.rst            |   17 +
 llvm/docs/AMDGPU/gfx8_bimm16.rst                   |   14 +
 llvm/docs/AMDGPU/gfx8_bimm32.rst                   |   14 +
 llvm/docs/AMDGPU/gfx8_data_buf_atomic128.rst       |   21 +
 llvm/docs/AMDGPU/gfx8_data_buf_atomic32.rst        |   21 +
 llvm/docs/AMDGPU/gfx8_data_buf_atomic64.rst        |   21 +
 llvm/docs/AMDGPU/gfx8_data_buf_d16_128.rst         |   20 +
 llvm/docs/AMDGPU/gfx8_data_buf_d16_32.rst          |   17 +
 llvm/docs/AMDGPU/gfx8_data_buf_d16_64.rst          |   20 +
 llvm/docs/AMDGPU/gfx8_data_buf_d16_96.rst          |   20 +
 llvm/docs/AMDGPU/gfx8_data_mimg_atomic_cmp.rst     |   27 +
 llvm/docs/AMDGPU/gfx8_data_mimg_atomic_reg.rst     |   26 +
 llvm/docs/AMDGPU/gfx8_data_mimg_store.rst          |   18 +
 llvm/docs/AMDGPU/gfx8_data_mimg_store_d16.rst      |   24 +
 llvm/docs/AMDGPU/gfx8_dst_buf_128.rst              |   17 +
 llvm/docs/AMDGPU/gfx8_dst_buf_64.rst               |   17 +
 llvm/docs/AMDGPU/gfx8_dst_buf_96.rst               |   17 +
 llvm/docs/AMDGPU/gfx8_dst_buf_d16_128.rst          |   21 +
 llvm/docs/AMDGPU/gfx8_dst_buf_d16_32.rst           |   17 +
 llvm/docs/AMDGPU/gfx8_dst_buf_d16_64.rst           |   21 +
 llvm/docs/AMDGPU/gfx8_dst_buf_d16_96.rst           |   21 +
 llvm/docs/AMDGPU/gfx8_dst_buf_lds.rst              |   21 +
 llvm/docs/AMDGPU/gfx8_dst_flat_atomic32.rst        |   19 +
 llvm/docs/AMDGPU/gfx8_dst_flat_atomic64.rst        |   19 +
 llvm/docs/AMDGPU/gfx8_dst_mimg_gather4.rst         |   26 +
 llvm/docs/AMDGPU/gfx8_dst_mimg_regular.rst         |   20 +
 llvm/docs/AMDGPU/gfx8_dst_mimg_regular_d16.rst     |   26 +
 llvm/docs/AMDGPU/gfx8_fimm16.rst                   |   14 +
 llvm/docs/AMDGPU/gfx8_fimm32.rst                   |   14 +
 llvm/docs/AMDGPU/gfx8_hwreg.rst                    |   60 +
 llvm/docs/AMDGPU/gfx8_imm4.rst                     |   25 +
 llvm/docs/AMDGPU/gfx8_label.rst                    |   30 +
 llvm/docs/AMDGPU/gfx8_mod_dpp_sdwa_abs_neg.rst     |   14 +
 llvm/docs/AMDGPU/gfx8_mod_sdwa_sext.rst            |   14 +
 llvm/docs/AMDGPU/gfx8_mod_vop3_abs_neg.rst         |   14 +
 llvm/docs/AMDGPU/gfx8_msg.rst                      |   72 +
 llvm/docs/AMDGPU/gfx8_offset_buf.rst               |   17 +
 llvm/docs/AMDGPU/gfx8_offset_smem_load.rst         |   17 +
 llvm/docs/AMDGPU/gfx8_offset_smem_store.rst        |   17 +
 llvm/docs/AMDGPU/gfx8_opt.rst                      |   14 +
 llvm/docs/AMDGPU/gfx8_param.rst                    |   22 +
 llvm/docs/AMDGPU/gfx8_perm_smem.rst                |   24 +
 llvm/docs/AMDGPU/gfx8_ret.rst                      |   14 +
 llvm/docs/AMDGPU/gfx8_rsrc_buf.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_rsrc_mimg.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_samp_mimg.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_sdata128_0.rst               |   17 +
 llvm/docs/AMDGPU/gfx8_sdata32_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_sdata64_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_sdst128_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_sdst256_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_sdst32_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_sdst32_1.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_sdst32_2.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_sdst512_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_sdst64_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_sdst64_1.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_simm16.rst                   |   14 +
 llvm/docs/AMDGPU/gfx8_src32_0.rst                  |   17 +
 llvm/docs/AMDGPU/gfx8_src32_1.rst                  |   17 +
 llvm/docs/AMDGPU/gfx8_src64_0.rst                  |   17 +
 llvm/docs/AMDGPU/gfx8_src64_1.rst                  |   17 +
 llvm/docs/AMDGPU/gfx8_src_exp.rst                  |   28 +
 llvm/docs/AMDGPU/gfx8_ssrc32_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_ssrc32_1.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_ssrc32_2.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_ssrc32_3.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_ssrc32_4.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_ssrc64_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_ssrc64_1.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_ssrc64_2.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_ssrc64_3.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_tgt.rst                      |   24 +
 llvm/docs/AMDGPU/gfx8_type_dev.rst                 |   14 +
 llvm/docs/AMDGPU/gfx8_uimm16.rst                   |   14 +
 llvm/docs/AMDGPU/gfx8_vcc_64.rst                   |   17 +
 llvm/docs/AMDGPU/gfx8_vdata128_0.rst               |   17 +
 llvm/docs/AMDGPU/gfx8_vdata32_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_vdata64_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_vdata96_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_vdst128_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_vdst32_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_vdst64_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_vdst96_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_vsrc128_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx8_vsrc32_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_vsrc64_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx8_waitcnt.rst                  |   55 +
 llvm/docs/AMDGPU/gfx9_addr_buf.rst                 |   22 +
 llvm/docs/AMDGPU/gfx9_addr_ds.rst                  |   17 +
 llvm/docs/AMDGPU/gfx9_addr_flat.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_addr_mimg.rst                |   21 +
 llvm/docs/AMDGPU/gfx9_attr.rst                     |   30 +
 llvm/docs/AMDGPU/gfx9_base_smem_addr.rst           |   17 +
 llvm/docs/AMDGPU/gfx9_base_smem_buf.rst            |   17 +
 llvm/docs/AMDGPU/gfx9_base_smem_scratch.rst        |   17 +
 llvm/docs/AMDGPU/gfx9_bimm16.rst                   |   14 +
 llvm/docs/AMDGPU/gfx9_bimm32.rst                   |   14 +
 llvm/docs/AMDGPU/gfx9_data_buf_atomic128.rst       |   21 +
 llvm/docs/AMDGPU/gfx9_data_buf_atomic32.rst        |   21 +
 llvm/docs/AMDGPU/gfx9_data_buf_atomic64.rst        |   21 +
 llvm/docs/AMDGPU/gfx9_data_mimg_atomic_cmp.rst     |   27 +
 llvm/docs/AMDGPU/gfx9_data_mimg_atomic_reg.rst     |   26 +
 llvm/docs/AMDGPU/gfx9_data_mimg_store.rst          |   18 +
 llvm/docs/AMDGPU/gfx9_data_mimg_store_d16.rst      |   21 +
 llvm/docs/AMDGPU/gfx9_data_smem_atomic128.rst      |   21 +
 llvm/docs/AMDGPU/gfx9_data_smem_atomic32.rst       |   21 +
 llvm/docs/AMDGPU/gfx9_data_smem_atomic64.rst       |   21 +
 llvm/docs/AMDGPU/gfx9_dst_buf_128.rst              |   17 +
 llvm/docs/AMDGPU/gfx9_dst_buf_32.rst               |   17 +
 llvm/docs/AMDGPU/gfx9_dst_buf_64.rst               |   17 +
 llvm/docs/AMDGPU/gfx9_dst_buf_96.rst               |   17 +
 llvm/docs/AMDGPU/gfx9_dst_buf_lds.rst              |   21 +
 llvm/docs/AMDGPU/gfx9_dst_flat_atomic32.rst        |   19 +
 llvm/docs/AMDGPU/gfx9_dst_flat_atomic64.rst        |   19 +
 llvm/docs/AMDGPU/gfx9_dst_mimg_gather4.rst         |   22 +
 llvm/docs/AMDGPU/gfx9_dst_mimg_regular.rst         |   20 +
 llvm/docs/AMDGPU/gfx9_dst_mimg_regular_d16.rst     |   22 +
 llvm/docs/AMDGPU/gfx9_fimm16.rst                   |   14 +
 llvm/docs/AMDGPU/gfx9_fimm32.rst                   |   14 +
 llvm/docs/AMDGPU/gfx9_hwreg.rst                    |   61 +
 llvm/docs/AMDGPU/gfx9_imm4.rst                     |   25 +
 llvm/docs/AMDGPU/gfx9_label.rst                    |   30 +
 llvm/docs/AMDGPU/gfx9_mad_type_dev.rst             |   17 +
 llvm/docs/AMDGPU/gfx9_mod_dpp_sdwa_abs_neg.rst     |   14 +
 llvm/docs/AMDGPU/gfx9_mod_sdwa_sext.rst            |   14 +
 llvm/docs/AMDGPU/gfx9_mod_vop3_abs_neg.rst         |   14 +
 llvm/docs/AMDGPU/gfx9_msg.rst                      |   72 +
 llvm/docs/AMDGPU/gfx9_offset_buf.rst               |   17 +
 llvm/docs/AMDGPU/gfx9_offset_smem_buf.rst          |   19 +
 llvm/docs/AMDGPU/gfx9_offset_smem_plain.rst        |   22 +
 llvm/docs/AMDGPU/gfx9_opt.rst                      |   14 +
 llvm/docs/AMDGPU/gfx9_param.rst                    |   22 +
 llvm/docs/AMDGPU/gfx9_perm_smem.rst                |   24 +
 llvm/docs/AMDGPU/gfx9_ret.rst                      |   14 +
 llvm/docs/AMDGPU/gfx9_rsrc_buf.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_rsrc_mimg.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_saddr_flat_global.rst        |   19 +
 llvm/docs/AMDGPU/gfx9_saddr_flat_scratch.rst       |   19 +
 llvm/docs/AMDGPU/gfx9_samp_mimg.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_sdata128_0.rst               |   17 +
 llvm/docs/AMDGPU/gfx9_sdata32_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_sdata64_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_sdst128_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_sdst256_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_sdst32_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_sdst32_1.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_sdst32_2.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_sdst512_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_sdst64_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_sdst64_1.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_simm16.rst                   |   14 +
 llvm/docs/AMDGPU/gfx9_src32_0.rst                  |   17 +
 llvm/docs/AMDGPU/gfx9_src32_1.rst                  |   17 +
 llvm/docs/AMDGPU/gfx9_src64_0.rst                  |   17 +
 llvm/docs/AMDGPU/gfx9_src64_1.rst                  |   17 +
 llvm/docs/AMDGPU/gfx9_src_exp.rst                  |   28 +
 llvm/docs/AMDGPU/gfx9_ssrc32_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_ssrc32_1.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_ssrc32_2.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_ssrc32_3.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_ssrc32_4.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_ssrc64_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_ssrc64_1.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_ssrc64_2.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_ssrc64_3.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_tgt.rst                      |   24 +
 llvm/docs/AMDGPU/gfx9_type_dev.rst                 |   14 +
 llvm/docs/AMDGPU/gfx9_uimm16.rst                   |   14 +
 llvm/docs/AMDGPU/gfx9_vaddr_flat_global.rst        |   22 +
 llvm/docs/AMDGPU/gfx9_vaddr_flat_scratch.rst       |   19 +
 llvm/docs/AMDGPU/gfx9_vcc_64.rst                   |   17 +
 llvm/docs/AMDGPU/gfx9_vdata128_0.rst               |   17 +
 llvm/docs/AMDGPU/gfx9_vdata32_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_vdata64_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_vdata96_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_vdst128_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_vdst32_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_vdst64_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_vdst96_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_vsrc128_0.rst                |   17 +
 llvm/docs/AMDGPU/gfx9_vsrc32_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_vsrc64_0.rst                 |   17 +
 llvm/docs/AMDGPU/gfx9_waitcnt.rst                  |   56 +
 llvm/docs/AMDGPUAsmGFX7.rst                        | 1255 ------------
 llvm/docs/AMDGPUAsmGFX8.rst                        | 1672 ----------------
 llvm/docs/AMDGPUAsmGFX9.rst                        | 1906 ------------------
 llvm/docs/AMDGPUInstructionNotation.rst            |  110 +
 llvm/docs/AMDGPUInstructionSyntax.rst              |  170 ++
 ...UOperandSyntax.rst => AMDGPUModifierSyntax.rst} |  495 +++--
 llvm/docs/AMDGPUOperandSyntax.rst                  | 1502 +++++++-------
 llvm/docs/AMDGPUUsage.rst                          |   37 +-
 .../llvm/DebugInfo/CodeView/SymbolRecordHelpers.h  |    1 +
 .../llvm/DebugInfo/PDB/Native/ModuleDebugStream.h  |    2 +
 .../include/llvm/Demangle/MicrosoftDemangleNodes.h |    2 +
 .../include => include/llvm/MCA}/Context.h         |   15 +-
 .../include => include/llvm/MCA}/HWEventListener.h |   10 +-
 .../llvm/MCA}/HardwareUnits/HardwareUnit.h         |    6 +-
 .../llvm/MCA}/HardwareUnits/LSUnit.h               |    8 +-
 .../llvm/MCA}/HardwareUnits/RegisterFile.h         |    8 +-
 .../llvm/MCA}/HardwareUnits/ResourceManager.h      |   10 +-
 .../llvm/MCA}/HardwareUnits/RetireControlUnit.h    |   10 +-
 .../llvm/MCA}/HardwareUnits/Scheduler.h            |   14 +-
 .../include => include/llvm/MCA}/InstrBuilder.h    |   14 +-
 .../include => include/llvm/MCA}/Instruction.h     |    8 +-
 .../include => include/llvm/MCA}/Pipeline.h        |   10 +-
 .../include => include/llvm/MCA}/SourceMgr.h       |    6 +-
 .../llvm/MCA}/Stages/DispatchStage.h               |   16 +-
 .../llvm/MCA}/Stages/EntryStage.h                  |   10 +-
 .../llvm/MCA}/Stages/ExecuteStage.h                |   12 +-
 .../llvm/MCA}/Stages/InstructionTables.h           |   12 +-
 .../llvm/MCA}/Stages/RetireStage.h                 |   12 +-
 .../include => include/llvm/MCA}/Stages/Stage.h    |    8 +-
 .../include => include/llvm/MCA}/Support.h         |    6 +-
 llvm/lib/Analysis/InstructionSimplify.cpp          |   66 +
 llvm/lib/CMakeLists.txt                            |    1 +
 llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp    |   18 +
 llvm/lib/CodeGen/SelectionDAG/FastISel.cpp         |    9 +
 .../lib/DebugInfo/CodeView/SymbolRecordHelpers.cpp |   34 +-
 .../lib/DebugInfo/PDB/Native/ModuleDebugStream.cpp |    7 +
 llvm/lib/Demangle/MicrosoftDemangleNodes.cpp       |    9 +
 llvm/lib/LLVMBuild.txt                             |    1 +
 .../{tools/llvm-mca/lib => lib/MCA}/CMakeLists.txt |   15 +-
 llvm/{tools/llvm-mca/lib => lib/MCA}/Context.cpp   |   16 +-
 .../llvm-mca/lib => lib/MCA}/HWEventListener.cpp   |    2 +-
 .../lib => lib/MCA}/HardwareUnits/HardwareUnit.cpp |    2 +-
 .../lib => lib/MCA}/HardwareUnits/LSUnit.cpp       |    4 +-
 .../lib => lib/MCA}/HardwareUnits/RegisterFile.cpp |    4 +-
 .../MCA}/HardwareUnits/ResourceManager.cpp         |    6 +-
 .../MCA}/HardwareUnits/RetireControlUnit.cpp       |    2 +-
 .../lib => lib/MCA}/HardwareUnits/Scheduler.cpp    |    2 +-
 .../llvm-mca/lib => lib/MCA}/InstrBuilder.cpp      |   25 +-
 .../llvm-mca/lib => lib/MCA}/Instruction.cpp       |    2 +-
 llvm/{tools/llvm-mca/lib => lib/MCA}/LLVMBuild.txt |    0
 llvm/{tools/llvm-mca/lib => lib/MCA}/Pipeline.cpp  |    4 +-
 .../lib => lib/MCA}/Stages/DispatchStage.cpp       |   14 +-
 .../llvm-mca/lib => lib/MCA}/Stages/EntryStage.cpp |    4 +-
 .../lib => lib/MCA}/Stages/ExecuteStage.cpp        |    2 +-
 .../lib => lib/MCA}/Stages/InstructionTables.cpp   |    2 +-
 .../lib => lib/MCA}/Stages/RetireStage.cpp         |    4 +-
 .../llvm-mca/lib => lib/MCA}/Stages/Stage.cpp      |    2 +-
 llvm/{tools/llvm-mca/lib => lib/MCA}/Support.cpp   |    2 +-
 llvm/lib/Target/AArch64/AArch64FastISel.cpp        |   11 +-
 llvm/lib/Target/AArch64/AArch64TargetMachine.cpp   |    6 +
 llvm/lib/Target/ARM/ARMFastISel.cpp                |    3 +-
 llvm/lib/Target/ARM/ARMISelLowering.cpp            |    3 +-
 llvm/lib/Target/ARM/ARMInstrThumb2.td              |   14 +-
 llvm/lib/Target/Mips/MipsLegalizerInfo.cpp         |   42 +-
 llvm/lib/Target/PowerPC/PPCFastISel.cpp            |    3 +-
 llvm/lib/Target/X86/X86FastISel.cpp                |    3 +-
 llvm/lib/Target/X86/X86ISelLowering.cpp            |  204 +-
 llvm/lib/Transforms/Scalar/EarlyCSE.cpp            |    3 +-
 llvm/test/CodeGen/AArch64/O3-pipeline.ll           |    1 +
 llvm/test/CodeGen/AArch64/fast-isel-erase.ll       |   25 +
 .../AArch64/ldst-opt-after-block-placement.ll      |   51 +
 llvm/test/CodeGen/ARM/atomic-ops-m33.ll            |  140 ++
 llvm/test/CodeGen/ARM/ldstrex-m.ll                 |   21 +-
 .../test/CodeGen/Mips/GlobalISel/legalizer/add.mir |   96 +-
 llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add.ll   |   69 +-
 llvm/test/CodeGen/PowerPC/ppc64-P9-vabsd.ll        |   57 +-
 llvm/test/CodeGen/PowerPC/pre-inc-disable.ll       |   56 +-
 llvm/test/CodeGen/X86/2011-12-28-vselecti8.ll      |   18 +-
 llvm/test/CodeGen/X86/cmp.ll                       |   19 +
 llvm/test/CodeGen/X86/fold-load.ll                 |   43 +-
 llvm/test/CodeGen/X86/pr34137.ll                   |    9 +-
 llvm/test/CodeGen/X86/test-shrink-bug.ll           |    2 +-
 llvm/test/CodeGen/X86/xop-intrinsics-fast-isel.ll  |  859 +++-----
 .../Transforms/AggressiveInstCombine/rotate.ll     |   37 +
 llvm/test/Transforms/EarlyCSE/debug-info-undef.ll  |   69 +
 llvm/test/Transforms/InstCombine/intrinsics.ll     |   32 +-
 .../Transforms/InstCombine/select-cmp-cttz-ctlz.ll |  353 ++--
 .../Transforms/InstSimplify/saturating-add-sub.ll  |   56 +-
 .../llvm-mca}/SystemZ/lit.local.cfg                |    0
 llvm/test/tools/llvm-mca/SystemZ/stm-lm.s          |   72 +
 llvm/tools/llvm-mca/CMakeLists.txt                 |    3 +-
 llvm/tools/llvm-mca/LLVMBuild.txt                  |    2 +-
 llvm/tools/llvm-mca/PipelinePrinter.h              |    2 +-
 llvm/tools/llvm-mca/Views/SummaryView.cpp          |    2 +-
 llvm/tools/llvm-mca/Views/View.h                   |    2 +-
 llvm/tools/llvm-mca/llvm-mca.cpp                   |   12 +-
 llvm/utils/gn/secondary/BUILD.gn                   |    1 +
 .../llvm/lib/Transforms/Coroutines/BUILD.gn        |   20 +
 llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn    |    2 +-
 .../gn/secondary/llvm/tools/{llc => opt}/BUILD.gn  |   25 +-
 432 files changed, 17602 insertions(+), 8448 deletions(-)
 create mode 100644 clang/include/clang/AST/ASTImporterLookupTable.h
 create mode 100644 clang/lib/AST/ASTImporterLookupTable.cpp
 create mode 100644 clang/test/Analysis/live-stmts.cpp
 create mode 100644 libcxx/benchmarks/algorithms.partition_point.bench.cpp
 create mode 100644 libcxx/test/libcxx/algorithms/half_positive.pass.cpp
 delete mode 100644 lld/test/ELF/arm-thumb-nov6thunk.s
 create mode 100644 lld/test/ELF/arm-thumb-thunk-v6m.s
 create mode 100644 lldb/lit/Python/crashlog.test
 create mode 100644 llvm/docs/AMDGPU/AMDGPUAsmGFX7.rst
 create mode 100644 llvm/docs/AMDGPU/AMDGPUAsmGFX8.rst
 create mode 100644 llvm/docs/AMDGPU/AMDGPUAsmGFX9.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_addr_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_addr_ds.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_addr_flat.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_addr_mimg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_attr.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_base_smem_addr.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_base_smem_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_bimm16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_bimm32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_data_buf_atomic128.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_data_buf_atomic32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_data_buf_atomic64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_data_mimg_atomic_cmp.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_data_mimg_atomic_reg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_data_mimg_store.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_dst_buf_128.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_dst_buf_64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_dst_buf_96.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_dst_buf_lds.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_dst_flat_atomic32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_dst_flat_atomic64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_dst_mimg_gather4.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_dst_mimg_regular.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_fimm32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_hwreg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_label.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_mod.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_msg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_offset_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_offset_smem.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_opt.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_param.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_ret.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_rsrc_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_rsrc_mimg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_samp_mimg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_sdst128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_sdst256_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_sdst32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_sdst32_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_sdst32_2.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_sdst512_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_sdst64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_sdst64_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_simm16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_src32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_src32_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_src32_2.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_src32_3.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_src64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_src64_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_src64_2.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_src_exp.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_ssrc32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_ssrc32_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_ssrc32_2.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_ssrc32_3.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_ssrc32_4.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_ssrc64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_ssrc64_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_ssrc64_2.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_ssrc64_3.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_tgt.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_type_dev.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_uimm16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_vcc_64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_vdata128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_vdata32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_vdata64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_vdata96_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_vdst128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_vdst32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_vdst64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_vdst96_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_vsrc128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_vsrc32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_vsrc64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx7_waitcnt.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_addr_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_addr_ds.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_addr_flat.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_addr_mimg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_attr.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_base_smem_addr.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_base_smem_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_bimm16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_bimm32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_data_buf_atomic128.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_data_buf_atomic32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_data_buf_atomic64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_data_buf_d16_128.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_data_buf_d16_32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_data_buf_d16_64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_data_buf_d16_96.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_data_mimg_atomic_cmp.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_data_mimg_atomic_reg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_data_mimg_store.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_data_mimg_store_d16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_buf_128.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_buf_64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_buf_96.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_buf_d16_128.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_buf_d16_32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_buf_d16_64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_buf_d16_96.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_buf_lds.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_flat_atomic32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_flat_atomic64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_mimg_gather4.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_mimg_regular.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_dst_mimg_regular_d16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_fimm16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_fimm32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_hwreg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_imm4.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_label.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_mod_dpp_sdwa_abs_neg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_mod_sdwa_sext.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_mod_vop3_abs_neg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_msg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_offset_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_offset_smem_load.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_offset_smem_store.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_opt.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_param.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_perm_smem.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_ret.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_rsrc_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_rsrc_mimg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_samp_mimg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_sdata128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_sdata32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_sdata64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_sdst128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_sdst256_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_sdst32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_sdst32_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_sdst32_2.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_sdst512_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_sdst64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_sdst64_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_simm16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_src32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_src32_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_src64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_src64_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_src_exp.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_ssrc32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_ssrc32_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_ssrc32_2.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_ssrc32_3.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_ssrc32_4.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_ssrc64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_ssrc64_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_ssrc64_2.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_ssrc64_3.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_tgt.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_type_dev.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_uimm16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_vcc_64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_vdata128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_vdata32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_vdata64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_vdata96_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_vdst128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_vdst32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_vdst64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_vdst96_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_vsrc128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_vsrc32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_vsrc64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx8_waitcnt.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_addr_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_addr_ds.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_addr_flat.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_addr_mimg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_attr.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_base_smem_addr.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_base_smem_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_base_smem_scratch.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_bimm16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_bimm32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_data_buf_atomic128.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_data_buf_atomic32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_data_buf_atomic64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_data_mimg_atomic_cmp.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_data_mimg_atomic_reg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_data_mimg_store.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_data_mimg_store_d16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_data_smem_atomic128.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_data_smem_atomic32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_data_smem_atomic64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_dst_buf_128.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_dst_buf_32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_dst_buf_64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_dst_buf_96.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_dst_buf_lds.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_dst_flat_atomic32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_dst_flat_atomic64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_dst_mimg_gather4.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_dst_mimg_regular.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_dst_mimg_regular_d16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_fimm16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_fimm32.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_hwreg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_imm4.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_label.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_mad_type_dev.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_mod_dpp_sdwa_abs_neg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_mod_sdwa_sext.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_mod_vop3_abs_neg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_msg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_offset_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_offset_smem_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_offset_smem_plain.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_opt.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_param.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_perm_smem.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_ret.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_rsrc_buf.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_rsrc_mimg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_saddr_flat_global.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_saddr_flat_scratch.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_samp_mimg.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_sdata128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_sdata32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_sdata64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_sdst128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_sdst256_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_sdst32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_sdst32_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_sdst32_2.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_sdst512_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_sdst64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_sdst64_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_simm16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_src32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_src32_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_src64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_src64_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_src_exp.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_ssrc32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_ssrc32_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_ssrc32_2.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_ssrc32_3.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_ssrc32_4.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_ssrc64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_ssrc64_1.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_ssrc64_2.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_ssrc64_3.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_tgt.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_type_dev.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_uimm16.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vaddr_flat_global.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vaddr_flat_scratch.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vcc_64.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vdata128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vdata32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vdata64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vdata96_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vdst128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vdst32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vdst64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vdst96_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vsrc128_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vsrc32_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_vsrc64_0.rst
 create mode 100644 llvm/docs/AMDGPU/gfx9_waitcnt.rst
 delete mode 100644 llvm/docs/AMDGPUAsmGFX7.rst
 delete mode 100644 llvm/docs/AMDGPUAsmGFX8.rst
 delete mode 100644 llvm/docs/AMDGPUAsmGFX9.rst
 create mode 100644 llvm/docs/AMDGPUInstructionNotation.rst
 create mode 100644 llvm/docs/AMDGPUInstructionSyntax.rst
 copy llvm/docs/{AMDGPUOperandSyntax.rst => AMDGPUModifierSyntax.rst} (69%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/Context.h (90%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/HWEventListener.h (96%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/HardwareUnits/HardwareUni [...]
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/HardwareUnits/LSUnit.h (98%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/HardwareUnits/RegisterFil [...]
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/HardwareUnits/ResourceMan [...]
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/HardwareUnits/RetireContr [...]
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/HardwareUnits/Scheduler.h (96%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/InstrBuilder.h (90%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/Instruction.h (99%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/Pipeline.h (93%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/SourceMgr.h (95%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/Stages/DispatchStage.h (91%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/Stages/EntryStage.h (88%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/Stages/ExecuteStage.h (92%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/Stages/InstructionTables.h (83%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/Stages/RetireStage.h (84%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/Stages/Stage.h (94%)
 rename llvm/{tools/llvm-mca/include => include/llvm/MCA}/Support.h (98%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/CMakeLists.txt (62%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/Context.cpp (86%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/HWEventListener.cpp (94%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/HardwareUnits/HardwareUnit.cpp (93%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/HardwareUnits/LSUnit.cpp (98%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/HardwareUnits/RegisterFile.cpp (99%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/HardwareUnits/ResourceManager.cpp (99%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/HardwareUnits/RetireControlUnit.cpp (98%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/HardwareUnits/Scheduler.cpp (99%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/InstrBuilder.cpp (97%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/Instruction.cpp (99%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/LLVMBuild.txt (100%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/Pipeline.cpp (97%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/Stages/DispatchStage.cpp (95%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/Stages/EntryStage.cpp (96%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/Stages/ExecuteStage.cpp (99%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/Stages/InstructionTables.cpp (98%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/Stages/RetireStage.cpp (95%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/Stages/Stage.cpp (95%)
 rename llvm/{tools/llvm-mca/lib => lib/MCA}/Support.cpp (98%)
 create mode 100644 llvm/test/CodeGen/AArch64/fast-isel-erase.ll
 create mode 100644 llvm/test/CodeGen/AArch64/ldst-opt-after-block-placement.ll
 create mode 100644 llvm/test/CodeGen/ARM/atomic-ops-m33.ll
 create mode 100644 llvm/test/Transforms/EarlyCSE/debug-info-undef.ll
 copy llvm/test/{CodeGen => tools/llvm-mca}/SystemZ/lit.local.cfg (100%)
 create mode 100644 llvm/test/tools/llvm-mca/SystemZ/stm-lm.s
 create mode 100644 llvm/utils/gn/secondary/llvm/lib/Transforms/Coroutines/BUILD.gn
 copy llvm/utils/gn/secondary/llvm/tools/{llc => opt}/BUILD.gn (50%)
-- 
To stop receiving notification emails like this one, please contact
the administrator of this repository.

2026

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

[Tcwg-commits] [toolchain/ci/llvm-monorepo] branch linaro-local/ci/tcwg_kernel/llvm-master-arm-stable-allmodconfig updated (42a68c9adac -> 78cb0defe9a)