This is an automated email from the git hooks/post-receive script.
tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-mainline-allmodconfig in repository toolchain/ci/qemu.
from 27a985159a Merge tag 'pull-log-20220420' of https://gitlab.com/rth7680/ [...] adds 55d71e0b78 Don't include sysemu/tcg.h if it is not necessary adds c74824389e tcg: Fix indirect lowering vs TCG_OPF_COND_BRANCH adds 5b6af141da accel/tcg: Remove ATOMIC_MMU_IDX adds a61532faa5 tcg: Add tcg_constant_ptr adds 9c125d17e9 Merge tag 'pull-tcg-20220420' of https://gitlab.com/rth7680/ [...] adds 5dd0be53e8 ppc/pnv: Update skiboot to v7.0 adds 4c7daca302 ppc/spapr/ddw: Add 2M pagesize adds 58858759c1 ppc/pnv: Fix PSI IRQ definition adds c05aa1406b ppc/pnv: Remove PnvLpcController::psi link adds b0ae5c69e1 ppc/pnv: Remove PnvOCC::psi link adds dcf4ca4514 ppc/pnv: Remove PnvPsiClas::irq_set adds 354ff1557a ppc/pnv: Remove useless checks in set_irq handlers adds 0939ac2cd9 spapr: Move hypercall_register_softmmu adds 365acf15d3 spapr: Move nested KVM hypercalls under a TCG only config. adds f290a23868 target/ppc: Improve KVM hypercall trace adds 613cf0fcba qemu/int128: add int128_urshift adds f279852b89 softfloat: add uint128_to_float128 adds 95c1b71e25 softfloat: add int128_to_float128 adds 4de49ddfac softfloat: add float128_to_uint128 adds bea592300b softfloat: add float128_to_int128 adds 67332e0718 target/ppc: implement xscv[su]qqp adds b3d4520585 target/ppc: implement xscvqp[su]qz adds b8ff425b1d hw/ppc/ppc405_boards: Initialize g_autofree pointer adds 23bd5fc3ed ppc/vof: Fix uninitialized string tracing adds 2e8656710a pcie: Don't try triggering a LSI when not defined adds b34ce592fd ppc/pnv: Remove LSI on the PCIE host bridge adds 4e610064db target/ppc: Add two missing register callbacks on POWER10 adds 2d94af4b16 hw/ppc: change indentation to spaces from TABs adds b1efff6bf0 Merge tag 'pull-ppc-20220420-2' of https://gitlab.com/daniel [...] adds 78255ce392 hw/arm/virt: Check for attempt to use TrustZone with KVM or HVF adds 09fc50cdce timer: cadence_ttc: Break out header file to allow embedding adds 51af6231ad hw/arm/xlnx-zynqmp: Connect 4 TTC timers adds 8779d00c4e hw/arm: versal: Create an APU CPU Cluster adds 67a645a351 hw/arm: versal: Add the Cortex-R5Fs adds 369e5cb0c9 hw/misc: Add a model of the Xilinx Versal CRL adds d6ccfc7e67 hw/arm: versal: Connect the CRL adds 2bd84b6818 hw/arm/exynos4210: Use TYPE_OR_IRQ instead of custom OR-gate device adds 019eafddd0 hw/intc/exynos4210_gic: Remove unused TYPE_EXYNOS4210_IRQ_GATE adds 5b2417288e hw/arm/exynos4210: Put a9mpcore device into state struct adds c9d4940a9b hw/arm/exynos4210: Drop int_gic_irq[] from Exynos4210Irq struct adds 771dee52c0 hw/arm/exynos4210: Coalesce board_irqs and irq_table adds 44068eabe0 hw/arm/exynos4210: Fix code style nit in combiner_grp_to_gic_id[] adds 93afe073df hw/arm/exynos4210: Move exynos4210_init_board_irqs() into ex [...] adds 78cb12a92c hw/arm/exynos4210: Put external GIC into state struct adds 38c2b905d3 hw/arm/exynos4210: Drop ext_gic_irq[] from Exynos4210Irq struct adds 03a46e0081 hw/arm/exynos4210: Move exynos4210_combiner_get_gpioin() int [...] adds b17b54a63d hw/arm/exynos4210: Delete unused macro definitions adds 7582d930da hw/arm/exynos4210: Use TYPE_SPLIT_IRQ in exynos4210_init_boa [...] adds 0dee4daca3 hw/arm/exynos4210: Fill in irq_table[] for internal-combiner [...] adds 1c6f3feeb3 hw/arm/exynos4210: Connect MCT_G0 and MCT_G1 to both combiners adds 76124b4cb2 hw/arm/exynos4210: Don't connect multiple lines to external [...] adds 76621953c9 hw/arm/exynos4210: Fold combiner splits into exynos4210_init [...] adds cebef07df5 hw/arm/exynos4210: Put combiners into state struct adds f37fc537fc hw/arm/exynos4210: Drop Exynos4210Irq struct adds d5c3eb50af hw/arm/realview: replace 'qemu_split_irq' with 'TYPE_SPLIT_IRQ' adds d0a030d801 hw/arm/stellaris: replace 'qemu_split_irq' with 'TYPE_SPLIT_IRQ' adds 0ebfc997d2 hw/core/irq: remove unused 'qemu_irq_split' function adds 011301736b hw/arm/virt: impact of gic-version on max CPUs adds c3e9e73a83 hw/misc: Add PWRON STRAP bit fields in GCR module adds 5b415dd61b hw/arm: Use bit fields for NPCM7XX PWRON STRAPs adds 401d467894 Merge tag 'pull-target-arm-20220421' of https://git.linaro.o [...] adds 951cc9df88 glib-compat: isolate g_date_time_format_iso8601 version-bypass adds 6712f04ec8 scripts/analyze-inclusions: drop qemu-common.h from analysis adds 88c39c8693 Simplify softmmu/main.c adds aa77a877fd hw/hyperv: remove needless qemu-common.h include adds 49f9522193 include: rename qemu-common.h qemu/help-texts.h adds 4e8c41947b qga: replace usleep() with g_usleep() adds 7a42e6885a docs: trace-events-all is installed without renaming adds e5c4183525 arm/digic: replace snprintf() with g_strdup_printf() adds aaea18d5d6 arm/allwinner-a10: replace snprintf() with g_strdup_printf() adds a0e04317f3 intc/exynos4210_gic: replace snprintf() with g_strdup_printf() adds 1812a2d366 doc/style: CLang -> Clang adds 94ae6b579d osdep.h: move qemu_build_not_reached() adds 8905770b27 compiler.h: replace QEMU_NORETURN with G_NORETURN adds 73991a9222 include: move qemu_msync() to osdep adds 282468c7c4 include: move qemu_fdatasync() to osdep adds 9ca9c893b6 include: add qemu/keyval.h adds 215aea0cb2 include: move qdict_{crumple,flatten} declarations adds 5472b5b6a4 tests: remove block/qdict checks from check-qobject.c adds c213ef9a66 compiler.h: add QEMU_SANITIZE_{ADDRESS,THREAD} adds a7bd942c90 tests: run-time skip test-qga if TSAN is enabled adds 756a98dd70 Move error_printf_unless_qmp() with monitor unit adds 548fb0da73 qga: move qga_get_host_name() adds c3e5704af1 qtest: simplify socket_send() adds d0dedf2f4c util: simplify write in signal handler adds 96eb9b2b47 util: use qemu_write_full() in qemu_write_pidfile() adds 1b34d08f0b util: use qemu_create() in qemu_write_pidfile() adds 1fbf2665e6 util: replace qemu_get_local_state_pathname() adds c267d750d8 qga: remove need for QEMU atomic.h adds d30c08dfe4 tests/fuzz: fix warning adds 55fa017072 qga: use fixed-length and GDateTime for log timestamp adds 28298069af Merge tag 'misc-pull-request' of gitlab.com:marcandre.lureau [...] adds a58069494d qapi-schema: support alternates with array type adds b36dc5c279 qapi-schema: test: add a qapi-schema-test for array alternates adds 79db994861 qapi-schema: test: add a unit test for parsing array alternates adds 659056b81d docs: qapi: Remove outdated reference to simple unions adds f43471297b qapi: Fix documentation for query-xen-replication-status adds 068613f065 qapi: Fix typo adds de7371bc7c qapi: Fix version of cpu0-id field adds 378f973a6c Merge tag 'pull-qapi-2022-04-21' of git://repo.or.cz/qemu/ar [...] adds a4225303a1 python/machine: permanently switch to AQMP adds 28d4f06e0a scripts/bench-block-job: switch to AQMP adds 998ed38620 iotests/mirror-top-perms: switch to AQMP adds 68e2e3dd66 iotests: switch to AQMP adds 380fc8f32e python/aqmp: add explicit GPLv2 license to legacy.py adds 9dcea96d08 python/aqmp: relicense as LGPLv2+ adds 0e08b94700 python/qmp-shell: relicense as LGPLv2+ adds 445c9d4e3d python/aqmp-tui: relicense as LGPLv2+ adds 335e7d410e python: temporarily silence pylint duplicate-code warnings adds 9fcd3930e0 python/aqmp: take QMPBadPortError and parse_address from qemu.qmp adds 0c78ebf722 python/aqmp: fully separate from qmp.QEMUMonitorProtocol adds b0654f4f98 python/aqmp: copy qmp docstrings to qemu.aqmp.legacy adds adaca6e085 python: remove the old QMP package adds 105bbff886 python: re-enable pylint duplicate-code warnings adds 37094b6dd5 python: rename qemu.aqmp to qemu.qmp adds b1a9b1f7a6 python: rename 'aqmp-tui' to 'qmp-tui' adds 47430775ed python/qmp: remove pylint workaround from legacy.py adds da5006445a Merge tag 'python-pull-request' of https://gitlab.com/jsnow/ [...] adds 4341631e4d target/rx: Put tb_flags into DisasContext adds 3626a3fe37 target/rx: Store PSW.U in tb->flags adds d3562fe258 target/rx: Move DISAS_UPDATE check for write to PSW adds 3c69336a87 target/rx: Swap stack pointers on clrpsw/setpsw instruction adds bcc6f33b67 hw/rx: rx-gdbsim DTB load address aligned of 16byte. adds 335cd06597 target/rx: set PSW.I when executing wait instruction adds 724eaecec6 target/rx: update PC correctly in wait instruction adds 4ba2565831 Merge tag 'pull-rx-20220421' of https://gitlab.com/rth7680/q [...] adds a17ec44dba tests: improve error message when saving TLS PSK file fails adds dcd23e9cae tests: support QTEST_TRACE env variable adds 0c2b6c85c9 tests: print newline after QMP response in qtest logs adds 4b2bbca7a0 migration: fix use of TLS PSK credentials with a UNIX socket adds 19da6edfe8 tests: switch MigrateStart struct to be stack allocated adds ffed54f6e5 tests: merge code for UNIX and TCP migration pre-copy tests adds b3caa7b55e tests: introduce ability to provide hooks for migration prec [...] adds 243e006686 tests: switch migration FD passing test to use common precop [...] adds 00fbe7f6ad tests: expand the migration precopy helper to support failures adds 83174765da migration: Postpone releasing MigrationState.hostname adds 7f692ec79a migration: Drop multifd tls_hostname cache adds ea2faf0c35 migration: Add pss.postcopy_requested status adds f444eeda71 migration: Move migrate_allow_multifd and helpers into migration.c adds 929068ec2f migration: Export ram_load_postcopy() adds a39e933962 migration: Move channel setup out of postcopy_try_recover() adds 08401c0426 migration: Allow migrate-recover to run multiple times adds f912ec5b2d migration: Fix operator type adds 552de79bfd migration: Read state once adds a74782936d Merge tag 'pull-migration-20220421a' of https://gitlab.com/d [...] adds 9c4888c995 hw/ssi: Add Ibex SPI device model adds 9972479fac riscv: opentitan: Connect opentitan SPI Host adds a46d410c5c target/riscv: Define simpler privileged spec version numbering adds 3a4af26d7a target/riscv: Add the privileged spec version 1.12.0 adds a4b2fa4331 target/riscv: Introduce privilege version field in the CSR ops. adds 3e6a417c8a target/riscv: Add support for mconfigptr adds 29a9ec9bd8 target/riscv: Add *envcfg* CSRs support adds 7100fe6c24 target/riscv: Enable privileged spec version 1.12 adds 8b5c807bc0 target/riscv: cpu: Fixup indentation adds 33fe584f70 target/riscv: Allow software access to MIP SEIP adds 95799e36c1 target/riscv: Add initial support for the Sdtrig extension adds c341e886d9 target/riscv: optimize condition assign for scale < 0 adds f32d82f6c3 target/riscv: optimize helper for vmv<nr>r.v adds 0e2c377023 target/riscv: misa to ISA string conversion fix adds a775398be2 target/riscv: Add isa extenstion strings to the device tree adds f06193c40b target/riscv: fix start byte for vmv<nf>r.v when vstart != 0 adds ac684717c3 target/riscv: Use cpu_loop_exit_restore directly from mmu faults adds 8f013700eb hw/riscv: virt: Exit if the user provided -bios in combinati [...] adds 6248a8fe4d target/riscv/pmp: fix NAPOT range computation overflow adds d6db2c0fab hw/riscv: virt: fix DT property mmu-type when CPU mmu option [...] adds 231a90c085 hw/intc: Add .impl.[min|max]_access_size declaration in RISC [...] adds d42df0ea5d hw/intc: Support 32/64-bit mtimecmp and mtime accesses in RI [...] adds e2f01f3c2e hw/intc: Make RISC-V ACLINT mtime MMIO register writable adds 8124f819d0 hw/intc: riscv_aclint: Add reset function of ACLINT devices adds b5f6379d13 target/riscv: debug: Implement debug related TCGCPUOps adds 1acdb3b013 target/riscv: cpu: Add a config option for native debug adds b6092544fc target/riscv: csr: Hook debug CSR read/write adds 38b4e781a4 target/riscv: machine: Add debug state description adds c9711bd778 target/riscv: cpu: Enable native debug feature adds 013577de8f hw/core: tcg-cpu-ops.h: Update comments of debug_check_watchpoint() adds faee5441a0 hw/riscv: boot: Support 64bit fdt address. adds 10cd282ee4 Merge tag 'pull-riscv-to-apply-20220422-1' of github.com:ali [...] adds 86a518bba4 dump: Use ERRP_GUARD() adds 046bc4160b dump: Remove the sh_info variable adds 862a395858 dump: Introduce shdr_num to decrease complexity adds 344107e07b dump: Remove the section if when calculating the memory offset adds e71d353360 dump: Add more offset variables adds 05bbaa5040 dump: Introduce dump_is_64bit() helper function adds bc7d558017 dump: Consolidate phdr note writes adds 5ff2e5a3e1 dump: Cleanup dump_begin write functions adds c68124738b dump: Consolidate elf note function adds a64b4e179a include/qemu: rename Windows context definitions to expose bitness adds fb21efe99a dump/win_dump: add helper macros for Windows dump header access adds c4fe30921f include/qemu: add 32-bit Windows dump structures adds f5daa8293b dump/win_dump: add 32-bit guest Windows support adds f7f40b8198 Merge tag 'dump-pull-request' of gitlab.com:marcandre.lureau [...] adds 2a19903697 hw/intc/arm_gicv3_its: Add missing blank line adds 89ac9d0cba hw/intc/arm_gicv3: Sanity-check num-cpu property adds 671927a116 hw/intc/arm_gicv3: Insist that redist region capacity matche [...] adds 50a3a309e1 hw/intc/arm_gicv3: Report correct PIDR0 values for ID registers adds 9acd2d3373 target/arm/cpu.c: ignore VIRQ and VFIQ if no EL2 adds c3c9a09073 hw/intc/arm_gicv3_its: Factor out "is intid a valid LPI ID?" adds 50d84584d3 hw/intc/arm_gicv3_its: Implement GITS_BASER2 for GICv4 adds 9de53de60c hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTI adds 0cdf7a5dc8 hw/intc/arm_gicv3_its: Implement VMAPP adds 93f4fdcd4d hw/intc/arm_gicv3_its: Distinguish success and error cases o [...] adds f0175135e7 hw/intc/arm_gicv3_its: Factor out "find ITE given devid, eventid" adds c411db7bf7 hw/intc/arm_gicv3_its: Factor out CTE lookup sequence adds 2d692e2b31 hw/intc/arm_gicv3_its: Split out process_its_cmd() physical [...] adds 469cf23bf8 hw/intc/arm_gicv3_its: Handle virtual interrupts in process_ [...] adds 7c087bd330 hw/intc/arm_gicv3: Keep pointers to every connected ITS adds 3851af4585 hw/intc/arm_gicv3_its: Implement VMOVP adds f76ba95a03 hw/intc/arm_gicv3_its: Implement VSYNC adds a686e85d2b hw/intc/arm_gicv3_its: Implement INV command properly adds d4014320a4 hw/intc/arm_gicv3_its: Implement INV for virtual interrupts adds 3c64a42c0b hw/intc/arm_gicv3_its: Implement VMOVI adds c6dd2f9950 hw/intc/arm_gicv3_its: Implement VINVALL adds ae3b3ba15c hw/intc/arm_gicv3: Implement GICv4's new redistributor frame adds 641be69745 hw/intc/arm_gicv3: Implement new GICv4 redistributor registers adds 10337638bb hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3 [...] adds c3f21b065a hw/intc/arm_gicv3_cpuif: Support vLPIs adds 189d1d9d57 hw/intc/arm_gicv3_cpuif: Don't recalculate maintenance irq u [...] adds e97be73c97 hw/intc/arm_gicv3_redist: Factor out "update hpplpi for one [...] adds 99ba56d25b hw/intc/arm_gicv3_redist: Factor out "update hpplpi for all [...] adds 6631480c9a hw/intc/arm_gicv3_redist: Recalculate hppvlpi on VPENDBASER writes adds b76eb5f4db hw/intc/arm_gicv3_redist: Factor out "update bit in pending [...] adds d7d39749e6 hw/intc/arm_gicv3_redist: Implement gicv3_redist_process_vlpi() adds 932f0480d0 hw/intc/arm_gicv3_redist: Implement gicv3_redist_vlpi_pending() adds ab6ef25179 hw/intc/arm_gicv3_redist: Use set_pending_table_bit() in mov [...] adds c6f797d519 hw/intc/arm_gicv3_redist: Implement gicv3_redist_mov_vlpi() adds e031346d98 hw/intc/arm_gicv3_redist: Implement gicv3_redist_vinvall() adds 1b19ccfa38 hw/intc/arm_gicv3_redist: Implement gicv3_redist_inv_vlpi() adds e2d5e189aa hw/intc/arm_gicv3: Update ID and feature registers for GICv4 adds 445d5825da hw/intc/arm_gicv3: Allow 'revision' property to be set to 4 adds 5a389a9aec hw/arm/virt: Use VIRT_GIC_VERSION_* enum values in create_gic() adds f31985a77a hw/arm/virt: Abstract out calculation of redistributor regio [...] adds 7cf3f8d243 hw/arm/virt: Support TCG GICv4 adds c42fb26b13 target/arm: Update ISAR fields for ARMv8.8 adds f527d66183 target/arm: Update SCR_EL3 bits to ARMv8.8 adds ad1e60184c target/arm: Update SCTLR bits to ARMv9.2 adds a3bc906f8e target/arm: Change DisasContext.aarch64 to bool adds 5322155240 target/arm: Change CPUArchState.aarch64 to bool adds 4f4c2a4ba2 target/arm: Extend store_cpu_offset to take field size adds 2ab370873f target/arm: Change DisasContext.thumb to bool adds 063bbd8061 target/arm: Change CPUArchState.thumb to bool adds a4c88675d6 target/arm: Remove fpexc32_access adds 667a4e6235 target/arm: Split out set_btype_raw adds e01aa38d48 target/arm: Split out gen_rebuild_hflags adds fe12080c5f target/arm: Simplify GEN_SHIFT in translate.c adds 099d1c2088 target/arm: Simplify gen_sar adds c89a9d139b target/arm: Simplify aa32 DISAS_WFI adds 01d90db599 target/arm: Use tcg_constant in translate-m-nocp.c adds d9b47e97e7 target/arm: Use tcg_constant in translate-neon.c adds aa5b0b29b1 target/arm: Use smin/smax for do_sat_addsub_32 adds 230c90ceb4 target/arm: Use tcg_constant in translate-vfp.c adds 2c2c65c01e target/arm: Use tcg_constant_i32 in translate.h adds c3ca7d56c4 hw/arm/smmuv3: Pass the actual perm to returned IOMMUTLBEntr [...] adds 754f756cc4 Merge tag 'pull-target-arm-20220422-1' of https://git.linaro [...]
No new revisions were added by this update.
Summary of changes: MAINTAINERS | 2 +- accel/stubs/tcg-stub.c | 4 +- accel/tcg/cputlb.c | 1 - accel/tcg/hmp.c | 1 - accel/tcg/internal.h | 3 +- accel/tcg/tcg-accel-ops-icount.c | 1 - accel/tcg/user-exec.c | 1 - bsd-user/main.c | 3 +- bsd-user/signal.c | 3 +- contrib/elf2dmp/main.c | 6 +- docs/devel/qapi-code-gen.rst | 4 +- docs/devel/style.rst | 2 +- docs/devel/tracing.rst | 2 +- docs/system/arm/virt.rst | 9 +- dump/dump.c | 372 +++++----- dump/win_dump.c | 305 +++++--- fpu/softfloat.c | 183 +++++ hmp-commands.hx | 2 +- hw/arm/allwinner-a10.c | 4 +- hw/arm/digic.c | 5 +- hw/arm/exynos4210.c | 430 ++++++++++-- hw/arm/npcm7xx_boards.c | 24 +- hw/arm/realview.c | 33 +- hw/arm/smmuv3.c | 2 +- hw/arm/stellaris.c | 15 +- hw/arm/virt.c | 109 ++- hw/arm/xlnx-versal-virt.c | 6 +- hw/arm/xlnx-versal.c | 99 ++- hw/arm/xlnx-zynqmp.c | 22 + hw/core/irq.c | 15 - hw/hyperv/syndbg.c | 1 - hw/intc/arm_gicv3_common.c | 54 +- hw/intc/arm_gicv3_cpuif.c | 195 +++++- hw/intc/arm_gicv3_dist.c | 7 +- hw/intc/arm_gicv3_its.c | 776 ++++++++++++++++++--- hw/intc/arm_gicv3_its_kvm.c | 2 + hw/intc/arm_gicv3_kvm.c | 5 + hw/intc/arm_gicv3_redist.c | 480 ++++++++++--- hw/intc/exynos4210_combiner.c | 108 +-- hw/intc/exynos4210_gic.c | 353 +--------- hw/intc/gicv3_internal.h | 213 +++++- hw/intc/riscv_aclint.c | 144 +++- hw/intc/trace-events | 18 +- hw/misc/meson.build | 1 + hw/misc/mips_itu.c | 3 +- hw/misc/xlnx-versal-crl.c | 421 +++++++++++ hw/pci-host/pnv_phb3.c | 1 + hw/pci-host/pnv_phb4.c | 1 + hw/pci/pcie.c | 5 +- hw/pci/pcie_aer.c | 2 +- hw/ppc/pnv.c | 30 +- hw/ppc/pnv_lpc.c | 19 +- hw/ppc/pnv_occ.c | 16 +- hw/ppc/pnv_psi.c | 36 +- hw/ppc/ppc405_boards.c | 4 +- hw/ppc/ppc440_bamboo.c | 6 +- hw/ppc/spapr_hcall.c | 74 +- hw/ppc/spapr_rtas.c | 18 +- hw/ppc/spapr_rtas_ddw.c | 1 + hw/ppc/vof.c | 2 +- hw/riscv/boot.c | 12 +- hw/riscv/opentitan.c | 36 +- hw/riscv/virt.c | 24 +- hw/rx/rx-gdbsim.c | 2 +- hw/ssi/ibex_spi_host.c | 612 ++++++++++++++++ hw/ssi/meson.build | 1 + hw/ssi/trace-events | 7 + hw/timer/cadence_ttc.c | 32 +- hw/virtio/vhost.c | 1 - include/block/qdict.h | 3 + include/exec/exec-all.h | 20 +- include/exec/helper-head.h | 2 +- include/fpu/softfloat.h | 7 + include/glib-compat.h | 12 +- include/hw/arm/exynos4210.h | 50 +- include/hw/arm/virt.h | 19 +- include/hw/arm/xlnx-versal.h | 16 + include/hw/arm/xlnx-zynqmp.h | 4 + include/hw/core/cpu.h | 2 +- include/hw/core/tcg-cpu-ops.h | 7 +- include/hw/hw.h | 2 +- include/hw/intc/arm_gicv3_common.h | 13 + include/hw/intc/arm_gicv3_its_common.h | 19 + include/hw/intc/exynos4210_combiner.h | 57 ++ include/hw/intc/exynos4210_gic.h | 43 ++ include/hw/intc/riscv_aclint.h | 1 + include/hw/irq.h | 5 - include/hw/misc/npcm7xx_gcr.h | 30 + include/hw/misc/xlnx-versal-crl.h | 235 +++++++ include/hw/ppc/pnv_lpc.h | 8 +- include/hw/ppc/pnv_occ.h | 7 +- include/hw/ppc/pnv_psi.h | 7 +- include/hw/ppc/ppc.h | 10 +- include/hw/ppc/spapr.h | 1 + include/hw/riscv/boot.h | 4 +- include/hw/riscv/opentitan.h | 30 +- include/hw/ssi/ibex_spi_host.h | 94 +++ include/hw/timer/cadence_ttc.h | 54 ++ include/monitor/monitor.h | 3 + include/qapi/qmp/qdict.h | 3 - include/qemu-main.h | 10 + include/qemu/compiler.h | 26 +- include/qemu/cutils.h | 2 - include/qemu/error-report.h | 2 - include/{qemu-common.h => qemu/help-texts.h} | 5 - include/qemu/int128.h | 21 + include/qemu/keyval.h | 14 + include/qemu/option.h | 6 - include/qemu/osdep.h | 43 +- include/qemu/thread.h | 2 +- include/qemu/win_dump_defs.h | 115 ++- include/sysemu/dump.h | 9 +- include/tcg/tcg-ldst.h | 4 +- include/tcg/tcg.h | 6 +- linux-user/arm/cpu_loop.c | 2 +- linux-user/main.c | 3 +- linux-user/signal.c | 3 +- linux-user/user-internals.h | 2 +- migration/channel.c | 1 - migration/migration.c | 66 +- migration/migration.h | 4 +- migration/multifd.c | 29 +- migration/multifd.h | 4 - migration/ram.c | 10 +- migration/ram.h | 1 + migration/savevm.c | 3 - migration/tls.c | 4 - monitor/hmp.c | 4 +- monitor/misc.c | 1 - monitor/monitor.c | 10 + pc-bios/skiboot.lid | Bin 2528128 -> 2527240 bytes python/README.rst | 2 +- python/qemu/aqmp/__init__.py | 59 -- python/qemu/aqmp/legacy.py | 177 ----- python/qemu/machine/machine.py | 18 +- python/qemu/machine/qtest.py | 2 +- python/qemu/qmp/README.rst | 9 - python/qemu/qmp/__init__.py | 447 ++---------- python/qemu/{aqmp => qmp}/error.py | 0 python/qemu/{aqmp => qmp}/events.py | 2 +- python/qemu/qmp/legacy.py | 315 +++++++++ python/qemu/{aqmp => qmp}/message.py | 0 python/qemu/{aqmp => qmp}/models.py | 0 python/qemu/{aqmp => qmp}/protocol.py | 4 +- python/qemu/{aqmp => qmp}/qmp_client.py | 16 +- python/qemu/{aqmp => qmp}/qmp_shell.py | 11 +- python/qemu/{aqmp/aqmp_tui.py => qmp/qmp_tui.py} | 17 +- python/qemu/{aqmp => qmp}/util.py | 0 python/qemu/utils/qemu_ga_client.py | 4 +- python/qemu/utils/qom.py | 2 +- python/qemu/utils/qom_common.py | 4 +- python/qemu/utils/qom_fuse.py | 2 +- python/setup.cfg | 11 +- python/tests/protocol.py | 14 +- qapi/migration.json | 2 +- qapi/misc-target.json | 2 +- qapi/qobject-input-visitor.c | 2 +- qapi/sockets.json | 2 +- qemu-img.c | 14 +- qemu-io.c | 2 +- qemu-nbd.c | 2 +- qga/commands-common.h | 11 + qga/commands-posix.c | 35 + qga/commands-win32.c | 13 + qga/commands.c | 14 +- qga/main.c | 20 +- qom/object_interfaces.c | 1 + roms/skiboot | 2 +- scripts/analyze-inclusions | 4 - scripts/checkpatch.pl | 2 +- scripts/cocci-macro-file.h | 2 +- scripts/cpu-x86-uarch-abi.py | 2 +- scripts/device-crash-test | 4 +- scripts/qapi/expr.py | 2 +- scripts/qapi/schema.py | 4 + scripts/qmp/qmp-shell | 2 +- scripts/qmp/qmp-shell-wrap | 2 +- scripts/render_block_graph.py | 4 +- scripts/simplebench/bench_block_job.py | 5 +- scsi/qemu-pr-helper.c | 8 +- softmmu/main.c | 25 +- softmmu/vl.c | 4 +- storage-daemon/qemu-storage-daemon.c | 2 +- stubs/error-printf.c | 1 + target/alpha/cpu.h | 10 +- target/alpha/helper.c | 10 +- target/arm/cpu.c | 16 +- target/arm/cpu.h | 59 +- target/arm/helper-a64.c | 4 +- target/arm/helper.c | 20 +- target/arm/hvf/hvf.c | 2 +- target/arm/internals.h | 12 +- target/arm/m_helper.c | 6 +- target/arm/op_helper.c | 13 - target/arm/pauth_helper.c | 4 +- target/arm/tlb_helper.c | 7 +- target/arm/translate-a32.h | 13 +- target/arm/translate-a64.c | 50 +- target/arm/translate-m-nocp.c | 12 +- target/arm/translate-neon.c | 21 +- target/arm/translate-sve.c | 9 +- target/arm/translate-vfp.c | 76 +- target/arm/translate.c | 101 +-- target/arm/translate.h | 17 +- target/hexagon/op_helper.c | 9 +- target/hppa/cpu.c | 8 +- target/hppa/cpu.h | 2 +- target/hppa/op_helper.c | 4 +- target/i386/tcg/bpt_helper.c | 2 +- target/i386/tcg/excp_helper.c | 31 +- target/i386/tcg/helper-tcg.h | 24 +- target/i386/tcg/misc_helper.c | 6 +- target/i386/tcg/sysemu/misc_helper.c | 7 +- target/microblaze/cpu.h | 6 +- target/mips/tcg/tcg-internal.h | 17 +- target/nios2/cpu.h | 6 +- target/openrisc/exception.c | 2 +- target/openrisc/exception.h | 2 +- target/openrisc/exception_helper.c | 3 +- target/ppc/cpu.h | 14 +- target/ppc/cpu_init.c | 2 + target/ppc/fpu_helper.c | 33 + target/ppc/helper.h | 4 + target/ppc/insn32.decode | 7 + target/ppc/internal.h | 6 +- target/ppc/kvm.c | 2 +- target/ppc/trace-events | 2 +- target/ppc/translate/vsx-impl.c.inc | 22 + target/riscv/cpu.c | 120 +++- target/riscv/cpu.h | 50 +- target/riscv/cpu_bits.h | 40 ++ target/riscv/cpu_helper.c | 10 +- target/riscv/csr.c | 282 +++++++- target/riscv/debug.c | 441 ++++++++++++ target/riscv/debug.h | 114 +++ target/riscv/helper.h | 5 +- target/riscv/insn_trans/trans_rvv.c.inc | 25 +- target/riscv/machine.c | 55 ++ target/riscv/meson.build | 1 + target/riscv/op_helper.c | 4 +- target/riscv/pmp.c | 14 +- target/riscv/vector_helper.c | 31 +- target/rx/cpu.h | 1 + target/rx/op_helper.c | 23 +- target/rx/translate.c | 69 +- target/s390x/cpu_models_sysemu.c | 1 - target/s390x/helper.c | 1 - target/s390x/s390x-internal.h | 6 +- target/s390x/tcg/excp_helper.c | 22 +- target/s390x/tcg/tcg_s390x.h | 12 +- target/sh4/cpu.h | 6 +- target/sh4/op_helper.c | 5 +- target/sparc/cpu.h | 10 +- target/sparc/mmu_helper.c | 8 +- target/tricore/op_helper.c | 6 +- target/xtensa/cpu.h | 6 +- tcg/tcg.c | 37 +- tests/fp/fp-bench.c | 3 +- tests/fp/fp-test.c | 3 +- tests/qapi-schema/alternate-array.err | 2 - tests/qapi-schema/alternate-array.json | 2 - tests/qapi-schema/alternate-array.out | 18 + tests/qapi-schema/alternate-conflict-lists.err | 2 + tests/qapi-schema/alternate-conflict-lists.json | 6 + .../qapi-schema/alternate-conflict-lists.out | 0 tests/qapi-schema/meson.build | 1 + tests/qapi-schema/qapi-schema-test.json | 1 + tests/qapi-schema/qapi-schema-test.out | 4 + tests/qemu-iotests/iotests.py | 3 +- tests/qemu-iotests/tests/mirror-top-perms | 11 +- tests/qtest/fuzz/generic_fuzz.c | 2 - tests/qtest/libqtest.c | 29 +- tests/qtest/migration-test.c | 368 +++++----- tests/unit/check-qobject.c | 7 - tests/unit/check-qom-proplist.c | 1 + tests/unit/crypto-tls-psk-helpers.c | 2 +- tests/unit/meson.build | 2 +- tests/unit/test-forward-visitor.c | 2 +- tests/unit/test-int128.c | 50 ++ tests/unit/test-keyval.c | 2 +- tests/unit/test-qga.c | 7 + tests/unit/test-qobject-input-visitor.c | 40 ++ tools/virtiofsd/fuse_virtio.c | 4 +- tools/virtiofsd/passthrough_ll.c | 2 +- ui/cocoa.m | 3 +- ui/vnc.c | 1 + util/compatfd.c | 18 +- util/cutils.c | 54 -- util/error-report.c | 17 +- util/keyval.c | 2 +- util/osdep.c | 16 + util/oslib-posix.c | 65 +- util/oslib-win32.c | 28 +- 293 files changed, 7514 insertions(+), 3234 deletions(-) create mode 100644 hw/misc/xlnx-versal-crl.c create mode 100644 hw/ssi/ibex_spi_host.c create mode 100644 include/hw/intc/exynos4210_combiner.h create mode 100644 include/hw/intc/exynos4210_gic.h create mode 100644 include/hw/misc/xlnx-versal-crl.h create mode 100644 include/hw/ssi/ibex_spi_host.h create mode 100644 include/hw/timer/cadence_ttc.h create mode 100644 include/qemu-main.h rename include/{qemu-common.h => qemu/help-texts.h} (80%) create mode 100644 include/qemu/keyval.h delete mode 100644 python/qemu/aqmp/__init__.py delete mode 100644 python/qemu/aqmp/legacy.py delete mode 100644 python/qemu/qmp/README.rst rename python/qemu/{aqmp => qmp}/error.py (100%) rename python/qemu/{aqmp => qmp}/events.py (99%) create mode 100644 python/qemu/qmp/legacy.py rename python/qemu/{aqmp => qmp}/message.py (100%) rename python/qemu/{aqmp => qmp}/models.py (100%) rename python/qemu/{aqmp => qmp}/protocol.py (99%) rename python/qemu/{aqmp => qmp}/qmp_client.py (97%) rename python/qemu/{aqmp => qmp}/qmp_shell.py (98%) rename python/qemu/{aqmp/aqmp_tui.py => qmp/qmp_tui.py} (98%) rename python/qemu/{aqmp => qmp}/util.py (100%) create mode 100644 target/riscv/debug.c create mode 100644 target/riscv/debug.h create mode 100644 tests/qapi-schema/alternate-conflict-lists.err create mode 100644 tests/qapi-schema/alternate-conflict-lists.json rename python/qemu/aqmp/py.typed => tests/qapi-schema/alternate-conflict-lists.out (100%)