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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-arm-next-allmodconfig in repository toolchain/ci/llvm-project.
from 2e0c95edfe0 [AddressSanitizer] Don't dereference dyn_cast<ConstantInt> [...] adds 63ddbc2fbc3 [PPC] PPCLoopPreIncPrep - silence static analyzer null dere [...] adds eacbe1cccc4 [Docs] Add a custom sidebar to doc pages adds 4a58936716e Fix missed case of switching getConstant to getTargetConsta [...] adds 819c1651f72 [SystemZ] Support z15 processor name adds 48b40834dc5 [SystemZ] Support z15 processor name adds 397a686762e Fix assertion failure when constant evaluation of a switch [...] adds 6c0894b58ac Remove outdated FIXME. adds f118852046a [SampleFDO] Expose an interface to return the size of a sec [...] adds 2f32e5d84d3 [Inliner] Remove incorrect early exit during switch cost co [...] adds e021d690943 dotest.py: bugfix: test filters with -f do not work on Python3 adds 7d6a95cf83f prepare_binding_Python: print readable errors if SWIG fails adds 7ac1039957f [GlobalISel] Defer setting HasCalls on MachineFrameInfo to [...] adds 172e8a7a5de [clang-scan-deps] strip the --serialize-diagnostics argument adds 2f6a52816fc [clang-tidy] Add check for classes missing -hash ⚠️ adds c96d5545f0c gn build: Merge r372445 adds 3e6590c4517 Support for 64-bit PC-relative relocations for X86_64 adds 6541c7988b8 Improve -Wtautological-overlap-compare adds bd7f2354ccb LiveIntervals: Add missing operator!= for segments adds eb6eb694e42 AMDGPU/GlobalISel: Allow selection of scalar min/max adds d98d3ea9fe3 avr targetinfo: remove unneeded dep on MC adds 27a80391718 Revert assertion added by r372394 adds 4c05de8c1d1 Merge and improve code that detects same value in comparisons. adds 77297f0761d Fix bad APInt compare. adds 10793e791f5 [Clang Interpreter] Fixed Bug 43362, build failure on GCC adds 4fa12ac92ce [X86] Add test case to show failure to fold load with getma [...] adds 04682939eb7 [X86] Use sse_load_f32/f64 and timm in patterns for memory [...] adds 88270475515 Stop tracking atexit/__cxa_atexit/pthread_atfork allocation [...] adds 5fe1e55d354 Avoid memory leak in ASan test adds 1b58389428e Add __lsan::ScopedInterceptorDisabler for strerror(3) adds c90fda6abe8 Attempt to fix a windows buildbot failure adds 8a74eca398a [MachinePipeliner] Improve the TargetInstrInfo API analyzeL [...] adds 3bb56fa4789 Revert "[SampleFDO] Expose an interface to return the size [...] adds fae979bc682 [AArch64][GlobalISel] Make <4 x s32> G_ASHR and G_LSHR legal. adds a59a886832b [AArch64][GlobalISel] Selection support for G_ASHR of <2 x s64> adds 9c7d599dec9 [AArch64][GlobalISel] Implement selection for G_SHL of <2 x i64> adds 854b0f0f003 [NFC][X86] Adjust check prefixes in bmi.ll (PR43381) adds 75d2c269211 [Docs] Updates sidebar links adds e75c6b6d48d [Docs] Bug fix for document not included in toctree adds 9ec71175063 [Support] Add a DataExtractor constructor that takes ArrayR [...] adds 63f6066b53d [Attributor] Implement "norecurse" function attribute deduction adds eee532cd5f9 Recommit [SampleFDO] Expose an interface to return the size [...] adds c62136e6748 Test mail. NFC. adds cd629ea0a8e SROA: Check Total Bits of vector type adds 1bfdab52a76 [CodeView] Add pragma push/pop_macro for ARM64_FPSR to enum header adds f4deacf995c [LLDB] Fix compilation for MinGW, remove redundant class na [...] adds 2e25c44dc3f [LLDB] Check for the GCC/MinGW compatible arch defines for [...] adds 5c38730dbd0 [LLDB] Use LLVM_FALLTHROUGH instead of a custom comment adds ed78dc8e437 [LLDB] Use SetErrorStringWithFormatv for cases that use LLV [...] adds 5534a675008 [LLDB] Cast -1 (as invalid socket) to the socket type befor [...] new c1b0873d421 [Docs] Adds new page for Getting Involved articles
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Summary of changes: clang-tools-extra/clang-tidy/objc/CMakeLists.txt | 1 + .../clang-tidy/objc/MissingHashCheck.cpp | 62 +++ .../clang-tidy/objc/MissingHashCheck.h | 35 ++ .../clang-tidy/objc/ObjCTidyModule.cpp | 3 + clang-tools-extra/docs/ReleaseNotes.rst | 6 + clang-tools-extra/docs/clang-tidy/checks/list.rst | 1 + .../docs/clang-tidy/checks/objc-missing-hash.rst | 16 + .../test/clang-tidy/objc-missing-hash.m | 68 +++ clang/docs/ReleaseNotes.rst | 6 +- clang/include/clang/AST/Expr.h | 5 + clang/include/clang/Tooling/ArgumentsAdjusters.h | 4 + clang/lib/AST/Expr.cpp | 106 ++++ clang/lib/AST/ExprConstant.cpp | 31 +- clang/lib/AST/Interp/InterpStack.cpp | 1 + clang/lib/Analysis/CFG.cpp | 77 ++- clang/lib/Analysis/ReachableCode.cpp | 2 +- clang/lib/Basic/Targets/SystemZ.cpp | 2 +- clang/lib/Sema/SemaCUDA.cpp | 1 - clang/lib/Sema/SemaExpr.cpp | 31 +- .../lib/StaticAnalyzer/Checkers/MallocChecker.cpp | 4 +- clang/lib/Tooling/ArgumentsAdjusters.cpp | 16 + clang/test/Analysis/array-struct-region.cpp | 6 + clang/test/Analysis/cfg.cpp | 21 + .../ClangScanDeps/Inputs/strip_diag_serialize.json | 7 + clang/test/ClangScanDeps/strip_diag_serialize.cpp | 11 + .../test/CodeGen/builtins-systemz-vector3-error.c | 2 +- clang/test/CodeGen/builtins-systemz-vector3.c | 2 +- .../test/CodeGen/builtins-systemz-zvector3-error.c | 2 +- clang/test/CodeGen/builtins-systemz-zvector3.c | 4 +- clang/test/CodeGen/systemz-abi-vector.c | 2 + clang/test/CodeGen/systemz-abi.c | 2 + clang/test/CodeGen/target-data.c | 2 + clang/test/Driver/systemz-march.c | 2 + clang/test/Misc/target-invalid-cpu-note.c | 2 +- clang/test/Preprocessor/predefined-arch-macros.c | 3 + clang/test/Sema/warn-overlap.c | 31 ++ clang/test/Sema/warn-unreachable.c | 2 +- clang/test/SemaCXX/compare-cxx2a.cpp | 6 + clang/test/SemaCXX/constant-expression-cxx2a.cpp | 13 + clang/test/SemaCXX/self-comparison.cpp | 82 +++ clang/test/SemaCXX/warn-unreachable.cpp | 5 +- clang/tools/clang-scan-deps/ClangScanDeps.cpp | 2 + compiler-rt/lib/asan/asan_interceptors.cpp | 49 +- compiler-rt/lib/asan/asan_interceptors.h | 12 + compiler-rt/lib/lsan/lsan_interceptors.cpp | 54 ++ .../sanitizer_common_interceptors.inc | 6 + .../sanitizer_platform_interceptors.h | 4 + compiler-rt/test/asan/TestCases/inline.cpp | 1 + lldb/scripts/Python/prepare_binding_Python.py | 10 +- lldb/source/Host/common/Socket.cpp | 8 +- .../Windows/Common/NativeProcessWindows.cpp | 8 +- .../Windows/Common/NativeRegisterContextWindows.h | 2 +- .../Process/Windows/Common/ProcessWindows.cpp | 6 +- .../Windows/Common/RegisterContextWindows.cpp | 2 +- .../Process/Windows/Common/TargetThreadWindows.cpp | 8 +- .../Python/module/unittest2/unittest2/loader.py | 2 +- lldb/tools/lldb-vscode/lldb-vscode.cpp | 5 +- llvm/docs/{index.rst => GettingInvolved.rst} | 554 ++++++++------------- llvm/docs/_templates/indexsidebar.html | 15 +- llvm/docs/conf.py | 11 +- llvm/docs/index.rst | 212 +------- llvm/include/llvm/CodeGen/LiveInterval.h | 4 + llvm/include/llvm/CodeGen/ModuloSchedule.h | 2 + llvm/include/llvm/CodeGen/TargetInstrInfo.h | 44 ++ .../llvm/DebugInfo/CodeView/CodeViewRegisters.def | 7 + llvm/include/llvm/ProfileData/SampleProf.h | 16 + llvm/include/llvm/ProfileData/SampleProfReader.h | 7 + llvm/include/llvm/Support/DataExtractor.h | 5 + llvm/include/llvm/Transforms/IPO/Attributor.h | 49 +- llvm/lib/Analysis/InlineCost.cpp | 13 - llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp | 4 +- llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp | 18 + llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp | 3 - llvm/lib/CodeGen/MachinePipeliner.cpp | 2 +- llvm/lib/CodeGen/ModuloSchedule.cpp | 40 +- llvm/lib/CodeGen/TargetInstrInfo.cpp | 2 + llvm/lib/Object/RelocationResolver.cpp | 2 + llvm/lib/ProfileData/SampleProfReader.cpp | 30 ++ llvm/lib/Support/Host.cpp | 2 +- .../Target/AArch64/AArch64InstructionSelector.cpp | 10 +- llvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp | 8 +- llvm/lib/Target/AMDGPU/SOPInstructions.td | 8 +- llvm/lib/Target/AVR/TargetInfo/LLVMBuild.txt | 4 +- llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 162 +++--- llvm/lib/Target/Hexagon/HexagonInstrInfo.h | 19 +- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 144 +++--- llvm/lib/Target/PowerPC/PPCInstrInfo.h | 28 +- llvm/lib/Target/PowerPC/PPCLoopPreIncPrep.cpp | 2 +- llvm/lib/Target/SystemZ/SystemZISelLowering.cpp | 2 +- llvm/lib/Target/SystemZ/SystemZProcessors.td | 3 +- llvm/lib/Target/SystemZ/SystemZSchedule.td | 2 +- ...temZScheduleArch13.td => SystemZScheduleZ15.td} | 64 +-- .../Target/SystemZ/SystemZTargetTransformInfo.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 2 +- llvm/lib/Target/X86/X86InstrAVX512.td | 7 +- llvm/lib/Transforms/IPO/Attributor.cpp | 41 +- llvm/lib/Transforms/Scalar/SROA.cpp | 10 +- llvm/test/Analysis/CostModel/SystemZ/fp-cast.ll | 36 +- llvm/test/Analysis/CostModel/SystemZ/intrinsics.ll | 22 +- .../Analysis/CostModel/SystemZ/logic-miscext3.ll | 24 +- .../CodeGen/AArch64/GlobalISel/call-translator.ll | 1 - .../AArch64/GlobalISel/legalize-vector-shift.mir | 78 +++ .../AArch64/GlobalISel/select-vector-shift.mir | 59 +++ .../AArch64/GlobalISel/tail-call-no-save-fp-lr.ll | 20 + .../CodeGen/AMDGPU/GlobalISel/inst-select-smax.mir | 15 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-smin.mir | 15 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-umax.mir | 15 +- .../CodeGen/AMDGPU/GlobalISel/inst-select-umin.mir | 15 +- llvm/test/CodeGen/Hexagon/swp-epilog-phi7.ll | 4 +- llvm/test/CodeGen/SystemZ/cond-move-01.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-02.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-03.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-06.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-07.ll | 2 +- llvm/test/CodeGen/SystemZ/cond-move-08.mir | 4 +- llvm/test/CodeGen/SystemZ/ctpop-02.ll | 4 +- llvm/test/CodeGen/SystemZ/not-01.ll | 4 +- llvm/test/CodeGen/SystemZ/vec-bswap-01.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-02.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-03.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-04.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-05.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-06.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-bswap-07.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-conv-03.ll | 4 +- llvm/test/CodeGen/SystemZ/vec-eswap-01.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-eswap-02.ll | 2 +- llvm/test/CodeGen/SystemZ/vec-intrinsics-03.ll | 4 +- llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll | 4 +- llvm/test/CodeGen/X86/avx512-intrinsics.ll | 16 + llvm/test/CodeGen/X86/bmi.ll | 4 +- .../CodeGen/X86/isel-blendi-gettargetconstant.ll | 19 + .../SystemZ/{insns-arch13.txt => insns-z15.txt} | 4 +- .../SystemZ/{insn-bad-arch13.s => insn-bad-z15.s} | 4 +- .../{insn-good-arch13.s => insn-good-z15.s} | 4 +- llvm/test/Transforms/FunctionAttrs/norecurse.ll | 108 +++- llvm/test/Transforms/FunctionAttrs/willreturn.ll | 43 +- llvm/test/Transforms/Inline/X86/switch.ll | 160 ++++++ .../SROA/vector-promotion-different-size.ll | 24 + llvm/test/tools/llvm-profdata/show-prof-size.test | 7 + llvm/tools/llvm-profdata/llvm-profdata.cpp | 27 +- llvm/tools/llvm-readobj/DwarfCFIEHPrinter.h | 8 +- llvm/tools/llvm-readobj/ELFDumper.cpp | 24 +- .../clang-tools-extra/clang-tidy/objc/BUILD.gn | 1 + 144 files changed, 2125 insertions(+), 1108 deletions(-) create mode 100644 clang-tools-extra/clang-tidy/objc/MissingHashCheck.cpp create mode 100644 clang-tools-extra/clang-tidy/objc/MissingHashCheck.h create mode 100644 clang-tools-extra/docs/clang-tidy/checks/objc-missing-hash.rst create mode 100644 clang-tools-extra/test/clang-tidy/objc-missing-hash.m create mode 100644 clang/test/ClangScanDeps/Inputs/strip_diag_serialize.json create mode 100644 clang/test/ClangScanDeps/strip_diag_serialize.cpp copy llvm/docs/{index.rst => GettingInvolved.rst} (59%) rename llvm/lib/Target/SystemZ/{SystemZScheduleArch13.td => SystemZScheduleZ15.td} (97%) create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/legalize-vector-shift.mir create mode 100644 llvm/test/CodeGen/AArch64/GlobalISel/tail-call-no-save-fp-lr.ll create mode 100644 llvm/test/CodeGen/X86/isel-blendi-gettargetconstant.ll rename llvm/test/MC/Disassembler/SystemZ/{insns-arch13.txt => insns-z15.txt} (99%) rename llvm/test/MC/SystemZ/{insn-bad-arch13.s => insn-bad-z15.s} (99%) rename llvm/test/MC/SystemZ/{insn-good-arch13.s => insn-good-z15.s} (99%) create mode 100644 llvm/test/Transforms/Inline/X86/switch.ll create mode 100644 llvm/test/Transforms/SROA/vector-promotion-different-size.ll create mode 100644 llvm/test/tools/llvm-profdata/show-prof-size.test