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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-master-aarch64-lts-allyesconfig in repository toolchain/ci/llvm-project.
from 032e1fdcd47 [analyzer] Turn an assert into an if condition adds 8fd6aa5ed2d [SemaDeclCXX] Allow inheriting constructor declaration to s [...] adds e8f666f48d8 [NFC][InstCombine] Some tests for 'shift amount reassoc in [...] adds 37a928efd9f [lldb][NFC] Remove unused MaterializeInitializer and Materi [...] adds a8dad5c79b6 [BPF] Fix bpf llvm-objdump issues. adds 31f829f0cd4 [X86] Add a one use check to the combineStore code that han [...] adds 8651ec6a844 TableGen: Revert changes from r369038 adds cfdc2b9bd92 AMDGPU: Disambiguate v3f16 format in load/store tables adds 479f3bdb2c8 AMDGPU: Fix iterator error when lowering SI_END_CF adds f43106e341d [SelectionDAG] Add a node creation debug message to getMach [...] adds 74168ded039 [TargetLowering] Teach computeRegisterProperties to only wi [...] adds b4806822d2d [Diagnostics] Improve -Wsizeof-pointer-div adds 9b957d33217 [InstCombine] Cherry-pick NFC cleanups of foldShiftIntoShif [...] adds 000dfdab2df [MC] MCFixup - Fix cppcheck + MSVC analyzer uninitialized m [...] adds 133e2d7bf83 [X86][SSE] Improve PACKSS shuffle tests to better match cod [...] adds a66edd86e27 [X86] isTargetShuffleEquivalent - early out on illegal shuf [...] adds fee2546f3f2 [X86] isTargetShuffleEquivalent - add BUILD_VECTOR matching adds 63b3c56fca6 Fix signed/unsigned comparison warning. NFCI. new 37860d524e8 [clang-format] Fix a bug that joins template closer and = new 9e074c06fe0 [X86] Improve lower1BitShuffle handling for KSHIFTL on narr [...]
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Summary of changes: clang/docs/ClangFormatStyleOptions.rst | 4 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 2 + clang/include/clang/Format/Format.h | 4 +- clang/lib/Format/TokenAnnotator.cpp | 2 +- clang/lib/Sema/SemaDeclCXX.cpp | 3 +- clang/lib/Sema/SemaExpr.cpp | 10 +- clang/test/CXX/special/class.inhctor/elsewhere.cpp | 1 + clang/test/Sema/div-sizeof-ptr.cpp | 24 +- clang/unittests/Format/FormatTest.cpp | 9 +- .../Plugins/ExpressionParser/Clang/IRForTarget.cpp | 65 --- .../Plugins/ExpressionParser/Clang/IRForTarget.h | 21 - llvm/include/llvm/MC/MCFixup.h | 6 +- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 1 + llvm/lib/CodeGen/TargetLoweringBase.cpp | 34 +- llvm/lib/Object/RelocationResolver.cpp | 4 +- llvm/lib/Target/AMDGPU/BUFInstructions.td | 200 ++++---- llvm/lib/Target/AMDGPU/SIInstrInfo.td | 5 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 4 +- llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp | 8 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp | 10 +- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 4 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 76 ++- .../Transforms/InstCombine/InstCombineCompares.cpp | 13 +- llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir | 69 ++- llvm/test/CodeGen/BPF/objdump_two_funcs.ll | 69 +++ llvm/test/CodeGen/X86/avx512-trunc.ll | 20 + llvm/test/CodeGen/X86/kshift.ll | 50 +- llvm/test/CodeGen/X86/packss.ll | 115 ++++- llvm/test/CodeGen/X86/promote-vec3.ll | 116 +++-- llvm/test/CodeGen/X86/vec_cast.ll | 46 +- llvm/test/CodeGen/X86/vec_setcc.ll | 45 ++ llvm/test/CodeGen/X86/widen_load-2.ll | 20 +- ...eassociation-in-bittest-with-truncation-lshr.ll | 546 +++++++++++++++++++++ llvm/utils/TableGen/IntrinsicEmitter.cpp | 4 +- 34 files changed, 1238 insertions(+), 372 deletions(-) create mode 100644 llvm/test/CodeGen/BPF/objdump_two_funcs.ll create mode 100644 llvm/test/Transforms/InstCombine/shift-amount-reassociation-in- [...]