[Tcwg-commits] [toolchain/ci/llvm-project] branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Os updated (5e97d37b9608 -> 9920943ea201)

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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_bmk_llvm_apm/llvm-master-aarch64-spec2k6-Os in repository toolchain/ci/llvm-project.

from 5e97d37b9608 [libc++][NFC] Use cpp17_output_iterator in tests. adds 4111fafa5b88 [ORC] Fix JITDylib debug output: don't output symbol table [...] adds 3db39e74792d [DAGCombiner] Fix dependency analysis in checkMergeStoreCa [...] adds e990e591c976 [LangRef] Require elementtype attribute for gc.statepoint [...] adds c680eeab30d6 [IRBuilder][RS4GC] Require FunctionCallee when creating st [...] adds 2189960e65a9 [pseudo] Rename Tests.cpp => Test.cpp adds b94f09524efe [pseudo] NFC, clangSyntaxPsuedo => clangToolingSyntaxPseudo adds cc306740ccfc [flang] Handle logical constant value for quiet in STOP stmt adds 8471c537d55d Split fast-basictest.ll according to passes responsible fo [...] adds 9f30afffaae9 [RS4GC] Restore DAG check line (NFC) adds 6b73a4cc7db9 [AArch64][SVE] Remove false register dependency for unary [...] adds 31fa3a4d4431 [OpenCL] Move OpenCL 2.0 atomics into multiclass; NFC adds 38073b066973 [flang] Upstream partial lowering of GET_COMMAND_ARGUMENT [...] adds ffe8720aa060 Reduce dependencies on llvm/BinaryFormat/Dwarf.h adds e1db505b42f4 [syntax][pseudo] Introduce the C++ spec grammar. adds 42afaf7f472c [clang][CodeGen] Use memory type representation in `va_arg` adds acc3ce945c32 [Format] Don't derive pointers right based on space before [...] adds cc8ed7b5aaa4 [Format] Also test rvalue-qualified functions adds 06f3ef66266f [ConstraintElimination] Allow adding pre-conditions for co [...] adds b82da8b55560 [libc++] Remove vector base class adds ae9c0740648f [OpenMP][Clang] Allow ancestor device modifier only with r [...] adds 13b58f971056 [lldb] Remove Log:Channel::GetLogIfAll adds 7b0372509787 Revert "[x86] try harder to scalarize a vector load with e [...] adds bca998ed3c9a [AArch64] Generate fcmps when appropriate for neon intrinsics adds 0d8092dd485a [AArch64] Fix legalization of v1f64 strict_fsetcc and stri [...] adds ca05edd927db [AMDGPU] SILoadStoreOptimizer: simplify OptimizeListAgain test adds 46f9e45ef036 [Statepoint] Update gc.statepoint calls in tests with elem [...] adds 33ef8bdf36cb [AMDGPU] SILoadStoreOptimizer: simplify optimizeInstsWithS [...] adds 8f8e13056a42 [Verifier] Require elementtype on gc.statepoint intrinsics adds f62a400cdf11 [Statepoint] Determine return type from elementtype attribute adds 6afbf8354b08 [NFC][SimplifyCFG] 'merge compatible invokes': test with P [...] adds 0a781d98fb0d [ConstraintElimination] Add initial signed support. adds 36df803dfd33 [SimplifyCFG] Merge compatible `invoke`s of a `landingpad` adds 74d1fe72f4f2 [AArch64] Expand UADDLV patterns to SADDLV adds 00bbda07ae8b [AMDGPU] SILoadStoreOptimizer: simplify class/subclass checks adds 20085df22a84 [NFC][SVE] Change useSVEForFixedLengthVectorVT to allow un [...] adds 95a52b376ab2 [AMDGPU][GFX9][DOC][NFC] Corrected description of register [...] adds 001cb43159f3 [AMDGPU] SILoadStoreOptimizer: fewer calls to offsetsCanBe [...] adds d4e4ef2e81e0 [HIP] Support code object v5 adds 700aebaf745f [libc] Set default CXX_STANDARD to C++17 and let targets s [...] adds 466c0d0dc7c8 [gn build] (manually) port e1db505b42f4 (clang-pseudo) adds 853e0aa424e4 Don't dllexport reference temporaries adds 85243124cf7a Tweak some uses of std::iota to skip initializing the unde [...] adds f392e9d264cf [BitcodeReader] Resolve error handling todo adds c00ef03d7377 [BitstreamReader] Handle errors more gracefully adds b8fbffc8b11f [BitstreamReader] Fix incorrect error forwarding adds 1eb4f88bfef1 [x86] add test coverage for AMD Ryzen fast sqrt codegen; NFC adds 0236c571810d [InstCombine] try to fold one-demanded-bit-of-multiply adds 39ceea26c59a [NFC] Move FoldingSetNodeIDRef::ComputeHash and FoldingSet [...] adds 0b989a03b9dd [Support] Add isShiftedMask_32/isShiftedMask_64 unit test [...] adds c83905a30855 [RISCV] Add inline expansion for vector fround. adds 234e54bdd8c1 [RISCV] Add more types of shuffles isShuffleMaskLegal. adds a456ace9c1f0 [AMDGPU] SILoadStoreOptimizer: rewrite checkAndPrepareMerg [...] adds 332d70cd45b5 [NFC][SimplifyCFG] 'merge compatible invokes': tests w/ PH [...] adds 0d384e922823 [NFC][SimplifyCFG] Extract `IncomingValuesAreCompatible()` [...] adds 55cd727c9ad1 [SimplifyCFG] 'merge compatible invokes': allow PHI nodes [...] adds fa6b9e401085 [libc++] Normalize all our '#pragma GCC system_header', an [...] adds 679c77ede35a [Driver][Android] Removed obsoleted --warn-shared-textrel adds b35be6fe98e3 [Clang][Sema][OpenMP] Sema support for `atomic compare` adds 44cdca37c01a [libc++] Define `namespace views` in its own detail header. adds 4a02562275d4 [AMDGPU] Lazily init pal metadata on first function adds 8b84ed23d9f5 [gn build] Port 44cdca37c01a adds 6dbba770a8f9 [gn build] Port 4a02562275d4 adds d36bd0857289 [BOLT][TEST] Add section flags for .gcc_except_table adds 37bad565bf61 Revert "[MLIR][Presburger] Use `SmallVector` instead of `s [...] adds f3f8e3da9f22 [SLP] Remove ScheduleData::UnscheduledDepsInBundle field [ [...] adds 9d1857f69f4e [msan] Guard FP_XSTATE_MAGIC1 usage with SANITIZER_GLIBC adds fa52788b7a6d [lldb] Improve RichManglingContext ergonomics (NFC) adds aed965d55d46 [lldb] Don't construct the demangled strings while indexin [...] adds 012c811fed44 [Clang][Sema][OpenMP] Remove unused variables. NFC. adds 9385ece95a4a [HeaderSearch] Track framework name in LookupFile adds 3918dd6b8acf [mte] fix runOnFunction return value falsely suggesting fu [...] adds b4be18219e81 [Libomptarget] Remove AMDGPU XFAIL from test adds edbb0f6df76b [lldb] Rename DemangleWithRichManglingInfo to GetRichMangl [...] adds 1d8bbe3d255f [RISCV] Implement a basic version of AArch64RedundantCopyE [...] adds e55ace6c3729 [gn build] Port 1d8bbe3d255f adds dbed14d215fe [llvm-libtool-darwin] Fix crash with bitcode asm module adds fff3e1dbaa9e [x86] enable fast sqrtss/sqrtps tuning for AMD Zen cores adds 56d46b36fc23 [clang] roll-forward "[clang] Mark `trivial_abi` types as [...] adds b5ea288d13d0 [mlir][linalg] Let tile and fuse fail for tile sizes zero. adds 2cff9ee46bff [mlir] Use SetVector to deduplicate shape ops operands adds 35f7dd601d33 [clang-format][NFC] Fix a bug in setting type FunctionLBrace adds 4998b1a6cd98 [mlir][sparse] Updating sparse-compiler pipeline for python usage adds 254ee89c7a4d [libc++][ranges][NFC] On the Ranges status page, fix some [...] adds b8ec430de717 [Clang][Sema][OpenMP] Fix uninitialized variable Op adds eeb29c8477d9 [OpenMP] Add -Bsymbolic to arguments for GNU linker adds 8c5edb59cf48 Use functions with prototypes when appropriate; NFC adds 0cc6165d0558 [SLP] Strengthen internal asserts about scheduled node sta [...] adds 034adaf5be4b [OpenMP] Completely remove old device runtime adds 02dbed4b7f4f [mte] [nfc] do not keep Tag in AllocaInfo adds 0d54457f8aed [IntrospectionTest] Replace "return" with "GTEST_SKIP" adds 78c6b9000029 [APInt] Update APInt::isShiftedMask() description. NFC. adds d70bd7a14864 Clean up a test case. adds abcbe87311db [libc++] Remove unused code paths for non-existent builtins adds 69873633bdf8 [gn build] Port dbed14d adds 679f8a885b65 [libc++] Move fpos into its own header adds 935abab65caf AMDGPU: Use module level register maximums for unknown callees adds 4622afa94c01 AMDGPU: Convert AMDGPUResourceUsageAnalysis to a Module pass adds be3d811e2c21 Rename this file to fix the typo in its name; NFC adds c67c9cfe3f39 [WebAssembly] Refactor and fix emission of external IR glo [...] adds cc1d02ba2d17 [libc++] No longer support ranges::begin(x) when x is an a [...] adds fc604825ec0a [bazel] Port dbed14d215fe adds f457863ae345 [ELF] Support REL-format R_AARCH64_NONE relocation adds 8ce13bc93be4 [PowerPC] Option controling scalar MASS convertion adds 36e68c11ad6f [mlir][spirv] Add support for converting vector.shuffle adds da08d50fd67e [lld][macho] Add more skip platform check for libSystem re [...] adds 4dfd11324eb0 [clangd] Properly compute framework-style include spelling adds 66995727054f [mlir][spirv] Fix missing dependencies in BUILD.bazel adds f1f15d02859a AMDGPU: Fix failing test adds 5966c2ec026c [OpenMP] Fix mismatched device runtime name adds 3fd30958b792 [ELF][test] Test getImplicitAddend for R_ARM_NONE/R_RISCV_ [...] adds 9dd4c2dcb63a [mlir][vector] Add constant folder for vector.shuffle ops adds a27304c50f76 [libc++] Bump the version of Clang we use in the CI adds ea2206d70db1 [libc++] Replace includes of <utility> with specific detai [...] adds 78205faf54d3 [libc++][Docker] Don't actually start using a newer compil [...] adds 8b8b49137912 AMDGPU/GlobalISel: Fix assertions on invalid addrspacecasts adds c64655c78c2f [mlir:NFC] Move BaseOpWithOffsetSizesAndStrides out of OpBase.td adds 6abb70c2d008 Attempt forward fix after 4dfd113 adds 6b78526b1b87 [OpenMP] Emit remark on the captured call instead of the variable adds cd4ed08b5aa1 [GlobalISel] Don't combine instructions which are fed by m [...] adds fb7ddd0628f4 Revert "[clangd] Properly compute framework-style include [...] adds c161b30f5c23 [yaml2obj] Support R_PPC_* relocation types adds 53fc5d9b9a01 [ELF] Support R_PPC_NONE/R_PPC64_NONE in getImplicitAddend adds f5353c10af24 [NFC][SimplifyCFG] 'merge compatible invokes': tests for n [...] adds cd9e6a9c10ef [NFC][InstCombine] `visitCallInst()`: make comment more un [...] adds 75c1d1dab417 [NFC][SimplifyCFG] Add test showing failure to drop normal [...] adds 598833c98759 [SimplifyCFG] `markAliveBlocks()`: recognize that normal d [...] adds 981f0a14f1de [mlir] Add canonicalizer to merge shape.assuming_all ops adds db1176ce66cf Revert "[SimplifyCFG] `markAliveBlocks()`: recognize that [...] adds 296e03fc6418 [mlir][NFC] Fully qualify call to `mlir::success` in auto [...] adds 194b164eb51e [BOLT][NFC] Fix compiler warnings adds 67cb8fd75b55 [NFC][SimplifyCFG] Add test w/ shared normal dest of a `no [...] adds 18ff1ec3c3c6 Reland [SimplifyCFG] `markAliveBlocks()`: recognize that n [...] adds d752ea9a7235 [RISCV] Remove exclusions for zext.h/zext.w from our (and [...] adds 3dd2d4c0a239 [Debuginfod] Fix curl_easy_init in -DLLVM_ENABLE_ASSERTION [...] adds 42f9ca55dd48 [Debuginfod][test] Fix debuginfod.test to use %python inst [...] adds 280716e75f76 [OpenMP] Change amdgcn to amdgpu in device library handling adds b9d4fe87e123 [gn build] Port 679f8a885b65 adds eddf38496556 [BOLT-UnitTests] Fix shared libraries build adds 991696c2eba5 [flang] Debugging of ACCESS='STREAM' I/O (take 2) adds 7f928cbac259 [BOLT] Add nfc-check-setup script adds 34de63c37fa9 [test] Remove unnecessary require<> in LoopAccessAnalysis tests adds 997f2a56dea1 [ELF] Avoid wrapping unreferenced lazy symbols adds 0b7669f33331 [X86] Introduce more common modern tunings into `generic` adds 8ea4aed50a9f [OpenMP] Add search path for llvm-strip adds 38449c98f3d3 [Driver] Default to -fno-math-errno for musl adds dee058c67059 [CSSPGO] Turn on ext-tsp by default for CSSPGO. adds caa1ebde7067 Don't assume that a new cleanup was added to InnermostEHScope. adds c6f0940d9964 [NFC] Remove unnecessary #includes adds 9bbe44fb9d69 github: Fix automated PR creation for backports adds 070bc9c1fbc4 [MLIR][Presburger][NFC] Fix clang-tidy warnings adds 5f350099960c [RISCV] Remove a ComputeNumSignBits call from an isel spec [...] adds a37c38176a5a Increase memory buffer for scanning objc classes on darwin [...] adds 9e08e9298059 [ELF] Allow STV_PROTECTED shared definition to set exportDynamic adds 74b1c4c36740 [clang] added alloc allign attr to memalign adds 24c12bfb3345 [libc++] __config cleanup; _LIBCPP_ABI_UNSTABLE should set [...] adds addd0733250a [AIX][PowerPC][PGO] Generate .ref for some PGO sections adds 2845ed29d4ce [MLIR][Presburger][NFC] Use getters for IntegerPolyhedron members adds 7119f76c4779 [clang] added allocsize attribute to allocation functions adds 8a98c3e07f63 [MLIR][Presburger] MaybeLocalRepr: add explicit bool() for [...] adds bec1aa3069d1 [ConstraintElimination] Add test with trivially false cond [...] adds 6452549f300c [DAGCombiner] Fold vecreduce_or/and if operand is insert_s [...] adds 5488021f3ed9 [libc++] Add Unstable ABI CI run adds 5372160a188e [InstCombine] SimplifyDemandedBits - mul(x,x) - if only de [...] adds 4f97aa7e1d70 [InstCombine] Add PR34063 test coverage adds f2f4080c10f4 [PowerPC] Fix SSE translation on FreeBSD adds ef3fade14b32 [lldb] Use mangled symbol name to look for __asan::AsanDie() adds 7288b85cc80f [ELF] --wrap: don't copy exportDynamic adds ac2911e738bb [ELF] Refactor how exportDynamic is set. NFC adds 6daaf5a44925 [X86] Add some better common check-prefixes to slow-pmulld.ll adds bb4eacdb7079 [ELF] Refactor how Symbol::used is set. NFC adds 38e6361d847e [ELF] Simplify includeInSymtab. NFC adds 764cd491b126 [ELF] Simplify shouldKeepInSymtab after Symbol::used is fa [...] adds eb9ac2cc14b6 [llvm-remark-size-diff] Don't use enum name as auto variable name adds 7c675923c739 [ELF] Merge canInline into scriptDefined adds 673d68cd923a [RISCV] Fold (sext_inreg (fmv_x_anyexth X), i16) -> (fmv_x [...] adds d1899da3a2c5 [RISCV] Add more tests for rotate idioms. Add more RUN lines. NFC adds c1cef111a3bf Revert "[RISCV] Fold (sext_inreg (fmv_x_anyexth X), i16) - [...] adds 527654dcebf8 [libunwind] Attempt to fix broken sphinx doc link adds 2b9554b88501 [libunwind] [sparc] Add SPARCv9 support adds 73f55fba7651 [ELF] Reorder Symbol members to improve access locality. NFC adds 171da443d598 [HIPSPV] Fix literals are mapped to Generic address space adds a40dc4eaf8a1 Simplify mask creation with llvm::seq. NFCI. adds f9e3ca542ec1 [ELF] Move Symbol::needsTlsLd to config->needsTlsLd. NFC adds a701dc8edae6 Revert "Fixed typos in TestLldbGdbServer.py" adds 11d64edbf928 Revert "Disable TestLldbGdbServer on Dwarf2 and clang vers [...] adds 9af90e205aad [ELF] De-template reportUndefinedSymbols. NFC adds 50460b800462 [ELF] Don't access other eSym members it st_shndx == SHN_U [...] adds ce9417348e44 [SLP] Skip a DenseSet<unsigned> -> bit vector conversion. NFCI. adds 70fc36d8ed52 [MC] Use default member initialization in WasmCustomSection (NFC) adds d0f52ff12abc [ADT] Use default member initialization in DebugEpochBase (NFC) adds e24384b5064c [Transforms] Use default member initialization in Simplify [...] adds f0726036857a [ADT] Use default member initialization in OptionalStorage (NFC) adds 1569252774db [IR] Use default member initialization in GlobalObject (NFC) adds 7ae64e598a19 [Support] Use default member initialization in ScopedPrint [...] adds 607c5890481b fix module build failure adds 511fa14ce318 fix module build failure adds c5699c6eb772 fix module build failure adds 977a1a523c2c [ELF] Symbol::replace: use the old nameData/nameSize. NFC adds 6cd0015e7827 [clang-format][docs] Fix incorrect 'clang-format 14' optio [...] adds 2f4d44bcd4a1 AMDGPU: add test to show wwm register overwrite issue adds 0719c43735b2 AMDGPU: Don't clobber source register for V_SET_INACTIVE_* adds 5ad2aae24474 [ELF] SharedFile::parse: move verdefIndex assignment outsi [...] adds f3a725af43b3 [RISCV] Add signext test for llvm.abs.i32 for rv64 Zbb. adds bd5b279af04a [IR] Use default member initialization in PMDataManager (NFC) adds a867f32c5f40 [Transforms] Use default member initialization in EscapeEn [...] adds 9ed6800ef98f [Transforms] Use default member initialization in MaskOps (NFC) adds 31d72f0e457a [Transforms] Use default member initialization in TruncIns [...] adds cb13ebbf46e8 [Transforms] Use default member initialization in AAIsDead [...] adds 2d650ee03e0b [Transforms] Use default member initialization in SCEVFind [...] adds 52d981a4c13a [SampleFDO] Enable FSAFDO loading passes if --enable-fs-di [...] adds b4626f22defa [mlir] Do not use an empty source file when building aggre [...] adds bad1b7fbb0fe [ELF] Fix crash when an input is incompatible with a lazy [...] adds 74b98ab1dbd5 [X86] Fold ZERO_EXTEND_VECTOR_INREG(BUILD_VECTOR(X,Y,?,?)) [...] adds 3dff4f5cfb46 [ARM] Add extra vabd, vhadd and vmulh tests. NFC adds b7d3a2b62f4d [ARM] Mark i64 and f64 shuffles as Custom for MVE adds 20e212197a5d [Support] Use llvm_unreachable instead of LLVM_BUILTIN_UNR [...] adds d3f966c6f02f [AArch64] LowerVectorSRA_SRL_SHL - silence dead code warning adds 7275de7fb2f0 [AArch64] translateLocChar - silence dead code warning adds 541ca12dcd7c [LV] Use VPReplicateRecipe::isUniform instead isUniformAft [...] adds 784c78f20fd6 Fix Wdocumentation unknown parameter warning adds 1ab7d43bf9e0 [clang][CodeGen] Add _BitInt test coverage to builtins-ele [...] adds 1b27940a112c Revert rG7275de7fb2f087871611d037d1b529b226dd0521 "[AArch6 [...] adds 0f685976057e Pre-commit test cases for DAG combine folds of SSHLSAT/USH [...] adds cecf11c31544 [DAGCombiner] Fold SSHLSAT/USHLSAT to SHL when no saturati [...] adds 31626cc111c0 [lld-macho] Add -pagezero_size adds 631b94cc22a8 [Driver] Remove redundant string initialization (NFC) adds 3a8c51480ff8 [CodeGen] Use = default (NFC) adds ee4b6cf5387b [Breakpoint] Remove redundant member initialization (NFC) adds eb65f971f2aa [llvm] Fix header guards (NFC) adds c35ccd2ac852 [DAGCombiner][RISCV] Allow rotates by non-constant to be m [...] adds b93287754bfa [InstCombine] Add mul(x,x) tests showing miscompile adds 94453952fc95 [KnownBits] Add support for X*X self-multiplication (update) adds 0d8850ae2cae Remove dead forward declaration (NFC) adds 1ef04326ec5f [LoopInterchange] Support loop interchange with floating p [...] adds edca177cbeb6 [mlir] Add canonicalizer to remove redundant shape.cstr_br [...] adds ace01605e04d [mlir] Split out a new ControlFlow dialect from Standard adds fe23a6fb75e6 [mlir] Fixup python bindings after splitting cf ops from std. adds 330838eb907f [mlir] Fix GpuToLLVM conversion pass after ControlFlow ope [...] adds 6635c12ada0d [mlir] Use SmallBitVector instead of SmallDenseSet for Aff [...] adds 3fce5bb7b076 [Transforms] Use default member initialization in LoopVers [...] adds a1a8d10a1728 [Transforms] Use default member initialization in LibCallS [...] adds 949f56465bfe [IR] Use default member initialization in GlobalValue (NFC) adds 2204ac297864 [mlir][bazel] Update post ControlFlow dialect split adds 8bb32e5cfe32 [X86] Add pre-commit test for bit test optimization. NFC adds b3b129f11f3c [DAGCombiner][AArch64] Enhance to support for scalar CSINC new 1391f91b1f62 [NFC] Precommit test case for PR53357 new 3a3cb929ab6f [llvm] Use = default (NFC) new 9920943ea201 [JITLink] Fix the incorrect relocation behavior for R_RISC [...]

The 3 revisions listed above as "new" are entirely new to this repository and will be described in separate emails. The revisions listed as "adds" were already present in the repository and have only been added to this reference.

Summary of changes: .github/workflows/issue-release-workflow.yml | 4 + bolt/lib/Passes/IndirectCallPromotion.cpp | 2 - bolt/lib/Passes/Inliner.cpp | 4 - bolt/lib/Rewrite/BinaryPassManager.cpp | 2 +- bolt/test/X86/Inputs/exc4sw.S | 4 +- bolt/test/X86/Inputs/exc_args.s | 4 +- bolt/unittests/Core/CMakeLists.txt | 14 +- bolt/utils/nfc-check-setup.py | 59 ++ clang/docs/ClangCommandLineReference.rst | 4 +- clang/docs/ClangFormatStyleOptions.rst | 14 +- clang/docs/LanguageExtensions.rst | 5 + clang/include/clang/AST/Type.h | 2 + clang/include/clang/Basic/AttrDocs.td | 3 + clang/include/clang/Basic/DiagnosticDriverKinds.td | 2 +- clang/include/clang/Basic/DiagnosticSemaKinds.td | 11 + clang/include/clang/Basic/TokenKinds.def | 1 + clang/include/clang/Driver/Options.td | 8 +- clang/include/clang/Format/Format.h | 14 +- clang/lib/AST/Type.cpp | 19 + clang/lib/CodeGen/CGBuiltin.cpp | 20 +- clang/lib/CodeGen/CGCall.cpp | 2 +- clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp | 3 +- clang/lib/CodeGen/CGStmtOpenMP.cpp | 8 +- clang/lib/CodeGen/CodeGenModule.cpp | 11 + clang/lib/CodeGen/TargetInfo.cpp | 3 +- clang/lib/Driver/ToolChains/AMDGPU.cpp | 57 +- clang/lib/Driver/ToolChains/AMDGPU.h | 3 +- clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp | 7 +- clang/lib/Driver/ToolChains/Clang.cpp | 10 - clang/lib/Driver/ToolChains/CommonArgs.cpp | 4 +- clang/lib/Driver/ToolChains/Cuda.cpp | 7 +- clang/lib/Driver/ToolChains/Gnu.cpp | 13 +- clang/lib/Driver/ToolChains/Linux.cpp | 2 +- clang/lib/Driver/ToolChains/ROCm.h | 38 +- clang/lib/Driver/ToolChains/WebAssembly.cpp | 2 +- clang/lib/Format/Format.cpp | 9 + clang/lib/Format/UnwrappedLineParser.cpp | 3 +- clang/lib/Frontend/CompilerInvocation.cpp | 20 +- clang/lib/Headers/ppc_wrappers/mm_malloc.h | 2 +- clang/lib/Lex/HeaderSearch.cpp | 10 +- clang/lib/Sema/OpenCLBuiltins.td | 42 +- clang/lib/Sema/SemaDecl.cpp | 22 +- clang/lib/Sema/SemaExprCXX.cpp | 9 +- clang/lib/Sema/SemaOpenMP.cpp | 398 +++++++- clang/lib/Tooling/Syntax/Pseudo/CMakeLists.txt | 2 +- clang/lib/Tooling/Syntax/Pseudo/GrammarBNF.cpp | 2 +- clang/lib/Tooling/Syntax/Pseudo/cxx.bnf | 739 ++++++++++++++ clang/test/CMakeLists.txt | 1 + .../CodeGen/aarch64-neon-intrinsics-constrained.c | 32 +- clang/test/CodeGen/alloc-fns-alignment.c | 24 + clang/test/CodeGen/allocs-fns-allocsize.c | 39 + clang/test/CodeGen/arm64-arguments.c | 10 + clang/test/CodeGen/builtins-elementwise-math.c | 35 +- .../test/CodeGenCXX/microsoft-abi-eh-cleanups.cpp | 22 + clang/test/CodeGenCXX/reference-temporary-ms.cpp | 8 + clang/test/CodeGenHIP/hipspv-addr-spaces.cpp | 8 + .../hip_dev_lib/libomptarget-amdgcn-gfx803.bc | 0 .../hip_dev_lib/libomptarget-amdgcn-gfx906.bc | 0 .../hip_dev_lib/libomptarget-amdgpu-gfx803.bc | 0 .../hip_dev_lib/libomptarget-amdgpu-gfx906.bc | 0 .../rocm/amdgcn/bitcode-no-abi-ver/asanrtl.bc | 0 .../Inputs/rocm/amdgcn/bitcode-no-abi-ver/hip.bc | 0 .../Inputs/rocm/amdgcn/bitcode-no-abi-ver/ockl.bc | 0 .../oclc_correctly_rounded_sqrt_off.bc | 0 .../oclc_correctly_rounded_sqrt_on.bc | 0 .../amdgcn/bitcode-no-abi-ver/oclc_daz_opt_off.bc | 0 .../amdgcn/bitcode-no-abi-ver/oclc_daz_opt_on.bc | 0 .../bitcode-no-abi-ver/oclc_finite_only_off.bc | 0 .../bitcode-no-abi-ver/oclc_finite_only_on.bc | 0 .../bitcode-no-abi-ver/oclc_isa_version_1010.bc | 0 .../bitcode-no-abi-ver/oclc_isa_version_1011.bc | 0 .../bitcode-no-abi-ver/oclc_isa_version_1012.bc | 0 .../bitcode-no-abi-ver/oclc_isa_version_803.bc | 0 .../bitcode-no-abi-ver/oclc_isa_version_900.bc | 0 .../bitcode-no-abi-ver/oclc_isa_version_908.bc | 0 .../bitcode-no-abi-ver/oclc_unsafe_math_off.bc | 0 .../bitcode-no-abi-ver/oclc_unsafe_math_on.bc | 0 .../bitcode-no-abi-ver/oclc_wavefrontsize64_off.bc | 0 .../bitcode-no-abi-ver/oclc_wavefrontsize64_on.bc | 0 .../Inputs/rocm/amdgcn/bitcode-no-abi-ver/ocml.bc | 0 .../rocm/amdgcn/bitcode-no-abi-ver/opencl.bc | 0 .../Inputs/rocm/amdgcn/bitcode/abi_version_400.bc | 0 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libcxx/utils/ci/Dockerfile | 12 +- libcxx/utils/ci/buildkite-pipeline.yml | 13 + libcxx/utils/ci/run-buildbot | 7 + .../generate_feature_test_macro_components.py | 2 +- libunwind/docs/index.rst | 2 +- libunwind/include/__libunwind_config.h | 8 + libunwind/src/DwarfInstructions.hpp | 19 + libunwind/src/DwarfParser.hpp | 27 +- libunwind/src/Registers.hpp | 186 ++++ libunwind/src/UnwindCursor.hpp | 16 + libunwind/src/UnwindRegistersRestore.S | 47 + libunwind/src/UnwindRegistersSave.S | 58 ++ libunwind/src/libunwind.cpp | 2 + lld/ELF/Arch/AArch64.cpp | 2 + lld/ELF/Arch/PPC.cpp | 12 + lld/ELF/Arch/PPC64.cpp | 16 +- lld/ELF/Config.h | 3 + lld/ELF/Driver.cpp | 12 +- lld/ELF/InputFiles.cpp | 80 +- lld/ELF/LTO.cpp | 8 +- lld/ELF/Relocations.cpp | 49 +- lld/ELF/Relocations.h | 3 +- lld/ELF/SymbolTable.cpp | 7 +- lld/ELF/Symbols.cpp | 18 +- lld/ELF/Symbols.h | 123 ++- lld/ELF/Writer.cpp | 26 +- lld/MachO/Driver.cpp | 21 + lld/MachO/InputFiles.cpp | 5 +- lld/MachO/Options.td | 1 - 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llvm/lib/Target/AArch64/SVEInstrFormats.td | 25 +- llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp | 15 + llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h | 3 + llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 2 +- llvm/lib/Target/AMDGPU/AMDGPUHSAMetadataStreamer.h | 2 +- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 99 +- llvm/lib/Target/AMDGPU/AMDGPULibFunc.h | 4 +- llvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.h | 2 +- .../Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp | 1 + .../Target/AMDGPU/AMDGPUResourceUsageAnalysis.cpp | 17 +- .../Target/AMDGPU/AMDGPUResourceUsageAnalysis.h | 12 +- llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 2 +- llvm/lib/Target/AMDGPU/GCNSubtarget.h | 4 + llvm/lib/Target/AMDGPU/MCA/AMDGPUCustomBehaviour.h | 4 +- llvm/lib/Target/AMDGPU/SIInstrInfo.cpp | 14 +- llvm/lib/Target/AMDGPU/SIInstructions.td | 6 +- llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp | 198 ++-- llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h | 2 +- llvm/lib/Target/ARM/ARMISelLowering.cpp | 1 + llvm/lib/Target/ARM/ARMRegisterInfo.cpp | 2 +- llvm/lib/Target/ARM/ThumbRegisterInfo.cpp | 2 +- .../Target/AVR/Disassembler/AVRDisassembler.cpp | 2 +- .../Target/AVR/MCTargetDesc/AVRELFObjectWriter.cpp | 2 +- llvm/lib/Target/AVR/MCTargetDesc/AVRMCExpr.h | 2 +- llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp | 1 + llvm/lib/Target/BPF/BPFPreserveDIType.cpp | 1 + llvm/lib/Target/Hexagon/HexagonGenInsert.cpp | 7 +- llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp | 3 +- .../Target/Hexagon/HexagonVectorLoopCarriedReuse.h | 2 +- .../MSP430/MCTargetDesc/MSP430AsmBackend.cpp | 2 +- .../MSP430/MCTargetDesc/MSP430ELFObjectWriter.cpp | 2 +- llvm/lib/Target/MSP430/MSP430TargetMachine.cpp | 2 +- llvm/lib/Target/Mips/Mips16RegisterInfo.cpp | 2 +- llvm/lib/Target/Mips/MipsSERegisterInfo.cpp | 2 +- llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp | 2 +- llvm/lib/Target/NVPTX/NVPTXTargetObjectFile.h | 2 +- llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp | 29 + llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 5 +- llvm/lib/Target/PowerPC/PPCTargetMachine.cpp | 11 +- llvm/lib/Target/RISCV/CMakeLists.txt | 1 + .../Target/RISCV/MCTargetDesc/RISCVAsmBackend.h | 2 +- .../RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp | 2 +- .../RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp | 2 +- llvm/lib/Target/RISCV/RISCV.h | 3 + llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp | 27 +- llvm/lib/Target/RISCV/RISCVISelLowering.cpp | 80 +- llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp | 2 +- .../Target/RISCV/RISCVRedundantCopyElimination.cpp | 179 ++++ llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp | 1 + llvm/lib/Target/RISCV/RISCVTargetMachine.cpp | 11 + .../Sparc/Disassembler/SparcDisassembler.cpp | 2 +- .../Sparc/MCTargetDesc/SparcELFObjectWriter.cpp | 2 +- llvm/lib/Target/Sparc/SparcTargetMachine.cpp | 2 +- llvm/lib/Target/Sparc/SparcTargetObjectFile.h | 2 +- llvm/lib/Target/SystemZ/SystemZRegisterInfo.h | 7 +- llvm/lib/Target/TargetIntrinsicInfo.cpp | 6 +- llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp | 2 +- .../Target/VE/MCTargetDesc/VEELFObjectWriter.cpp | 2 +- llvm/lib/Target/VE/VETargetMachine.cpp | 2 +- .../Target/WebAssembly/WebAssemblyAsmPrinter.cpp | 79 +- .../lib/Target/WebAssembly/WebAssemblyAsmPrinter.h | 2 +- .../WebAssembly/WebAssemblyMCLowerPrePass.cpp | 3 + llvm/lib/Target/X86/MCA/X86CustomBehaviour.h | 2 +- llvm/lib/Target/X86/X86.td | 8 +- llvm/lib/Target/X86/X86DomainReassignment.cpp | 2 +- llvm/lib/Target/X86/X86ISelLowering.cpp | 58 +- .../AggressiveInstCombine.cpp | 7 +- .../AggressiveInstCombineInternal.h | 4 +- llvm/lib/Transforms/Coroutines/CoroSplit.cpp | 1 + llvm/lib/Transforms/IPO/AttributorAttributes.cpp | 8 +- llvm/lib/Transforms/IPO/IROutliner.cpp | 11 +- llvm/lib/Transforms/IPO/OpenMPOpt.cpp | 2 +- llvm/lib/Transforms/IPO/PartialInlining.cpp | 2 +- llvm/lib/Transforms/IPO/SampleProfile.cpp | 6 + .../Transforms/InstCombine/InstCombineCalls.cpp | 4 +- .../Transforms/InstCombine/InstCombineCasts.cpp | 6 +- .../Transforms/InstCombine/InstCombineInternal.h | 2 +- .../InstCombine/InstCombineSimplifyDemanded.cpp | 20 + .../Instrumentation/HWAddressSanitizer.cpp | 1 + .../Transforms/Instrumentation/InstrOrderFile.cpp | 2 +- .../lib/Transforms/Instrumentation/MemProfiler.cpp | 4 +- .../Instrumentation/SanitizerCoverage.cpp | 1 + .../Transforms/Scalar/ConstraintElimination.cpp | 197 +++- llvm/lib/Transforms/Scalar/LoopInterchange.cpp | 43 +- llvm/lib/Transforms/Scalar/LoopPredication.cpp | 2 +- llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp | 1 + .../Transforms/Scalar/RewriteStatepointsForGC.cpp | 32 +- llvm/lib/Transforms/Scalar/SROA.cpp | 5 +- llvm/lib/Transforms/Utils/CodeLayout.cpp | 7 +- llvm/lib/Transforms/Utils/LCSSA.cpp | 1 + llvm/lib/Transforms/Utils/Local.cpp | 47 +- llvm/lib/Transforms/Utils/LoopVersioning.cpp | 3 +- llvm/lib/Transforms/Utils/SCCPSolver.cpp | 2 +- .../Transforms/Utils/ScalarEvolutionExpander.cpp | 4 +- llvm/lib/Transforms/Utils/SimplifyCFG.cpp | 311 +++++- llvm/lib/Transforms/Utils/SimplifyIndVar.cpp | 4 +- llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp | 2 +- .../Vectorize/LoopVectorizationPlanner.h | 2 +- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 3 +- llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 76 +- llvm/lib/WindowsManifest/WindowsManifestMerger.cpp | 2 +- llvm/lib/XRay/FDRTraceWriter.cpp | 2 +- .../test/Analysis/CallGraph/non-leaf-intrinsics.ll | 2 +- .../Analysis/LazyCallGraph/non-leaf-intrinsics.ll | 2 +- .../backward-dep-different-types.ll | 2 +- .../LoopAccessAnalysis/depend_diff_types.ll | 2 +- .../Analysis/LoopAccessAnalysis/forked-pointers.ll | 2 +- .../LoopAccessAnalysis/forward-loop-carried.ll | 2 +- .../LoopAccessAnalysis/forward-loop-independent.ll | 2 +- .../LoopAccessAnalysis/independent-interleaved.ll | 2 +- .../memcheck-for-loop-invariant.ll | 2 +- .../multiple-strides-rt-memory-checks.ll | 2 +- .../LoopAccessAnalysis/non-wrapping-pointer.ll | 2 +- llvm/test/Analysis/LoopAccessAnalysis/nullptr.ll | 2 +- .../LoopAccessAnalysis/number-of-memchecks.ll | 2 +- .../Analysis/LoopAccessAnalysis/pointer-phis.ll | 2 +- .../pointer-with-unknown-bounds.ll | 2 +- llvm/test/Analysis/LoopAccessAnalysis/pr31098.ll | 2 +- .../LoopAccessAnalysis/resort-to-memchecks-only.ll | 2 +- .../LoopAccessAnalysis/reverse-memcheck-bounds.ll | 2 +- .../Analysis/LoopAccessAnalysis/safe-no-checks.ll | 2 +- .../LoopAccessAnalysis/safe-with-dep-distance.ll | 2 +- .../store-to-invariant-check1.ll | 2 +- .../store-to-invariant-check2.ll | 2 +- .../store-to-invariant-check3.ll | 2 +- .../LoopAccessAnalysis/stride-access-dependence.ll | 2 +- .../Analysis/LoopAccessAnalysis/symbolic-stride.ll | 2 +- .../uncomputable-backedge-taken-count.ll | 2 +- .../LoopAccessAnalysis/underlying-objects-1.ll | 2 +- .../LoopAccessAnalysis/underlying-objects-2.ll | 2 +- .../unsafe-and-rt-checks-convergent.ll | 2 +- .../LoopAccessAnalysis/unsafe-and-rt-checks.ll | 2 +- .../wrapping-pointer-versioning.ll | 2 +- .../ValueTracking/memory-dereferenceable.ll | 2 +- llvm/test/Bitcode/invalid.test | 12 +- ...prelegalizercombiner-not-really-equiv-insts.mir | 81 +- ...h64-checkMergeStoreCandidatesForDependencies.ll | 73 ++ .../CodeGen/AArch64/aarch64-isel-csinc-type.ll | 20 +- llvm/test/CodeGen/AArch64/aarch64-isel-csinc.ll | 65 +- llvm/test/CodeGen/AArch64/arm64-csel.ll | 8 +- .../AArch64/fpconv-vector-op-scalarize-strict.ll | 33 - llvm/test/CodeGen/AArch64/neon-addlv.ll | 15 +- llvm/test/CodeGen/AArch64/sshl_sat.ll | 45 + .../CodeGen/AArch64/statepoint-call-lowering-sp.ll | 2 +- .../CodeGen/AArch64/statepoint-call-lowering.ll | 20 +- llvm/test/CodeGen/AArch64/sve-fcvt.ll | 374 +++++++ llvm/test/CodeGen/AArch64/sve-fpext-load.ll | 9 +- llvm/test/CodeGen/AArch64/sve-split-fcvt.ll | 54 +- llvm/test/CodeGen/AArch64/sve-vecreduce-fold.ll | 98 ++ llvm/test/CodeGen/AArch64/ushl_sat.ll | 41 + llvm/test/CodeGen/AArch64/vecreduce-add.ll | 33 +- .../CodeGen/AArch64/vector-op-scalarize-strict.ll | 59 ++ .../AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll | 8 +- llvm/test/CodeGen/AMDGPU/agpr-register-count.ll | 3 +- llvm/test/CodeGen/AMDGPU/amdpal-callable.ll | 8 +- .../AMDGPU/atomic_optimizations_global_pointer.ll | 32 +- .../AMDGPU/atomic_optimizations_local_pointer.ll | 176 ++-- .../AMDGPU/atomic_optimizations_pixelshader.ll | 44 +- .../attr-amdgpu-flat-work-group-size-vgpr-limit.ll | 1 - .../AMDGPU/call-alias-register-usage-agpr.ll | 31 + .../CodeGen/AMDGPU/call-alias-register-usage0.ll | 26 + .../CodeGen/AMDGPU/call-alias-register-usage1.ll | 29 + .../CodeGen/AMDGPU/call-alias-register-usage2.ll | 26 + .../CodeGen/AMDGPU/call-alias-register-usage3.ll | 26 + llvm/test/CodeGen/AMDGPU/indirect-call.ll | 32 +- llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll | 26 +- llvm/test/CodeGen/AMDGPU/ipra.ll | 2 + llvm/test/CodeGen/AMDGPU/llc-pipeline.ll | 60 +- .../CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll | 2 +- .../CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll | 138 +++ llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll | 5 +- llvm/test/CodeGen/AMDGPU/trap.ll | 4 +- llvm/test/CodeGen/AMDGPU/wqm.ll | 32 +- llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll | 73 +- llvm/test/CodeGen/AMDGPU/wwm-reserved.ll | 18 +- .../CodeGen/Generic/overloaded-intrinsic-name.ll | 16 +- llvm/test/CodeGen/PowerPC/O3-pipeline.ll | 1 - .../CodeGen/PowerPC/lower-intrinsics-afn-mass.ll | 4 +- .../CodeGen/PowerPC/lower-intrinsics-fast-mass.ll | 4 +- .../PowerPC/lower-intrinsics-nofast-mass.ll | 4 +- llvm/test/CodeGen/PowerPC/lower-scalar-mass-afn.ll | 4 +- .../test/CodeGen/PowerPC/lower-scalar-mass-fast.ll | 4 +- .../CodeGen/PowerPC/lower-scalar-mass-nofast.ll | 4 +- llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll | 82 ++ .../pow-025-075-intrinsic-scalar-mass-afn.ll | 4 +- .../pow-025-075-intrinsic-scalar-mass-fast.ll | 4 +- .../pow-025-075-nointrinsic-scalar-mass-fast.ll | 4 +- llvm/test/CodeGen/RISCV/double-convert.ll | 80 +- llvm/test/CodeGen/RISCV/double-round-conv-sat.ll | 180 ++-- llvm/test/CodeGen/RISCV/float-convert.ll | 80 +- llvm/test/CodeGen/RISCV/float-round-conv-sat.ll | 180 ++-- llvm/test/CodeGen/RISCV/fpclamptosat.ll | 140 +-- llvm/test/CodeGen/RISCV/half-convert.ll | 192 ++-- llvm/test/CodeGen/RISCV/half-round-conv-sat.ll | 180 ++-- llvm/test/CodeGen/RISCV/rotl-rotr.ll | 535 +++++++++- .../test/CodeGen/RISCV/rv64i-exhaustive-w-insts.ll | 100 +- llvm/test/CodeGen/RISCV/rv64zbb.ll | 20 + .../CodeGen/RISCV/rvv/common-shuffle-patterns.ll | 24 +- llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll | 75 ++ llvm/test/CodeGen/RISCV/rvv/fround-sdnode.ll | 320 ++++++ llvm/test/CodeGen/RISCV/rvv/interleave-crash.ll | 194 +--- llvm/test/CodeGen/RISCV/zext-with-load-is-free.ll | 16 +- llvm/test/CodeGen/Thumb2/mve-shuffle.ll | 187 +++- llvm/test/CodeGen/Thumb2/mve-vabdus.ll | 243 ++++- llvm/test/CodeGen/Thumb2/mve-vhadd.ll | 795 ++++++++++----- llvm/test/CodeGen/Thumb2/mve-vmovnstore.ll | 4 +- llvm/test/CodeGen/Thumb2/mve-vmulh.ll | 97 +- llvm/test/CodeGen/Thumb2/mve-vst2-post.ll | 19 +- llvm/test/CodeGen/Thumb2/mve-vst2.ll | 53 +- llvm/test/CodeGen/Thumb2/mve-vst3.ll | 22 +- llvm/test/CodeGen/Thumb2/mve-vst4-post.ll | 30 +- llvm/test/CodeGen/Thumb2/mve-vst4.ll | 24 +- .../test/CodeGen/WebAssembly/externref-tableget.ll | 3 +- .../test/CodeGen/WebAssembly/externref-tableset.ll | 3 +- .../test/CodeGen/WebAssembly/funcref-table_call.ll | 20 +- llvm/test/CodeGen/WebAssembly/funcref-tableget.ll | 3 +- llvm/test/CodeGen/WebAssembly/funcref-tableset.ll | 3 +- llvm/test/CodeGen/WebAssembly/global-get.ll | 14 +- llvm/test/CodeGen/WebAssembly/global-set.ll | 8 +- llvm/test/CodeGen/WebAssembly/only-data.ll | 14 + llvm/test/CodeGen/WebAssembly/table-types.ll | 37 + .../2011-12-26-extractelement-duplicate-load.ll | 12 +- .../X86/align-branch-boundary-noautopadding.ll | 2 +- .../X86/align-branch-boundary-suppressions.ll | 2 +- llvm/test/CodeGen/X86/atomic-bit-test.ll | 851 ++++++++++++++++ llvm/test/CodeGen/X86/avx512-cvt.ll | 18 +- llvm/test/CodeGen/X86/bitcast-vector-bool.ll | 6 +- llvm/test/CodeGen/X86/catchret-regmask.ll | 2 +- llvm/test/CodeGen/X86/combineIncDecVector-crash.ll | 2 +- llvm/test/CodeGen/X86/extractelement-load.ll | 12 +- llvm/test/CodeGen/X86/fast-isel-gc-intrinsics.ll | 8 +- .../X86/machine-sink-and-implicit-null-checks.ll | 2 +- llvm/test/CodeGen/X86/non-value-mem-operand.mir | 6 +- llvm/test/CodeGen/X86/oddsubvector.ll | 72 +- llvm/test/CodeGen/X86/pr33010.ll | 2 +- llvm/test/CodeGen/X86/pr45378.ll | 17 +- llvm/test/CodeGen/X86/scalar_widen_div.ll | 31 +- llvm/test/CodeGen/X86/segmented-stacks-dynamic.ll | 6 +- llvm/test/CodeGen/X86/shrink_vmul.ll | 214 ++-- llvm/test/CodeGen/X86/slow-pmulld.ll | 1054 +++++++------------- llvm/test/CodeGen/X86/sqrt-fastmath-tune.ll | 36 +- .../CodeGen/X86/stackmap-large-location-size.ll | 2 +- llvm/test/CodeGen/X86/statepoint-allocas.ll | 4 +- llvm/test/CodeGen/X86/statepoint-call-lowering.ll | 21 +- llvm/test/CodeGen/X86/statepoint-deopt-lowering.ll | 8 +- .../CodeGen/X86/statepoint-duplicates-export.ll | 8 +- llvm/test/CodeGen/X86/statepoint-far-call.ll | 2 +- llvm/test/CodeGen/X86/statepoint-fixup-call.mir | 2 +- .../CodeGen/X86/statepoint-fixup-copy-prop-neg.mir | 2 +- llvm/test/CodeGen/X86/statepoint-fixup-invoke.mir | 2 +- .../CodeGen/X86/statepoint-fixup-shared-ehpad.mir | 4 +- .../CodeGen/X86/statepoint-fixup-undef-def.mir | 2 +- llvm/test/CodeGen/X86/statepoint-fixup-undef.mir | 2 +- llvm/test/CodeGen/X86/statepoint-forward.ll | 8 +- llvm/test/CodeGen/X86/statepoint-gc-live.ll | 8 +- .../X86/statepoint-gctransition-call-lowering.ll | 16 +- .../X86/statepoint-invoke-ra-enter-at-end.mir | 18 +- .../X86/statepoint-invoke-ra-hoist-copies.mir | 28 +- .../X86/statepoint-invoke-ra-inline-spiller.mir | 8 +- .../statepoint-invoke-ra-remove-back-copies.mir | 16 +- llvm/test/CodeGen/X86/statepoint-invoke-ra.mir | 6 +- llvm/test/CodeGen/X86/statepoint-invoke.ll | 12 +- llvm/test/CodeGen/X86/statepoint-live-in-remat.ll | 2 +- llvm/test/CodeGen/X86/statepoint-live-in.ll | 34 +- llvm/test/CodeGen/X86/statepoint-no-extra-const.ll | 2 +- .../CodeGen/X86/statepoint-no-realign-stack.ll | 4 +- llvm/test/CodeGen/X86/statepoint-ra-no-ls.ll | 2 +- llvm/test/CodeGen/X86/statepoint-ra.ll | 8 +- llvm/test/CodeGen/X86/statepoint-regs.ll | 38 +- llvm/test/CodeGen/X86/statepoint-spill-lowering.ll | 4 +- .../X86/statepoint-spill-slot-size-promotion.ll | 2 +- llvm/test/CodeGen/X86/statepoint-stack-usage.ll | 20 +- .../test/CodeGen/X86/statepoint-stackmap-format.ll | 10 +- llvm/test/CodeGen/X86/statepoint-stackmap-size.ll | 2 +- llvm/test/CodeGen/X86/statepoint-two-results.ll | 2 +- llvm/test/CodeGen/X86/statepoint-uniqueing.ll | 8 +- .../CodeGen/X86/statepoint-vector-bad-spill.ll | 8 +- llvm/test/CodeGen/X86/statepoint-vector.ll | 10 +- llvm/test/CodeGen/X86/statepoint-vreg-details.ll | 26 +- llvm/test/CodeGen/X86/statepoint-vreg-folding.mir | 2 +- llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll | 12 +- .../X86/statepoint-vreg-unlimited-tied-opnds.ll | 2 +- llvm/test/CodeGen/X86/statepoint-vreg.ll | 36 +- llvm/test/CodeGen/X86/statepoint-vreg.mir | 2 +- llvm/test/CodeGen/X86/twoaddr-lea.ll | 2 +- llvm/test/CodeGen/X86/vec_cast.ll | 2 +- llvm/test/CodeGen/X86/vec_int_to_fp.ll | 591 +++++++---- llvm/test/CodeGen/X86/vector-shift-ashr-128.ll | 38 +- llvm/test/CodeGen/X86/vector-shift-ashr-256.ll | 9 +- llvm/test/CodeGen/X86/vector-shift-ashr-512.ll | 2 - .../ExecutionEngine/JITLink/RISCV/ELF_branch.s | 16 +- llvm/test/MC/WebAssembly/assembler-binary.ll | 2 +- llvm/test/MC/WebAssembly/stack-ptr-mclower.ll | 4 +- llvm/test/MC/X86/x86-directive-nops-errors.s | 2 +- .../SafepointIRVerifier/basic-use-after-reloc.ll | 2 +- llvm/test/SafepointIRVerifier/compares.ll | 12 +- llvm/test/SafepointIRVerifier/constant-bases.ll | 12 +- .../unreachable-block-tolerant.ll | 4 +- .../SafepointIRVerifier/unrecorded-live-at-sp.ll | 4 +- .../SafepointIRVerifier/use-derived-unrelocated.ll | 22 +- llvm/test/SafepointIRVerifier/uses-in-phi-nodes.ll | 20 +- .../CodeGenPrepare/X86/statepoint-relocate.ll | 18 +- llvm/test/Transforms/ConstraintElimination/and.ll | 41 + .../ConstraintElimination/gep-arithmetic.ll | 10 +- .../geps-unsigned-predicates.ll | 6 +- llvm/test/Transforms/ConstraintElimination/i128.ll | 34 + .../ConstraintElimination/large-system-growth.ll | 12 +- .../loops-bottom-tested-pointer-cmps.ll | 4 +- .../loops-header-tested-base.ll | 12 +- .../loops-header-tested-pointer-cmps.ll | 22 +- .../mixed-signed-unsigned-predicates.ll | 2 +- llvm/test/Transforms/ConstraintElimination/sge.ll | 20 +- llvm/test/Transforms/ConstraintElimination/zext.ll | 4 +- llvm/test/Transforms/EarlyCSE/gc_relocate.ll | 32 +- llvm/test/Transforms/GVN/gc_relocate.ll | 32 +- llvm/test/Transforms/InstCombine/div.ll | 43 + .../{Reassociate => InstCombine}/fast-basictest.ll | 522 +++++----- llvm/test/Transforms/InstCombine/gc.relocate.ll | 8 +- llvm/test/Transforms/InstCombine/icmp-mul-and.ll | 51 +- .../test/Transforms/InstCombine/mul-masked-bits.ll | 47 +- llvm/test/Transforms/InstCombine/pr53357.ll | 295 ++++++ .../Transforms/InstCombine/statepoint-cleanup.ll | 24 +- .../test/Transforms/InstCombine/statepoint-iter.ll | 16 +- llvm/test/Transforms/InstCombine/statepoint.ll | 32 +- llvm/test/Transforms/InstCombine/token.ll | 4 +- llvm/test/Transforms/InstSimplify/gc_relocate.ll | 4 +- llvm/test/Transforms/LICM/gc-relocate.ll | 6 +- llvm/test/Transforms/LoopInterchange/lcssa.ll | 12 +- .../reductions-across-inner-and-outer-loop.ll | 80 ++ .../Transforms/OpenMP/globalization_remarks.ll | 7 +- .../test/Transforms/OpenMP/remove_globalization.ll | 2 +- .../Transforms/PhaseOrdering/fast-basictest.ll | 307 ++++++ .../PhaseOrdering/fast-reassociate-gvn.ll | 103 ++ llvm/test/Transforms/Reassociate/fast-basictest.ll | 585 +++++------ .../RewriteStatepointsForGC/base-inference.ll | 32 +- .../RewriteStatepointsForGC/base-inttoptr.ll | 2 +- .../RewriteStatepointsForGC/base-pointers-1.ll | 2 +- .../RewriteStatepointsForGC/base-pointers-10.ll | 2 +- .../RewriteStatepointsForGC/base-pointers-11.ll | 2 +- .../RewriteStatepointsForGC/base-pointers-12.ll | 2 +- .../RewriteStatepointsForGC/base-pointers-13.ll | 2 +- .../RewriteStatepointsForGC/base-pointers-2.ll | 2 +- .../RewriteStatepointsForGC/base-pointers-3.ll | 2 +- .../RewriteStatepointsForGC/base-pointers-4.ll | 6 +- .../RewriteStatepointsForGC/base-pointers-5.ll | 2 +- .../RewriteStatepointsForGC/base-pointers-6.ll | 2 +- .../RewriteStatepointsForGC/base-pointers-7.ll | 2 +- .../RewriteStatepointsForGC/base-pointers-8.ll | 2 +- .../RewriteStatepointsForGC/base-pointers-9.ll | 2 +- .../RewriteStatepointsForGC/base-pointers.ll | 14 +- .../base-vector-inseltpoison.ll | 24 +- .../RewriteStatepointsForGC/base-vector.ll | 24 +- .../Transforms/RewriteStatepointsForGC/basic.ll | 10 +- .../Transforms/RewriteStatepointsForGC/basics.ll | 2 +- .../RewriteStatepointsForGC/call-gc-result.ll | 2 +- .../RewriteStatepointsForGC/deopt-intrinsic.ll | 6 +- .../deopt-lowering-attrs.ll | 8 +- .../gc-relocate-creation.ll | 2 +- .../RewriteStatepointsForGC/intrinsics-bare.ll | 2 +- .../RewriteStatepointsForGC/intrinsics.ll | 4 +- .../live-vector-nosplit-inseltpoison.ll | 12 +- .../RewriteStatepointsForGC/live-vector-nosplit.ll | 12 +- .../patchable-statepoints.ll | 4 +- .../rematerialize-derived-pointers.ll | 30 +- .../scalar-base-vector-2.ll | 6 +- .../RewriteStatepointsForGC/scalar-base-vector.ll | 16 +- .../RewriteStatepointsForGC/statepoint-attrs.ll | 2 +- .../statepoint-calling-conventions.ll | 4 +- .../RewriteStatepointsForGC/statepoint-format.ll | 4 +- .../unordered-atomic-memcpy.ll | 20 +- llvm/test/Transforms/SROA/alloca-struct.ll | 181 ---- ...e-compatible-invokes-of-landingpad-debuginfo.ll | 50 +- .../X86/merge-compatible-invokes-of-landingpad.ll | 764 +++++++++++--- llvm/test/Transforms/SimplifyCFG/invoke.ll | 89 +- .../SimplifyCFG/statepoint-invoke-unwind.ll | 2 +- llvm/test/Transforms/Util/strip-gc-relocates.ll | 12 +- llvm/test/Verifier/invalid-statepoint.ll | 21 +- llvm/test/Verifier/statepoint.ll | 8 +- .../tools/llvm-debuginfod-find/debuginfod.test | 6 +- .../tools/llvm-libtool-darwin/Inputs/arm64-asm.ll | 7 + .../tools/llvm-libtool-darwin/Inputs/x86_64-asm.ll | 7 + llvm/test/tools/llvm-libtool-darwin/arm64-asm.test | 9 + .../test/tools/llvm-libtool-darwin/x86_64-asm.test | 9 + .../tools/llvm-readobj/ELF/reloc-types-ppc.test | 163 +++ llvm/tools/llvm-libtool-darwin/CMakeLists.txt | 1 + .../llvm-libtool-darwin/llvm-libtool-darwin.cpp | 5 + .../tools/llvm-remark-size-diff/RemarkSizeDiff.cpp | 6 +- llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp | 94 ++ llvm/unittests/CodeGen/CMakeLists.txt | 1 + llvm/unittests/IR/DebugTypeODRUniquingTest.cpp | 1 + llvm/unittests/Support/MathExtrasTest.cpp | 14 + llvm/utils/gn/secondary/clang/test/BUILD.gn | 1 + .../gn/secondary/clang/tools/clang-pseudo/BUILD.gn | 9 + .../clang/unittests/Tooling/Syntax/Pseudo/BUILD.gn | 2 +- llvm/utils/gn/secondary/libcxx/include/BUILD.gn | 2 + .../gn/secondary/llvm/lib/Target/RISCV/BUILD.gn | 1 + .../llvm/tools/llvm-libtool-darwin/BUILD.gn | 1 + .../gn/secondary/llvm/unittests/CodeGen/BUILD.gn | 1 + mlir/benchmark/python/common.py | 2 +- mlir/cmake/modules/AddMLIR.cmake | 7 - mlir/docs/BufferDeallocationInternals.md | 70 +- mlir/docs/Diagnostics.md | 2 +- mlir/docs/DialectConversion.md | 4 +- mlir/docs/Dialects/emitc.md | 5 +- mlir/docs/LangRef.md | 12 +- mlir/docs/PatternRewriter.md | 16 +- mlir/docs/Rationale/Rationale.md | 10 +- mlir/docs/Tutorials/Toy/Ch-6.md | 5 +- .../docs/includes/img/branch_example_post_move.svg | 2 +- mlir/docs/includes/img/branch_example_pre_move.svg | 2 +- mlir/examples/toy/Ch6/mlir/LowerToLLVM.cpp | 6 +- mlir/examples/toy/Ch7/mlir/LowerToLLVM.cpp | 6 +- .../mlir/Analysis/Presburger/IntegerPolyhedron.h | 22 +- mlir/include/mlir/Analysis/Presburger/Utils.h | 3 +- .../ControlFlowToLLVM/ControlFlowToLLVM.h | 35 + .../ControlFlowToSPIRV/ControlFlowToSPIRV.h | 28 + mlir/include/mlir/Conversion/Passes.h | 4 +- mlir/include/mlir/Conversion/Passes.td | 46 +- .../Conversion/SCFToControlFlow/SCFToControlFlow.h | 28 + .../mlir/Conversion/SCFToStandard/SCFToStandard.h | 31 - mlir/include/mlir/Dialect/Arithmetic/Utils/Utils.h | 4 +- .../Dialect/Bufferization/Transforms/Passes.td | 12 +- mlir/include/mlir/Dialect/CMakeLists.txt | 1 + .../{Complex => ControlFlow}/CMakeLists.txt | 0 .../mlir/Dialect/ControlFlow/IR/CMakeLists.txt | 2 + .../mlir/Dialect/ControlFlow/IR/ControlFlow.h | 21 + .../mlir/Dialect/ControlFlow/IR/ControlFlowOps.h | 30 + .../IR/Ops.td => ControlFlow/IR/ControlFlowOps.td} | 274 +---- mlir/include/mlir/Dialect/Linalg/Utils/Utils.h | 2 +- mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td | 33 +- mlir/include/mlir/Dialect/SCF/SCFOps.td | 6 +- .../mlir/Dialect/SparseTensor/Pipelines/Passes.h | 53 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.h | 3 +- mlir/include/mlir/Dialect/StandardOps/IR/Ops.td | 279 +----- mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td | 44 +- mlir/include/mlir/Dialect/Vector/IR/VectorOps.td | 1 + mlir/include/mlir/IR/AffineMap.h | 15 +- mlir/include/mlir/IR/OpBase.td | 28 - mlir/include/mlir/InitAllDialects.h | 2 + mlir/lib/Analysis/Presburger/IntegerPolyhedron.cpp | 78 +- mlir/lib/Analysis/Presburger/PresburgerSet.cpp | 2 +- mlir/lib/Analysis/Presburger/Utils.cpp | 2 +- mlir/lib/Conversion/CMakeLists.txt | 4 +- .../Conversion/ControlFlowToLLVM/CMakeLists.txt | 21 + .../ControlFlowToLLVM/ControlFlowToLLVM.cpp | 148 +++ .../CMakeLists.txt | 11 +- .../ControlFlowToSPIRV/ControlFlowToSPIRV.cpp | 73 ++ mlir/lib/Conversion/GPUCommon/CMakeLists.txt | 1 + .../Conversion/GPUCommon/GPUToLLVMConversion.cpp | 2 + .../Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp | 5 +- mlir/lib/Conversion/LinalgToLLVM/CMakeLists.txt | 2 +- mlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp | 2 +- mlir/lib/Conversion/MemRefToLLVM/MemRefToLLVM.cpp | 9 +- mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp | 4 +- mlir/lib/Conversion/PassDetail.h | 4 + .../CMakeLists.txt | 7 +- .../SCFToControlFlow.cpp} | 94 +- .../ShapeToStandard/ConvertShapeConstraints.cpp | 3 +- mlir/lib/Conversion/StandardToLLVM/CMakeLists.txt | 1 + .../Conversion/StandardToLLVM/StandardToLLVM.cpp | 81 +- mlir/lib/Conversion/StandardToSPIRV/CMakeLists.txt | 1 + .../Conversion/StandardToSPIRV/StandardToSPIRV.cpp | 46 +- .../StandardToSPIRV/StandardToSPIRVPass.cpp | 5 +- .../lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp | 43 +- .../Dialect/Affine/Analysis/AffineStructures.cpp | 22 +- mlir/lib/Dialect/Arithmetic/Utils/Utils.cpp | 11 +- .../Async/Transforms/AsyncRuntimeRefCounting.cpp | 15 +- .../Async/Transforms/AsyncToAsyncRuntime.cpp | 66 +- mlir/lib/Dialect/Async/Transforms/CMakeLists.txt | 2 +- .../Transforms/BufferDeallocation.cpp | 6 +- mlir/lib/Dialect/CMakeLists.txt | 1 + .../Dialect/ControlFlow}/CMakeLists.txt | 0 mlir/lib/Dialect/ControlFlow/IR/CMakeLists.txt | 15 + .../Ops.cpp => ControlFlow/IR/ControlFlowOps.cpp} | 225 +---- .../Dialect/GPU/Transforms/AllReduceLowering.cpp | 22 +- .../lib/Dialect/GPU/Transforms/KernelOutlining.cpp | 3 +- mlir/lib/Dialect/Linalg/Transforms/Detensorize.cpp | 5 +- mlir/lib/Dialect/Linalg/Transforms/Fusion.cpp | 4 +- .../Dialect/Linalg/Transforms/FusionOnTensors.cpp | 4 + mlir/lib/Dialect/Linalg/Transforms/PassDetail.h | 4 - mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp | 15 +- mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp | 37 +- .../Dialect/MemRef/Transforms/FoldSubViewOps.cpp | 9 +- mlir/lib/Dialect/SCF/SCF.cpp | 19 +- mlir/lib/Dialect/Shape/IR/Shape.cpp | 145 ++- .../Dialect/SparseTensor/Pipelines/CMakeLists.txt | 2 +- .../Pipelines/SparseTensorPipelines.cpp | 18 +- mlir/lib/Dialect/StandardOps/CMakeLists.txt | 1 + mlir/lib/Dialect/StandardOps/IR/Ops.cpp | 816 +-------------- mlir/lib/Dialect/Tensor/IR/TensorOps.cpp | 17 +- mlir/lib/Dialect/Vector/IR/VectorOps.cpp | 27 + mlir/lib/IR/AffineMap.cpp | 32 +- mlir/lib/Target/Cpp/TranslateRegistration.cpp | 2 + mlir/lib/Target/Cpp/TranslateToCpp.cpp | 18 +- .../Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp | 1 + mlir/python/CMakeLists.txt | 8 + .../python/mlir/dialects/ControlFlowOps.td | 14 +- mlir/python/mlir/dialects/cf.py | 5 + mlir/test/Analysis/test-alias-analysis.mlir | 8 +- mlir/test/Analysis/test-dominance.mlir | 18 +- mlir/test/Analysis/test-liveness.mlir | 32 +- mlir/test/CAPI/ir.c | 6 +- .../Conversion/AsyncToLLVM/convert-to-llvm.mlir | 4 +- .../ControlFlowToSPIRV/cf-ops-to-spirv.mlir | 41 + .../Conversion/GPUToNVVM/wmma-ops-to-nvvm.mlir | 6 +- .../Conversion/OpenMPToLLVM/convert-to-llvmir.mlir | 6 +- .../convert-to-cfg.mlir | 200 ++-- .../ShapeToStandard/convert-shape-constraints.mlir | 6 +- .../Conversion/StandardToLLVM/convert-funcs.mlir | 2 +- .../Conversion/StandardToLLVM/func-memref.mlir | 6 +- .../StandardToLLVM/standard-to-llvm.mlir | 68 +- .../StandardToSPIRV/std-ops-to-spirv.mlir | 42 - mlir/test/Conversion/VectorToSPIRV/simple.mlir | 31 + mlir/test/Dialect/Affine/invalid.mlir | 4 +- .../Dialect/Async/async-runtime-ref-counting.mlir | 62 +- .../async-to-async-runtime-eliminate-blocking.mlir | 62 +- .../test/Dialect/Async/async-to-async-runtime.mlir | 20 +- .../Transforms/buffer-deallocation.mlir | 170 ++-- .../canonicalize.mlir} | 132 ++- .../parser.mlir => ControlFlow/invalid.mlir} | 8 +- .../Dialect/{Standard => ControlFlow}/ops.mlir | 18 +- mlir/test/Dialect/GPU/all-reduce-max.mlir | 84 +- mlir/test/Dialect/GPU/all-reduce.mlir | 84 +- mlir/test/Dialect/GPU/outlining.mlir | 2 +- mlir/test/Dialect/Linalg/canonicalize.mlir | 4 +- .../comprehensive-module-bufferize-invalid.mlir | 2 +- .../Dialect/Linalg/detensorize_br_operands.mlir | 8 +- mlir/test/Dialect/Linalg/detensorize_if.mlir | 42 +- mlir/test/Dialect/Linalg/detensorize_while.mlir | 18 +- .../Linalg/detensorize_while_impure_cf.mlir | 18 +- .../Dialect/Linalg/detensorize_while_pure_cf.mlir | 12 +- .../test/Dialect/Linalg/tile-and-fuse-no-fuse.mlir | 2 +- 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.../Analysis/Presburger/IntegerPolyhedronTest.cpp | 2 +- openmp/libomptarget/CMakeLists.txt | 3 - openmp/libomptarget/DeviceRTL/CMakeLists.txt | 4 +- openmp/libomptarget/deviceRTLs/CMakeLists.txt | 14 - .../libomptarget/deviceRTLs/amdgcn/CMakeLists.txt | 193 ---- .../deviceRTLs/amdgcn/src/amdgcn_interface.h | 19 - .../deviceRTLs/amdgcn/src/amdgcn_locks.hip | 34 - .../deviceRTLs/amdgcn/src/amdgcn_smid.hip | 64 -- .../deviceRTLs/amdgcn/src/target_impl.h | 83 -- .../deviceRTLs/amdgcn/src/target_impl.hip | 226 ----- openmp/libomptarget/deviceRTLs/common/allocator.h | 44 - openmp/libomptarget/deviceRTLs/common/debug.h | 293 ------ .../common/generated_microtask_cases.gen | 405 -------- .../deviceRTLs/common/include/target.h | 94 -- .../deviceRTLs/common/include/target/shuffle.h | 102 -- openmp/libomptarget/deviceRTLs/common/omptarget.h | 282 ------ openmp/libomptarget/deviceRTLs/common/omptargeti.h | 223 ----- .../libomptarget/deviceRTLs/common/src/cancel.cu | 31 - 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