[Tcwg-commits] [gcc] branch master updated (34efa442016 -> 736ae0a005d)

24 May 2025


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unknown user pushed a change to branch master
in repository gcc.
from  34efa442016 Daily bump.
       new  2fab99bb95d RISC-V: Combine vec_duplicate + vor.vv to vor.vx on GR2VR cost
       new  2e09013aef8 RISC-V: Add test for vec_duplicate + vor.vv combine case 0  [...]
       new  736ae0a005d RISC-V: Add test for vec_duplicate + vor.vv combine case 1  [...]
The 3 revisions listed above as "new" are entirely new to this
repository and will be described in separate emails.  The revisions
listed as "adds" were already present in the repository and have only
been added to this reference.
Summary of changes:
 gcc/config/riscv/riscv-v.cc                        |   2 +
 gcc/config/riscv/riscv.cc                          |   1 +
 gcc/config/riscv/vector-iterators.md               |   2 +-
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-1-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-2-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-3-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-4-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-5-u8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-i8.c   |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u16.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u32.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u64.c  |   2 +
 .../gcc.target/riscv/rvv/autovec/vx_vf/vx-6-u8.c   |   2 +
 .../riscv/rvv/autovec/vx_vf/vx_binary_data.h       | 392 +++++++++++++++++++++
 .../{vx_vadd-run-1-i16.c => vx_vor-run-1-i16.c}    |   4 +-
 .../{vx_vand-run-1-i32.c => vx_vor-run-1-i32.c}    |   4 +-
 .../{vx_vand-run-1-i64.c => vx_vor-run-1-i64.c}    |   4 +-
 .../{vx_vand-run-1-i8.c => vx_vor-run-1-i8.c}      |   4 +-
 .../{vx_vadd-run-1-u16.c => vx_vor-run-1-u16.c}    |   4 +-
 .../{vx_vadd-run-1-u32.c => vx_vor-run-1-u32.c}    |   4 +-
 .../{vx_vadd-run-1-u64.c => vx_vor-run-1-u64.c}    |   4 +-
 .../{vx_vadd-run-1-u8.c => vx_vor-run-1-u8.c}      |   4 +-
 60 files changed, 508 insertions(+), 17 deletions(-)
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vadd-run-1-i16.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vand-run-1-i32.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vand-run-1-i64.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vand-run-1-i8.c => vx_vo [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vadd-run-1-u16.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vadd-run-1-u32.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vadd-run-1-u64.c => vx_v [...]
 copy gcc/testsuite/gcc.target/riscv/rvv/autovec/vx_vf/{vx_vadd-run-1-u8.c => vx_vo [...]
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[Tcwg-commits] [gcc] branch master updated (34efa442016 -> 736ae0a005d)