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tcwg-buildslave pushed a change to branch linaro-local/ci/tcwg_kernel/llvm-release-aarch64-next-allmodconfig in repository toolchain/ci/qemu.
from 33ba8b0adc Merge remote-tracking branch 'remotes/vivier2/tags/trivial-b [...] adds cb53b283b5 hw/riscv: sifive_u: Switch to use qemu_fdt_setprop_string_ar [...] adds 2cc04550ac hw/riscv: virt: Switch to use qemu_fdt_setprop_string_array( [...] adds 7cfbb17f02 hw/riscv: Support the official CLINT DT bindings adds 60bb5407f0 hw/riscv: Support the official PLIC DT bindings adds 3ede8967c8 docs/system/riscv: Correct the indentation level of supporte [...] adds 0147af69ab docs/system/riscv: sifive_u: Document '-dtb' usage adds a0acd0a175 hw/riscv: Use macros for BIOS image names adds 143897b501 hw/riscv: microchip_pfsoc: Support direct kernel boot adds 719f0f603c target/riscv: fix wfi exception behavior adds 6debd840c8 docs/system: Move the RISC-V -bios information to removed adds bbf3d1b48f target/riscv: Do not include 'pmp.h' in user emulation adds 9a575d33fb target/riscv: Remove unnecessary riscv_*_names[] declaration adds a722701dd3 target/riscv: Dump CSR mscratch/sscratch/satp adds 787a4baf91 target/riscv/pmp: Add assert for ePMP operations adds eee2d61e20 target/riscv: Pass the same value to oprsz and maxsz. adds 00718208c1 target/riscv: reformat @sh format encoding for B-extension adds 438240185a target/riscv: rvb: count leading/trailing zeros adds 1e16310ca1 target/riscv: rvb: count bits set adds 0bcdb686e5 target/riscv: rvb: logic-with-negate adds 6ef5843182 target/riscv: rvb: pack two words into one register adds 82655d8115 target/riscv: rvb: min/max instructions adds 2a81973829 target/riscv: rvb: sign-extend instructions adds 981d3568df target/riscv: add gen_shifti() and gen_shiftiw() helper functions adds 23cd17773b target/riscv: rvb: single-bit instructions adds 91d8fc6768 target/riscv: rvb: shift ones adds e58529a8d0 target/riscv: rvb: rotate (left/right) adds 831ec7f3d1 target/riscv: rvb: generalized reverse adds c24f0422fb target/riscv: rvb: generalized or-combine adds 920a1f9955 target/riscv: rvb: address calculation adds 3a4a43e4e2 target/riscv: rvb: add/shift with prefix zero-extend adds d52e94081e target/riscv: rvb: support and turn on B-extension from comm [...] adds d2c1a177b1 target/riscv: rvb: add b-ext version cpu option adds a4716fd8d7 Merge remote-tracking branch 'remotes/alistair/tags/pull-ris [...] adds 7de2e85653 yank: Unregister function when using TLS migration adds 6b8c2eb5c6 migration/rdma: Fix cm event use after free adds d80f54ce53 channel-socket: Only set CLOEXEC if we have space for fds adds 5b6116d326 io/net-listener: Call the notifier during finalize adds 1df6ddb43b migration: Add cleanup hook for inwards migration adds a59136f3b1 migration/socket: Close the listener at the end adds 8bd1078aeb sockets: Support multipath TCP adds 7afa08cd8f migration/dirtyrate: make sample page count configurable adds a4a571d978 hmp: Add "calc_dirty_rate" and "info dirty_rate" cmds adds 7fe7fae8b4 Merge remote-tracking branch 'remotes/dgilbert-gitlab/tags/p [...] adds d60c75d28f vhost-vdpa: skip ram device from the IOTLB mapping adds d0416d487b vhost-vdpa: map virtqueue notification area if possible adds c33f23a419 vhost-vdpa: don't initialize backend_features adds 1b03117211 vhost-vdpa: remove the unused vhost_vdpa_get_acked_features() adds 48f596c5a7 netdev: add more commands to preconfig mode adds f1ff9c4377 Remove some duplicate trace code. adds 229620d52e Fix the qemu crash when guest shutdown during checkpoint adds 7c2eae9a77 Optimize the function of filter_send adds 3ba024457f Remove migrate_set_block_enabled in checkpoint adds 9b492719dd Add a function named packet_new_nocopy for COLO. adds 0c7af1a778 Add the function of colo_compare_cleanup adds 5a2d9929ac Fixed calculation error of pkt->header_size in fill_pkt_tcp_info() adds 894fc4fd67 Merge remote-tracking branch 'remotes/jasowang/tags/net-pull [...] adds 104cc2c085 meson: Split out tcg/meson.build adds c634754172 meson: Split out fpu/meson.build adds b0a0794a0f tcg: Re-order tcg_region_init vs tcg_prologue_init adds bd35f2ceac tcg: Remove error return from tcg_region_initial_alloc__locked adds 0430ca00f5 tcg: Split out tcg_region_initial_alloc adds bf042e8e52 tcg: Split out tcg_region_prologue_set adds 5ff7258cc6 tcg: Split out region.c adds 324b9d462e accel/tcg: Inline cpu_gen_init adds c46184a90a accel/tcg: Move alloc_code_gen_buffer to tcg/region.c adds 7109ef15c5 accel/tcg: Rename tcg_init to tcg_init_machine adds a76aabd37b tcg: Create tcg_init adds fa79cde6ed accel/tcg: Merge tcg_exec_init into tcg_init_machine adds efba8ae9f6 accel/tcg: Use MiB in tcg_init_machine adds 43b972b7eb accel/tcg: Pass down max_cpus to tcg_init adds 0e2d61cf29 tcg: Introduce tcg_max_ctxs adds 26a75d12d3 tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h adds 77bd7fd125 tcg: Replace region.end with region.total_size adds c2471ca0de tcg: Rename region.start to region.after_prologue adds 01afda9919 tcg: Tidy tcg_n_regions adds a4df1b2d19 tcg: Tidy split_cross_256mb adds 47d590df34 tcg: Move in_code_gen_buffer and tests to region.c adds 032a4b1ba0 tcg: Allocate code_gen_buffer into struct tcg_region_state adds 7be9ebcf92 tcg: Return the map protection from alloc_code_gen_buffer adds cd9ea992e9 tcg: Sink qemu_madvise call to common code adds d7107fc00a util/osdep: Add qemu_mprotect_rw adds ba22783d6e tcg: Round the tb_size default from qemu_get_host_physmem adds 22c6a9938f tcg: Merge buffer protection and guard page protection adds b7da02dad0 tcg: When allocating for !splitwx, begin with PROT_NONE adds 42eb6dfcf1 tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/ adds a80cdd3183 tcg: Introduce tcg_remove_ops_after adds a14b3ad11a tcg: Fix documentation for tcg_constant_* vs tcg_temp_free_* adds c372565d08 tcg/arm: Fix tcg_out_op function signature adds f291f45f4e softfloat: Fix tp init in float32_exp2 adds a5a8b84772 docs/devel: Explain in more detail the TB chaining mechanisms adds fbe7919ece Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-t [...] adds e0bd0cd43e docs: add table of contents to QAPI references adds 491024a5b4 docs: document how to pass secret data to QEMU adds 1c45af36e7 docs: document usage of the authorization framework adds e2bf32dfab docs: recommend SCRAM-SHA-256 SASL mech instead of SHA-1 variant adds 213de8a2fb sasl: remove comment about obsolete kerberos versions adds 626ff6515d migration: add trace point when vm_stop_force_state fails adds 8af3f5c6d6 softmmu: add trace point when bdrv_flush_all fails adds c7ddc8821d block: preserve errno from fdatasync failures adds 60ff2ae2a2 block: add trace point when fdatasync fails adds 99be1ac366 block: remove duplicate trace.h include adds 85cd1cc668 migration: use GDateTime for formatting timestamp in snapshot names adds 39683553f9 block: use GDateTime for formatting timestamp when dumping s [...] adds 970bc16f60 usb/dev-mtp: use GDateTime for formatting timestamp for objects adds 1ea06abcee Merge remote-tracking branch 'remotes/berrange-gitlab/tags/m [...]
No new revisions were added by this update.
Summary of changes: accel/tcg/internal.h | 2 + accel/tcg/tcg-all.c | 32 +- accel/tcg/translate-all.c | 439 +----------- block/file-posix.c | 10 +- block/qapi.c | 11 +- block/trace-events | 1 + bsd-user/main.c | 3 +- docs/devel/tcg.rst | 103 ++- docs/interop/qemu-ga-ref.rst | 3 + docs/interop/qemu-qmp-ref.rst | 3 + docs/interop/qemu-storage-daemon-qmp-ref.rst | 3 + docs/system/authz.rst | 263 +++++++ docs/system/deprecated.rst | 19 - docs/system/index.rst | 2 + docs/system/removed-features.rst | 5 + docs/system/riscv/microchip-icicle-kit.rst | 50 +- docs/system/riscv/sifive_u.rst | 77 ++- docs/system/secrets.rst | 162 +++++ docs/system/target-riscv.rst | 13 +- docs/system/vnc-security.rst | 7 +- fpu/meson.build | 1 + fpu/softfloat.c | 2 +- hmp-commands-info.hx | 13 + hmp-commands.hx | 16 + hw/riscv/microchip_pfsoc.c | 81 ++- hw/riscv/sifive_u.c | 24 +- hw/riscv/spike.c | 12 +- hw/riscv/virt.c | 25 +- hw/usb/dev-mtp.c | 9 +- hw/virtio/vhost-vdpa.c | 100 ++- include/hw/riscv/boot.h | 5 + include/hw/virtio/vhost-vdpa.h | 6 + include/monitor/hmp.h | 2 + include/net/vhost-vdpa.h | 1 - include/qemu/osdep.h | 1 + include/sysemu/tcg.h | 2 - include/tcg/tcg.h | 28 +- io/channel-socket.c | 8 +- io/dns-resolver.c | 4 + io/net-listener.c | 3 + linux-user/main.c | 1 - meson.build | 12 +- migration/channel.c | 26 +- migration/colo.c | 6 - migration/dirtyrate.c | 78 ++- migration/dirtyrate.h | 8 +- migration/migration.c | 8 + migration/migration.h | 4 + migration/multifd.c | 8 +- migration/qemu-file-channel.c | 4 +- migration/rdma.c | 11 +- migration/savevm.c | 13 +- migration/socket.c | 24 +- migration/trace-events | 1 + net/colo-compare.c | 25 +- net/colo-compare.h | 1 + net/colo.c | 25 +- net/colo.h | 1 + net/filter-mirror.c | 8 +- net/filter-rewriter.c | 3 +- net/net.c | 4 + net/vhost-vdpa.c | 9 - qapi/migration.json | 15 +- qapi/net.json | 6 +- qapi/sockets.json | 5 +- qemu.sasl | 15 +- softmmu/cpus.c | 7 +- softmmu/runstate.c | 1 + softmmu/trace-events | 3 + target/riscv/bitmanip_helper.c | 90 +++ target/riscv/cpu.c | 38 +- target/riscv/cpu.h | 7 +- target/riscv/cpu_bits.h | 1 + target/riscv/helper.h | 6 + target/riscv/insn32.decode | 87 ++- target/riscv/insn_trans/trans_rvb.c.inc | 438 ++++++++++++ target/riscv/insn_trans/trans_rvi.c.inc | 54 +- target/riscv/insn_trans/trans_rvv.c.inc | 89 +-- target/riscv/meson.build | 1 + target/riscv/op_helper.c | 11 +- target/riscv/pmp.c | 4 + target/riscv/translate.c | 306 ++++++++ tcg/aarch64/tcg-target.h | 1 + tcg/arm/tcg-target.c.inc | 3 +- tcg/arm/tcg-target.h | 1 + tcg/i386/tcg-target.h | 2 + tcg/meson.build | 14 + tcg/mips/tcg-target.h | 6 + tcg/ppc/tcg-target.h | 2 + tcg/region.c | 999 +++++++++++++++++++++++++++ tcg/riscv/tcg-target.h | 1 + tcg/s390/tcg-target.h | 3 + tcg/sparc/tcg-target.h | 1 + tcg/{tcg-common.c => tcg-internal.h} | 26 +- tcg/tcg.c | 651 ++--------------- tcg/tci/tcg-target.h | 1 + util/osdep.c | 9 + util/qemu-sockets.c | 23 + 98 files changed, 3337 insertions(+), 1421 deletions(-) create mode 100644 docs/system/authz.rst create mode 100644 docs/system/secrets.rst create mode 100644 fpu/meson.build create mode 100644 target/riscv/bitmanip_helper.c create mode 100644 target/riscv/insn_trans/trans_rvb.c.inc create mode 100644 tcg/meson.build create mode 100644 tcg/region.c copy tcg/{tcg-common.c => tcg-internal.h} (69%)