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from ac0ecde9f0f [AArch64] Improve code generation for logical instructions [...] new 7a610e66b27 [Simplify] Add testcase to show that merging conditional st [...] new 01c014ca988 Revert "[AArch64] Improve code generation for logical instr [...] new 5037cf29e41 Fix typo in comment
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Summary of changes: include/llvm/IR/ConstantRange.h | 2 +- include/llvm/Target/TargetLowering.h | 53 ++++----- lib/CodeGen/SelectionDAG/TargetLowering.cpp | 66 +++++------ lib/Target/AArch64/AArch64ISelLowering.cpp | 139 ----------------------- lib/Target/AArch64/AArch64ISelLowering.h | 3 - lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 5 +- lib/Target/X86/X86ISelLowering.cpp | 4 +- lib/Target/XCore/XCoreISelLowering.cpp | 4 +- test/CodeGen/AArch64/optimize-imm.ll | 64 ----------- test/Transforms/SimplifyCFG/merge-cond-stores.ll | 39 +++++++ 10 files changed, 98 insertions(+), 281 deletions(-) delete mode 100644 test/CodeGen/AArch64/optimize-imm.ll